JP3448908B2 - Plate making equipment - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a plate making apparatus for intaglio or letterpress printing represented by, for example, gravure printing, and in particular, the plate making processing speed is changed by changing the image data transfer method at the time of plate making. An improved plate making apparatus.

A mechanism for forming an image or the like on a rotating cylinder (including the case of directly engraving with a laser or forming an image by charging) (not only printing but also a facsimile, a printer and a copying machine) Can also be applied to.

[0003]

2. Description of the Related Art For example, gravure printing, which is known as a type of intaglio printing, is used particularly when high-speed printing of image data such as photographs on paper having a large number of copies. Further, as such an intaglio plate making apparatus, for example, in Japanese Patent Application Laid-Open No. 2-139238, a rotating cylindrical plate sheet is irradiated with a semiconductor laser on its surface to form irregularities corresponding to image data. A plate-making device for forming is disclosed.

Furthermore, the applicant of the present application reduced the load on the microcomputer (CPU) related to the plate-making timing of image data on the plate sheet in this type of plate-making apparatus, thereby significantly shortening the plate-making time. I have applied for a plate-making device first.

FIG. 6 is a schematic configuration diagram showing an image data transfer path of this plate making apparatus. First, its schematic configuration will be described. A cylindrical plate cylinder 2 that is rotationally driven by a motor 1.
A plate sheet 3 made of a thermoplastic resin such as polyethylene resin is wound around the outer peripheral surface of the plate, and the surface of the plate sheet 3 is irradiated with a laser beam from a semiconductor laser 4 while being rotated at a constant speed. By doing so, the plate-making depression 5 corresponding to the image data is formed.

If the laser irradiation is synchronized with the image and is performed over the entire surface of the plate sheet 3, the plate sheet 3 is formed with irregularities corresponding to the image. Therefore, the semiconductor laser 4
Is capable of moving at a constant speed in the axial direction of the plate cylinder 2 via a ball screw 7 rotated by another motor 6, so that the plate sheet 3 is scanned in the lateral direction. 8
Is a movement limit sensor for detecting the arrival of the end of the ball screw of the semiconductor laser 4 and stopping the drive system such as the motors 1 and 6.

The plate cylinder 2 is provided with a rotary encoder 9. The rotary encoder 9 includes a predetermined number (for example, 100,000 times) of encoder pulses (also referred to as a reference pulse) a per one rotation of the plate cylinder 2 and an absolute position signal (encoder Z that indicates an absolute rotational position of the plate cylinder 2). Phase signal b) is output and is input to a plate making position detection circuit (hardware circuit) 10 for detecting the plate making position. The plate making position detection circuit 10 is preset with a plate making reference position, a starting position, and a plate making point interval value by a CPU (microcomputer) 11, and a plate making timing signal c synchronized with an encoder pulse a and a plate cylinder 2 reference position. The signal d is output.

The plate-making timing signal c is a signal indicating the starting position of each plate-making process, which has been covered by interrupt processing to the CPU until now, but the encoder pulse a is counted up by hardware. As a result, it is output from the plate-making position detection circuit 10 to the CPU 11 and the image data register 12.

The image data register 12 is a preload register 12a in which the image data for the next plate making is written in advance.
And the gradation conversion register 12b, and shifts the image data e from the preload register 12a to the gradation conversion circuit 13 via the gradation conversion register 12b at the input timing of the plate-making timing signal c.
Therefore, before the input timing of the plate-making timing signal c, the corresponding image data e is stored in the preload register 12a.
Must be written in advance. Then, the plate-making data f subjected to the gradation conversion here is then sent to the laser drive circuit 14 and becomes a laser drive current corresponding to the plate-making data f to drive the semiconductor laser 4, and finally on the plate sheet 3. A predetermined plate-making recess 5 is formed in.

Here, the CPU 11 counts the number of signals c input so far during the interrupt processing by the input of the plate-making timing signal c, and detects the plate-making position when the plate-making point for one rotation of the plate cylinder 2 is reached. Processing for stopping the output of the plate-making timing signal c is performed on the circuit 10, but in addition to that, the next image data e is transferred to the image memory 1 during the same interrupt processing.
5 is read out, stored in a register in the CPU 11 once, and then written in the preload register 12a. This writing must be performed before the next plate-making timing signal c is generated. Moreover, CPU
Prior to plate-making, reference numeral 11 writes all image data E to be plate-made into an image memory 15 from a host computer (not shown) via a communication interface (I / F) 16 and a bus (VME Bus) 17. Is also being processed. The image memory 15 has 14 megabytes (M
The memory capacity of B) corresponds to A4 size platemaking data.

[0011]

However, in the plate making apparatus described above, the process of counting the encoder pulses a and detecting the plate making timing is performed by the CPU up to the plate making position detecting circuit 10. The counting of the number of plate making points as described above and the writing of the image data into the preload register 12a are both performed by the CPU.
It was carried out by interruption processing to No. 11, and due to the interruption processing time (theoretically, it takes 35 μsec), it was not possible to carry out plate making at a considerably high plate cylinder rotation speed.

That is, if it is attempted to make A3 size image data using this plate making apparatus, the plate cylinder diameter is 17
Under the conditions of 1 mm and resolution (dot spacing) 53 μm,
When the plate cylinder rotation speed exceeds 2.84 rps, new data cannot be written to the preload register 12a in time, and the plate-making dots are skipped or missing. The reason is that the plate-making dot interval time at this time, that is, the output interval of the plate-making timing signal c is 53 μm ÷ (171 mm × π × 2.84 rps) = 35.
This is because it becomes μsec and the theoretical interrupt processing time is reached, and at a plate cylinder rotation speed higher than this, the interrupt processing of the CPU 11 cannot be in time for the interval of the plate making timing signal c.

Therefore, in this plate making apparatus, for example, in response to a demand for high-speed plate making such as a plate cylinder rotation speed of 10 rps, a resolution of 53 μm, and a plate making timing signal interval of 10 μsec, the CPU 11 etc. must be replaced with a considerably high speed type. It has to be, and it is difficult in reality.

In addition, although the plate making apparatus described above has a memory capacity of 14 MB as an A4 size compatible type, in order to sufficiently cover even higher resolution image data of A3 size, the image memory 15 Against 5
A memory capacity of about 0 MB is required, and the cost is increased to have such a memory capacity. Further, it takes ten minutes or more to store all the data in the image memory 15 before plate making, and the plate making time becomes longer accordingly.

In view of the above-mentioned problems of the plate making apparatus, the present invention is capable of plate making image data of about A3 size without prolonging the plate making time (in other words, the plate making time can be further shortened) and An object of the present invention is to provide a plate making apparatus capable of reducing the memory capacity of an image memory.

[0016]

In order to achieve the above object, a plate making apparatus according to the present invention is provided with a data forming means for forming image data consisting of concaves and convexes on a rotated cylindrical plate sheet and a rotation of the plate sheet. Then, an encoder that outputs an encoder pulse consisting of a predetermined number of pulses and an absolute position signal that indicates the absolute rotation position of the rotation, and a platemaking timing signal and a reference position signal for the plate sheet from the encoder pulse and the absolute position signal are output. A plate making position detecting means for counting the number of plate making timing signals output together with the plate making position and stopping the output of the plate making timing signal after outputting a predetermined number of signals corresponding to one rotation of the plate sheet, and communication for inputting image data from the outside. The interface, the image memory that partially stores the input image data, and the image data transferred from the image memory. The image data register for temporarily storing the image data, the image data DMA transfer bus for interconnecting the communication interface, the image memory and the image data register, and the image data read control to the image memory according to the output of the plate-making timing signal. Then, the read image data is DMA-transferred to the image data register, and at the same time, according to the read image data amount in the image memory,
It has a data transfer control means for DMA-transferring new image data to the image memory from the communication interface, and a microcomputer for operating the data forming means based on the image data stored in the image data register and for controlling the plate making.

[0017]

The plate-making position detecting means counts the number of the plate-making timing signals output, in addition to the conventional output process of the plate-making timing signal and the reference position signal, and outputs the predetermined number of signals corresponding to one rotation of the plate sheet. After that, an interrupt process which is conventionally performed by a microcomputer (CPU), that is, the output of the plate-making timing signal is stopped, is executed.

In addition, the data transfer control means sequentially reads the read image data every time the plate-making timing signal is output.
Since the DMA transfer is performed to the image data register, the data transfer process via the bus of the microcomputer can be eliminated, and a sufficient margin can be provided for the data transfer even if the plate cylinder rotation speed is increased. Furthermore,
When the amount of read image data in the image memory exceeds a certain amount, the data transfer control means externally DMA-transfers new image data to the image memory.
Since the image data in the image memory is rewritten one after another during plate making, the memory capacity can be minimized and plate making with an unlimited data size can be performed.

[0019]

Embodiments of the present invention will be described below with reference to the drawings.
explain. FIG. 1 shows a schematic configuration of a plate making apparatus according to the present invention, and is a block diagram of image data transfer.

In FIG. 1, the same components as those of the plate-making apparatus of FIG. 6 described above are designated by the same reference numerals, and the description of their functions will be omitted. Further, the characteristic parts of the present embodiment are surrounded by a thick frame and the numbers are in the 100s, so that the distinction from the conventional constituent elements is made clear.

Therefore, according to this embodiment, the plate-making position detecting circuit 100, which receives the encoder pulse a and the encoder Z-phase signal b from the rotary encoder 9, detects the plate-making timing means c by pulse counting and the reference position signal d. In addition to the output processing, the circuit itself has a function of counting the number of times the plate-making timing signal c is generated and automatically pausing after one rotation of the plate cylinder.

FIG. 2 shows a schematic structure of the plate making position detection circuit 100, and FIG. 3 shows an example of output timing of various signals output by the detection circuit 100. Incidentally, in this timing example, the rotary encoder 9 is rotated once per one rotation of the plate cylinder.
It outputs the encoder pulse a of 0,000, and the plate cylinder 2 rotates at 10 rps, the plate making start position is 10 pulses, the plate making interval is 5 pulses, and the plate making score is 10
Is set.

In order to perform the above-mentioned functions, the plate making position detection circuit 100 has a plate cylinder rotation position counter 100a which receives the encoder pulse a and the encoder z phase signal b, and z.
The phase signal b is input and the plate cylinder rotation position counter 100a is set to 0.
And a comparator 100b that outputs the reference position signal d to the CPU 11 when reset to 0. In this embodiment, the comparator 100b prepares for future processing expansion.
Also outputs to the CPU 11 a plate making start position signal g generated when the plate making start position, which is set to 10 in the timing example of FIG. 3, and the plate cylinder rotation position counter 100a match.

The plate making position detection circuit 100 further uses the start position signal g as an operation start trigger to make a plate making timing signal c.
A plate making interval detection circuit 100c for outputting every 5 pulses,
A plate-making dot number counting circuit 100d that counts the number of times the plate-making timing signal c is output, and outputs an end position signal h and a count value coincidence signal when the count reaches 10
And an operation control circuit 100e for controlling the operation of the plate making interval detection circuit 100c by a count value coincidence signal or a signal from the CPU 11. Like the start position signal g, the end position signal h is prepared for future processing expansion and is input to the CPU 11 as an interrupt.

As described above, in this embodiment, the plate-making position detection circuit 100 performs the process of counting the plate-making timing signal c, which has been conventionally performed by the CPU, and the process of temporarily stopping the circuit operation upon completion of plate-making for one line. An interrupt program for counting the number of plate-making points is not required on the CPU 11 side.

Returning to FIG. 1 again, according to the present embodiment, the plate making apparatus is provided with an image memory 103 having a capacity of 4 MB for storing image data, and a communication I / F 109 and a preload register 105 are dedicated to the image data. Image data DMA
(Direct Memory Access) Transfer buses 104 are interconnected.

The operation of these elements is controlled by the data transfer control circuit 101 which inputs the plate-making timing signal c, and the data transfer control circuit 101 outputs the read address of the image memory 103. A hardware counter (read address counter 101a), a hardware counter (write address counter 101b) that outputs a write address, and a circuit 101c that selects a control signal from these counters and an address in the image memory 103 are provided. And
The data transfer control circuit 101 controls the reading process of the image data written at a predetermined address in the image memory 103 and the writing process to the preload register 105, and also sends an image sent from a host computer (not shown). A process of writing data to a predetermined address in the memory 103 is performed.

FIG. 4 shows a comparison of the data transfer timing according to the present embodiment with that of the conventional one, and (a) shows C.
The conventional transfer timing by the PU, (b) shows the read / write timing of the device of the present invention by the data transfer control circuit 101 as hardware.

In FIG. 4, TC1 to TC12 are timing charts, respectively, and in the prior art of FIG. 4A, TC1 represents a plate making timing signal c and TC2.
Represents the time required for the CPU 11 to count and transfer data in the interrupt process, TC3 represents the value of the preload register 12a written by the CPU, and TC4 represents the value of the gradation conversion register 12b, that is, the image data e. Also,
In the embodiment of the present invention shown in FIG. 4B, TC5 represents the plate-making timing signal c, and TC6 represents the data transfer control circuit 10.
It indicates the setting of the read address counter in 1 and TC7
Represents the data preload signal i, TC8 represents the value of the preload register 105, TC9 represents the value of the gradation conversion register 12b, that is, image data e, TC10 represents the plate making data f, and TC11 represents the interrupt processing by the CPU 11. TC12 represents the time required for counting and data transfer.
Indicates an example of plate making depth.

As shown in FIG. 4B, in this embodiment, the first address (Address 0) is written to the read address counter 101a of the data transfer control circuit 101 before the plate making, so-called initial stage. The value is set. At this time, the image data of that address is read out from the image memory 103 and confirmed on the image data DMA transfer bus 104, and then the counter 101a outputs the data preload signal 107 to the preload register 105, and the register 105 At, the image data of that address is automatically written. Also,
Along with this, in the read address counter 101a,
The counter is incremented and the next read address (Address1) is set.

Then, in the state where the plate making is once started,
Every time the plate-making timing signal c is input to the data transfer control circuit 101, the next image data is written in the preload register 105 at this timing. this is,
Specifically, the circuit 101c of the data transfer control circuit 101 reads data from the image memory 103, and the read address counter 101a determines the read value on the image data DMA transfer bus 104 at a timing such that the data preload signal i is read. Is output and is written in the preload register 105. At this time, the read address counter 101a is also incremented to the next read address (Address2).
Will be pointed out.

As described above, in this embodiment, since the image data transfer is performed by the hardware operation both at the beginning of plate making and thereafter, an extremely short time (300 to 800 nsec) is output after the plate making timing signal c is output. Data can be transferred, and image data can be sequentially written into the preload register 105 with a sufficient margin even at a considerably short plate making interval (10 μsec) as shown in the figure. On the other hand, in the conventional plate making apparatus, as shown in FIG. 4 (a), since the next image data is read from the image memory and written to the register by the interrupt process of the CPU, the interrupt process is performed. Therefore, it is impossible to set the plate making interval shorter than this interrupt processing time.

In addition, according to this embodiment, the image memory 1
In 03, not all image data to be plate-made is written at once, but when the read area in the image memory 103 exceeds a certain capacity, the hardware performs DMA transfer of the next image data there. It's supposed to repeat. That is, specifically, the plate making progressed to 4MB
When, for example, 2 MB of the image memory 103 has been plate-made and has been read out, the control circuit of the write address counter 101 b of the data transfer control circuit 101 causes the communication I
The DMA control communication 108 (FIG. 1) is performed to the / F 109 to write 2 MB of image data directly to a predetermined address of the image memory 103 via the image data DMA transfer bus 104. As a result, by repeating the reading and writing of data in the image memory 103, it is possible to make the data capacity capable of platemaking unlimited.

Regarding the operation of the data transfer control circuit 101 described above, the CPU 11 monitors the read address counter 101a in the circuit 101, and when the read data exceeds 2 MB, the write address counter 1
It is necessary to cause 01b to issue a DMA control communication and DMA transfer of the next 2 MB of image data. However,
For this monitoring, when the transfer frequency is set to once / 2 MB, it is sufficient to monitor the plate cylinder 2 once every 10 rotations, and a DMA transfer instruction at that time is also sent by the CPU.
It does not burden 11 and does not affect the plate making process.

By the way, as shown in FIG. 4B, in this embodiment, there is a delay time of 300 to 800 nsec from the input of the plate-making timing signal c to the generation of the data preload signal i to the preload register 105. ing. This is because the plate making apparatus of the present invention uses the common DMA transfer bus 104 for both writing data to the image memory 103 and reading data from the memory 103. This is because the data will collide with each other as they are, and the read cycle is executed after the data writing is completed.

FIG. 5 shows an example of the transfer timing of image data read out with such a delay width. (A) shows a write request, and (b) shows a write request. 6 is a timing chart when the arbitration process is performed between and.

In FIG. 5, TC13 to TC24 are timing charts, respectively, and in FIG.
TC13 represents a plate-making timing signal c, TC14 represents a write transfer request signal, and TC15 represents image data DM.
A data value on the A transfer bus 104 is represented, TC16 represents the generation timing of the data preload signal i, and TC17
Represents the value of the preload register 105, and TC18 represents the value of the gradation conversion register 12b. Also in FIG.
In (b), TC19 represents a plate-making timing signal c, TC20 represents correspondence between a write transfer request signal and write data, TC21 represents a data value on the image data DMA transfer bus 104, and TC22 represents a data preload signal i. , TC23 represents the value of the preload register 105, and TC24 represents the value of the gradation conversion register 12b.

That is, as shown in FIG. 5A, 10 μs
When the plate-making timing signal is output at an interval of ec and the write transfer request signal is not output, the data transfer control circuit 101 outputs the plate-making timing signal c from the plate-making read to the data rewriting to the preload register 105. It is performed from the latter to 300 nsec. In the present embodiment, rewriting of data from the preload register 105 to the gradation conversion register 12b is performed in synchronization with the output of the plate-making timing signal c as in the conventional case.

On the other hand, 2 MB from the communication I / F 109
In the situation where the minute image data is written, FIG.
As shown in (b), the data transfer control circuit 101 (particularly, the control signal selection circuit 101c) outputs a data write request signal (corresponding to each write data, at the time of outputting the plate making timing signal c). If TC20 is H level) (in FIG. 5B, the writing order m + 2 is outputting the request signal), the data reading is temporarily held in the image memory 103, and the plate-making timing signal c is output. Image memory 1 after 800 nsec
03 data reading and preload register 105
The data writing process is being performed. Further, when the data writing request signal is not output at the time of outputting the plate making timing signal c (in FIG. 5B, the writing order is m + 8).
Just after (a), the plate reading timing signal c is output, and then the data reading and writing process is performed for 300 nsec.

As described above, in this embodiment, data is read out after 300 to 800 nsec after the plate-making timing signal c is output. However, when the next plate-making timing signal c is output, the maximum delay time is 800 nsec. However, since there is a margin of about 9 μsec remaining, the communication I / F 109
The read transfer of the platemaking data is not hindered by the write transfer from the.

Further, according to the specifications of this embodiment, the communication I / F 1
09, SCSI (Small Computer
The transfer rate of 0.5 MB / sec or more can be obtained by performing the DMA transfer using the System Interface). Therefore, the time required for the write transfer of the data of 2 MB is 4 seconds or less, but the image memory 103 remains. Plate cylinder rotation speed is 10 rp for reading all data 2 MB
It takes 25 seconds even with s, so writing will not be in time.

Although SCSI is used in the embodiment,
Anything will do as long as the communication I / F 109 has a transfer rate equivalent to this.

Although the present invention has been described by taking the intaglio plate making apparatus for forming the plate making data on the plate sheet by the semiconductor laser as an example, the present invention relates to the transfer of the plate making data.
By reducing the U processing work, high-speed plate making is possible without impairing the plate making quality, and the type of plate making and the data forming method are not limited to the illustrated embodiment.

[0044]

As described above, according to the present invention,
The data transfer is much faster than the interrupt process by the CPU, and the dedicated DMA transfer is performed. Therefore, the plate-making process and the transfer process can proceed simultaneously, the plate-making interval can be shortened, and the plate-making time can be shortened.

Further, since the CPU processing contents are drastically reduced, it is possible to replace the CPU with a cheaper and slower processing, so that the cost can be reduced.

Further, since all the image data are not written in the image memory all at once, a sequential transfer system is adopted in which new image data is written in the read area during plate making one after another. With a memory capacity that is small enough to allow smooth data transfer to, it is possible to carry out plate making with an unlimited data size.

[Brief description of drawings]

FIG. 1 is a configuration diagram of an intaglio plate making apparatus as an embodiment of the present invention.

FIG. 2 is a cross-sectional view of the configuration of the plate-making position detection circuit of FIG.

FIG. 3 is a diagram showing a timing example of output signals of the plate making position detection circuit of FIG.

FIG. 4 shows an example of data transfer timing, (a) CP
FIG. 7B is a diagram showing a conventional transfer timing by U, and (b) a read / write timing of the present invention.

FIG. 5 shows an example of data transfer timing of the present invention,
(A) is a diagram showing the timing when there is no write request, and (b) is a diagram showing the timing when there is a write request.

FIG. 6 is a configuration diagram of a conventional intaglio plate making apparatus.

[Explanation of symbols]

3 ... Plate sheet 4 ... Semiconductor laser 9 ... Rotary encoder 11 ... CPU 12 ... Image data register 100 ... Plate making position detection circuit 101 ... Data transfer control circuit 103 ... Image memory 104 ... Image data DMA transfer bus 105 ... Preload register 109 ... Communication interface

Claims (5)

(57) [Claims] 1. A data forming means for forming image data having irregularities on a rotated cylindrical plate sheet, an encoder pulse having a predetermined number of pulses in synchronization with the rotation of the plate sheet, and an absolute rotation thereof. An encoder that outputs an absolute position signal indicating a rotational position, a plate-making timing signal for the plate sheet and a reference position signal from the encoder pulse and the absolute position signal, and counts the number of the plate-making timing signals that have been output. , A plate-making position detecting means for stopping the output of the plate-making timing signal after outputting a predetermined number of signals corresponding to one rotation of the plate sheet, a communication interface for inputting image data from the outside, and a part of the input image data. And an image data register for temporarily storing the image data transferred from the image memory The image data transfer bus interconnecting the communication interface, the image memory and the image data register, and the read control of the image data to the image memory according to the output of the plate-making timing signal, and the read image data to the image data. Based on the image data stored in the image data register, data transfer control means for transferring the new image data to the image memory from the communication interface according to the read-out image data amount in the image memory. A plate making apparatus having a microcomputer which operates data forming means and controls plate making. 2. The plate making position detecting means further outputs a plate making start position signal according to the number of encoder pulses after the reference position signal is output and an end position signal to the microcomputer according to the number of plate making timing signals output. The plate making apparatus according to claim 1. 3. The plate making apparatus according to claim 2, wherein the data transfer control means writes new image data into the image memory when the read area of the image memory reaches a certain amount. 4. The plate making apparatus according to claim 3, wherein the data transfer control means delays the data read transfer processing from the image memory according to the presence or absence of data write transfer to the image memory. 5. The plate making apparatus according to claim 1, wherein the data forming unit includes a semiconductor laser.