JP3460251B2 - Digital video signal recording device and reproducing device - Google Patents

Description

Detailed Description of the Invention

[0001]

This invention relates to ATV (Advanced T
The present invention relates to a recording device and a reproducing device for a digital video signal capable of directly recording and reproducing an (elevation) signal on a magnetic tape by a rotary head, and more particularly to improving variable speed reproduction.

[0002]

2. Description of the Related Art An input digital video signal is converted into a DCT (Di
screte cosine transform) conversion, compression by variable length coding, and recording on a magnetic tape by a rotary head are under development. In such a digital VTR, a mode for recording a video signal of the current television system such as NTSC system (hereinafter referred to as SD mode) and a mode for recording an HDTV signal (hereinafter referred to as SD mode).
HD mode) can be set. In the SD mode, a video signal is compressed and recorded at about 25 Mbps. H
In the D mode, the video signal is compressed and recorded at about 50 Mbps.

As described above, conventionally, when the HDTV signal is recorded by the digital VTR, the HDT is set in the HD mode.
The V signal is compressed and recorded. However, AD-HD
In the case of the all-digital system such as the TV system, since the signal is compressed and transmitted, the transmitted signal can be directly recorded by the digital VTR. Thus, when the transmitted signal is directly recorded in the digital VTR, it is not necessary to decode the HDTV signal from the transmitted signal and compress or re-encode it to input it to the digital VTR. It has the advantage of eliminating waste.

That is, ATV (Advanced Television)
In this method selection, a system is proposed in which everything from signal processing to transmission is digitized and an HDTV (High Definition Television) signal is transmitted. The most powerful of these methods is the AD-HDTV method. In the AD-HDTV method, MPEG (Moving Im
The HDTV signal is compressed by image compression according to the age Coding Experts Group), packetized, and transmitted.

FIG. 22 shows the structure of a transmission system of the AD-HDTV system. In FIG. 22, 101 is a video compression encoder and 102 is an audio encoder. The video compression encoder 101 has an input terminal 103
Supplies an HDTV system video signal. An audio signal is supplied to the audio encoder 102 from the input terminal 104.

The video compression encoder 101 compresses the input HDTV signal by a method based on the MPEG method which is an international standard method for moving images.

That is, the video compression encoder 101
Compresses an HDTV signal using a high efficiency coding method that combines DCT and motion compensation. From the video compression encoder 101, as shown in FIG. 23, the intra-frame coded frame (referred to as I frame), the forward predictive coded frame (referred to as P frame), and the bidirectional predictive code. Frame (called B-frame)
And are sent in a predetermined order. The I frame is independently DCT-transformed without using the correlation with other frames. In a P frame, an I frame or P that precedes it
Motion-compensated prediction is performed from the frame, and the difference signal is D
CT converted. In the B frame, motion compensation prediction is performed from the preceding and following I frame or P frame, and the difference signal is DCT-transformed. The I-frame appearance cycle is GOP
It is called (Group Of Picture). In this example,
(GOP = 9).

In FIG. 22, 105 is a priority encoder. Priority encoder 105
Is to prioritize the compressed HDTV signal data. An example of the priority order is shown below.

[0009] −−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−− I frame           1. Frame header           2. Slice header           3. Macroblock address, type and quantization step           4. DC value           5. Low frequency coefficient           6. High frequency coefficient −−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−− P and B frames           1. Frame header           2. Slice header           3. Macroblock address, type and quantization step           4. Motion vector           5. DC value           6. Low frequency coefficient           7. High frequency coefficient

As described above, in the I frame, the frame header has the first priority, and the slice header of the I frame, the macro block address, the type and the quantization step, the DC value, the low frequency coefficient, the high frequency coefficient, and the priority order. Continue. In the P and B frames, the frame header, slice header, macroblock address, type and quantization step, motion vector, DC value, low frequency coefficient, high frequency coefficient, and the order of priority follow.

Reference numeral 106 denotes a transport encoder, and the transport encoder 106 uses the video data prioritized by the priority encoder 105, the audio data encoded by the audio encoder 104, and the additional information from the input terminal 107 as a packet. To generate. Packets include high priority packets and low priority packets. Packets with high priority are called HP (High Priority) packets, and packets with low priority are called SP (Standard Priority) packets. The ratio of HP packet and SP packet is 1
It is a pair 4. In a normal image, the I frame header to the low-frequency coefficient and the P and B frame header to the motion vector are transmitted in HP packets. HP packets are transmitted on a carrier with high output power. SP packets are transmitted on a carrier with low output power.

FIG. 24 shows the structure of a packet. As shown in FIG. 24A, the packet length of the transmitted packet is 148 bytes. A sync is provided at the head of the packet, and subsequently, transmission data and error correction parity are added.

FIG. 24B shows details of transmission data. A service type ST is provided at the beginning of the transmission data. In this service type ST, as shown in FIG. 25, information P indicating whether this packet is a high-priority HP packet or a low-priority SP packet, identification information ID such as video or audio, and 0 to A counter CC that counts to 15 is included.

After the service type ST, an after header AH is provided. FIG. 26A is the after-header of the HP packet, and FIG. 26B is the after-header of the SP packet. The after-header AH of the HP packet includes the slice start pointer indicating the first bit of the input point of the transfer data, the frame type, the frame number, the slice number in the frame, and the quantization factor. The after-header AH of the SP packet includes the start pointer of the macroblock, the frame type, the frame number, and the macroblock number in the frame.

In FIG. 13, reference numeral 108 is a channel modulator. H generated by the transfer encoder 106
The P packet and SP packet are supplied to the channel modulator 108. Channel modulator 108
Then, the HP packet and the SP packet are modulated using two carriers. The output of the channel modulator 108 is output from the output terminal 109.

In the AD-HDTV system, the HDTV signal can be transferred at 17.4 Mbps by the image compression as described above. This is lower than the recording rate (about 25 Mbps) in the SD mode of the digital VTR described above. Therefore, the signal sent by the AD-HDTV system can be directly recorded in the SD mode of the digital VTR. Thus, if the transmitted signal is directly recorded in the digital VTR, it is not necessary to decode the HDTV signal from the transmitted signal and input it into the digital VTR.
There is no waste of hardware. Further, since the recording can be performed in the SD mode, the recording time can be long.

[0017]

However, if the AD-HDTV signal is directly recorded in the digital VTR in the SD mode as described above, there arises a problem that good variable speed reproduction cannot be performed for the following reason.

That is, as described above, AD-HDTV
In the method, compression based on the MPEG method is performed. In this method, as described above, the intra-frame encoded I frame, the forward predictive encoded P frame, and the bidirectional predictive encoded B frame are sent. During variable speed reproduction, the head goes over the track, so that data of consecutive frames cannot be obtained. If data of consecutive frames cannot be obtained, data of P frame and B frame cannot be decoded. Only I-frame data encoded within the frame can be decoded. This I
All frame data is usually sent in HP packets. Therefore, during variable speed reproduction, variable speed reproduction is possible by using only the I frame data of the HP packet among the reproduced data.

However, if the signal transmitted by the AD-HDTV is directly recorded in the digital VTR, HD packets including I frames cannot be sufficiently picked up during variable speed reproduction. Further, it becomes uncertain in what positional relationship the data of the I frame is recorded. For this reason, the I frame data corresponding to a specific portion of the screen may be lost during variable speed reproduction, and only that part of the screen may not be updated for a while, and the image quality during variable speed reproduction deteriorates.

Therefore, an object of the present invention is to provide a recording / reproducing apparatus in which the image quality during variable speed reproduction does not deteriorate even when an HDTV signal transmitted in the all digital system is directly recorded.

[0021]

This invention is based on the above-mentioned section.
In order to solve the problem, the video signal is decompressed by MPEG compression.
In a digital video signal recording device adapted to directly record a television signal to be digitally transmitted on a recording medium , the television signal is a frame that has been encoded in a frame and a frame that has been coded in forward or bidirectional prediction, in order,
Digital transmission is performed by dividing packets with high importance and packets with low importance, and the data of the intra-coded frame is included in the packets with high importance, and the transmission rate of the television signal is , The compression rate of the current television system compressed to digitally record it is lower than the transmission rate of the current system digital video signal, and the transmission rate of the television signal is lower than the transmission rate of the compressed current system digital video signal. to afford the recording area caused by, TV
This is a digital video signal recording device characterized in that packet data of a John signal having a high degree of importance is recorded redundantly.

In the present invention, the margin recording area is arranged in the reproducible area which is fixed during variable speed reproduction.

According to the present invention, at the time of n-times speed reproduction, substantially the same packet data of high importance is continuously recorded in the spare recording area in a continuous n tracks.

According to the present invention, the position of the packet data having a high degree of importance to be recorded in the margin recording area is shifted every period in which the intra-coded frame appears.

The present invention is an all-digital HDTV.
In a digital video signal recording apparatus in which an ATV signal to be compressed and transmitted is directly recorded on a magnetic tape, the transmitted ATV signal is separated into high priority data and low priority data, The transmission rate of the ATV signal is lower than the transmission rate of the compressed current method digital video signal which is compressed to digitally record the video signal of the current television method, and the transmission rate of the high-priority data is higher than that of the ATV signal. The digital video signal recording apparatus is characterized in that the data is recorded in a margin recording area generated when the compression rate is lower than the transmission rate of the digital video signal.

According to the present invention, the packet data of high importance and the packet data of low importance of the ATV signal are recorded, and the packet data of high importance is redundantly recorded in the spare recording area of each track. In a digital video signal reproducing apparatus for reproducing a magnetic tape, packet data of high importance recorded in a margin recording area of each track is used during variable speed reproduction.

[0027]

The transmitted AT compressed by the all digital method
When the V signal is recorded in the current television signal recording mode (SD mode) of the digital VTR, an I frame is placed in a margin area generated by the transmission rate of the ATV signal being lower than the source rate in the SD mode of the digital VTR. By redundantly recording the HD packet data including the HD packet data, the probability that the HD packet data including the I frame can be picked up during variable speed reproduction is increased, and the image quality during variable speed reproduction can be improved.

The area in which the HD packet data is redundantly recorded is assigned to a reproducible area that is fixed when the positional relationship between the head trace and the track is maintained during variable speed reproduction. Therefore, the HP packet including the I-frame data is surely reproduced during the variable speed reproduction, and the image quality during the variable speed reproduction is improved.

Further, since HP packet data of 32 sync blocks per track is overlapped by 18 tracks and is recorded while shifting the position every 90 tracks, the entire screen is updated at the time of variable speed reproduction and at the time of variable speed reproduction. The image quality is improved.

[0030]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 shows an example of a video recording / reproducing system to which the present invention is applied. In FIG. 1, 1 is a channel demodulator. The AD-HDTV system transmission data is input from the input terminal 2 to the channel demodulator 1. The channel demodulator 1 demodulates the packet from the transmission data. The packets transmitted include HP packets that transfer highly important data and SP packets that transfer less important data.

Reference numeral 3 is a digital VTR. The digital VTR 3 includes an interface / format converter 4 and a recording / reproducing unit 5. The HP packet and SP packet from the channel demodulator 1 are supplied to the transport and priority decoder 6 and the recording / reproducing unit 5 via the interface and format converting unit 4. The data transferred to the recording / reproducing unit 5 via the interface and the format converting unit 4 can be recorded on the magnetic tape by the rotating head in the recording / reproducing unit 5. Further, the interface and format conversion unit 4 formats the data sent to the recording / reproducing unit 5 so that the reproduction screen becomes good when the recording data recorded by the recording / reproducing unit 5 is reproduced at a variable speed. This will be described later in detail.

The recording / reproducing section 5 is constructed so that the digital video signal is DCT-converted, variable-length coded, compressed, and recorded on a magnetic tape by a rotary head. The recording / reproducing unit 5 is an SD for recording a video signal of NTSC system or the like.
The mode and the HD mode for recording the HDTV signal can be set. When the AD-HDTV transmission data is demodulated and directly recorded, the SD mode is set. In addition,
The source rate in SD mode is 24.3 Mbps.

The transport and priority decoder 6 performs error correction on the transferred HP packet and SP packet, and extracts transfer data and additional data from the transferred HP packet and SP packet. In a normal image, the header from the I frame to the low-frequency coefficient and the headers of the P and B frames to the motion vector are transmitted in HP packets. Other than that, it is transmitted as an SP packet.

Reference numeral 7 is a video decompression decoder, and 8 is an audio decoder. The video decompression decoder 7 performs decoding of the Huffman code and DCT inverse conversion in accordance with the MPEG system, decompresses the transmitted data, and forms an HDTV baseband signal. The outputs of the transport and priority decoder 6 are supplied to the video decompression decoder 7 and the audio decoder 8. The transmitted data is decompressed by the video decompression decoder 7,
An HDTV signal is formed. The HDTV signal thus formed is output from the output terminal 9. The audio decoder 8 decodes the audio data, and the audio data is output from the output terminal 10. Further, the additional information output from the transport and priority decoder 6 is output from the output terminal 11.

FIG. 2 shows the structure of the recording system of the recording / reproducing unit 5 in the VTR to which the present invention is applied. In FIG. 2, reference numeral 21 is an input terminal for a video signal or an HDTV signal of the current television system such as the NTSC system.
When recording a video signal from the outside, input terminal 2
1. Video signal of current television system or HDTV
A component video signal of the signal is provided. The component video signal from the input terminal 21 is supplied to the A / D converter 22, and the A / D converter 22 converts the component video signal into a digital signal.

Reference numeral 23 is a DCT compression circuit. The DCT compression circuit 23 compresses the input video signal by DCT conversion and variable length coding. The output of the A / D converter 22 is
It is supplied to the DCT compression circuit 23 and compressed. That is, the component video signal from the A / D converter 22 is divided into blocks, shuffled, and DCT-converted. The DCT-converted data is buffered in a predetermined buffer unit. Then, the total code amount of the predetermined buffer unit is estimated, the optimum quantization table that makes the total code amount less than or equal to the predetermined value is determined, and the optimum quantization table is quantized. Then, after variable length coding, it is framed.

Reference numeral 24 is a switch circuit which can be switched between recording the transmitted AD-HDTV system signal and recording the video signal from the input terminal 21. The terminal 24A of the switch circuit 24 is connected to the AD through the interface and the format conversion unit 4 described above.
-HDTV system signals are supplied. Switch circuit 24
The output of the DCT compression circuit 23 is supplied to the terminal 24B of the. When recording the transmitted AD-HDTV system signal, the switch circuit 24 is set to the terminal 24A side. When recording the video signal from the input terminal 21, the switch circuit 24 is set to the terminal 24B side.

Reference numeral 25 is a framing circuit. The framing circuit 25 expands the recording data into a predetermined sync block and performs error correction coding processing.

Reference numeral 26 is a channel encoder. The output of the switch circuit 24 is supplied to the channel encoder 26 and modulated. The output of the channel encoder 26 is supplied to the rotary head 28 via the recording amplifier 27. A video signal or AD-H from the input terminal 21 compressed into a magnetic tape (not shown) by the rotary head 28.
The DTV signal is recorded.

Incidentally, four rotary heads 28 are provided, for example. In SD mode, two of these are used. In HD mode, four rotary heads are used,
The running speed of the tape is twice that of the SD mode. The rotating drum is rotated at 150 Hz in both SD and HD modes. Therefore, when the field frequency is 60 Hz, one frame is recorded in 10 tracks in the SD mode, and one frame is recorded in 20 tracks in the HD mode.

When recording the transmitted AD-HDTV system signal in such a recording system, the switch circuit 24 is switched to the terminal 24A side. Therefore, the AD-HDTV system signal input via the interface and format conversion unit 4 is framed by the framing circuit 25, and the channel encoder 25
And is recorded on the magnetic tape by the rotary head 27.

When recording a video signal from the input terminal 21, the switch circuit 24 is switched to the terminal 24B side. Therefore, the video signal from the input terminal 21 is
The framing circuit 2 is compressed by the DCT compression circuit 23.
5 is converted into a frame, modulated by the channel encoder 26, and recorded on the magnetic tape by the rotary head 27.

At the time of recording the AD-HDTV signal, the interface and format conversion unit 4 additionally records the data corresponding to the HP packet and also corresponds to the HP packet in order to improve the image quality during variable speed reproduction. Arrange the data so that it can be reliably picked up during variable speed playback.

That is, while the source rate in the SD mode of the digital VTR is 24.3 Mbps,
Since the transmission rate of the D-HDTV signal is 17.4 Mbps, when recording the transmitted AD-HDTV signal in the SD mode, there is a margin in the recording area. Therefore, in order to improve the image quality during variable speed reproduction, when the AD-HDTV signal is recorded in the SD mode, the data corresponding to the HP packet is recorded redundantly in this spare area. In the SD mode, data of 135 sync blocks can be recorded in one track. In AD-HDTV, H
The ratio of P packets to SP packets is 1: 4. The transmission rate of AD-HDTV is 17.4 Mbps.
So, the source rate of SD mode of digital VTR is 2
It is 4.38 bps. From this, the number of sync blocks occupied by HP packets in one track is 135 × (17.4 / 24.3) × (1/5) = 19.
333 (sync block), which is about 20 sync blocks. The number of sync blocks occupied by one-track SP packet is 20 × 4 = 80 (sync blocks). Therefore, the remainder of 135 sync blocks in one track is 135-20-80 = 35 (sync block). Therefore, HP packets can be recorded in duplicate for up to 35 sync blocks per track.

That is, as shown in FIG. 3A, data of 135 sync blocks can be recorded in the video area of one track. In this example, as shown in FIG. 3B, overlapping HP areas D _HP are provided in, for example, three positions of one track, and HP packet data is overlapped by, for example, 32 sync blocks in these three overlapping HP areas D _HP. Will be recorded.

When the servo circuit keeps the same positional relationship between the head trace and the track during variable speed reproduction,
The playable area within one track is fixed. The duplicate HP area D _HP is assigned to this fixed reproducible area.

As shown in FIG. 4, during variable speed reproduction, the head goes over the track. As a result, a reproduction signal as shown in FIG. 5A is obtained. As shown in FIG. 5B, the position H _{RF at} which this reproduction signal is sufficiently obtained is obtained by keeping the positional relationship between the head trace and the track always the same.
Fixed. The overlapping HP area is provided at the position H _RF where the reproduced signal can be sufficiently obtained.

As described above, the digital VTR has the S
In the D mode, one frame is recorded with 10 tracks. The period GOP of the I-frame of the AD-HDTV system is
There are 9 frames. From this, data of 1 GOP cycle is recorded on 90 tracks on average. Of the I-frame, B-frame, and P-frame, the I-frame is the only data required in the data of the period of 1 GOP.
There is only one frame during a GOP.

FIG. 6 shows the state of head scanning when variable speed reproduction is performed at 17 times speed. By selecting an odd number of double speed number 17, the overlapping HP areas can be made the same for the two heads A and B. Further, as can be seen from FIG. 6, if the same data is recorded in 17 tracks in the overlapping HP area, the data is surely reproduced in 1 or 2 scans.

However, since one GOP cycle is 90 tracks, the number of tracks for recording the same data is 1 GO.
It is easier to process if it is set to a divisor of 90 tracks of P period. Therefore, in this embodiment, the same data is recorded on 18 tracks, which is a divisor of 90 tracks.

Assuming that the capacity of the overlapped HP area per track is 32 sync blocks, 90 of 1 GOP cycle.
The total capacity of the overlapping HP areas for the tracks is 32 × 90 = 2880 sync blocks. When the same data is recorded over 18 tracks, the HP packets recorded in the overlapping HP areas of 90 tracks of 1 GOP cycle are 2880/18 = 160 sync blocks. The HP packet data for 160 sync blocks is recorded on 90 tracks while overlapping each 18 tracks.

All the data transmitted in the HP packet is I
Assuming frame data, the number of sync blocks in one track is 135, and the number of tracks in one GOP cycle is 9
0, SD mode source rate 24.3 Mbps, A
When the transmission rate of D-HDTV is 17.4 Mbps and the ratio of HP packets to SP packets is 1: 4, the number of sync blocks occupied by I frame data is 135 × 90 × (17.4 / 24.3) × 0.2 = 17
40 sync blocks. In 90 tracks of 1 GOP cycle, this 174
A part of 0 sync blocks (corresponding to 160 sync blocks) is recorded.

Further, the HP packet data corresponding to 160 sync blocks to be recorded on 90 tracks of this 1 GOP cycle is shifted every 90 tracks.
That is, FIGS. 7A-7D show consecutive GOP periods,
As shown in FIG. 7B, HP packet data for 160 sync blocks is stored in the memory during one GOP cycle. HP for 160 sync blocks stored in memory
The packet data is recorded in the overlapping HP area in the GOP cycle so that 32 sync blocks per track overlap with 90 tracks while overlapping with 18 tracks. In the next GOP cycle, as shown in FIG.
The timing for storing 60 sync blocks in the memory is shifted. That is, 143 around the first GOP
160 sync blocks are accumulated from the timing corresponding to the sync block eye. In this way, 160 sync blocks are stored while overlapping 17 sync blocks, and 32 syncs per track are stored as described above.
The sync blocks are recorded in the overlapping HP area in the GOP cycle so as to extend over 90 tracks while overlapping 18 tracks.

For each track, as shown in FIG.
The packet is recorded in duplicate. As shown in FIG. 8A, among the data of the HP packets for 160 sync blocks, the data of sync blocks SB0 to SB31 are recorded in the overlapping HP areas of tracks T _{0 to} T ₁₇ , and the data of sync blocks SB32 to SB63 are recorded. track T ₁₈ ~T ₃₅
Recorded in the overlapping HP area of the sync block SB64
Data ~SB95 are recorded in duplicate HP area of the track T ₃₆ through T _53, the sync block SB96~SB127
Data is recorded in duplicate HP area of the track T ₅₄ through T _71, data of sync block SB128~SB159 is recorded in duplicate HP area of the track T ₇₂ through T _89.
As shown in FIG. 8B, HP packets of sync blocks SB0 to SB159 are recorded in the first 90 tracks,
Sync blocks SB143 to SB for the next 90 tracks
The HP packet of 302 is recorded, and the HP packets of sync blocks SB286 to SB445 are recorded in the next 90 tracks.

As described above, the number of I-frame data is 1740 sync blocks / frame per frame. Since 160 sync blocks are recorded on 90 tracks of 1 GOP, and 17 sync blocks are overlapped in the next GOP cycle, 1740 / (160-17) = 1.17, so that one screen of data is divided into 12 parts. The recorded portion is recorded on each 90 tracks. Data corresponding to one screen is recorded with 90 × 12 = 1080 tracks. Where exactly 1
In the last 90 tracks, the number of overlapping sync blocks is reduced to less than 17 sync blocks (10 sync blocks) so as to be 80 tracks. Also, G
Since OP = 9, the 12-divided and recorded portions are I-frame data separated from each other by 9 frames.

FIG. 9 shows the data recorded in this way as 1
It shows a state of the screen when the variable speed reproduction is performed at 7 times speed. As shown in FIG. 9, when the variable speed reproduction is performed, the screen is divided into 12 areas M1, M2, M3, .... Each of the divided areas M1, M2, M3, ... Has the H of 160 sync blocks recorded in the overlapping HP area of 90 tracks.
It is formed by reproducing I frame data of P packet. Therefore, each divided area M1, M2, M3, ...
Is composed of I frame data separated by 9 frames. 160 recorded on 90 tracks of 1 GOP cycle
By shifting the location of the HP packet data corresponding to the sync block for every 90 tracks, the areas M1, M2, M3, ... Divided into 12 can be updated during variable speed reproduction.

FIG. 10 shows that HP packet data for 160 sync blocks is recorded on 90 tracks of the overlapped HP area while overlapping the HP packet data for 160 sync blocks by 18 tracks, and the HP packets corresponding to 160 sync blocks are recorded on the 90 tracks. The data is processed such that its location is shifted every 90 tracks. In FIG. 10, reference numerals 31 and 32 denote input terminals. Data corresponding to the HP packet is supplied to the input terminal 31, and the input terminal 3
2 is supplied with data corresponding to the SP packet. The data corresponding to the HP packet from the input terminals 31 and 32 and the data corresponding to the SP packet from the input terminal 32 are supplied to the parallel-serial conversion circuit 33. The data corresponding to the HP packet from the input terminal 31 is supplied to the sync block formatter 34.

The parallel-serial conversion circuit 33 converts HP packet data and SP packet data sent from the input terminals 31 and 32 in parallel into serial data. The output of the parallel-serial conversion circuit 33 is supplied to the memory 35. The memory 35 stores HP packet data and SP packet data for one track.

A timing signal is supplied to the sync block formatter 34 from an input terminal 36. The output of the sync block formatter 34 is supplied to the memory 37. In the memory 37, 160 recorded in 90 tracks
HP packet data for sync blocks is stored.

Reference numeral 38 is a read address generator. An area control signal is supplied from the input terminal 39 to the read address generator 38. Read address generator 38
Generates a read address based on this area control signal. This read address is supplied to the memory 35. As a result, the position of the overlapping HP area is set.

40 is a multiplexer. The multiplexer 40 inserts the HP packet data from the memory 37 into the HP packet and SP packet data from the memory 35. The outputs of the memories 35 and 37 are supplied to the multiplexer 40. Multiplexer 4
The output of 0 is supplied to the encoder 41.

FIG. 11 shows the structure of the reproducing system of the recording / reproducing unit 5 of the digital VTR 2. In FIG. 11, the recording signal of the magnetic tape is reproduced by the rotary head 28 and supplied to the channel decoder 52 via the reproduction amplifier 51. The channel decoder 52 demodulates the reproduced signal by a modulation method corresponding to the above-described recording system channel encoder 26.

Reference numeral 53 is a TBC (Time Base Corrector). The TBC 53 is for removing the time-axis fluctuation component of the reproduction signal. A write clock based on the reproduction signal and a read clock based on the reference signal are applied to the TBC 53. The output of the channel decoder 52 is supplied to the TBC 53. The TBC 53 removes the time axis fluctuation component in the reproduced signal.

Reference numeral 54 is a deframe conversion circuit. The deframing circuit 54 corresponds to the framing circuit 25 of the recording system, and performs error correction processing of reproduced data. The output of the TBC circuit 53 is supplied to the deframe conversion circuit 54.

Reference numeral 55 denotes a switch circuit. The switch circuit 55 is switched between the case of reproducing an AD-HDTV system signal and the case of reproducing a component video signal. The output of the TBC circuit 54 is the switch circuit 5
5 is supplied. When the reproduced signal is an AD-HDTV system signal, the switch circuit 55 is switched to the terminal 55A side. When the reproduction signal is the component video signal, the switch circuit 55 is switched to the terminal 55B side.

Reference numeral 56 is a DCT expansion circuit. The DCT expansion circuit 56 corresponds to the DCT compression circuit 23 of the recording system. That is, the DCT expansion circuit 56 expands the compressed and recorded video signal to the original baseband video signal by decoding the variable length code and performing inverse DCT conversion. The output of the terminal 55B of the switch circuit 55 is supplied to the DCT expansion circuit 56. The DCT expansion circuit 56 converts the compressed video signal back into a baseband video signal, and this video signal is output from the output terminal 57.

Reference numeral 58 is a header decoder, and 59 is a packet selection circuit. The header decoder 58 is AD-HDTV.
The header of the reproduced signal is decoded to identify whether the reproduced signal is I-frame data. Whether the packet is an I frame packet can be identified from the packet header. The header decoder 58 includes a terminal 55A of the switch circuit 55.
The output of is supplied. The output of the header decoder 58 is supplied to the packet selection circuit 59. I during variable speed playback
Only the frame data is valid. Packet selection circuit 5
9 selects and outputs an I-frame data packet during variable speed reproduction. The output of the packet selection circuit 59 is output from the output terminal 60.

Reference numeral 61 is a controller. The controller 61 controls to switch between normal reproduction and variable speed reproduction. A mode setting signal is supplied to the controller 61 from the input unit 62. Depending on this mode setting signal,
The servo circuit 63 and the packet selection circuit 59 are set. At the time of variable speed reproduction of the AD-HDTV signal, the servo circuit 63 uses a tracking signal such as ATF,
Phase information is added to the tape speed control so that the positional relationship between the head trace and the track is always kept the same, and the reproducible area within the track is fixed. As described above, this reproducible area is the overlapping HP area D _HP . Therefore, during variable speed reproduction, the data corresponding to the HP packet including the I frame data is always reproduced.

FIGS. 12A, 12C and 12E show reproduction RF signals when variable speed reproduction is performed at 4 × speed, 9 × speed and 17 × speed, respectively, and FIGS.
D and FIG. 12F show 4 × speed, 9 × speed, and 1 ×, respectively.
It shows a reproducible area on a track when variable speed reproduction is performed at 7 times speed. EN1, EN2, and EN3 indicate reproducible areas that are fixed when reproduced at 4 × speed, 9 × speed, and 17 × speed, respectively. Figure 12B
As can be seen from FIG. 12F, the reproducible area EN1 that is fixed when reproduced at 4 × speed is included in the reproducible area EN3 that is fixed when reproduced at 17 × speed. Further, as can be seen from FIGS. 12D and 12F, 9
Playable area EN2 that becomes fixed when playing at double speed
Is included in the reproducible area EN3 that is fixed when the data is reproduced at 17 times speed. Therefore, if a reproducible area that is fixed when reproduced at 17 times speed is provided in EN3 and an HP packet data is recorded in this overlapped HP area, HP packet data is recorded even at 4 times speed or 9 times speed. Packet data can be reliably picked up. Ie 1
By setting the reproducible area at the 7 × speed as the overlapping HP area, not only the reproduction at the 17 × speed but also variable speed reproduction at a lower speed than that can be favorably performed.

By the way, the AD-HDTV system is an all-digital broadcasting system, and its encoding algorithm is M.
I am using PEG2. AD-HDTV is this MP
After the image data is encoded using EG2, the encoded bit stream is prioritized to obtain high priority data (HP
Data) and low priority data (SP data),
It is transmitting. In this way, the broadcasting station separates the data into HP data and SP data and packetizes them, and each packet has a header AH indicating the information of the data in the packet.
In the case of recording and transmitting, a good variable speed reproduction can be realized by recording in the digital VTR as in the first embodiment.

However, the signal transmitted on the broadcast station side is
It may be transmitted in a method based on the MPEG2 main profile and main level. In the main profile and main level of MPEG2, separation of HP data and SP data is not specified. Therefore, in such a system, the video data is
The data packet and the SP data packet are transmitted without being separated.

The signal transmitted on the broadcast station side is MP
When conforming to the main profile and main level of EG2, many home receivers (decoders) are MPEG.
It is considered that only the main profile of 2 and the May level can be decrypted. In this case, the signal reproduced from the digital VTR must comply with the main profile and main level of MPEG2 not only in the normal reproduction but also in the high speed reproduction.

In such a case, in the digital VTR,
Before recording, it is necessary to divide the HP data and the SP data on the VTR side. Further, the data for high-speed reproduction, that is, the HP data, must comply with the main profile and main level of MPEG2 by itself.

FIG. 13 shows an example of a video recording / reproducing system according to the second embodiment. In this embodiment, as described above, it is possible to deal with the case where the HP data and the SP data are transmitted without being separated. In this embodiment, the data separator 112 is provided before the interface and format conversion unit 104. 13, the channel demodulator 101, the transport and priority encoder 106, the video decompression decoder 107, and the audio encoder 108 are the channel demodulator 1, the transport and priority encoder 6, and the video in the first embodiment shown in FIG. The decompression decoder 7 and the audio encoder 8 have the same configuration. In this embodiment, the data separator 112 is provided before the interface and format conversion unit 104, and the configuration of the interface and format conversion unit 104 is different from that of the first embodiment shown in FIG. ing.

The data separator 112 will be described with reference to FIG. FIG. 14 is an example of the configuration of the data separator 112. In FIG. 14, the MPEG2 is input to the input terminal 72.
The bit stream of is input. The bit stream from the input terminal 72 is supplied to the HP extractor 74 via the delay circuit 73 and the VLD circuit 75. The delay circuit 73 delays the decoding in the VLD circuit 75 and its processing time. VLD circuit 75
Then, the variable length encoding of MPEG2 is solved and the bit stream is parsed. The output of the VLD circuit 75 is sent to the counter 76.

The value NUM is given to the counter 76 from the FF / FR rate control circuit 77. The exclusive flag VBV is supplied to the FF / FR rate control circuit 77 from the terminal 78. Counter 76 and FF / FR rate controller 7
7 determines the data to be assigned to the HP data using the result of this parsing. The separation signal DEV is output from the counter 76. This separation signal DEV is supplied to the HP extractor 74.

The HP extractor 74 inserts an EOB (End Of Block) code at the end of the data assigned to the HP data, usually at a DCT coefficient of each block. As a result, a bit stream conforming to the MPEG2 main profile and main level is obtained even with only HP data, and it is possible to decode only HP data even with a decoder that can only decode MPEG2 main profile and main level.

An output terminal 79 is derived from the HP extractor 74. From the output terminal 79, HP data for high speed reproduction and data for normal reproduction (HP and SP) are output. The HP data for high speed reproduction is written in the overlapping HP area and read out at the time of high speed reproduction, as in the first embodiment. An output terminal 80 is derived from the delay circuit 73. From the output terminal 80, normal data (that is, a main stream of MPEG2, a bit stream conforming to the main level) is output.

Next, allocation of HP data will be described.
First, the variable length code of MPEG2 will be described. For example, in the case of DCT coefficients, in variable length coding, variable length coding is performed with one nonzero coefficient value and level as one set (run, level). In the case of DCT coefficients, this (run, level) pair constitutes one VLC event.

The FF / FR rate controller 77 prepares a data amount that can be assigned to HP data. This is done in slice units. The FF / FR rate controller 77 determines the number NUM of non-zero DCT coefficients assigned as HP data, and the number NUM is counted by the counter 76.
Give to.

The counter 76 adds the number of non-zero DCT coefficients in the zigzag scan order from the number of VLC events. When this value reaches NUM, the counter 76
Outputs the separation signal DEV to the HP extractor 74. Also,
If the EOB is present before the value reaches NUM, the counter 76 is reset and the previous data for that block is H.
Assigned to P data.

The value NUM is the FF / FR rate controller 77.
Is reset in units of slices. The FF / FR rate controller 77 receives the duplicate HP area occupation flag V, which is input from the interface and format conversion unit 104.
According to BV, when HP data is likely to overflow the overlapping area, the amount of data assigned to HP is reduced. That is, the value NUM is decreased. Also,
If there is little HP data for the overlapping area, HP
Increase the amount of data assigned to the data. That is,
Increase the value NUM.

Next, the interface and format conversion unit 104 in the second embodiment will be described with reference to FIG.
This will be described using 5. This interface and format conversion unit 104 corresponds to the interface and format conversion unit 4 in the first embodiment shown in FIG. 10, and writes HP data for high speed reproduction in the duplicate HP area. The HP packet for high-speed reproduction is input to the input terminal 13
Input from 1. HP input from the input terminal 131
The data is supplied to the sync block formatter 134. Further, the normal data input from the input terminal 132 is input to the parallel / serial conversion unit 133.

Similar to the first embodiment, the sync block formatter 134 adjusts the format so that the high speed reproduction data is written in a predetermined sync block. The sync block formatter 134 also outputs a flag VBV indicating the occupied state of the sync block. This flag VBV is supplied to the data separator 112.

The memory 135, the memory 137, the read address generation circuit 138, the multiplexer 140, and the recording encoder 141 are configured in the same manner as the memory 35, the memory 37, the read address generation circuit 38, the multiplexer 40, and the recording encoder 41 in FIG. There is.

By making the above-described changes to the interface and format conversion unit 4 in the first embodiment, even when recorded in a digital VTR of a broadcasting system conforming to the main profile and main level of MPEG2. Good variable speed reproduction can be realized.

FIG. 16 shows a third embodiment of the present invention. In this embodiment, the broadcasting station has HP data, S
Although the P data is transmitted without being separated, the receiver (decoder) is applied to a digital VTR when it is possible to decode a data separated MPEG2 bit stream.

In FIG. 16, the channel demodulator 201, the transport and priority encoder 206, the video decompression decoder 207, and the audio encoder 208 are the channel demodulator 1, the transport and priority encoder 6, and the video in the first embodiment. The decompression decoder 7 and the audio encoder 8 have the same configuration. In the video recording / reproducing system according to the third embodiment, the data separator 21
2, interface and format conversion unit 204,
Except for the 2-point buffer 213, it is the same as the first embodiment shown in FIG.

FIG. 17 shows the configuration of the data separator 212 in the third embodiment. In FIG.
An MPEG2 bit stream is supplied to the input terminal 172. When an MPEG2 bitstream is input to the input terminal 172, it is delayed by VLD and its processing time by the delay circuit 173, and this bitstream is PB.
It is supplied to the P adder 174. In the VLD circuit 175,
The variable length code of MPEG2 is solved, and the bit stream is parsed. The counter 176 and the FF / FR rate controller 177 use the result of this parsing to determine the H
Determine the data assigned to P.

PBP (Priority Break Point) adder 1
In 74, the information of the data assigned as HP data is written in the header of the MPEG2 bit stream, divided into the data assigned to HP and the other SP data as high-speed playback data, and output. Here, all headers are output to both HP and SP. FIG. 18 shows the structure of the header.

The data separator outputs the HP data for high speed reproduction and the normal reproduction data (SP).
Is. The HP data for high speed reproduction is written in the overlapping HP area and read during high speed reproduction, as in the first embodiment.

Next, HP allocation will be described. FF /
The FR rate controller 177 determines the amount of data that can be assigned to HP data. This is done in slice units. The FF / FR rate controller 177 uses the HP
The amount of data to be allocated as data is determined, and the flag PBP indicating the separation point is output to the counter 176.
The value of PBP is shown in FIG. For example, PBP = 2
In the case of, in the zigzag scan order, up to the second non-zero coefficient except DCFLCA is assigned as HP data.

In the PBP adder 174, the counter 176
Received DEV from PBP adder 174
The data up to the data input to is output as HP data.
As a result, PBP data is obtained. That is, all the data of the block is assigned to HP and output.

The PBP is the FF / FR rate controller 177.
Is reset in units of slices. The FF / FR rate controller 177 receives the overlapped H, which is input from the interface and format conversion unit 204 via the terminal 178.
The P area occupation flag VBV and the buffer occupation flag B_FU output from the 2-point buffer which is a buffer having the same capacity as the code buffer 213 of the decoder
According to LL, when the HP data is likely to overflow the overlapping area, the data amount assigned to the HP data is reduced. That is, PBP is reduced. In addition, when HP is small for the overlapped HP area, H
Increase the amount of data assigned to P. That is, PB
Increase P.

Here, the buffer control will be described.
When decoding a bitstream, the encoder side has a virtual buffer with the same capacity as the code buffer that the decoder would have, so that the input bitstream does not overflow or underflow the code buffer of the decoder. The bit allocation is controlled by inputting the generated bit stream to the virtual buffer and monitoring the occupied amount of this virtual buffer. Vbv_delay recorded in the picture head indicates the timing when the decoder reads a bit from the code buffer.

The data division of HP data and SP data also requires buffer control in the same manner. When the data is separated and input into HP data and SP data, the decoder must have two code buffers for HP and SP. This means that two VBV_delays have to be recorded. Even if the amount of HP data and SP data does not overflow the buffer,
This is because overflow or underflow may occur in each buffer of HP data and SP data.

The 2-pointer buffer 213 uses one vbv_del when dividing HP data and SP data.
It is a code buffer for compensating the buffer management by recording ay. In MPEG2, this virtual buffer capacity is defined as 1.75 Mbit. The 2-pointer buffer 213 therefore has the same capacity,
Has 1.75 Mbit.

The ratio of HP data and SP data is AD
-For HDTV it is 1: 4. When HP data and SP data are divided at this ratio, the 2-pointer buffer 213 is divided into two partitions at this ratio. HP data is input to one side and SP data is input to the other side. Each partition has a pointer indicating the buffer occupancy. When both the decoder side and the encoder side have the buffers having such a configuration, it is sufficient to monitor the buffer occupation amount of HP data and SP data.

From the 2-pointer buffer 213, this H
Buffer occupancy B_FULL of P data and SP data
Is output to the data separator 212. Data separator 21
In No. 2, buffer management is performed using B_FULL as described above.

Next, the interface and format converter will be described with reference to FIG. FIG. 19 shows
This is a portion corresponding to FIG. 10 in the first embodiment. The HP data for high speed reproduction is written in the HP overlap area. The HP data for high speed reproduction is input from the input terminal 231. HP data is sync block formatter 236.
And the parallel-serial conversion circuit 233. The normal reproduction data input from the input terminal 232 is
It is supplied to the parallel-serial conversion circuit 233.

Similar to the first embodiment, the sync block formatter 234 prepares the format so that the high speed reproduction data is written in a predetermined sync block. Also, the sync block formatter 234 outputs a flag VBV indicating the occupied state of the sync block. This flag VBV is input to the data separator 212. Memory 235, memory 237, read address generation circuit 2
38, multiplexer 240, recording encoder 241
Are configured similarly to the memory 35, the memory 37, the read address generation circuit 38, the multiplexer 40, and the recording encoder 41 in FIG.

By making the above changes to the first embodiment, even when a signal that is not separated into HP data and SP data is broadcast, it is possible to decode a bit stream divided into MPEG2 data. If there is a device (decoder), good variable speed reproduction can be realized even when recorded on the digital VTR as described above.

FIG. 20 shows a fourth embodiment of the present invention. In this embodiment, a PBP similar to that of the third embodiment is written in the slice header on the broadcast station side, but a signal not divided into HP data and SP data is input during transmission. Applied to. The video recording / reproducing system in the fourth embodiment has the same configuration as that of the first embodiment shown in FIG. 1 except for the data separation circuit 314.
FIG. 21 shows a data separation circuit 314 according to the fourth embodiment.
It shows the configuration of. The bit stream data input to the VTR of the fourth embodiment is not separated into HP data and SP data, but PB shown in the third embodiment is used.
The P flag is recorded in the slice header. Therefore, in this case, it is not necessary to perform rate control for HP separation on the VTR side.

In FIG. 21, MPE is connected to the input terminal 272.
When the G2 bit stream is input, this bit stream is supplied to the VLD circuit 275, and is delayed by VLD and its processing time by the delay circuit 273 to generate H
It is supplied to the P extractor 274. In the VLD circuit 275,
The variable length code of MPEG2 is solved, and the bit stream is parsed. The VLD circuit 275 also decodes the header information. The VLD circuit 275 decodes the PBP from the slice header and outputs it to the counter 276. The counter 276 uses this parsing result to determine the HP
Determine the data to assign to.

The counter 276 adds the number of non-zero DCT coefficients in the zigzag scan order. Counter 27
6 outputs the separation signal DEV to the HP extractor 274 when reaching the PBP. Also, before reaching PBP, EO
If B is present, the counter 274 is reset and all the data for that block is assigned to HP data.

Upon receiving the DEV, the HP extractor 274 outputs the data up to the data input to the HP extractor 274 as HP. As a result, the coefficient data having the data amount indicated by PBP is output as HP data.

What is output from the data separator 303 is the above-mentioned HP data for high speed reproduction and other data (SP). The HP data for high speed reproduction is written in the overlapping HP area and read during high speed reproduction, as in the first embodiment.

By making the above changes to the third embodiment, it is not divided into HP data and SP data.
Even if a signal having PBP set on the broadcasting station side is broadcast, if there is a receiver (decoder) capable of decoding a bitstream in which the data of MPEG2 is divided, when it is recorded in the digital VTR as described above Also, good variable speed reproduction can be realized.

Although the HP data and the SP data are separated, the packet data may not have the header AH like the AD-HDTV signal. AD-HDT
The HP / SP of V has the merit of error countermeasures on the broadcast station side. This is because the header AH in the system layer exists and can be used. Although HP data and SP data are divided on the broadcasting station side, header AH
A method that incorporates an error recovery processing procedure from the minimum packet loss without using That is,
In this method, data is divided only in the video layer. In addition, a video signal broadcast by this method is converted to a digital VT.
A method of recording in R will also be described.

The syntax in the video layer for data division in MPEG2 is only that the PBP flag is recorded in the slice header as shown in the third embodiment. Since the slice header is HP data,
There is no information in the SP data indicating, for example, which macroblock data of which slice of which frame the data, for example, DCT coefficient data is. Therefore, when the SP packet is lost, the HP data and the SP data cannot be synchronized.

To prevent this, the header information is added not only to the HP packet but also to the SP data. The header information in this SP can be used to synchronize and recover even when a packet loss occurs. Therefore, all header information is added to the SP data.
This can be realized with the same configuration as the first embodiment.

The broadcasting station divides the data into HP data and SP data and broadcasts it. Even if there is no AH, the MPEG2 data-divided bit stream can be decoded. If the receiver has a (decoder), good variable-speed reproduction can be realized even when recorded on the digital VTR as described above.

[0113]

According to the present invention, when the AD-HDTV system signal is recorded in the SD mode of the digital VTR, the transmission rate of the AD-HDTV system signal is lower than the source rate in the SD mode. HD packet data including an I frame is recorded in a redundant area in an overlapping manner. The area in which the HD packet data is recorded in duplicate is assigned to a reproducible area that is fixed when the positional relationship between the head trace and the track is maintained during variable speed reproduction. Therefore, during variable speed playback,
The HP packet including the data of the I frame is reliably reproduced, and the image quality during variable speed reproduction is improved. Further, since the same HP packet data of 32 sync blocks per track is overlapped by 18 tracks and the position is recorded by shifting every 90 tracks, the entire screen is updated during variable speed reproduction, and the image quality during variable speed reproduction is improved. Is improved.

[Brief description of drawings]

FIG. 1 is a block diagram of an embodiment of a video recording system to which the present invention is applied.

FIG. 2 is a block diagram showing a configuration of a recording system of a digital VTR to which the present invention is applied.

FIG. 3 is a schematic diagram used for explaining an overlapping HP area in one embodiment of the present invention.

FIG. 4 is a schematic diagram used to explain an overlapping HP area in one embodiment of the present invention.

FIG. 5 is a waveform diagram showing a relationship between an overlapping HP area and a reproduction RF signal in the embodiment of the present invention.

FIG. 6 is a schematic diagram showing a head trace at 17 × speed according to an embodiment of the present invention.

FIG. 7 is a timing diagram used for explaining the acquisition of HP packet data in the embodiment of the present invention.

FIG. 8 is a schematic diagram used for explaining acquisition of HP packet data in the embodiment of the present invention.

FIG. 9 is a schematic diagram used for explaining a screen during variable speed reproduction in an embodiment of the present invention.

FIG. 10 is a block diagram showing a specific configuration of a format conversion unit in an embodiment of the present invention.

FIG. 11 is a block diagram showing a configuration of a reproduction system of a digital VTR to which the present invention is applied.

FIG. 12 is a waveform diagram showing a relationship between a reproduced waveform and a reproducible area during variable speed reproduction in one embodiment of the present invention.

FIG. 13 is a block diagram used for explaining a second embodiment of the present invention.

FIG. 14 is a block diagram showing a specific configuration of a data separation circuit according to a second embodiment of the present invention.

FIG. 15 is a block diagram showing a specific configuration of a format conversion unit in the second embodiment of the present invention.

FIG. 16 is a block diagram used for explaining a third embodiment of the present invention.

FIG. 17 is a block diagram showing a specific structure of a data separation circuit according to a third embodiment of the present invention.

FIG. 18 is a schematic diagram used for explaining a third embodiment of the present invention.

FIG. 19 is a block diagram showing a specific configuration of a format conversion unit in the third embodiment of the present invention.

FIG. 20 is a block diagram used for explaining a fourth embodiment of the present invention.

FIG. 21 is a block diagram showing a specific configuration of a data separation circuit according to a fourth embodiment of the present invention.

FIG. 22 is a block diagram showing an example of the configuration of an AD-HDTV system transmission system.

FIG. 23 is a schematic diagram used to describe a GOP configuration in the AD-HDTV system.

FIG. 24 is a schematic diagram showing the structure of a transmission packet in the AD-HDTV system.

FIG. 25 is a schematic diagram showing the structure of a transmission packet in the AD-HDTV system.

FIG. 26 is a schematic diagram showing the structure of a transmission packet in the AD-HDTV system.

[Explanation of symbols]

3 Digital VTR 4 Interface and format converter 5 Recording / playback section 35, 37 memory 38 Read Address Generator 40 Macchiplexa

─────────────────────────────────────────────────── ─── Continued Front Page (72) Inventor Yoichi Yagasaki 6-735 Kita-Shinagawa, Shinagawa-ku, Tokyo Sony Corporation (72) Teruhiko Suzuki 6-35 Kita-Shinagawa, Shinagawa-ku, Tokyo Sonny Co., Ltd. (72) Inventor Chin Huang Chan 6-35 Kita-Shinagawa, Shinagawa-ku, Tokyo Sonny Co., Ltd. (56) Reference JP-A-6-292129 (JP, A) JP HEI 5-137114 (JP, A) JP-A-63-179679 (JP, A) (58) Fields investigated (Int. Cl. ⁷ , DB name) G11B 20/12 H04N 5/92

Claims (6)

(57) [Claims] 1. A video signal is digitized by MPEG compression.
In a digital video signal recording device adapted to directly record a television signal to be transmitted on a recording medium , the television signal is a frame that has been intra-coded and a frame that has been coded forward or bidirectionally, in order,
Is intended to digital transmission is divided into a low importance high packet and severity packets of the frame in the frame coded data is included in high the importance packet, the television signal The transmission rate is set lower than the transmission rate of the compressed current system digital video signal compressed for digitally recording the current television system video signal, and the transmission rate of the television signal is the compressed current system digital video signal. 2. A digital video signal recording device, characterized in that the packet data of high importance of the television signal is redundantly recorded in an extra recording area caused by the transmission rate being lower than the transmission rate. 2. The digital video signal recording apparatus according to claim 1, wherein the margin recording area is arranged in a reproducible area which is fixed during variable speed reproduction. 3. A digital video signal according to claim 1, wherein the same highly important packet data is repeatedly recorded in the margin recording area substantially continuously for n tracks at the time of n-fold speed reproduction. Recording device. 4. A digital video signal recording apparatus according to claim 1, wherein the position of said highly important packet data to be recorded in said margin recording area is shifted at every cycle in which an intra-coded frame appears. 5. A video signal is digitized by MPEG compression.
In a digital video signal recording apparatus adapted to directly record a television signal to be transmitted on a recording medium , the transmitted television signal is separated into high priority data and low priority data, Television
The transmission rate of the ® tone signal is lower than the transmission rate of the compressed current practice digital video signal compressed video signal of the current television television system to digital recording, high above priority data, the television A digital video signal recording apparatus, characterized in that the signal is recorded in a margin recording area generated when the transmission rate of the signal is lower than the transmission rate of the compressed current system digital video signal. 6. A video signal is digitally compressed by MPEG.
With a high importance packet data and less important packet data of a television signal to be transmitted is recorded, the transmission rate of the television signal is compressed current practice
By being lower than the transmission rate of digital video signals
Digital video signal in the reproducing apparatus, the at the time of variable speed reproduction have been recorded in the spare recording area high importance packet data for reproducing the recording medium in spare recording area the high importance packet data is redundantly recorded occurring A digital video signal reproducing device characterized by using the.