JP3470185B2 - Wander generator and digital circuit tester including the same - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a wander generator that generates a wandering clock signal and a digital line test device including the wander generator.

[0002]

2. Description of the Related Art The phase of a digital signal transmitted to a digital line fluctuates under the influence of noise on the transmission line.

Of these phase fluctuations, the component whose fluctuation frequency is higher than 10 Hz is generally jittered at 10 Hz.
The lower component is called wander, and if such phase fluctuation becomes large, the line cannot transmit the digital signal correctly and the code error becomes large.

Therefore, when evaluating a digital line, it is necessary to measure jitter and wander.

As one evaluation method for wander, there is time deviation (hereinafter referred to as TDEV).

The TDEV is measured by measuring the phase difference TIE (Time Interval Erro) between the clock signal component of the wandering digital signal and the reference clock signal.
r) is sequentially obtained as the amount of change with respect to the initial phase difference, and the following equation is calculated based on this TIE data.

TDEV (τ) = {(1 / 6n^Two) (1 /
m) ・_{j = 1}Σ^m〔_{i = j}Σ^{n + j-1}(Χ_{i + 2n}−
2χ_{i + n}+ Χ _i)]^Two}^1/2

However, m = N-3n + 1, χ _i is TIE
Sample data, N is the total number of samples, τ is the integration time (I
ntegration Time) (τ = n · τ ₀ ),
n is the number of samplings (n = 1, 2, ..., N / 3), τ ₀
Is the sampling period, the symbol _{j = 1} Σ ^m is the sum of _{j = 1 to} ^m , and the symbol _{i = j} Σ ^{n + j-1} is i = ^{j to n} + j-1.
Indicates the total sum up to.

TDEV (τ) is obtained based on all TIE data for a measurement time that is 12 times the maximum integration time. For example,
Sampling period τ ₀ is 1/80 second (12.5 milliseconds)
When TDEV (1000) of τ = 1000 seconds is to be calculated for 12000 seconds (80 samples / second × 1000
The above formula is calculated using the measurement data of seconds × 12 = 960000 samples).

When a digital line is evaluated using this TDEV, a method of inputting a digital signal without phase fluctuation to one end of the line to be tested and measuring TDEV at the other end, or a clock signal having a wander While inputting a synchronized digital signal to the line under test and changing the size and frequency of the wander, the error rate of the digital signal is measured at the other end to check the line strength against the size and frequency of the wander. there were.

In order to evaluate the line under test using a wandering digital signal like the latter, 10 Hz
A wander generator that generates a clock signal having the following phase fluctuation is used.

FIG. 40 shows the structure of a conventional wander generator 10, in which 10 is output from a modulation signal generator 11.
A modulation signal for phase modulation lower than Hz and a reference voltage output from the reference voltage generator 12 are added by an adder 13, and the output of the adder 13 is input to a VCO (voltage controlled oscillator) 14, A clock signal C having a center frequency corresponding to a reference voltage and phase-modulated by a modulation signal.
K is generated.

In this wander generator 10, the frequency and amplitude of the clock signal CK can be varied by varying the frequency and amplitude of the modulation signal output from the modulation signal generator 11.

[0014]

By the way, in recent years,
A method of evaluating a digital line using a digital signal having a wander called a TDEV mask (Mask) and satisfying the TDEV characteristic defined by ANSI and the like has been proposed.

This TDEV mask has a structure shown in FIG.
, The integration time τ1 is constant until the integration time τ1
Characteristic M that increases in proportion to τ ^1/2 in the range exceeding 1
1 (ANSI T1.101-1994 Sectio
n 7.22 and Secti of 105-03-1994
on D. 2.2.1), or (b) of FIG. 41, it is constant up to a certain integration time τ1 and increases in proportion to τ ¹ in the range from the integration time τ1 to τ2.
In the range exceeding 2, the characteristic M2 (ANSI T1.101-1994 Secti) that increases in proportion to τ ^1/2 is obtained.
on 7.3.2 and Sec of 105-03-1994
Tion D. 2.1, Section D. 2.2.
2) etc.

However, as described above, it is difficult for the conventional wander generator 10 that can only perform phase modulation of a single signal to generate a clock signal satisfying the TDEV characteristic that changes for each integration time range as described above. Therefore, it has been desired to realize a wander generator that can generate a clock signal that satisfies an arbitrary TDEV mask characteristic.

The present invention solves the above problems and provides a wander generator capable of easily and accurately generating a clock signal having a wander of a desired characteristic, and a digital line test apparatus including the wander generator. It is an object.

In order to achieve the above object, according to the present invention, a digital filtering process is performed on a signal (noise signal) composed of a random number of a plurality of bits by a filter unit, and the frequency of the filtered signal is changed. Although the modulated clock signal is generated, the present invention shortens the time until the state of the storage element of the filter unit for performing this filtering process becomes a steady state, and achieves the wander of desired characteristics. It is an object of the present invention to provide a wander generator that can quickly generate a clock signal that it has.

Further, the present invention provides a wander generator capable of confirming beforehand the wander characteristic of the clock signal actually output when the clock signal having the wander of the desired characteristic is output as described above. One of the purposes is to provide.

[0020]

To achieve the above object, a wander generator according to a first aspect of the present invention sequentially generates a random number signal composed of a plurality of bits at a constant speed according to a predetermined algorithm. Random number signal generating means (2
5, 121), a filter section (28, 125) for receiving a random number signal sequence generated by the random number signal generation means and performing a filtering process, and a clock generation means (30, 31, 151) for generating a clock signal. Modulating means for modulating the frequency of the clock signal generated by the clock generating means by the signal output from the filter section (30,
151) so that the wander characteristic of the clock signal whose frequency is modulated by the modulating means becomes a desired characteristic,
And a setting unit (23, 26, 130) for giving a signal for setting each amplitude value of the spectrum of the signal sequence output from the filter unit to the filter unit.

A wander generator according to a second aspect of the present invention is the wander generator according to the first aspect, wherein the random number signal generating means has a plurality of pseudo random signal generators. The pseudo random signals generated by the signal generators are combined to sequentially generate the random number signal composed of the plurality of bits at a constant speed.

A wander generator according to a third aspect of the present invention is the wander generator according to the first aspect, wherein the filter section stores a plurality of storage elements for sequentially shifting the input signal sequence and stores the plurality of storage elements. And a calculation means for performing a sum-of-products calculation of the stored value stored in the storage element and the plurality of coefficients.

A wander generator according to a fourth aspect of the present invention is the wander generator according to the third aspect, wherein the filter section stores the random number signal string output from the random number signal generating means in the plurality of storage units. It is configured to store in an element, perform a product-sum operation by the operation unit, and perform a filtering process on the signal sequence of the random number, and the setting unit includes each spectrum of the signal sequence output from the filter unit. It is characterized in that the plurality of coefficients are set in the calculating means as a signal for setting an amplitude value.

A wander generator according to a fifth aspect of the present invention is the wander generator according to the third aspect, wherein the filter section has a signal sequence of the random numbers generated by the random number signal generating means at different rates. Data distribution means (51, 141) for distributing to a plurality of paths, and weighting means for weighting a signal sequence for each path distributed by the data distribution means with a coefficient preset for each path ( 54, 143) and the signal sequence of each path weighted by the weighting means are combined by a plurality of sub-band combiners each including the plurality of storage elements and the calculating means, and the combined result is output as a filtering processing result. And a synthesizing means (56, 145) for controlling the spectrum of the signal train output from the filter section. Said plurality of weighting coefficients as a signal for setting each amplitude value and setting said weighting means of the filter unit.

A wander generator according to a sixth aspect of the present invention is the wander generator according to the third aspect, the fourth aspect, or the fifth aspect, at least at an initial stage of operation of the apparatus.
For each of the storage elements included in the filter unit, a value equivalent to the stored value stored in each of the storage elements in the steady state when the clock signal having the wander of the desired characteristic is output is set to the value in the steady state. An initial setting means (131) for performing an initial setting on a path different from the signal input path is provided.

A wander generator according to a seventh aspect of the present invention is the wander generator according to the first aspect, wherein the wander characteristic of the clock signal whose frequency is modulated by the modulating means is set from the setting means to the filter. Characteristic calculating means (1) for calculating based on information including signals set in the section
34 ') and a characteristic display means (135) for displaying the characteristic obtained by the characteristic calculation means.

The digital line device according to claim 8 of the present invention is a wander generator (21, 40) for generating a test signal having a wander, and a signal from the wander generator for passing through a digital line to be tested. In a digital line test apparatus provided with a wander measuring section (41, 43) for evaluation, the wander generating section is the claim 1 or claim 2 or claim 3 or claim 4 or claim 5 or claim 6. Or a wander generator according to claim 7,
It is configured to generate a test signal synchronized with the clock signal output from the wander generator.

A wander generator according to a ninth aspect of the present invention is a wander generator for generating a clock signal having a wander that satisfies a desired time deviation characteristic, and determines a center frequency of the clock signal. Center frequency information setting means (22) for setting data
A characteristic information setting means (23) for setting characteristic information of the desired time deviation characteristic, and based on the characteristic information set by the characteristic information setting means,
A fluctuation signal train generation unit (24) for generating a fluctuation signal train having a power spectrum density distribution characteristic of frequency fluctuation corresponding to the desired time deviation characteristic, data set by the center frequency information setting unit, and the fluctuation An adder (29) for adding the fluctuation signal sequence output from the signal sequence generator, a direct digital synthesizer (30) for outputting a signal having a frequency corresponding to the output of the adder, and an output of the direct digital synthesizer. And a clock signal output circuit (31) for shaping a signal to output a clock signal.

A wander generator according to a tenth aspect of the present invention is the wander generator according to the ninth aspect, wherein the fluctuation signal sequence generating section generates noise signals based on a pseudo random signal. (25) and based on the characteristic information set by the characteristic information setting means,
Impulse response calculation means (26) for calculating an impulse response of a transfer function for approximating the power spectrum density distribution of the white noise signal output from the noise generation means to the power spectrum density distribution characteristic of the frequency fluctuation; A convolution operation means for performing a convolution operation of the operation result of the impulse response operation means and the miscellaneous white noise signal output from the noise generation means to generate a fluctuation signal sequence having the power spectrum density distribution characteristic of the frequency fluctuation ( 28) and.

The wander generator according to claim 11 of the present invention is the wander generator according to claim 10, wherein the impulse response calculation means has an error between the power spectrum density distribution characteristic of the frequency fluctuation and the transfer function. It is characterized in that the impulse response is corrected by a correction function corresponding to the minute.

A wander generator according to a twelfth aspect of the present invention is the wander generator according to the tenth aspect, wherein the convolution operation means is a sum of products operation having a smaller absolute value of the operation result of the impulse response. It is characterized by carrying out with priority.

A wander generator according to a thirteenth aspect of the present invention is the wander generator according to the tenth aspect, wherein the impulse response calculation means outputs the impulse signal each time a white noise signal is output from the noise generation means. The response calculation is performed every time, and the convolution calculation means performs the convolution calculation using the calculation result calculated each time by the impulse response calculation means.

A wander generator according to a fourteenth aspect of the present invention is the wander generator according to the ninth aspect, wherein the fluctuation signal sequence generating section generates noise signals based on a pseudo random signal. (25), and the noise signal output from the noise generating means is distributed to signal paths corresponding to a plurality of bands for dividing the frequency range of the power spectrum density distribution characteristic of the frequency fluctuation, corresponding to the respective bands. Data distribution means (5
1) and, according to the noise signal for each rate distributed by the data distribution means, the spectrum size for each band for dividing the frequency range of the power spectrum density distribution characteristic of the frequency fluctuation into a plurality of bands. Weighting means (54) for performing weighting, and a synthesizing means (56) for synthesizing a noise signal of each rate weighted by the weighting means to generate a fluctuation signal sequence having a power spectrum density distribution characteristic of the frequency fluctuation. It has and.

A wander generator according to a fifteenth aspect of the present invention is the wander generator according to the tenth aspect or the fourteenth aspect, wherein the noise generating means generate M-sequence pseudo-random codes at different initial phases. Multiple (m)
It has a set of pseudo-random signal generating means, and is configured to collectively output the outputs of the predetermined stages of the pseudo-random signal generating means as m-bit parallel white noise signals.

According to a sixteenth aspect of the present invention, there is provided a digital line test apparatus which comprises a wander generator (21) for generating a clock signal having a wander satisfying a prescribed time deviation characteristic, and an output from the wander generator. A transmitting unit (40) for transmitting a digital signal synchronized with the tested clock signal to a digital line to be tested, and a digital signal returned from the digital circuit to be tested and receiving the clock signal of the received digital signal. A receiving section (41) for reproducing the error, an error measuring section (42) for measuring an error of the digital signal received by the receiving section, and a time deviation measurement for measuring the time deviation characteristic of the clock signal reproduced by the receiving section. Section (43), display device (47), and measurement results of the error measuring section. And a display control means (46) for displaying on the display device so that the time deviation characteristic measured by the time deviation measuring unit can be compared with the specified time deviation characteristic. .

A digital line test apparatus according to a seventeenth aspect of the present invention is the digital line test apparatus according to the sixteenth aspect, wherein the wander generator is the claim 9, the claim 10, the claim 11, or the claim. It is characterized in that it is the wander generator according to claim 12 or claim 13 or claim 14 or claim 15.

Further, in the wander generator of claim 18 of the present invention, white noise generating means (121) for generating a digital white noise signal and the digital signal are sequentially shifted to a plurality of internal storage elements. A noise signal having a frequency characteristic corresponding to a preset characteristic coefficient, which has a digital filter for storing and performing a product-sum operation for the stored contents of the plurality of storage elements. Filter unit (125) for converting to and outputting
A characteristic coefficient setting means (130) for setting an arbitrary characteristic coefficient for the filter section, and a multiplier (132) for multiplying a noise signal output from the filter section by a preset amplitude coefficient, Amplitude setting means (133) for setting an arbitrary amplitude coefficient in the multiplier, a frequency synthesizer (51) for outputting a clock signal phase-modulated by the noise signal output from the multiplier, and the filter section A noise signal sequence equivalent to the stored contents of each storage element of the digital filter in the state where the noise signal having the frequency characteristic corresponding to the characteristic coefficient is output is initially stored in each storage element of the digital filter at least at the initial operation of the device. An initial setting means (131) for setting is provided.

A wander generator according to a nineteenth aspect of the present invention is a white noise generating means (121) for generating a digital white noise signal, and sequentially shifting the digital signal to a plurality of internal storage elements. A noise signal having a frequency characteristic corresponding to a preset characteristic coefficient, which has a digital filter for storing and performing a product-sum operation for the stored contents of the plurality of storage elements. Filter unit (125) for converting to and outputting
A characteristic coefficient setting means (130) for setting an arbitrary characteristic coefficient for the filter section, and a multiplier (132) for multiplying a noise signal output from the filter section by a preset amplitude coefficient, Amplitude setting means (133) for setting an arbitrary amplitude coefficient in the multiplier, a frequency synthesizer (151) for outputting a clock signal phase-modulated by the noise signal output from the multiplier, and the characteristic coefficient setting means. Characteristic calculating means (1) for obtaining the characteristics of the noise signal output from the multiplier or the clock signal output from the frequency synthesizer, based on the characteristic coefficient set by (1) and the amplitude coefficient set by the amplitude setting means.
34, 134 ') and a characteristic display means (135) for displaying the characteristic obtained by the characteristic calculation means.

[0039]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 shows the overall configuration of a digital line test device 20 according to an embodiment of the present invention.

The digital line test apparatus 20 has a wander generator 21 for generating a clock signal CK1 having a wander that satisfies an arbitrary TDEV mask characteristic. Details of this wander generator 21 will be described later,
First, the overall configuration of the digital line test apparatus 20 will be described.

The clock signal CK1 output from the wander generator 21 is input to the transmitter 40. This transmitter 4
0 is a digital line 1 to be tested in which a digital signal (for example, a pseudo-random signal) Sa having a predetermined pattern synchronized with the clock signal CK1 output from the wander generator 21 is set in the return mode in advance via the output terminal 20a. Send to.

The transmitting section 40 uses the clock signal CK1.
In addition to the digital signal synchronized with, the digital signal may be multiplexed and sent to the digital line 1.

The receiver 41 receives the digital signal Sa 'returned from the digital line 1 via the input terminal 20b, and reproduces the clock signal CK1' from the received digital signal Sa '.

The error measuring unit 42 measures the error of the digital signal Sa 'received by the receiving unit 41 on a bit-by-bit basis.

In addition, the TDEV measuring section 43 has a receiving section 41.
The time deviation of the clock signal CK1 'reproduced by is measured.

As shown in FIG. 2, the TDEV measuring section 43 is composed of a TIE detecting section 44 and a TDEV calculating section 45. The TIE detecting section 44 receives the received clock signal CK1 'and the reference clock generator 44a. The reference clock signal CK2 output from the above is input to the phase comparator 44b to detect the phase difference between them, and the wander component of 10 Hz or less is extracted from the output of this phase comparison 44b by the low pass filter (LPF) 44c. The wander component signal is sampled by the A / D converter 44d at a predetermined sampling period (for example, 12.5 mS) and converted into a digital value, which is output to the TDEV calculation unit 45 as TIE data.

The TDEV calculation section 45 includes a TIE detection section 44.
The TDEV described above for the TIE data output from
Is calculated.

The display control means 46 displays the measurement result E of the error measuring section 42 on the display device 47 and also displays the TDEV.
The measurement result of the measurement unit 43 is used as the wander generator 21 described above.
Display device 47 so that it can be compared with the specified TDEV characteristics of
To display.

With this configuration, the digital line test apparatus 20 can easily and efficiently evaluate the wander of the digital line 1 to be tested.

Further, this digital line test apparatus 20
Directly connects the output terminal 20a and the input terminal 20b to the clock signal CK1 generated by the wander generator 21.
Can measure the TDEV characteristics of the display control means 4
7 can also display this measurement result on the display device 47 so that it can be compared with the specified TDEV mask.

Incidentally, this digital line test apparatus 20
As described above, outputs the digital signal synchronized with the wandering clock signal output from the wander generator 21 to the digital line 1 to be tested through the transmitting section 40 and passes through the digital line to be tested. The clock signal component of the digital signal is reproduced via the receiving unit 41,
The wander time deviation characteristic of the clock signal is obtained by the TDEV measuring unit 44. Therefore, the wander generator 21 and the transmitter 40 of the digital line test apparatus 20 correspond to the wander generator of claim 8 of the present invention, and the receiver 41 and the TDEV measurement unit 44 are included.
Corresponds to the wander measuring section of claim 8 of the present invention.

Next, the structure of the wander generator 21 will be described. Before the description of this structure, its outline will be described.

The wander generator 21 generates a clock signal having a wander of the TDEV characteristic based on the power spectrum density distribution characteristic of the frequency fluctuation corresponding to the TDEV characteristic.

That is, the following relationship is established between the characteristic of the wander TDEV (τ) (ns) and the time-varying power spectral density distribution Sx (f) (ns ² / Hz) of the wander. It is known.

Sx (f) = (0.75 / f) [TDEV
(0.3 / f)] ²

For example, the TD shown in FIG.
In the characteristic like the EV mask M2, TDEV (τ) is constant until the integration time τ1. Therefore, as shown in FIG. 3, the power spectral density distribution Sx (in the range where the frequency exceeds 0.3 / τ1 = f2). f) decreases in proportion to 1 / f, and TDEV (τ) is τ in the range of integration time from τ1 to τ2.
Since it increases in proportion to (in proportion to 1 / f), S in the frequency range of 0.3 / τ1 to 0.3 / τ2 (= f1)
(F) decreases in proportion to (1 / f) · (1 / f) ² = 1 / f ^3, and in the range where the integration time exceeds τ2, TDEV
In the characteristic that (τ) increases in proportion to τ ^1/2 (proportional to 1 / f ^1/2 ), S (f) is in the range where the frequency is lower than f1.
Decreases in proportion to (1 / f) · (1 / f) = 1 / f ² .

On the other hand, between the time-varying power spectrum density distribution characteristic Sx (f) and the frequency-varying power spectrum density distribution characteristic Sy (f), Sy (f) = ω ² · Sx (f) = ( 2πf) ² · Sx
It is known that there is a relationship of (f).

That is, the above-described time-varying power spectrum density distribution characteristic Sx (f) is constant up to the frequency f1 and is -3 within the frequency range f1 to f2, as shown in FIG.
Decreases in dB / oct and becomes 3 in the range exceeding frequency f2
This corresponds to the power spectrum density distribution characteristic Sy (f) of the frequency fluctuation that increases with dB / oct.

Therefore, in this wander generator 21, white noise uniformly distributed in frequency is subjected to a filtering process to obtain the fluctuation signal sequence y (k) of the power spectrum density distribution characteristic Sy (f) of FIG. It is generated and integrated by a DDS 30 which will be described later to obtain the above T
A clock signal having a DEV mask characteristic is obtained.

Further, in order to perform this filtering process on the digital white noise signal sequence, the characteristic S of FIG.
Find the impulse response of the transfer function that approximates y (f),
The convolution calculation of the tap coefficient obtained by the calculation of the impulse response and the white noise signal sequence is performed.

Next, a specific structure of the wander generator 21 will be described. As shown in FIG. 5, the wander generator 21 includes a center frequency setting unit 22, a characteristic information setting unit 23, a fluctuation signal sequence generating unit 24, an adder 29, and a DDS.
(Direct digital synthesizer) 30 and a clock signal output circuit 31.

The center frequency setting means 22 is for setting the data Y ₀ which determines the center frequency (for example, 2 MHz) of the output clock signal CK1, that is, the center frequency of the output signal of the DDS 30.

The characteristic information setting means 23 is for setting characteristic information such as the shape of the power spectrum density distribution characteristic Sy (f) corresponding to the desired TDEV mask characteristic to be output and the frequency information of the bending point.

The fluctuation signal sequence generator 24 performs a filtering process for white noise based on the characteristic information set by the characteristic information setting means 23 to obtain a desired TDE.
Fluctuation signal sequence y (k) satisfying the power spectrum density distribution characteristic Sy (f) of the frequency fluctuation corresponding to the V mask characteristic
To occur.

The adder 29 adds the data Y ₀ set by the center frequency setting means 22 and the fluctuation signal sequence y (k) output from the fluctuation signal generator 24, and the addition result u (k) is obtained. Output to DDS30.

The DDS 30 includes an adder 30a and an adder 3
A latch circuit 30b that latches the output of 0a in synchronization with the clock signal CK3; a waveform memory 30c that stores data of an address specified by the output of the latch circuit 30b that is stored in advance in an address area where sine wave data is continuous; The adder 29 includes a D / A converter 30d for converting the data read from the memory 30c into an analog signal.
It outputs a staircase-shaped signal with a frequency corresponding to the value output from.

The clock signal CK3 of this DDS 30 is
Much faster than the clock signal CK1 (eg 50
MHz), and here, the number of addresses of the waveform memory 30a and the clock signal CK are set so that a signal having a frequency equal to the value u (k) output from the adder 29 can be output.
It is assumed that the frequency of 3 is preset.

The output signal of the DDS 30 is input to the clock signal output circuit 31. The clock signal output circuit 31
The waveform of the output signal of the DDS 30 is shaped into a clock signal CK.
To output 1, band pass filters corresponding staircase wave of the signal output from the DDS30 data Y ₀ (B
PF) 31a converts into a sine wave and the comparator 3
Enter in 1b. The comparator 31b compares the sine wave signal output from the low-pass filter 31a with the threshold value Vr. When the sine wave signal is smaller than the threshold value Vr, the low level, and the sine wave signal is equal to or larger than the threshold value Vr At this time, the binarized clock signal CK1 that becomes high level is output.

Here, the DDS 30 and the clock signal output circuit 31 are, as will be described later, the fluctuation signal sequence generator 2
Fluctuation signal sequence y output from the convolution operation unit 28 of 4
A clock signal whose frequency is modulated by (k) is generated. Therefore, the DDS 30 and the clock signal output circuit 31 correspond to the clock generating means of claim 1 of the present invention, and the DDS 30 includes a portion corresponding to the modulating means of claim 1 of the invention.

On the other hand, the fluctuation signal sequence generating section 24, based on the noise generating means 25 for generating the white noise signal n (k) and the characteristic information set by the characteristic information setting means 23, the power spectral density distribution. Impulse response calculation means 26 for calculating the tap coefficient for each time of the impulse response of the transfer function approximate to the characteristic Sy (f), and a memory 27 for storing the tap coefficient for each time calculated by the impulse response calculation means 26. And the white noise signal n (k) output from the noise generating means 25 and the tap coefficient for each time stored in the memory 27,
And a convolution operation means 28 for generating a fluctuation signal sequence y (k) satisfying the relative power spectral density distribution characteristic S ′.

The noise generating means 25 generates the white noise signal n (k) based on the M-sequence pseudo random signal, and its configuration example is shown in FIGS. 6 and 7.

The noise generating means 25 of FIG. 6 comprises a set of pseudo-random signal generating circuits, and a plurality of P-stage serial shift registers 25a and exclusive outputs of the shift registers 25a at predetermined stages (determined by P) are mutually exclusive. EXO taking the logical sum
And an R circuit 25b, which sets an initial value other than 0 for all bits in the shift register 25a to generate a clock signal CK4.
It is configured to shift the 1-bit data of each stage each time it receives a signal, and to select any m stages (for example, 8 stages) of the P stages.
The output of each stage is sequentially output as a white noise signal n (k) of m bits in parallel.

Further, the noise generating means 25 of FIG. 7 generates the white noise signal closer to the ideal white noise, and the shift register 25a and the EXOR circuit 25 described above are used.
m pseudo random signal generating circuits of b are provided, and the initial value setting means 25c is used to shift registers 25a ₁ to 2a.
5a _m are set to different initial values (all bits are not 0), and each shift register 25a _{1 to} 25a _m is configured to shift 1-bit data of each stage each time the clock signal CK4 is received. together the outputs of one stage of the shift register _25a 1 _{~25a m} sequentially outputs the m bit parallel white noise signal n (k).

Incidentally, each shift register 25a _{1 to} 25a
_The initial values set in _m are sufficiently separated from each other. For example, P-stage shift registers 25a _{1 to} 25a
_In the case of a pseudo-random signal generating circuit with _m , the maximum is 2 ^P
Since −1 different codes can be obtained, for example, all bits 1 are set as an initial value in the first set of shift registers 25a _1, and all bits 1 are set in the second set of shift registers 25a _2.
The value advanced from the state of about (2 ^P −1) / m times is set as an initial value, and the third set of shift registers 25a ₃ has
If the value advanced from the state of all bits 1 by about 2 (2 ^P −1) / m times is set as the initial value, the initial value of each shift register 25a _{1 to} 25a _m is almost (2
^P− 1) / m or more, and if P is sufficiently large with respect to m, each shift register 25a _{1 to} 25a
The output of _m becomes uncorrelated, and the white noise signal n (k) in which these are grouped bit by bit and parallelized in m bits is very close to the ideal white noise.

The noise generating means 25 having the above-described structure uses a noise signal composed of random numbers of a plurality of bits as a clock signal according to a predetermined algorithm determined by a pseudo random signal generating circuit including a shift register and an EX-OR circuit. The data is sequentially output at a constant speed determined by CK4. Therefore, this noise generating means 25
Corresponds to the random number signal generating means of claim 1 of the present invention. As shown in FIG. 7, a combination of the outputs of a plurality of sets of pseudo-random signal generators corresponds to that of claim 2 of the present invention. It corresponds to a random number signal generating means.

The impulse response calculation means 26, based on the characteristic information set by the characteristic information setting means 23,
The tap coefficient h (t) for each time of the impulse response of the transfer function approximated to the power spectrum density distribution characteristic Sy (f) is calculated.

For example, like the characteristic Sy (f) in FIG.
The transfer function of the characteristic that it is constant up to the frequency f1, decreases at -3 dB / oct in the range of frequencies f1 to f2, and increases at 3 dB / oct in the range exceeding the frequency f2 is approximated by the following transfer function H (f). It is known to be done.

H (f) = (1 + jf / f2) / [1 + A
bs (f / f1)]^1/2 However, Abs (f / f1) indicates the absolute value of f / f1.
You

The impulse response h (t) of this transfer function H (f) is expressed as h (t) = ₋ ^{∞ ∫∞} H (f) e ^j2πft df.

The impulse response calculating means 26 is the same as that shown in FIG.
When the characteristics of the characteristic as described above and the frequencies (f1, f2, etc.) of the bent portion are set as the characteristic information, the impulse response h (t) is calculated based on the set value.

FIG. 8 shows the calculation result of the impulse response h (t) of the transfer function H (f). In the range of t <0, the impulse response h (t) is positive and the absolute value of t. Becomes larger as becomes larger, and becomes larger rapidly as the absolute value of t becomes closer to 0. In the range of t> 0, the impulse response h (t) becomes positive and approaches 0 as the absolute value of t increases, and becomes negative and abruptly decreases when the absolute value of t approaches 0.

The impulse response calculating means 26 has a value of h (t) in the T time interval of the response (referred to as a tap coefficient).
The initial time t ₀ is (−N / 2) T + T / 2 = − (N + 1) T / 2 so that the singular point of t = 0 is not taken, and the value of h (t ₀ + rT) is − N pieces (N is an even number) are calculated within a time range of (N−1) T / 2 ≦ t ≦ (N−1) T / 2.

The time range is limited by integrating the window function g (t), which is positive within the time range and 0 outside the time range, with the impulse response h (t).

The tap coefficient h (t ₀ + kT) for each time calculated by the impulse response calculation means 26 is stored in the memory 27.

The convolution operation means 28 is the noise generation means 25.
From the white noise signal n (k) output from the memory 27 and the tap coefficient h (t ₀ + rT) stored in the memory 27 for each time, the convolution operation of the following equation is performed, and the power spectral density distribution characteristic Sy (f The fluctuation signal sequence y (k) that satisfies the above condition is generated.

Y (k) = _{r = 0} Σ ^N−1 n (k−r) h (t ₀ + rT) = n (k) h (t ₀ ) + n (k−1) h (t ₀ + T) + n _{(k-2) h (t} 0 + 2T) + n (k-3) h (t 0 + 3T) ...... + n (k-N + 1) h _{[t 0 + (N-1)} T ]

Here, the convolution operation is performed by the input white noise signal n (k) and the preset tap coefficient h (t
₀ + rT), which is equivalent to performing a digital filtering process on the white noise signal n (k) output from the noise generating means 25. Therefore, this convolution operation means 28
Corresponds to the filter unit according to claims 1, 3, and 4 of the present invention.

The tap coefficient set in the convolution operation means 28 is based on the characteristic information set by the characteristic information setting means 23 in order to obtain the wander of the desired time deviation characteristic, as described above. Is calculated by the impulse response calculation means 26, and the spectrum characteristic of the fluctuation signal sequence y (k) output from the convolution calculation means 28 is determined by this tap coefficient. Therefore, the characteristic information setting means 23 and the impulse response calculating means 26 correspond to the setting means of claim 1 of the present invention.

Here, when the above convolution operation is actually performed, the error can be reduced by devising the operation order.

That is, since the absolute value of the tap coefficient h (t ₀ + rT) is very large in the region where t ₀ + rT is close to 0 and very small in the region far from 0, the above calculation is simply performed in floating point time. If performed sequentially, when the product-sum operation is performed to the range where t ₀ + rT is close to 0, the number of digits of the operation result becomes very large, and t ₀ + performed thereafter is increased.
The calculation result in the region where rT is positive and far from 0 underflows, resulting in a decrease in accuracy.

In order to prevent this, the product-sum operation of the area where the absolute value of the tap coefficient is small (the area where t is far from 0) is preferentially performed to increase the digit of the operation result, and then the absolute value of the tap coefficient is set. The sum-of-products calculation is performed for a large area (area where t is close to 0).

Although various calculation sequences are conceivable, two specific examples will be described here. In the first method, the sum-of-products calculation in which t is in the positive range and the sum-of-products calculation in which t is in the negative range are independently performed in order from the farthest from 0, and both are added at the end.

That is, the following product-sum operation is performed in order from the previous term to the subsequent term. _{y - (k) = n (} k) h (t 0) + n (k-1) h (t 0 + T) + n (k-2) h (t 0 + 2T) ...... + n (k-N / 2 + 1) h [T ₀ + (N / 2−1) T] y ₊ (k) = n (k−N + 1) h [t ₀ + (N−1) T] + n (k−N + 2) h [t ₀ + (N -2) T] + n (k-n + 3 ) h _{[t 0 + (n-3)} T ] ...... + n (k-n / 2) h _{[t 0 + (n / 2)} T ]

[0094] and, finally, _{y (k)} = _y - perform the calculation of the _{(k) + y + (k} ).

The second method is to alternately perform the product-sum calculation in the range where t is positive and the range where t is negative in order from the one far from 0.

That is, the following calculation is performed in order from the previous term to the subsequent term. _{y (k) = n (k} ) h (t 0) + n (k-N + 1) h _{[t 0 + (N-1)} T ] _{+ n (k-1) h} (t 0 + T) + n (k-N + 2) h _{[t 0 + (N-2)} T ] _{+ n (k-2) h} (t 0 + 2T) + n (k-N + 3) h _{[t 0 + (N-3)} T ] ...... + n (k-N / 2 + 1) h _{[t 0 + (n / 2-1)} T ] + n (k-n / 2 ) h _{[t 0 + (n / 2)} T ]

As described above, the sum-of-products operation of the area where the absolute value of the tap coefficient is small (area where t is far from 0) is preferentially performed to increase the digit of the operation result, and then the absolute value of the tap coefficient is changed. By performing the sum-of-products operation on a large area (area where t is close to 0), it is possible to prevent a decrease in accuracy due to underflow of floating-point operation.

When the convolution operation is performed, the N tap coefficients stored in the memory 27, the white noise signal n (k) at the current stage, and the white noise signals n up to N-1 before that. (K-1) to n (k-N + 1) are required.

The N-1 white noise signals n (k-1)
It is considered that ~ n (k-N + 1) is stored in a memory in advance and read out, and is generated every time by using a noise generating means 25 capable of reversely returning a noise signal. Method, and the latter method will be described later.

In the former method using a memory, either the noise generating means 25 or the convolution calculating means 28 is used as shown in FIG.
As shown in FIG.
Each time K5 is received, an N-1 stage (or N stages) shift register 50 is provided as a memory which stores the data while sequentially shifting to the subsequent stage.

Then, in the initial stage, up to N-1 noise signals n (k-1) to n (k-N + 1) are generated from the noise generating means 25 and stored in the shift register 50, The noise signal n (k) generated next and the noise signals n (k-1) to n stored in the shift register 50.
After performing the convolution operation using (k−N + 1), the shift clock CK5 is applied to generate the noise signal n.
(K) is stored in the shift register 50, and when the next noise signal n (k + 1) is generated, this noise signal n (k +
1) and the noise signal n stored in the shift register 50
The operation of performing the above convolution operation using (k) to n (k−N + 2) is repeated.

At this time, the shift clock CK5
Are synchronized with the clock signal CK4 of the noise generating means 25.

As described above, the fluctuation signal sequence y (k) obtained by performing such a convolution operation is input to the adder 29 and added to the data Y ₀ for determining the center frequency, and the addition is performed. The result u (k) is input to the DDS 30.

The DDS 30 reads out the data in the waveform memory 30c while accumulating (integrating) the addition result u (k) output from the adder 29 at high speed (speed of the clock signal CK2).

Therefore, when the fluctuation signal sequence y (k) is positive as shown in FIG. 10A, for example, FIG.
Y frequency of the clock signal CK1 from _{Y 0} as
When the fluctuation signal sequence y (k) is negative, the phase is advanced by (k), and the phase advances with respect to the reference phase in FIG. 10B by the accumulated amount of the fluctuation signal sequence y (k). The frequency of the clock signal CK1 is lower than Y ₀ by y (k),
The phase lags the reference phase by the negative cumulative amount of the fluctuation signal sequence y (k).

That is, the frequency of the clock signal CK1 is modulated by receiving the phase fluctuation corresponding to the integration result of the fluctuation signal sequence y (k), and this clock signal CK1
The power spectrum density distribution characteristic of time variation of
x (f) can be approximated and the clock signal CK1 having the wander of the TDEV mask M2 can be generated.

The wander generator 21 having the above-mentioned configuration
The clock signal CK1 output from the digital circuit 1 is input to the transmitter 40 as described above, and the digital signal Sa synchronized with the clock signal CK1 is the digital line 1 to be tested.
Sent to.

The digital signal Sa 'returned from the digital line 1 is received by the receiving section 41, the error rate thereof is measured by the error measuring section 42, and the clock signal CK1 reproduced by the receiving section 41 is received. ′ Of T
The DEV is measured by the TDEV measuring unit 43.

The measurement result E of the error measuring unit 42 is displayed by the display control means 46 on the display device 47 as a numerical value, for example, and the measurement result of the TDEV measuring unit 43 is defined by the characteristic F1 or F2 in FIG. TDEV characteristics (T
It is displayed for comparison with the DEV mask M2).

As shown by the characteristic F1 in FIG. 11, TDEV
When the TDEV characteristic lower than that of the mask M2 is measured, it is found that the wander is suppressed in the digital line 1, and the TDEV characteristic F2 in FIG.
When the TDEV characteristic higher than that of the V mask M2 is measured, it can be seen that the wander is increased in the digital line 1.

The above description corresponds to the TDEV mask M2.
Fluctuation of the power spectrum density distribution characteristic Sy (f)
As a transfer function of the filter for generating the signal sequence, H
(F) = (1 + jf / f2) / [1 + Abs (f / f
1)]^1/2 It is approximated by using
Square of absolute value | H (f) |^TwoAs shown in FIG.
For the ideal power spectrum density distribution characteristic Sy (f)
Error occurs in the bent part and the upper limit frequency part.
However, due to this error, TDEV of the clock signal CK1
The characteristic M2 'is defined by the specified TDEV mask M as shown in FIG.
When τ1, τ2 and τ are close to 0 for 2, the error is
Occurs.

This error can be corrected using a correction function. The correction function W (f) is, for example, as shown in FIG.
As shown in FIG. 4, the frequency increases in a band B1 centered on a frequency f1 ′ close to f1, reaches a peak (A1) at the frequency f1 ′, and decreases in a band B2 centered on a frequency f2 ′ close to f2 and the frequency f2. ′ Becomes the bottom (A2), increases in the band B3 centered on the frequency f3 ′ close to the upper limit frequency (10 Hz), becomes the peak (A3) at the frequency f3 ′, and is constant in the other parts. .

The general formula of the correction function W (f) having such characteristics is expressed as follows. W (f) = 1 + A1 {exp [-((f-f1 ') / B1) ² } / 2 + A1 {exp [-((f + f1') / B1) ² } / 2 + A2 {exp [-((f- f2 ') / B2) ² } / 2 + A2 {exp [-((f + f2') / B2) ² } / 2 + A3 {exp [-((f-f3 ') / B3) ² } / 2 + A3 {exp [[ -((F + f3 ') / B3) ² } / 2

This correction function W (f) and the transfer function H
Corrected transfer function H obtained by integration with (f)
The square | H (f) '| ² of the absolute value of (f)' is an ideal power spectrum density distribution characteristic Sy (f) as shown in FIG.
To a better approximation.

Therefore, the impulse response calculation means 26
, The impulse response h (t) of the transfer function H (f) and the impulse response w of the correction function W (f)
Using (t) and the window function g (t), the tap coefficient is calculated by calculating h '(t) = {h (t) * w (t)} · g (t), and the tap coefficient is calculated. If the convolution operation is performed using, the TDEV characteristic M2 ″ of the clock signal CK1 can be further approximated to the specified TDEV mask M2, as shown in FIG.
More accurate measurement becomes possible.

In the above description, the white noise signal n
The case where (k) and the tap coefficient h (t ₀ + rT) are read from the memory 27 and the shift register 50 and the convolution operation is performed has been described. As described above, the pseudo random signal is used in reverse order as the noise generating means 25. A convolution calculation can be performed without using the shift register 50 by using a generator that can generate the noise, and a noise generating means 25 that can reverse this order is used, and the impulse response calculating means 26 calculates tap coefficients in the designated order. With this configuration, the convolution operation can be performed without using the memory 27 and the shift register 50, the memory can be significantly saved, and the hardware configuration of the device can be simplified.

Here, the noise generating means 25 for generating the pseudo-random signal in the forward order and the reverse order can be realized by using a reciprocal polynomial for the forward order generator polynomial.

Hereinafter, this principle will be described by assuming that the pseudo random signal has a short code period. For example, a normal generating polynomial p
Assuming that (x) is the following expression and p (x) = x ⁴ + x + 1, the reciprocal polynomial q (x) is as follows.

[0119]

This generator polynomial p (x) and reciprocal polynomial q
FIG. 17 shows an example of the noise generating means 25 using (x).

This noise generating means 25 is for the forward order, which is the four-stage shift register 25a and the exclusive OR of the outputs of the third stage (x ¹ ) and the fourth stage (x ⁰ ) of the shift register 25a. EXOR circuit 25b and shift register 25a
Of the EXOR circuit 25d for reverse order, which takes the exclusive OR of the outputs of the first stage (x ³ ) and the fourth stage (x ⁰ ) of the above, and selectively outputs the outputs of the EXOR circuit 25a and the EXOR circuit 25d. And a switch 25e for returning the signal, and the control circuit (not shown) switches the switch 25e and inputs the clock signal CK4 '.

In this noise generating means 25, when 1 is set in all stages as an initial value and then the switch 25e is connected to the forward side to input the clock signal CK4 ', as shown in FIG. 18 (a). Then, the operation in which the internal state of the shift register 25a transits from state 1 to state 15 and returns to state 1 again is repeated.

Further, after setting 1 to all the stages as the initial value, the switch 25e is connected to the reverse order side, and the clock signal C
When K4 'is input, the internal state of the shift register 25a changes from state 1 to state 15 as shown in FIG. 18 (b).
The operation of transitioning to and returning to the state 1 again is repeated.

Here, state 1 to state 15 in the case of normal order.
The output data of the first stage up to [1000100110
10111], the output data of the first stage from state 1 to state 15 in the reverse order is [10101100].
1000111] in that order.

Comparing the output data of the first stage, the normal output data returns from the 13th bit to the 1st bit of the reverse output data, and moves to the 15th and 14th bits. It matches with the case.

That is, as shown in (a) of FIG. 19, the data of the first stage in the normal order is d1 → d2 → d3 → ... → d13 → d14 → d15 → d1.
→ ... is repeated, but the data in the first stage in the reverse order is
As shown in (b) of FIG. 19, d13 → d12 → d11 → ... → d1 → d15 → d14 →
Repeat d13 → ...

Therefore, when the switch 25e is connected to the reverse order side and the clock CK4 'is input to the output data string of the first stage when the switch 25e is connected to the forward order side and the clock CK4' is input. The output data sequence of the first stage is output in the reverse order.

However, as shown in the state correspondence diagram of FIG. 20, the state change of the shift register 25a in the reverse order is as follows.
Since it is not reversed in the normal order, the continuity of the data cannot be maintained by simply switching the switch 25e from the normal output state to the reverse order.

In order to maintain the continuity of this data,
It is necessary to set the state of the shift register 25a using the positional relationship of the data in FIG. 19 and the state correspondence information in FIG.

For example, shift to state 4 in the normal order and execute EX.
Considering the case where the data is output from the OR circuit 25b in the reverse order in the order of d4 → d3 → d2 → ... from the state in which the data d5 is output, the EXOR circuit 25d outputs the data d5 in the reverse order. Since it is in the state 8, if the data is output in the reverse order from the state 9 which is advanced by one from the state 8, the data can be output in the order of d4 → d3 → d2 → ...

Here, there are two methods for shifting from the normal state 4 to the reverse state 9. One of them is reverse order 9
18 is the same as the normal state 8.
As indicated by the solid arrow, the clock signal CK4 'is applied in the normal order to advance from state 4 to state 8 (in this case, the data output from the noise generating means 25 is d5.
This is a method of switching the switch 25e to the reverse order side after the reverse order state 9 is set.

The other method utilizes the fact that the normal state 4 is equal to the reverse state 12, and FIG.
, The switch 25e is switched to the reverse order side from the forward order state 4 as indicated by the one-dot chain line arrow, and the clock signal C
K4 'is given to advance from the reverse state 12 to the state 9 (at this time, the data output from the noise generating means 25 is d5.
Keep it as it is) method.

As described above, by controlling the switching of the switch 25e and the supply of the clock signal CK ', it is possible to output the data in the reverse order from an arbitrary state in the forward order, and although not described in detail, the method described above. It is also possible to output data in the normal order from an arbitrary state in the reverse order by performing the control opposite to the above.

The above description has been given for the case where the code period is short for easy understanding, but the forward / reverse free noise generating means 25 utilizing the reciprocal polynomial described above can be constructed in the same manner even for the case where the code period is long. .

For example, when the normal generating polynomial p (x) is the following expression, p (x) = x ⁹⁶ + x ⁷ + x ⁶ + x ⁴ + x ³ + x ² +1, the reciprocal polynomial q (x) is Like

[0136]   q (x) = x⁹⁶p (x^-1)           = 1 + x^96-7+ X^96-6+ X^96-4+ X^96-3+ X^{96- Two} + X⁹⁶           = X⁹⁶+ X⁹⁴+ X⁹³+ X⁹²+ X⁹⁰+ X⁸⁹+1

This generator polynomial p (x) and reciprocal polynomial q
FIG. 21 shows a pseudo random signal generation circuit using (x).

This pseudo random signal generating circuit includes 96-stage shift register 25a and the first stage (x ⁰ ) from the last stage of the shift register 25a and the 3rd to 5th stages (x ^{2 to} x).
^4), seventh stage ^{(x 6)} and 8-stage (an EXOR circuit 25b for normal order taking the exclusive OR of the output of the ^{x 7),} 1 stage counted from the last stage ^(x 0), 90 Step (x ⁸⁹ ), 9
First stage (x ⁹⁰ ) and 93 to 95th stage (x ^{92 to} x
⁹⁴ )), an EXOR circuit 25d for reverse order, which takes the exclusive OR of the outputs of the outputs ⁹⁴ , EXOR circuit 25b and EXOR circuit 25d.
And a switch 25e for selectively returning the output of the switch to the first stage, and similarly to the above, the control circuit (not shown) switches the switch 25e and controls the supply of the clock signal CK4 '.

Also in the circuit of FIG. 21, similarly to the case where the code period is short, the switch 25e is connected to the output data string when the clock CK4 'is input by connecting the switch 25e to the forward order side. The output data string when the clock CK4 'is input in the reverse order is output in the reverse order, and the switch 25e switches and the clock signal CK'.
As described above, by controlling the supply based on the positional relationship of the data and the state correspondence diagram, it is possible to output continuous data from any state in the normal order (or reverse order) to the reverse order (or the normal order).

In the above description, the shift register 25
Although the output of the first stage of a has been described, the outputs of the other stages can also be output from any stage because the relationship between the forward order and the reverse order can be obtained. However, since the above relationship is not established for parallel data output from two or more different stages, the above-described forward / reverse pseudo-random signal generation circuit, as shown in FIG. It is applied to each pseudo-random signal generating circuit of the noise generating means 25 which outputs data bit by bit from the generating circuit and outputs an m-bit parallel white noise signal.

As described above, if the noise generating means 25 that can generate the white noise signal n (k) in reverse order is used,
After the k-th white noise signal n (k) is generated, N-1 noise signals n (k-1) to n (k-N +) before that are generated.
1) can be sequentially generated, and the memory 50
Without using even the convolution _{y (k) = n (k} ) h (t 0) + n (k-1) h (t 0 + T) + n (k-2) h (t 0 + 2T) ...... + n ( k−N + 1) h [t ₀ + (N−1) T] can be performed.

Further, the impulse response calculation means 26 sets the tap coefficient to h (t ₀ ) to match the output of this noise signal.
If the calculation is performed in the order of h [t ₀ + (N−1) T], the memory 2
7 is also unnecessary, and the convolution operation can be performed by a set of product-sum operation circuits.

Further, as described above, in order to prevent an error due to underflow of a floating point, the convolution operation is performed by the first method, that is, the product sum operation in which t is in the positive range and t is in the negative range. When the product-sum operation and the sum-of-products operation are independently performed in order from the farthest from 0, for example, the noise signal n
(K) to n (k−N / 2 + 1) are generated and y
_- (K) is calculated, and then n (k-N + 1)-
The shift register 5 is generated by generating up to n (k−N / 2) to obtain y ₊ (k) and then adding both.
The fluctuation signal sequence y (k) can be obtained without using 0.

Even in this case, the output of this noise signal sequence is
In addition, the impulse response calculation means 26 calculates the tap coefficient
h (t₀) ~ H [t₀+ (N / 2-1) T] and
[T ₀+ (N-1) T] to h [t₀+ (N / 2) T]
If calculated sequentially, the memory 27 becomes unnecessary, and one set of sum of products
The convolution operation can be performed by an arithmetic circuit.

In the above description, the case where a clock signal having a wander having a characteristic such as the TDEV mask M2 of FIG. 24B as the prescribed TDEV characteristic is generated has been described, but this limits the present invention. Not a thing.

For example, in the case of generating a clock signal having a wander having a characteristic like the TDEV mask M1 of FIG. 24 (a), characteristic information of this TDEV mask M1, power spectrum density distribution corresponding to the mask, The same filtering process as described above may be performed using the transfer function H (f) and the correction function W (f).

The TDEV mask is not limited to the one described above, but may have three or more bent portions or may have different inclinations. For these masks, the power corresponding to the mask is the same as described above. The same filtering process as described above may be performed using the spectral density distribution, the transfer function H (f), and the correction function W (f).

Further, in the wander generator 21, the fluctuation signal y (k) is directly input to the adder 29. However, like the wander generator 21 'shown in FIG. The output fluctuation signal y (k) and the set value B set by the level setting means 32 are multiplied by the multiplier 33, and the multiplication result y (k) 'is added by the adder 29.
Alternatively, the level of the fluctuation signal may be variable.

As described above, the wander generator 2 of the embodiment is used.
1 generates a fluctuation signal sequence y (k) having a power spectrum density distribution characteristic of frequency fluctuation corresponding to the desired time deviation characteristic based on the characteristic information of the desired time deviation characteristic, and this fluctuation signal sequence y (k ) And the data Y ₀ that determines the center frequency of the clock signal to be output, are added by the adder 29, a signal having a frequency corresponding to the addition result is output from the DDS 30, and the output signal of the DDS 30 is waveform-shaped to obtain the clock signal. CK1 is output.

Therefore, it is possible to easily generate the clock signal CK1 having a wander that satisfies the desired time deviation characteristic.

In addition, the fluctuation signal sequence generating section 24 includes a noise generating means 25 for generating a white noise signal based on a pseudo random signal and a noise generating means 25 based on the characteristic information set by the characteristic information setting means 22. Impulse response calculation for calculating the impulse response of the transfer function for approximating the power spectral density distribution of the white noise signal output from the power spectral density distribution characteristic Sy (f) of the frequency fluctuation corresponding to the desired time deviation characteristic A fluctuation signal sequence y (k) having a power spectral density distribution characteristic Sy (f) is obtained by performing a convolution calculation of the calculation result of the means 26, the impulse response calculation means 26 and the white noise signal output from the noise generation means 25. And convolution operation means 28 for generating

Thus, the fluctuation signal sequence y is digitally fluctuated.
Since (k) is generated, it is possible to accurately generate the clock signal CK1 having a wander that satisfies the desired time deviation characteristic.

Further, in the case where the impulse response calculating means 26 corrects the impulse response by the correction function W (f) corresponding to the error between the power spectrum density distribution characteristic Sy (f) of the frequency fluctuation and the transfer function. The clock signal CK1 having a wander that satisfies the desired time deviation characteristic can be generated more accurately.

If the convolution operation means 28 preferentially performs the product-sum operation of the smaller absolute value of the operation result of the impulse response, the error in the floating-point operation can be reduced. Therefore, the clock signal CK1 having a wander that satisfies the desired time deviation characteristic can be generated with higher accuracy.

Further, the impulse response calculating means 26 is constructed so as to calculate the impulse response every time the white noise signal is outputted from the noise generating means 25, and the convolution calculating means 28 makes the impulse response calculating means 26. If the convolution calculation is performed using the calculation result calculated each time, the memory can be saved and the hardware configuration of the device can be simplified.

Further, the noise generating means 25 has a plurality (m) of sets of pseudo-random signal generating means for generating M-sequence pseudo-random codes at different initial phases, and each of the pseudo-random signal generating means has a predetermined stage. In a configuration in which the outputs are collectively output as a m-bit parallel white noise signal, the white noise signal can be made extremely close to an ideal white noise, and a wander that satisfies a desired time deviation characteristic can be obtained. It is possible to more accurately generate a clock signal having

The fluctuation signal sequence generator 24 of the wander generator 21 of the above-mentioned embodiment calculates the impulse response of the transfer function corresponding to the power spectrum density distribution characteristic Sy (f) of the frequency fluctuation corresponding to the desired time deviation characteristic. Then, the fluctuation signal sequence y (k) having the power spectrum density distribution characteristic Sy (f) was generated by performing the convolution calculation of this calculation result and the white noise signal. Instead of 24, a fluctuation signal sequence generation unit 24 ′ shown in FIG. 23 can be used.

The fluctuation signal sequence generating section 24 'is composed of the noise generating means 25, the data allocating means 51, the weighting means 54, and the synthesizing means 56, and the frequency fluctuation corresponding to the desired TDEV characteristic. The frequency range of the power spectrum density distribution characteristic Sy (f) is divided into a plurality of bands, and the white noise signal output from the noise generating means 25 is distributed and weighted by the data distribution means 51 at a rate according to each band. The weighting corresponding to the power spectral density of each band is performed by the means 54, and the power spectral density distribution characteristic S is obtained by synthesizing by the synthesizing means 56.
A fluctuation signal sequence y (k) having y (f) is generated.

Here, a case where the frequency range of the power spectral density distribution characteristic Sy (f) corresponding to the TDEV mask M2 is divided into a plurality of bands will be described.

Since this characteristic Sy (f) is constant below 0.01 Hz and changes in proportion to 1 / f or f within the range of 0.01 Hz to 10 Hz, 0.01 Hz to 10H
The boundary of each band is placed in the range that covers z, and the band is divided so that the width of each band doubles.

For example, the highest boundary frequency fc1 is 16
Hz, the second boundary frequency fc2 from the highest is 8 Hz, the third boundary frequency fc3 is 4 Hz, and similarly, the 11th boundary frequency fc11 is 1 / 64H.
z, 12th boundary frequency fc12 is 1/128 Hz
(0.0078 Hz), and 12 boundary frequencies fc
It may be divided into 13 bands from 1 to fc12.

Therefore, the noise generating means 25 generates a white noise signal n (k) at a rate twice (32 Hz) of the highest boundary frequency fc1, and the data allocating means 51 generates the white noise signal n (k). ) Is distributed to 13 signal paths so that the rate decreases by ½ according to the frequency of each band.

For example, as shown in FIG. 24, the data distributing means 51 includes thirteen 1/2 frequency dividers 52 _{1 to} 51 ₁₃ connected in series in which the output rises at the fall of the input signal.
When, it is composed of the respective 1/2 frequency divider _{52 1-52} latch circuit ₅₃ 1 _{to 53 13} divided output rise in the noise signal n (k) for latching the thirteen of _13, the noise signal n
The clock signal CKn synchronized with (k) is input to the ½ frequency divider 52 ₁ in the first stage.

Therefore, when the noise generating means 25 outputs the noise signal n (k) synchronized with the clock signal CKn of FIG. 25 (a) in the order of n (1), n (2) ,. As shown in (c) of FIG. 25, the 1/2 frequency-divided signal rising at the falling edge of the clock signal CKn is the latch circuit 53.
_Since it is input to ₁ , the odd number noise signal n1 [n (1),
n (3), n (5), ..., N (1 + 2i), ...] Are output at a rate (16 Hz) that is 1/2 that of the clock signal CKn.

[0165] Further, the latch circuit 53 _2, as shown in (e) of FIG. 25, because the 1/4 frequency signal that rises in synchronization with the fall of 1/2-divided signal is input, a latch circuit 53 from _2, the noise signal n2 [n (2) from n (2) of the four intervals as (f) in FIG. 25, n (6), n
(10), ..., N (2 + 4i), ...] are clock signals C
It is output at a rate (8 Hz) that is ¼ of Kn.

[0166] Further, the latch circuit 53 _3, as shown in (g) of FIG. 25, because the 1/8 frequency-divided signal that rises in synchronization with the fall of 1/4-frequency signal is input, a latch circuit 53 from _3, the noise signal n3 [n (4) from n (4) of the eight intervals as (h) in FIG. 25, n (12), n
(20), ..., N (4 + 8i), ...] are clock signals C
It is output at a rate (4 Hz) that is 1/8 of Kn.

[0167] Similarly, the latch circuits ₅₃ 4-53
From _13, the noise signal output from the noise generating means 25, 16 intervals, 32 intervals, ^..., noise signal n4 of ^{2 13} intervals, n5, ..., is n13, the clock signal C
Kn of 1 / 16,1 / 32, ..., it will be outputted at a rate of ^{1/2 13.}

The noise signals n1 to n13 of each rate are
As shown in FIG. 24, 13 multipliers 55 _{1 to} 55 ₁₃ of the weighting means 54 are input and multiplied by weighting coefficients σ _{1 to} σ ₁₃ , respectively.

The weighting coefficients σ _{1 to} σ ₁₃ are values proportional to the square root of the spectrum size of each band of the power spectrum density distribution characteristic Sy (f) divided by the boundary frequencies fc1 to fc12, Characteristic information setting means 23
It is set from.

Here, for example, the characteristic information setting means 23
26, the coefficient σ ₁₃ corresponding to the spectrum level of the lowest band (1/128 Hz or less) is used as the reference value 1, and the other weighting coefficients σ _{1 to} σ ₁₂ are used as the power spectrum density distribution characteristics Sy (f ) And set as follows.

Σ ₁₂ ² = 1 σ ₁₁ ² = 1/2 σ ₁₀ ² = 1/4 σ ₉ ² = 1/8 σ ₈ ² = 1/16 σ ₇ ² = 1/8 σ ₆ ² = 1/4 σ ₅ ² = 1/2 σ ₄ ² = 1 σ ₃ ² = 2 σ ₂ ² = 4 σ ₁ ² = 8

The noise signal n weighted in this way
1'-n13 'are input to the synthesizing means 56. The synthesizing means 56 are connected in cascade as shown in FIG.
It is composed of a plurality of polyphase type sub-band combiners (QMF combiners) 57 _{1 to} 57 ₁₂ .

Each of the sub-band synthesizers 57 _{1 to} 57 ₁₂ has
The outputs of a high-pass filter and a low-pass filter (both digital filters) having the same cutoff frequency fc are combined and output.

The cut-off frequency of each sub-band combiner 57 _{1 to} 57 ₁₂ depends on the power spectral density distribution characteristic S.
Boundary frequencies fc1 to f that divide the frequency range of y (f)
It matches c12.

The synthesizing means 56 synthesizes the noise signals n1 'to n13' as shown in FIG.

[0176] That is, the cut-off frequency is lowest subband combiner 57 ₁₂ noise signal n13 'of the high band and the noise signal n12' the low-frequency sub-band combiner components were synthesized by cutting the frequency fc12 57 ₁₁ and the sub-band synthesizer 57 ₁₁ sets the high frequency band of the output of the sub-band frequency synthesizer 57 ₁₂ and the low frequency band of the noise signal n11 ′ to the frequency fc11.
Sub-band synthesizer 54 ₁₁
To enter.

[0177] Similarly, the weighted noise signal of each rate are synthesized from the lower of the rate, the characteristics along the frequency variation power spectrum density distribution characteristic Sy (f) from the sub-band combiner 57 ₁ Fluctuation signal sequence y (k)
The fluctuation signal sequence y (k) is input to the adder 29 and added to the data Y ₀ that determines the center frequency, and the addition result u (k) is input to the DDS 30. , The clock signal of the TDEV mask M2 can be generated.

The characteristic M in FIG. 30 is the TDEV characteristic of the clock signal generated by using the fluctuation noise generator 24 'described above, and a characteristic very similar to the TDEV mask M2 is obtained.

Here, the case where the fluctuation signal of the power spectral density distribution characteristic Sy (f) corresponding to the TDEV mask M2 is generated has been described, but in the fluctuation signal generating section 24 ', the division band and the weighting coefficient are set. By setting it arbitrarily, a fluctuation signal sequence having an arbitrary power spectral density distribution can be generated.

Further, as shown in FIG. 30, the data distribution means 51 of the fluctuation signal sequence generating section 24 ′, as shown in FIG. 30, is opposite to the sub-band combiners 57 _{1 to} 57 _{12 of the} combining means 56, as opposed to the input signal. equal cutoff subband demultiplexer which demultiplexes by a high-pass filter and the low-pass filter of the frequency _{58 1-58 12} each subband combiner ₅₇ 1-57
Alternatively, the noise signals n1 to n13 having different rates may be output in parallel by connecting to the cascade in symmetry with the reference numeral ₁₂ .

In this case, the sub-band demultiplexers 58 _{1 to} 5 5
The cutoff frequency of 8 ₁₂ is the subband synthesizer 57 ₁
To 57 is set to ₁₂ the same as the cut-off frequency of.

As described above, the noise signal is output in parallel at a rate according to the frequency of the band in which the frequency range of the power spectral density distribution characteristic Sy (f) is divided into a plurality of bands, and the noise signal is output according to the power spectral density of each band. In the case of generating a fluctuation signal sequence by performing weighting and combining, a fluctuation signal having an arbitrary power spectrum density distribution characteristic can be generated, and a clock signal having a complicated TDEV mask characteristic in which calculation of an impulse response is difficult. Can be easily generated.

Also in this case, as described above, the noise generating means 25 has a plurality (m) of sets of pseudo-random signal generating means for generating M-sequence pseudo-random codes at different initial phases, as described above. By using the output of the predetermined stage of the random signal generating means, which is configured to output as a white noise signal in parallel with m bits,
The white noise signal can be made extremely close to an ideal white noise, and a clock signal having a wander that satisfies a desired time deviation characteristic can be generated with higher accuracy.

Further, the fluctuation signal sequence generator 24 'is
The signal distribution outputted from the noise generating means 25 is subjected to the filtering processing by the data distributing means 51, the weighting means 54 and the synthesizing means 56, and the weighting coefficients σ _{1 to} σ ₁₂ which determine the spectrum characteristic of the processing result are set. The characteristic information setting means 23 is used for setting. Therefore, the data distribution means 51 and the weighting means 54
The synthesizing means 56 corresponds to the filter section of claims 1 and 5 of the invention, and the characteristic information setting means 23 corresponds to the setting means of claims 1 and 5 of the invention.

Thus, the wander generator 2 of the embodiment
1 performs a filtering process by receiving a random number signal generating means for sequentially generating a random number signal composed of a plurality of bits at a constant speed and a random number signal sequence output from the random number signal generating means according to a predetermined algorithm. A filter section, clock generating means for generating a clock signal, and modulating means for modulating the frequency of the clock signal generated by the clock generating means with a signal output from the filter section,
A setting unit that gives a control signal to the filter unit to set each amplitude value of the spectrum of the signal sequence output from the filter unit so that the wander characteristic of the clock signal whose frequency is modulated by the modulating unit becomes the desired characteristic. Since it is provided, a clock signal having a desired wander characteristic can be easily generated.

Further, the digital line test apparatus 20 of the embodiment includes the wander generator 21 for generating the clock signal CK1 having the wander that satisfies the specified time deviation characteristic, and the clock signal output from the wander generator 21. A transmitting section 40 for transmitting a digital signal synchronized with CK1 to the digital line 1 under test, and a receiving section for receiving the digital signal returned from the digital line under test and regenerating the clock signal of the received digital signal. 41, an error measuring unit 42 that measures an error of the digital signal received by the receiving unit 41,
The time deviation measuring unit 43 for measuring the time deviation characteristic of the clock signal CK1 ′ reproduced by the receiving unit 41, the display device 47, and the measurement result of the error measuring unit 42 are displayed on the display device 47, and the time deviation measuring unit is also displayed. Display control means 46 is provided to display the time deviation characteristic measured at 43 on the display device 47 so that it can be compared with the prescribed time deviation characteristic.

Therefore, the wander of the digital line 1 to be tested can be evaluated easily and efficiently, and the change of the wander by the digital line 1 can be easily compared on the display screen.

Further, in the digital line test apparatus 20 of the embodiment, since the wander generator 21 constituting the wander generator is constructed as described above, the clock signal CK1 having the wander satisfying the desired time deviation characteristic is provided. It is possible to send a digital signal synchronized to the digital line 1 to be tested, the digital line 1 can be correctly evaluated, and the device can be downsized.

Next, as described above, the noise signal string is digitally filtered by the filter section,
In a wander generator that outputs a clock signal whose frequency is modulated by the output signal, when the device is started up or when the characteristics are switched, a clock signal having a wander with a desired characteristic is promptly output, and the output clock signal A technique for making it possible to grasp in advance the characteristics of the wander and the characteristics of the signal that is modulating the clock signal will be described.

That is, as described above, the convolution operation means 28, the data distribution means 51, the weighting means 54,
The filtering process by the synthesizing unit 56 sequentially stores the input signal sequence in a plurality of internal storage elements while sequentially storing the same, and performs a product-sum operation of the content of each storage element and the coefficient corresponding to each storage element. It includes a process of sequentially outputting the calculation result.

Therefore, as described above, in order to obtain an arbitrary frequency characteristic, it is necessary to increase the frequency resolution that can be set. For that purpose, the filter order is increased, that is, the number of internal storage elements is increased. When the number of storage elements is increased in this way, the time until the signal with the desired wander characteristic is output becomes very long at the initial stage of operation or when the characteristic is switched.

Further, in the case where the wander characteristic of the output clock signal can be arbitrarily changed, it is inconvenient if it cannot be confirmed in advance what the TDEV characteristic of the actually output clock signal is. Is.

In order to solve this, it is conceivable to measure the clock signal or noise signal actually output and display the measurement result. However, a method of actually measuring the clock signal or noise signal in this way Then, the configuration of the wander generator becomes complicated, and it takes a very long time (several hours to several tens of days) to complete the measurement depending on the content of the characteristic to be measured, which is difficult to realize.

Therefore, next, it is possible to quickly generate a clock signal having a wander of a desired characteristic, and to easily grasp the characteristics of the wander of the clock signal actually output and the characteristics of the signal modulating the clock signal. The details of the wander generator that can be used will be described.

FIG. 31 shows the configuration of the noise generator 120 included in the wander generator made to solve the above problem.

The white noise generating means 121 of the noise generator 120 outputs the digital white noise signal n (k) at a predetermined rate.

The white noise generating means 121 is synchronized with the clock signal CKn from a plurality of N (for example, N = 12) pseudo random signal generators 122 (1) to 122 (N) as shown in FIG. 32, for example. The K-bits of K + [l
The white noise signal n (k) is output as og ₂ N] bits. Here, the above-mentioned parenthesis symbol [] represents an integer value rounded up to the nearest whole number.

A plurality of N pseudo random signal generators 1
22 (1) to 122 (N) generate pseudo-random signals having a code period (2 ^S −1) generated from the same S-stage shift register, but the correlation peaks of their outputs are separated from each other. Are initialized by the control circuit 123 so that the phases of the output codes are significantly different, and n (1), n
The noise signals up to (2), ..., N (2 ^S −2), n (2 ^S −1) are set as one cycle, and this is repeatedly output.

As described above, the instantaneous value of the white noise signal generated by adding a plurality of pseudo random signals approximates the Gaussian distribution characteristic.

The control circuit 123 has an initial setting means 1 which will be described later.
In response to the noise signal output instruction from 31, the pseudo random signal generators 122 (1) to 122 (N) are initialized and the clock signal CKn is output.

The noise signal n (k) output from the white noise generating means 121 is input to the filter section 125. The filter unit 125 has a digital filter that stores a digital signal sequence while sequentially shifting it to a plurality of internal storage elements and performs a product-sum operation on the storage contents of the plurality of storage elements. The noise signal n (k) output from 121 is converted into a noise signal having a frequency characteristic corresponding to a preset characteristic coefficient and output.

Here, for example, the filter unit 125 is shown in FIG.
A case in which the FIR type digital filter 126 as shown in FIG.

This digital filter 126 stores a plurality of M stages of serial storage elements (also referred to as delay elements) 127 (1) to 127 for sequentially storing the input data while shifting the data to the subsequent stage.
(M) and the input data of the first-stage storage element 127 (1) and the output data of each storage element 127 (1) to 127 (M), a filter coefficient (characteristic coefficient of this embodiment) h
Multipliers 128 (1) to 12 for multiplying _{0 to} h _M , respectively
8 (M + 1) and multipliers 128 (1) to 128 (M +
1) and an adder 129 for obtaining the sum of the outputs.

The storage elements 127 (1) to 127 (M) sequentially shift the noise signal n (k) in synchronization with the clock signal CKn. In addition, each storage element 127 (1) to 1
27 (M) can be set with arbitrary values D (1) to D (M) from an initialization unit 131 described later.

Further, the multipliers 128 (1) to 128 (M +
The filter coefficients h _{0 to} h _M input to 1) are set by the characteristic coefficient setting means 130 described later.

The FIR type digital filter 126 having the above-described structure uses the input noise signal n (k) as a noise signal having a frequency characteristic corresponding to the filter coefficients h _{0 to} h _M (corresponding to the fluctuation signal sequence). Converted to and output.

The characteristic coefficient setting means 130 comprises the filter unit 1.
For setting the characteristic coefficient for determining the characteristic of the noise signal u (k) output from 25 (if the filter section 125 is composed of only the digital filter 126 as described above). However, an arbitrary characteristic coefficient can be set by operating an operation unit (not shown) or the like.

The initial setting means 131 is a memory (ROM).
Based on the content of the memory 131a, a noise signal string having the same 131a and having the same storage content as each storage element in the digital filter in the state where the noise signal having the frequency characteristic corresponding to the characteristic coefficient is output from the filter unit 125 is generated. Then, at least at the initial stage of the operation of the device, each memory element in the digital filter is initialized.

That is, in the case where the filter section 125 is composed of only the digital filter 126 as described above, the digital filter 126 outputs a noise signal having a frequency characteristic corresponding to the filter coefficients h _{0 to} h _M. Storage elements 127 (1) to 12 in the state of being
A noise signal sequence equivalent to the stored contents of 7 (M) is initialized.

Here, if the noise signal n (1) generated at the initial stage of operation by the white noise generating means 121 is known, M noise signals n (2 ^N −) before the noise signal n (1) are known.
1), n (2 ^N −2), ..., N (2 ^N −M) are stored in advance in the memory 131a as initial values D (1) to D (M), respectively, at the beginning of operation such as power-on. , As shown in FIG. 34, each storage element 127 of the digital filter 26.
(1) to 127 (M) are initialized, and then the white noise generating means 121 is instructed to output a noise signal.

Therefore, at the beginning of the operation, the filter unit 12
Since the internal state of 5 is immediately set to the same state as the steady state, a noise signal having a frequency characteristic corresponding to the filter coefficients h _{0 to} h _M set by the characteristic coefficient setting means 130 is output from the filter unit 125. It is output immediately.

The noise signal u (k) output from the filter unit 125 is input to the multiplier 132. Multiplier 132
Multiplies the noise signal u (k) by the amplitude coefficient A set by the amplitude setting means 133, and outputs the multiplication result as the noise signal y (k) having the desired characteristic.

Further, the characteristic calculation means 134 calculates the noise signal y (k) output from the multiplier 132 based on the characteristic coefficient set in the filter section 125 and the amplitude coefficient A set in the multiplier 132. Obtain frequency characteristics and amplitude.

The characteristic display means 135 displays the characteristic of the noise signal obtained by the characteristic calculation means 134 on the display 136 in the form of a graph or numerical values.

The noise generator 120 having such a configuration
Then, the storage contents of the storage elements 127 (1) to 127 (M) in the digital filter 126 in the state where the initial setting means 131 outputs the noise signal having the frequency characteristic corresponding to the characteristic coefficient are equivalent. Noise signal is initially set in each of the storage elements 127 (1) to 127 (M) at least at the beginning of the operation of the apparatus.

Therefore, the white noise generating means 121 to M
It is possible to immediately output a noise signal having a frequency characteristic corresponding to the characteristic coefficient from the filter unit 125 without waiting for each noise signal to be captured by the filter unit 125.
It is possible to eliminate the influence of measurement or the like due to the output of a noise signal that does not match this characteristic.

Further, the characteristic calculation means 134 causes the characteristic of the noise signal y (k) to be output based on the characteristic coefficient set by the characteristic coefficient setting means 130 in the filter section 125 and the amplitude coefficient A of the amplitude setting means 133. Is obtained and the characteristic is displayed by the characteristic display means 135,
This is convenient because the characteristics of the output noise signal y (k) can be confirmed in advance and quickly.

In the above description, the case where the filter unit 125 is composed of only the digital filter 126 has been described, but this does not limit the present invention.

For example, as shown in FIG. 35, the filter unit 125 can be composed of a demultiplexing circuit 141, a weighting circuit 143, and a synthesizing circuit 145 including a digital filter.

The branching circuit 141 is composed of a plurality of P 1/2 decimating circuits 142 (1) to 142 (P) connected in cascade.

Each 1/2 decimating circuit 142 (1) -1
42 (P) is a circuit for alternately distributing the input data to the two output paths and outputting the data at a rate half the input rate.

First-stage 1/2 decimating circuit 142 (P)
Are noise signals n (1), n (2), n of FIG.
When (3), ... Is input, from one of the output terminals,
As shown in FIG. 36B, the odd-numbered noise signal n
(1), n (3), n (5), ..., And even-numbered noise signals n (2), n (4), n are output from the other output terminal.
(6), ... Is output. The noise signal output from the other output terminal is the second-stage 1/2 decimating circuit 42.
It is input to (P-1).

The second-stage 1/2 decimating circuit 142 (P
Similarly, the noise signal n (2), n (2), n
One of the output terminals (4), n (6), ...
6 (c), noise signals n (2), n (6), n
(10), ... Is output, and the noise signal n is output from the other output terminal.
(4), n (8), n (12), ... Are output. The noise signal output from the other output terminal is 1 / th of the third stage.
It is input to the 2-decimate circuit 142 (P-2).

Similarly, the third-stage 1/2 decimating circuit 1
From one output terminal of 42 (P-2), noise signals n (4), n (12), n are output as shown in (d) of FIG.
, (20), ..., And the noise signals n (8), n (16), n (24) ,.
From one output terminal of the fourth-stage 1/2 decimating circuit 142 (P-3), noise signals n (8), n (24), n (40), Is output, and the noise signals n (16), n (32), and
.. are output, and noise signals are output from the 1/2 decimating circuits 142 (P-4) to 142 (1) so that the output rate decreases by 1/2.

Thus, each 1/2 decimating circuit 14
Noise signals n ₁ , n ₂ , n ₃ , ..., N output at different rates from one of the output terminals of 2 (1) to 142 (P).
_{P + 1} is the multiplier 144 (1) to the weighting circuit 143.
144 (P + 1).

Multipliers 144 (1) to 144 (P + 1)
Are input noise signals n ₁ , n ₂ , n ₃ , ..., N
Weighting coefficient (characteristic coefficient) σ for _{P + 1
1} , σ ₂ , σ _3, ..., σ _{P + 1} are multiplied and output.

In this way, the noise signal n ₁ of each rate,
By weighting n ₂ , n ₃ , ..., N _{P + 1} , the noise signal u output from the filter unit 125 is obtained.
The frequency characteristic of (k) can be set arbitrarily.

For example, by performing weighting (P is 12 in this figure) as shown in FIG. 37, there is a phase fluctuation (wander) in the power spectrum density distribution corresponding to a specific TDEV mask characteristic used for wander evaluation. A clock signal can be generated. At this time, the power spectral density distribution follows the distribution of the square value of σ.

The weighted noise signals n ₁ ′, n ₂ ′, n ₃ ′, ..., N _{P + 1} ′ of each rate are input to the subband synthesizers 146 (1) to 146 (P) of the synthesizing circuit 45, respectively. To be done.

Each subband synthesizer 146 (1) -146
(P) is the above-mentioned FIR type LP with a common cutoff frequency.
F (low pass filter) and HPF (high pass filter)
Is internally provided, the interpolation processing is performed on two input digital signals, the HPF is cut off by one of the inputs (the one having a higher frequency) with the HPF, and the other (the frequency is LPF for lower input)
Is cut off in the high frequency range, and the outputs of both filters are combined and output.

Subband synthesizers 146 (1) -146
As for the cutoff frequency of the filter inside (P), the cutoff frequency of the subband synthesizer 146 (1) having the lowest frequency is fa.
Then, 2fa, 4fa, 8fa, ..., 2 ^P-1 fa
Are set so as to increase by twice in accordance with the rate of the noise signal to be input, and the noise signals having lower rates are connected in order.

That is, as shown in FIG. 38, the two lowest-rate noise signals n ₁ ′ and n ₂ ′ are combined at the cutoff frequency fa in the subband combiner 146 (1), and the combined output and noise signal n ₃ ′ is the subband synthesizer 146
In (2), the cut-off frequency is 2fa, and the combined output and the noise signal n ₄ ′ are combined into a subband combiner 146.
In (3), the cutoff frequency is 4fa.

Similarly, since noise signals having lower rates are sequentially combined, the level of each band of the octave width corresponds to the weighting coefficient from the sub-band combiner 146 (P) as shown in FIG. A noise signal u (k) having a frequency characteristic that changes as a result is output.

In the case of the filter section 125 constituted by the demultiplexing circuit 141, the weighting circuit 143 and the synthesizing circuit 145 in this way, since the cutoff frequency of the filter of each subband synthesizer 146 of the synthesizing circuit 145 is fixed, the filter coefficient Does not need to be variably controlled, and the weighting factors σ ₁ , σ ₂ , σ ₃ , ..., σ _{P + 1} that determine the characteristics of the filter.
Is set from the characteristic coefficient setting means 130.

Further, to the storage element inside the filter (digital filter) of the synthesizing circuit 145, the initial setting means 131 outputs the noise signal of the frequency characteristic corresponding to the characteristic coefficient (weighting coefficient in this case) from the filter section 125. A noise signal sequence having the same characteristics as the stored contents of each storage element in the above-described state is initially set at the initial operation of the apparatus and when the weighting coefficient is changed.

However, in this case, since the signal sequence output from the white noise generating means 121 cannot be simply substituted as described above, the white noise signal and the characteristic coefficient setting means 130 are used.
The initial value to be set in the storage element of each filter is calculated and set based on the information such as the weighting coefficient from.

That is, as described above, assuming that the noise signal n (1) generated by the white noise generating means 121 at the initial stage of operation is known, the white noise generating means 121 generates the noise signal n (1) in the steady state. At this time, the noise signals n _{1 to} n _{P + 1} output from the demultiplexing circuit 141 are also known, and the filter characteristics (transfer function) of each subband combiner 146 of the combining circuit 145 are also known. .

Further, the LPF and HPF inside the sub-band combiners 146 (1) to 146 (P) of the combiner circuit 145.
If the memory elements of the above are both M stages in the same manner as described above, the normal M noise signals are input to each memory element of the filter of the subband synthesizer 146 (P) at the final stage is the subband synthesis of the first stage. 2P · M noise signals are input to the device 146 (1), and m of the LPF of the i-th (i is 1 to ^P ) subband combiner 146 (i) at this time. Stored value L _{i of the} storage element in the tier (m is any of 1 to M)
(M) and the stored value H _i (m) of the storage element at the m-th stage of the HPF
Is expressed as L _i (m) = _{j = 1} Σ ^{i + 1} σ _j · x _j (m) H _i (m) = _{j = 1} Σ ^{i + 1} σ _j · y _j (m).

Here, x _j (m) and y _j (m) are LP
A constant sequence obtained from the transfer functions of F and HPF and the noise signal output from the white noise generating means 121 (weighting coefficient is 1
Is a constant string), and as described above, the LPF
The HPF transfer function and the noise signal output from the white noise generating means 121 are known.

Therefore, the constant sequence x _j (m), y
_j (m) is obtained in advance and stored in the memory 131a,
If the initial value of the filter is obtained by the above calculation and set in the sub-band synthesizers 146 (1) to 146 (P) of the synthesizing circuit 145 at the initial stage of operation or when the weighting coefficient is changed,
It is possible to immediately output the noise signal u (k) having a desired characteristic.

The total number of times of the above product-sum calculation is M [(P
+1) ² + (P + 1) -2], and M = 24, P + 1
= 20, the number of times is 10032, and this product-sum operation can be completed in a short time.

The initial setting means 131 uses this calculation.
Obtained initial value L₁(1) ~ L₁(M), L_Two(1) ~
L_Two(M), ..., L_P(1) ~ L_P(M), H₁(1)
~ H ₁(M), H_Two(1) ~ H_Two(M), ..., H
_P(1) ~ H_P(M) represents each sub-band of the synthesis circuit 145.
The LPFs inside the de-combiners 146 (1) to 146 (P)
White noise generation means 1 after setting to the storage element of HPF
21 is instructed to output a noise signal.

If this initial setting is actually performed by inputting noise signals from the white noise generating means 121, it is necessary to input 2 ^P · M noise signals as described above.
If the input rate is 50 Hz, it will take about 70 hours. Even if the input rate is increased only during the initial setting, the total sum of product operations required for the combining circuit 145 to calculate 2 ^P · M noise signals is 2M ² (2 ^P −
1), M = 24 and P + 1 = 20 as described above.
In this case, the product-sum calculation of 60205 times is required,
It takes a long time.

Thus, by initializing each storage element of the digital filter of the filter unit 125 at the initial stage of operation or when changing the characteristic coefficient, the internal state of the filter unit 125 is immediately set to the same state as the steady state. Therefore, from the filter unit 125, the characteristic coefficient setting unit 130
It is possible to promptly output a noise signal having a frequency characteristic corresponding to the characteristic coefficient (weighting coefficient in this case) set by

FIG. 39 shows the overall structure of the wander generator 150 of the present invention including the structure of the noise generator 120 described above.

In FIG. 39, the white noise generating means 12
1, filter section 125, characteristic coefficient setting means 130, initial setting means 131, multiplier 132 and amplitude setting means 13
3 is the same as that of the noise generator 120.

This wander generator 150 has a multiplier 13
The output y (k) of 2 is input to the frequency synthesizer 151.

The frequency synthesizer 151 is, for example, a DD
The clock signal CK is composed of an S (direct digital synthesizer), a PLL oscillator, or the like, has a predetermined center frequency, and has a phase (that is, frequency) modulated according to the output y (k) of the multiplier 132. .

On the other hand, the characteristic calculating means 134 'has a noise signal y (k) based on the characteristic coefficient from the characteristic coefficient setting means 130, the amplitude coefficient A of the amplitude setting means 133, and the parameters set by the operation unit (not shown) or the like. Or the wander characteristic of the clock signal CK is obtained.

For example, as an evaluation amount of a wander which is a phase fluctuation of 10 Hz or less, TIErms (τ) (Root
Mean Square Time Interval
lError), ADEV (τ) (Allan Dev
iation), MADEV (nτ ₀ ) (Modify
ed Allan Deviation), TDEV
There are (nτ ₀ ) (Time Deviation) and the like, but if these are actually measured and obtained with respect to the clock signal CK, it takes a very long time (several hours or more) as described above.

Therefore, in this wander generator 150,
The characteristic calculation means 134 'selectively obtains the characteristic of the wander by performing the following calculation.

TIErms (τ) = [8∫S _x (f) s
in ² (πfτ) df] ^1/2

ADEV (τ) = [(16 / τ ² ) ∫S _x
(F) sin ⁴ (πfτ) df] ^1/2

MADEV (nτ ₀ ) = {[16 / (n ² τ ₀ ) ² ] ∫ [sin ⁶ (πfτ ₀ ) / sin ² (πfτ ₀ )] · S _x (f) df} ^1/2 (n = 0, 1, 2, ..., N)

TDEV (nτ ₀ ) = {(16 / 3n ² ) ∫ [sin ⁶ (πfτ ₀ ) / sin ² (πfτ ₀ )] S _x (f) df} ^1/2 (n = 0,1,2) ,…, N)

Here, S _x (f) = fc [(σ _a · u · A) sin (πf / f
s) / 2πfsin (πf / fc)] ² · | H (e
^{jπf / fs} ) | ²

The symbol ∫ is assumed to be the integral from f = 0 to f = fh, the parameter fh is the maximum noise frequency,
τ is the measurement time, τ ₀ is the measurement sampling time, σ _a is the standard deviation of white noise, fs is the sampling frequency of the white noise generating means 121, and u is the frequency synthesizer 151.
The quantization step of DDS in the case of the DS, fc is the clock frequency of the D / A converter.

A is the amplitude coefficient from the amplitude setting means 133, | H (e ^{jπf / fs} ) | is the frequency characteristic calculated based on the characteristic coefficient set from the characteristic coefficient setting means 131, and S _x ( f) is a power spectrum of the time error calculated based on the characteristic coefficient set by the characteristic coefficient setting means 131.

The characteristics obtained by such calculation are
The characteristic is displayed on the display 136 by the characteristic display means 135 as a numerical value or a graph. However, since the calculation is performed based on the characteristic coefficient, the amplitude coefficient and the parameter without measuring the actual clock signal, the calculation is short. It can be obtained in time, and the characteristics of the noise signal and the wander characteristics of the clock signal frequency-modulated by the noise signal can be confirmed in advance when the signal is output.

In the above embodiments, the case where the digital filter included in the filter unit 125 is the FIR type has been described, but this does not limit the present invention, and the input data is shifted to a plurality of internal storage elements. Any digital filter having a structure for storing and performing an operation may be used, and the same can be applied to the case of IIR type, for example.

The white noise generating means 121 of the wander generator 150 is a pseudo random signal generator 122.
According to a predetermined algorithm determined by the internal structure of (1) to 122 (N), the white noise signal n (k) composed of a plurality of bits is sequentially output at a constant speed determined by the clock signal CKn. Similar to the noise generating means 25 of the wander generators 21 and 21 ′, it corresponds to the random number signal generating means of claims 1 and 2 of the present invention, and the filter section 125 responds to the signal sequence output from the white noise generating means 121. Because it performs filtering processing,
Convolution operation means 28 of the wander generators 21 and 21 '
Data sorting means 51, weighting means 54, synthesizing means 5
Similar to 6, it corresponds to the filter unit of claims 1, 3, 4, and 5 of the present invention.

Further, since the frequency synthesizer 151 outputs the clock signal CK whose frequency is modulated by the output of the filter unit 125, it corresponds to the clock generating means and the modulating means of claim 1 of the present invention, and has a characteristic coefficient. The setting unit 130 gives the filter unit 125 a coefficient for determining the frequency characteristic of the signal sequence output from the filter unit 125 so that the wander characteristic of the clock signal output from the frequency synthesizer 151 becomes a desired characteristic. Therefore, it corresponds to the setting means of claims 1, 4, and 5 of the present invention.

Therefore, also in the case of the wander generator 150, similarly to the wander generators 21 and 21 ', a random number signal sequentially generating a random number signal composed of a plurality of bits at a constant speed in accordance with a predetermined algorithm. Generating means, a filter section for receiving a signal sequence of random numbers output from the random number signal generating means and performing a filtering process, a clock generating means for generating a clock signal, and a filter section for the frequency of the clock signal generated by the clock generating means. The amplitude value of the spectrum of the signal train output from the filter unit is set so that the wander characteristic of the modulation signal that is modulated by the signal output from the And a setting means for giving a control signal to the filter section.

Therefore, it is possible to easily generate a clock signal having a wander of a desired characteristic.

Further, the initial setting means 131 of the wander generator 150 is a steady state in which a clock signal having a wander of a desired characteristic is output to the memory element included in the filter section 125 at least at the initial stage of the operation of the device. Since a value equivalent to the stored value stored in each storage element is initially set in a path different from the signal input path in the steady state, it corresponds to the initial setting means in claim 6 of the present invention.

As described above, since the initial setting means 131 sets the initial value in the memory element of the filter section 125, it is possible to promptly output the clock signal having a desired wander characteristic.

The characteristic calculating means 134 'of the wander generator 150 determines the characteristic of the wander of the frequency-modulated clock signal based on the information including the signal set by the characteristic coefficient setting means 130 in the filter section 125. Therefore, the characteristic display means 135 corresponds to the characteristic calculating means of claim 7 of the present invention.
Since the wander characteristic obtained by 4'is displayed, it corresponds to the characteristic display means of claim 7 of the present invention.

As described above, the wander characteristic of the frequency-modulated clock signal is calculated from the characteristic coefficient setting means 130 based on the information including the signal set in the filter section 125, and the calculated wander characteristic is displayed. Therefore, it is convenient that the wander characteristic of the clock signal actually output can be grasped in advance without measuring it.

The wander generator 150 is replaced by the wander generator 21 of the digital line test apparatus 20,
It can also be used instead of 21 '. In this case,
The wander characteristic calculated by the characteristic calculating means 134 'is output to the display control means 46 and displayed on the display device 47.

[0270]

As described above, according to the first aspect of the present invention.
The wander generator includes a random number signal generating means (25, 121) for sequentially generating a random number signal composed of a plurality of bits at a constant speed according to a predetermined algorithm, and a random number signal generated by the random number signal generating means. A filter unit (28, 125) for receiving a column and performing a filtering process;
Clock generating means (30, 3) for generating a clock signal
1, 151), a modulating means (30, 151) for modulating the frequency of the clock signal generated by the clock generating means by the signal output from the filter section, and a clock signal whose frequency is modulated by the modulating means. Setting means (23, 26, for giving a signal for setting each amplitude value of the spectrum of the signal sequence output from the filter section to the filter section so that the wander characteristic becomes a desired characteristic
130) and.

Therefore, it is possible to easily generate a clock signal having a wander of a desired characteristic.

The wander generator according to claim 2 of the present invention is the wander generator according to claim 1, wherein the random number signal generating means has a plurality of pseudo random signal generators. The pseudo random signals generated by the signal generators are combined to sequentially generate the random number signal composed of the plurality of bits at a constant speed.

Therefore, the random number signal can be made extremely close to the ideal white noise, and the clock signal having the desired wander characteristic can be generated more accurately.

The wander generator according to claim 3 of the present invention is the wander generator according to claim 1, wherein the filter section stores a plurality of storage elements for sequentially shifting and storing the input signal sequence, and the plurality of storage elements. And a calculation means for performing a sum-of-products calculation of the stored value stored in the storage element and the plurality of coefficients.

Therefore, the filtering process can be accurately performed by the calculation, and the clock signal having a desired wander characteristic can be generated more accurately.

The wander generator of claim 4 of the present invention is the wander generator of claim 3, wherein the filter section stores the random number signal sequence output from the random number signal generating means in the plurality of storages. It is configured to store in an element, perform a product-sum operation by the operation unit, and perform a filtering process on the signal sequence of the random number, and the setting unit includes each spectrum of the signal sequence output from the filter unit. It is characterized in that the plurality of coefficients are set in the calculating means as a signal for setting an amplitude value.

Therefore, it is possible to generate a clock signal having a desired wander characteristic with a simple structure.

The wander generator according to claim 5 of the present invention is the wander generator according to claim 3, wherein the filter section has a signal sequence of the random numbers generated by the random number signal generation means at different rates. Data distribution means (51, 141) for distributing to a plurality of paths, and weighting means for weighting a signal sequence for each path distributed by the data distribution means with a coefficient preset for each path ( 54, 143) and the signal sequence of each path weighted by the weighting means are combined by a plurality of sub-band combiners each including the plurality of storage elements and the calculating means, and the combined result is output as a filtering processing result. And a synthesizing means (56, 145) for controlling the spectrum of the signal train output from the filter section. Said plurality of weighting coefficients as a signal for setting each amplitude value and setting said weighting means of the filter unit.

Therefore, the wander characteristic of the output clock signal can be set with a higher degree of freedom.

The wander generator according to claim 6 of the present invention is the wander generator according to claim 3, 4 or 5, wherein at least at the initial stage of operation of the device.
For each of the storage elements included in the filter unit, a value equivalent to the stored value stored in each of the storage elements in the steady state when the clock signal having the wander of the desired characteristic is output is set to the value in the steady state. An initial setting means (131) for performing an initial setting on a path different from the signal input path is provided.

Therefore, a clock signal having a desired wander characteristic can be immediately output at the beginning of the operation of the apparatus and the measurement can be started quickly.

[0282] According to a wander generator of a seventh aspect of the present invention, in the wander generator of the first aspect, the wander characteristic of the clock signal whose frequency is modulated by the modulating means is set from the setting means to the filter. Characteristic calculating means (1) for calculating based on information including signals set in the section
34 ') and a characteristic display means (135) for displaying the characteristic obtained by the characteristic calculation means.

Therefore, it is convenient that the wander characteristic of the clock signal actually output can be confirmed in advance.

Further, the digital line device according to claim 8 of the present invention provides a wander generator (21, 40) for generating a test signal having a wander, and a signal from the wander generator via the digital line to be tested. In a digital line test apparatus provided with a wander measuring section (41, 43) for evaluation, the wander generating section is the claim 1 or claim 2 or claim 3 or claim 4 or claim 5 or claim 6. Or a wander generator according to claim 7,
It is configured to generate a test signal synchronized with the clock signal output from the wander generator.

Therefore, the test signal synchronized with the clock signal having the desired wander characteristic can be output to the digital line to be tested, and the wander characteristic of the signal passing through the digital line can be measured.

A wander generator according to a ninth aspect of the present invention is a wander generator for generating a clock signal having a wander that satisfies a desired time deviation characteristic, and determines a center frequency of the clock signal. Center frequency information setting means (22) for setting data
A characteristic information setting means (23) for setting characteristic information of the desired time deviation characteristic, and based on the characteristic information set by the characteristic information setting means,
A fluctuation signal train generation unit (24) for generating a fluctuation signal train having a power spectrum density distribution characteristic of frequency fluctuation corresponding to the desired time deviation characteristic, data set by the center frequency information setting unit, and the fluctuation An adder (29) for adding the fluctuation signal sequence output from the signal sequence generator, a direct digital synthesizer (30) for outputting a signal having a frequency corresponding to the output of the adder, and an output of the direct digital synthesizer. And a clock signal output circuit (31) for shaping a signal to output a clock signal.

Therefore, it is possible to easily generate a clock signal having a wander with a desired time deviation characteristic.

The wander generator of claim 10 of the present invention is the wander generator of claim 9, wherein the fluctuation signal sequence generator generates a white noise signal based on a pseudo-random signal. (25) and based on the characteristic information set by the characteristic information setting means,
Impulse response calculation means (26) for calculating an impulse response of a transfer function for approximating the power spectrum density distribution of the white noise signal output from the noise generation means to the power spectrum density distribution characteristic of the frequency fluctuation; A convolution operation means for performing a convolution operation of the operation result of the impulse response operation means and the miscellaneous white noise signal output from the noise generation means to generate a fluctuation signal sequence having the power spectrum density distribution characteristic of the frequency fluctuation ( 28) and.

Since the fluctuation signal sequence is digitally generated in this manner, it is possible to accurately generate a clock signal having a wander that satisfies a desired time deviation characteristic.

[0290] Further, the wander generator of claim 11 of the present invention is the wander generator of claim 10, wherein the impulse response calculation means has an error between the power spectrum density distribution characteristic of the frequency fluctuation and the transfer function. It is characterized in that the impulse response is corrected by a correction function corresponding to the minute.

Therefore, it is possible to more accurately generate a clock signal having a wander that satisfies a desired time deviation characteristic.

The wander generator according to claim 12 of the present invention is the wander generator according to claim 10, wherein the convolution operation means is a product-sum operation in which the absolute value of the operation result of the impulse response is smaller. It is characterized by carrying out with priority.

Therefore, it is possible to reduce the error in the floating point calculation.

[0294] According to a wander generator of claim 13 of the present invention, in the wander generator of claim 10, the impulse response calculation means is configured to output the impulse signal every time a white noise signal is output from the noise generation means. The response calculation is performed every time, and the convolution calculation means performs the convolution calculation using the calculation result calculated each time by the impulse response calculation means.

Therefore, the memory can be saved and the hardware configuration of the device can be simplified.

The wander generator of claim 14 of the present invention is the wander generator of claim 9, wherein the fluctuation signal sequence generator generates a white noise signal based on a pseudo random signal. (25), and the noise signal output from the noise generating means is distributed to signal paths corresponding to a plurality of bands for dividing the frequency range of the power spectrum density distribution characteristic of the frequency fluctuation, corresponding to the respective bands. Data distribution means (5
1) and, according to the noise signal for each rate distributed by the data distribution means, the spectrum size for each band for dividing the frequency range of the power spectrum density distribution characteristic of the frequency fluctuation into a plurality of bands. Weighting means (54) for performing weighting, and a synthesizing means (56) for synthesizing a noise signal of each rate weighted by the weighting means to generate a fluctuation signal sequence having a power spectrum density distribution characteristic of the frequency fluctuation. It has and.

Therefore, it is possible to generate a fluctuation signal having an arbitrary power spectrum density distribution characteristic, and it is possible to easily generate a clock signal having a complicated TDEV mask characteristic for which it is difficult to calculate an impulse response.

The wander generator according to claim 15 of the present invention is the wander generator according to claim 10 or claim 14, wherein the noise generating means generates M-sequence pseudo-random codes at different initial phases. Multiple (m)
It has a set of pseudo-random signal generating means, and is configured to collectively output the outputs of the predetermined stages of the pseudo-random signal generating means as m-bit parallel white noise signals.

Therefore, the white noise signal can be made extremely close to the ideal white noise, and the clock signal having a wander satisfying the desired time deviation characteristic can be generated with higher accuracy.

According to a sixteenth aspect of the present invention, there is provided a wander generator (21) for generating a clock signal having a wander that satisfies a specified time deviation characteristic, and an output from the wander generator. A transmitting unit (40) for transmitting a digital signal synchronized with the tested clock signal to a digital line to be tested, and a digital signal returned from the digital circuit to be tested and receiving the clock signal of the received digital signal. A receiving section (41) for reproducing the error, an error measuring section (42) for measuring an error of the digital signal received by the receiving section, and a time deviation measurement for measuring the time deviation characteristic of the clock signal reproduced by the receiving section. Section (43), display device (47), and measurement results of the error measuring section. And a display control means (46) for displaying on the display device so that the time deviation characteristic measured by the time deviation measuring unit can be compared with the specified time deviation characteristic. .

Therefore, the wander of the digital line to be tested can be evaluated easily and efficiently, and the change of the wander due to the digital line can be easily compared on the display screen.

According to a seventeenth aspect of the present invention, there is provided a digital line test apparatus according to the sixteenth aspect, wherein the wander generator is the ninth, tenth, tenth, or the eleventh aspect. It is characterized in that it is the wander generator according to claim 12 or claim 13 or claim 14 or claim 15.

A digital signal synchronized with a clock signal having a wander satisfying a desired time deviation characteristic can be sent to the line under test, the line can be evaluated correctly, and the device can be downsized. .

According to the wander generator of claim 18 of the present invention, the white noise generating means (121) for generating a digital white noise signal and the digital signal are sequentially shifted to a plurality of internal storage elements. A noise signal having a frequency characteristic corresponding to a preset characteristic coefficient, which has a digital filter for storing and performing a product-sum operation for the stored contents of the plurality of storage elements. Filter unit (125) for converting to and outputting
A characteristic coefficient setting means (130) for setting an arbitrary characteristic coefficient for the filter section, and a multiplier (132) for multiplying a noise signal output from the filter section by a preset amplitude coefficient, Amplitude setting means (133) for setting an arbitrary amplitude coefficient in the multiplier, a frequency synthesizer (51) for outputting a clock signal phase-modulated by the noise signal output from the multiplier, and the filter section A noise signal sequence equivalent to the stored contents of each storage element of the digital filter in the state where the noise signal having the frequency characteristic corresponding to the characteristic coefficient is output is initially stored in each storage element of the digital filter at least at the initial operation of the device. An initial setting means (131) for setting is provided.

Therefore, at the initial stage of operation, the internal state of the filter section is immediately set to the same state as the steady state, so that a noise signal having a frequency characteristic corresponding to the characteristic coefficient set by the characteristic coefficient setting means is generated. The phase-modulated clock signal can be promptly output.

A wander generator according to a nineteenth aspect of the present invention is a white noise generating means (121) for generating a digital white noise signal, and sequentially shifting the digital signal to a plurality of internal storage elements. A noise signal having a frequency characteristic corresponding to a preset characteristic coefficient, which has a digital filter for storing and performing a product-sum operation for the stored contents of the plurality of storage elements. Filter unit (125) for converting to and outputting
A characteristic coefficient setting means (130) for setting an arbitrary characteristic coefficient for the filter section, and a multiplier (132) for multiplying a noise signal output from the filter section by a preset amplitude coefficient, Amplitude setting means (133) for setting an arbitrary amplitude coefficient in the multiplier, a frequency synthesizer (151) for outputting a clock signal phase-modulated by the noise signal output from the multiplier, and the characteristic coefficient setting means. Characteristic calculating means (1) for obtaining the characteristics of the noise signal output from the multiplier or the clock signal output from the frequency synthesizer, based on the characteristic coefficient set by (1) and the amplitude coefficient set by the amplitude setting means.
34, 134 ') and a characteristic display means (135) for displaying the characteristic obtained by the characteristic calculation means.

Therefore, it is convenient to know the characteristics in advance without actually measuring the noise signal and the clock signal.

[Brief description of drawings]

FIG. 1 is a block diagram showing an overall configuration of an embodiment of the present invention.

FIG. 2 is a block diagram showing a configuration of a main part of the embodiment.

FIG. 3 is a power spectrum density distribution characteristic for explaining the principle of the present invention.

FIG. 4 is a relative power spectral density distribution characteristic for explaining the principle of the present invention.

FIG. 5 is a block diagram showing a configuration of a main part of the embodiment.

FIG. 6 is a circuit diagram of a main part of the embodiment.

FIG. 7 is a circuit diagram of a main part of the embodiment.

FIG. 8 is a diagram showing an impulse response.

FIG. 9 is a circuit diagram of a main part of the embodiment.

FIG. 10 is a diagram for explaining the operation of the main part of the embodiment.

FIG. 11 is a diagram showing a measurement result of the embodiment.

FIG. 12 is a diagram showing a difference between a power spectral density distribution and a transfer function.

FIG. 13 is a diagram showing a difference between a specified TDEV characteristic and an actual TDEV characteristic.

FIG. 14 is a diagram showing a correction function.

FIG. 15 is a diagram showing a difference between a power spectral density distribution and a corrected transfer function.

FIG. 16 is a diagram showing a difference between a prescribed TDEV characteristic and a corrected TDEV characteristic.

FIG. 17 is a circuit diagram of a forward / reverse pseudo random generation circuit.

FIG. 18 is a state transition diagram of a forward / reverse pseudo random generation circuit.

FIG. 19 is a diagram showing changes in the output of a predetermined bit of a pseudo-random generator circuit that can be reversed.

FIG. 20 is a state correspondence diagram of a normal order and a reverse order of a pseudo random generation circuit that can be reversed.

FIG. 21 is a circuit diagram of a quasi-random generator circuit that can be reversed.

FIG. 22 is a diagram showing a modification of the wander generator.

FIG. 23 is a diagram showing a modified example of the fluctuation signal sequence generator.

FIG. 24 is a block diagram showing a configuration of a main part of FIG.

FIG. 25 is a timing chart for explaining the operation of the main parts of FIG. 23.

FIG. 26 is a diagram for explaining the operation of the main part of FIG. 23.

FIG. 27 is a block diagram showing a configuration of a main part of FIG. 23.

FIG. 28 is a view for explaining the operation of the main parts of FIG. 23.

FIG. 29 is a diagram showing a difference between a specified TDEV characteristic and an actual TDEV characteristic.

FIG. 30 is a block diagram showing another configuration of the main part of FIG. 23.

FIG. 31 is a block diagram showing the configuration of a noise generator included in a wander generator according to another embodiment of the present invention.

32 is a block diagram showing the configuration of the main part of FIG. 31.

FIG. 33 is a block diagram showing the configuration of the main part of FIG. 31.

FIG. 34 is a block diagram for explaining the operation of FIG. 31.

FIG. 35 is a block diagram showing a modified example of the main part of FIG. 31.

FIG. 36 is a timing chart for explaining the operation of the modified example of FIG. 35.

FIG. 37 is a view for explaining the operation of the modified example of FIG. 35.

FIG. 38 is a view for explaining the operation of the modified example of FIG. 35.

FIG. 39 is a block diagram showing the overall configuration of a wander generator according to an embodiment of the present invention.

FIG. 40 is a block diagram showing the configuration of a conventional wander generator.

FIG. 41 is a diagram showing an example of specified TDEV characteristics.

[Explanation of symbols]

1 Digital Circuit 20 Digital Circuit Testing Device 21 Wander Generator 22 Center Frequency Setting Means 23 Characteristic Information Setting Means 24, 24 'Fluctuation Signal Sequence Generating Unit 25 Noise Generating Means 26 Impulse Response Computing Means 27 Memory 28 Convolution Computing Means 29 Adder 30 DDS 30a Adder 30b Latch circuit 30c Waveform memory 30d D / A converter 31 Clock signal output circuit 31a Bandpass filter 31b Comparator 40 Transmitter 41 Receiver 42 Error measurer 43 TDEV measurer 44 TIE detector 45 TDEV calculator 46 display control means 47 display device 50 shift register 51 data distribution means 52 _{1 to} 52 ₁₃ 1/2 divider 53 _{1 to} 53 ₁₃ latch circuit 54 weighting means 55 _{1 to} 55 ₁₃ multiplier 56 combining means 57 _{1 to} 57 ₁ subband synthesizer 58 _{1-58 1} subband demultiplexer 121 white noise generating means 122 (1) to 122 (N) pseudo random signal generator 123 control circuit 125 filter 126 a digital filter 127 (1) ~ 127 (M) storage element 128 ( 1) to 128 (M + 1) Multiplier 129 Adder 130 Characteristic coefficient setting means 131 Initial setting means 132 Multiplier 133 Amplitude setting means 134, 134 'Characteristic calculating means 135 Characteristic displaying means 136 Display 141 Demultiplexing circuit 142 (1) -142 (P) 1/2 decimating circuit 143 Weighting circuit 144 (1) -144 (P + 1) Multiplier 145 Combining circuit 146 (1) -146 (P) Subband combiner 150 Wander generator 151 Frequency synthesizer

Continuation of the front page (56) References JP-A 2-111140 (JP, A) JP-A 8-220163 (JP, A) JP-A 9-64919 (JP, A) JP-A 62-233953 (JP , A) (58) Fields surveyed (Int.Cl. ⁷ , DB name) H04L 29/14 H04L 25/02 H03K 3/84 H04L 7/00 G01R 25/00 G01R 29/26 G01R 31/00

Claims (19)

(57) [Claims] 1. A random number signal generating means (25, 121) for sequentially generating a random number signal composed of a plurality of bits at a constant speed according to a predetermined algorithm, and a random number signal sequence generated by the random number signal generating means. Filter unit (28, 125) that receives and performs filtering processing
And clock generating means (30, 3) for generating a clock signal.
1, 151), a modulation means (30, 151) for modulating the frequency of the clock signal generated by the clock generation means by the signal output from the filter section, and a clock signal whose frequency is modulated by the modulation means. Setting means (23, 23) for giving a signal for setting each amplitude value of the spectrum of the signal sequence output from the filter section to the filter section so that the wander characteristic becomes a desired characteristic.
26, 130) and a wander generator. 2. The random number signal generating means has a plurality of pseudo random signal generators, and the pseudo random signals generated by the plurality of pseudo random signal generators are combined to form the plurality of bits. 2. The wander generator according to claim 1, wherein the wander generator is configured to sequentially generate a random number signal at a constant speed. 3. The filter unit stores a plurality of storage elements for sequentially storing an input signal sequence, and an arithmetic means for performing a sum-of-products operation of a storage value stored in the plurality of storage elements and a plurality of coefficients. The wander generator according to claim 1, further comprising: 4. The filtering unit stores the random number signal sequence output from the random number signal generating unit in the plurality of storage elements, performs the product-sum operation by the arithmetic unit, and filters the random number signal sequence. The setting means is configured to perform processing, and the setting means sets the plurality of coefficients in the calculation means as a signal for setting each amplitude value of the spectrum of the signal sequence output from the filter unit. The wander generator according to claim 3. 5. The data distribution means (51, 141) for allocating a signal sequence of random numbers generated by the random number signal generation means to a plurality of paths having different rates, and the data distribution means. A plurality of weighting means (54, 143) for weighting the distributed signal sequence of each route by a preset coefficient for each route, and the signal sequence of each route weighted by the weighting device Synthesizing means (56, 1) for synthesizing by a plurality of sub-band synthesizers each of which is composed of a storage element and an arithmetic means, and outputting the synthesis result as a filtering processing result.
45) and the setting means sets the plurality of weighting factors in the weighting means of the filter section as signals for setting respective amplitude values of the spectrum of the signal sequence output from the filter section. The wander generator according to claim 3, wherein 6. At least in the initial stage of operation of the device, a clock signal having a wander having the desired characteristic is output to each of the storage elements included in the filter section and is stored in each of the storage elements at a steady time. A value equivalent to the stored value
The wander generator according to claim 3, 4 or 5, further comprising initial setting means (131) for performing an initial setting on a path different from the signal input path in the steady state. 7. A characteristic calculating means (134 ') for calculating a wander characteristic of a clock signal whose frequency is modulated by the modulating means, based on information including a signal set in the filter section by the setting means. The wander generator according to claim 1, further comprising a characteristic display unit (135) for displaying the characteristic obtained by the characteristic calculation unit. 8. A wander generating section (21, 40) for generating a test signal having a wander and a wander measuring section (41, 43) for evaluating a signal from the wander generating section through a digital line to be tested. In a digital line test device provided with the wander generator, the wander generator includes the wander generator according to claim 1, claim 2, claim 3, claim 4, claim 5, claim 6, or claim 7. A digital line test apparatus, which is configured to generate a test signal in synchronization with a clock signal output from the wander generator. 9. A wander generator for generating a clock signal having a wander that satisfies a desired time deviation characteristic, and a center frequency information setting means for setting data for determining a center frequency of the clock signal. 22), characteristic information setting means (23) for setting characteristic information of the desired time deviation characteristic, and corresponding to the desired time deviation characteristic based on the characteristic information set by the characteristic information setting means. A fluctuation signal string generation unit (24) that generates a fluctuation signal string having a power spectrum density distribution characteristic of frequency fluctuations, data set by the center frequency information setting unit, and the fluctuation signal string generation unit. An adder (29) for adding the fluctuation signal sequence, and a frequency corresponding to the output of the adder A direct digital synthesizer for outputting a signal (30), wander generator, characterized in that said and a clock signal output circuit for outputting signals to a waveform shaping outputs a clock signal of the direct digital synthesizer (31). 10. The fluctuation signal sequence generating section comprises: noise generating means (25) for generating a white noise signal based on a pseudo-random signal; and the noise based on the characteristic information set by the characteristic information setting means. Impulse response calculation means (2) for calculating the impulse response of the transfer function for approximating the power spectrum density distribution of the white noise signal output from the generation means to the power spectrum density distribution characteristic of the frequency fluctuation.
6), and the convolution operation of the operation result of the impulse response operation means and the miscellaneous white noise signal output from the noise generation means to generate a fluctuation signal sequence having a power spectrum density distribution characteristic of the frequency fluctuation. The wander generator according to claim 9, further comprising convolution operation means (28). 11. The impulse response calculation means corrects the impulse response by a correction function corresponding to an error between the power spectrum density distribution characteristic of the frequency fluctuation and the transfer function. Wander generator. 12. The wander generator according to claim 10, wherein the convolution operation means preferentially performs the sum-of-products operation for which the absolute value of the operation result of the impulse response is smaller. 13. The impulse response calculation means is configured to calculate the impulse response every time a white noise signal is output from the noise generation means, and the convolution calculation means calculates the impulse response calculation. 11. The wander generator according to claim 10, wherein the convolution operation is performed using the operation result calculated each time by the means. 14. The fluctuation signal sequence generating section generates a white noise signal based on a pseudo-random signal, a noise generating means (25), and outputs the noise signal output from the noise generating means to the power of the frequency fluctuation. The data distribution means (51) distributes to a signal path corresponding to each of a plurality of bands that divide the frequency range of the spectral density distribution characteristic, and outputs at a rate corresponding to each band, and the data distribution means distributes the data paths. Weighting means (54) for weighting the noise signal for each rate according to the magnitude of the spectrum for each band for dividing the frequency range of the power spectrum density distribution characteristic of the frequency fluctuation into a plurality of; A noise signal of each rate weighted by means is combined to obtain a fluctuation having a power spectral density distribution characteristic of the frequency fluctuation. 10. The wander generator according to claim 9, further comprising a synthesizing means (56) for generating a signal sequence. 15. The noise generating means has a plurality of (m) sets of pseudo random signal generating means for generating M-sequence pseudo random codes at different initial phases, and a predetermined stage of each of the pseudo random signal generating means. 15. The wander generator according to claim 10, wherein the outputs of the above are collectively output as m-bit parallel white noise signals. 16. A wander generator (21) for generating a clock signal having a wander that satisfies a specified time deviation characteristic, and a digital signal synchronized with the clock signal output from the wander generator as a test object. A transmitting section (40) for transmitting to a digital line, a receiving section (41) for receiving the digital signal returned from the digital line to be tested and reproducing a clock signal of the received digital signal, and the receiving section An error measuring section (42) for measuring an error of the received digital signal, a time deviation measuring section (43) for measuring a time deviation characteristic of the clock signal reproduced by the receiving section, a display device (47), While displaying the measurement result of the error measuring unit on the display device, Digital line testing apparatus and a display control means for displaying on said display device to the measured time Deviation characteristics can be compared with the time Deviation characteristics of the provision (46) in Bieshon measuring unit. 17. The wander generator is the wander generator according to claim 9, claim 10, claim 11, claim 12, claim 13 or claim 14, or claim 15. The digital line test device according to claim 16. 18. White noise generating means (121) for generating a digital white noise signal, and a digital signal stored in a plurality of internal storage elements while being sequentially shifted, and stored contents of the plurality of storage elements. A filter section (125) for converting the noise signal output from the white noise generating means into a noise signal having a frequency characteristic corresponding to a preset characteristic coefficient and outputting the noise signal. A characteristic coefficient setting means (130) for setting an arbitrary characteristic coefficient for the filter section, a multiplier (132) for multiplying a noise signal output from the filter section by a preset amplitude coefficient, Amplitude setting means (133) for setting an arbitrary amplitude coefficient in the multiplier, and a clock signal phase-modulated by the noise signal output from the multiplier. Frequency synthesizer (5
1) and a noise signal sequence equivalent to the storage content of each storage element of the digital filter in a state where a noise signal having a frequency characteristic corresponding to the characteristic coefficient is output from the filter unit at least at the initial operation of the device. Initial setting means (13) for initial setting in each storage element of the digital filter.
1) A wander generator equipped with and. 19. A white noise generating means (121) for generating a digital white noise signal, and a digital signal stored in a plurality of internal storage elements while being sequentially shifted, and stored contents of the plurality of storage elements. A filter section (125) for converting the noise signal output from the white noise generating means into a noise signal having a frequency characteristic corresponding to a preset characteristic coefficient and outputting the noise signal. A characteristic coefficient setting means (130) for setting an arbitrary characteristic coefficient for the filter section, a multiplier (132) for multiplying a noise signal output from the filter section by a preset amplitude coefficient, Amplitude setting means (133) for setting an arbitrary amplitude coefficient in the multiplier, and a clock signal phase-modulated by the noise signal output from the multiplier. Frequency synthesizer (15
1) and the characteristics of the noise signal output from the multiplier or the clock signal output from the frequency synthesizer based on the characteristic coefficient set by the characteristic coefficient setting means and the amplitude coefficient set by the amplitude setting means. A wander generating device comprising: a characteristic calculation means (134, 134 ') for obtaining the characteristic and a characteristic display means (135) for displaying the characteristic obtained by the characteristic calculation means.