JP3470546B2 - Infrared detector - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an infrared detector that detects infrared energy radiated from a human body to detect the presence or movement of the human body, and particularly to prevent malfunction due to noise or the like. , And to an infrared detector that is downsized.

[0002]

2. Description of the Related Art FIG. 9 is a circuit block diagram schematically showing a configuration of a conventional infrared detector.

A conventional infrared detector 101 includes a commercially available pyroelectric sensor 10, a voltage amplification block 30 formed on a semiconductor substrate different from the pyroelectric sensor 10, and a comparison block 40.
And a detection signal output block 50. Note that 23
Is an input pad and 54 is an output pad.

In the pyroelectric sensor 10, when the heat of a human body or the like is detected, a pyroelectric element 11 which outputs a current corresponding to the heat.
And a current-voltage conversion block 20 that converts an output current output when the pyroelectric element 11 detects heat into a voltage. The pyroelectric element 11 and the current-voltage conversion block 20 are provided.
Have a structure formed in the same package 14.

The current-voltage conversion block 20 has a resistance 21 for current-voltage conversion for converting the output current output from the pyroelectric element 11 into a voltage, and a J for impedance conversion.
A field effect transistor 22 such as a FET,
The output current of several fA output from the pyroelectric element 11 by the energy of the weak infrared rays emitted from the human body is
A minute voltage of μV is output from the drain 22D of the field effect transistor 22. Therefore, as the resistor 21, a very high resistance value of 100 GΩ or more is required, and a resistor having a very high impedance of the pyroelectric element 11 itself is selected.

The drain 22D of the field effect transistor 22 is connected to the input 32 of the voltage amplification block 30 formed on the substrate 31 separate from the current / voltage change block 20.

The voltage amplification block 30 includes amplifiers 33 and 3
3, capacitive elements 34, 34, 34, resistors 35, 35, 3
5 and the RC coupling amplifier circuit including the power supply 36, and is configured to amplify the minute voltage signal output from the drain 22D of the field effect transistor 22 only in the frequency band of about 0.1 to 10 Hz. Then, only the frequency component of the output signal from the sensor 10 accompanying the movement of a person is amplified, and the amplified voltage signal is output from the output end 37.

The comparison block 40 includes a window comparator section 41 and a logic gate circuit 42, and when the voltage signal amplified by the voltage amplification block 30 is input, the input voltage signal is compared with a threshold value. It is like this. In this example, the window comparator 41 has
Two thresholds, which are determined by the resistor 43, the resistor 43, and the resistor 44, are set, and the logic gate circuit 42 has N threshold values.
An AND circuit is used to output a signal (H level or L level) from the output portion of the logic gate circuit 42 to the detection signal output block 50 when the amplitude of the voltage signal exceeds a certain level.

The detection signal output block 50 is usually a CMOS inverter circuit constituted by connecting an N-channel field effect transistor 52 and a P-channel field effect transistor 53 in series with a power supply 51 for the purpose of reducing power consumption. Is used, the output part of the logic gate circuit 42 is connected to the gate 50G of the CMOS inverter circuit, and C
An output pad 54 is connected to the drain 50D of the MOS inverter circuit, and the output pad 54 is connected to an external load circuit (not shown) such as an alarm issuing means whose end is grounded.

The CMOS inverter circuit includes a P-channel field effect transistor 53 having a source 53S connected to the power supply voltage 51 and an N-channel field effect transistor 5 having a source 53S connected to the ground.
2 and the gates 50G are commonly connected, and their drains 50D are commonly connected to the output pad 54.
Therefore, when the human body is detected and a determination signal is input to the gate 50G from the output section of the logic gate circuit 42, an inverted voltage is output to the output pad 54.

[0011]

By the way, recently, such an infrared detector is more compact and has a small size.
There is a demand for an infrared detector with improved / N and less malfunction.

In order to meet the demand for miniaturization, all the components from the current / voltage conversion block 20 of the infrared detector 101 to the detection signal output block 50 in the subsequent stage should be formed on the same semiconductor substrate to form a one-chip IC. Can be considered.

FIG. 10 shows a CMO in the detection signal output block.
FIG. 4 is a circuit block diagram in which the conventional infrared detector 101 using the S inverter circuit is directly integrated into a one-chip IC,
In addition, FIG. 11 is an explanatory diagram schematically illustrating a problem that occurs in such a one-chip integrated semiconductor circuit substrate.

Here, a case where a P-type semiconductor substrate is used as the semiconductor substrate will be described as an example. 10 and 11, members corresponding to the members shown in FIG. 9 are designated by the corresponding reference numerals, and the description thereof will be omitted. Figure 11
Reference numeral 60 denotes a signal processing unit including the current / voltage conversion block 20, the voltage amplification block 30, and the comparison block 40. Reference numeral 62 is a P diffusion portion that defines the potential of the P-type semiconductor substrate, 63 is an input protection portion of the signal processing portion 60, and 64 is an N diffusion portion that defines the potential of the N well. Further, Rx is a parasitic resistance of the semiconductor substrate 70, and Cn is an N-channel field effect transistor 52.
C i indicates the parasitic capacitance formed between the drain 52D and the substrate 70, and Ci indicates the parasitic capacitance formed on the input protection unit 63 of the signal processing unit 60 and the substrate 70, respectively.

In the infrared detector 101A in which the conventional circuit is directly integrated into a one-chip IC, in the one-chip IC,
A block having a very high impedance of 100 GΩ or more and a high gain and a block whose voltage varies digitally exist on the same semiconductor substrate 70.
However, when the detection signal output block 50 is formed of a CMOS inverter circuit, the voltage generated at the drain 52D of the N-channel field effect transistor 52 forming the inverter circuit is directly injected into the substrate 70. Therefore, there is a problem that a part of the signal is transmitted through the substrate 70 and fed back to the input protection unit 63.

More specifically, the discrimination signal (H (1) or L (0)) output from the logic gate circuit 42 for detecting a human body is detected by the gate 5 of the CMOS inverter circuit.
When input to 4G, one of the N-channel field effect transistor 52 and the P-channel field effect transistor 53 is turned on and the other is turned off, so that the drain 50D of the detection signal output block 50 changes to be approximately equal to the power supply voltage VDD. The width voltage is output.

However, in such a CMOS inverter circuit, a parasitic capacitance Cn exists between the drain 52D of the N-channel field effect transistor 52 and the substrate 70 when the N-channel field effect transistor 52 is formed, and in particular, Since the size of the transistor forming the output section is large, the parasitic capacitance Cn is also very large. Therefore, when the output voltage of the output pad 54 is inverted, the drain 50D has a voltage with a change width substantially equal to the power supply voltage VDD. It changes to VDD, and according to the following formula,

[0018]

[Equation 1] Are injected into the substrate 70.

Although the substrate 70 is grounded at each point and fixed to the GND potential, it has a finite resistance value, so that the voltage at the drain 50D changes abruptly (digitally changes). ) Is transmitted to the substrate 70, and as a result, a sharp change in voltage is generated, the input protection unit 63
To the comparison block 4 and the feedback signal is amplified by the voltage amplification block 30.
There is a problem that a logic signal is input from the logic gate circuit 42 of 0 to cause a malfunction.

In the worst case, the output pad 54
When an inverted voltage is output from the drain 50D to the output pad 54, it is always amplified and fed back to the output pad 54 via the input protection unit 63, and as a result, the infrared detector 10
There was a fear that 1A would always be in an oscillating state.

The present invention has been made in order to solve the above problems, and all the circuits from the current / voltage conversion block to the detection signal output block in the subsequent stage are formed on the same semiconductor substrate, and one circuit is formed. An object of the present invention is to provide an infrared detector having a circuit configuration that does not easily malfunction even when it is made into a chip and downsized.

[0022]

An infrared detector according to claim 1 is an infrared detector constructed by connecting and adding a semiconductor circuit to a pyroelectric element, wherein the semiconductor circuit comprises an input pad and an output pad. And a current-voltage conversion block for inputting an output current from the pyroelectric element through the input pad and converting the output current into a voltage signal, and an output from the current-voltage conversion block. Of the voltage, a voltage amplification block that amplifies the output voltage in a predetermined frequency band and the output voltage of this voltage amplification block is compared with a predetermined absolute value, and when the output voltage exceeds the predetermined absolute value And a detection signal output block for receiving a discrimination signal from the comparison block and outputting a voltage inversion signal. The signal output block has an N well region formed on the P-type semiconductor substrate, and a gate for inputting a discrimination signal from the comparison block, a drain connected to the output pad, and a voltage power source are formed in the N well region. It is characterized by being configured by an open drain type P-channel field effect transistor provided with a connected source.

In such an infrared detector, the current-voltage conversion block, the voltage amplification block, the comparison block and the detection signal output block are formed on the same P-type conductive semiconductor substrate, so that the infrared detector can be miniaturized. Can be achieved.

Further, since the detection signal output block is composed of an open drain type P-channel field effect transistor instead of a CMOS inverter circuit, it does not have a parasitic capacitance like an N-channel field effect transistor. Therefore, when the gate of the P-channel field effect transistor is turned on, the output current flows between the source and the drain in the N-well region, and the charge injected into the N-well due to the voltage change of the drain causes the P-type semiconductor outside the N-well region. Since it does not move to the substrate, the charge is
A highly reliable infrared detector is rarely transmitted through the P-type semiconductor substrate outside the well region to the input protection unit serving as the input unit of the voltage amplification block to cause feedback to cause the above-mentioned malfunction. can get.

According to a second aspect of the present invention, in the infrared detector according to the first aspect, a voltage limiting circuit is additionally connected between the output pad and the voltage power source, whereby the open drain type P channel is provided. The fluctuation range of the output voltage generated when the gate of the field effect transistor is turned on is limited to a constant level.

Therefore, in such an infrared detector, even if the gate of the P-channel electric field transistor is turned on and an inverted voltage is output, the voltage control circuit causes the voltage fluctuation between the drain and the source to be greater than the voltage value of the power supply. Since the voltage is limited to a low predetermined voltage value, it is difficult for the generated charge to travel through the P-type semiconductor substrate outside the N-well region and to the input protection unit serving as the input unit of the voltage amplification block and the output end of the current-voltage conversion block. Therefore, there are few malfunctions due to the feedback as described above.

The infrared detector according to claim 3 is the infrared detector according to claim 1, wherein a constant current circuit is connected between the output terminal of the comparison block and the gate of the open drain type P-channel field effect transistor. In this way, the output current generated when the gate of the open drain type P-channel field effect transistor is turned on is held at a constant level.

In such an infrared detector, the current flowing between the gate and the source is limited by the constant current circuit even when the gate of the P-channel electric field transistor is turned on and an inverted voltage is output. Therefore, even if the external load connected to the output pad becomes large, an unnecessarily large amount of current does not flow, so that the amount of charges injected into the N-well region is limited and the fluctuation of the potential of the P-type semiconductor substrate is further reduced. As a result, the feedback as described above is less likely to occur, and malfunctions are less likely to occur.

The infrared detector according to claim 4, which is also proposed, is an infrared detector constructed by connecting and adding a semiconductor circuit to a pyroelectric element.
An output pad and an output pad are formed on the same N-type semiconductor substrate, and an output current from the pyroelectric element is input through the input pad to convert it into a voltage signal, and a current-voltage conversion block. Of the output voltage from the conversion block, a voltage amplification block that amplifies the output voltage in a predetermined frequency band and the output voltage of this voltage amplification block is compared with a predetermined absolute value, and the output voltage is a predetermined absolute value. When the value exceeds the value, a comparison block that outputs a determination signal and a detection signal output block that receives the determination signal from this comparison block and outputs a voltage inversion signal are provided. Form a P-well region on the N-type semiconductor substrate, and in the P-well region, a gate for inputting a discrimination signal from the comparison block and the output pad are provided. Drain connected to de, it provided a source connected to a voltage source, characterized in that it is constituted by N-channel field effect transistor of an open drain type. The infrared detector according to claim 5 is the infrared detector according to claim 4, wherein a voltage limiting circuit is additionally connected between the output pad and the voltage power supply, whereby the open drain type N-channel electric field is provided. The fluctuation range of the output voltage generated when the gate of the effect transistor is turned on is limited to a certain level.

Further, the infrared detector according to claim 6 is:
The constant current circuit is connected and added between the output terminal of the comparison block and the gate of the open drain type N channel field effect transistor according to claim 4, whereby the open drain type N channel field effect is provided. The output current generated when the gate of the transistor is turned on is held at a constant level.

According to the fourth to sixth aspects, the semiconductor circuit constituting the semiconductor circuit is formed of the N-type semiconductor substrate, and the output voltage from the output pad is the same as in the first to third aspects. Since the output current is limited to a certain width, the electric charge generated at the time of output does not cause the above-mentioned feedback to be transmitted to the input protection unit or the like to cause a malfunction, so that a highly reliable infrared detector can be obtained.

[0032]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described below with reference to the drawings. (First Configuration Example) In this example, an example using a P-type semiconductor substrate will be described.

FIG. 1 is a circuit diagram schematically showing an infrared detector according to the present invention.

When the infrared detector 1 detects the heat of a human body or the like, the pyroelectric element 11 outputs a current corresponding to the heat.
A current-voltage conversion block 20 for converting an output current output when the pyroelectric element 11 detects heat into a voltage; a voltage amplification block 30 for amplifying an output signal output from the current-voltage conversion block 20; A comparison block 40 that compares a signal output from the output end 37 of the amplification block 30 with a predetermined threshold value, and a detection that outputs a detection signal for detecting a human body in response to the signal output from the comparison block 40. And a signal output block 50.

In this example, the current-voltage conversion block 20,
The voltage amplification block 30, the comparison block 40, and the detection signal output block 50 are all the same P-type semiconductor substrate 70.
Is formed in.

The detection signal output block 50 is an open drain type P-channel field effect transistor (PMOS).
It is composed of. In the illustrated example, an N well region 71 is formed in a predetermined region of the P type semiconductor substrate 70, and a gate 53G, a source 53S, and a drain 53D are formed in the N well region 71.

Here, the gate 53G of the transistor 53 is provided.
Is connected to the output terminal of the comparison block 40 and is connected to the source 53.
S is connected to the power supply 51, and the drain 53D is connected to the output pad 54. Then, on the output pad 54,
The terminal is connected to an external load (not shown) such as an alarm issuing means whose ground is connected to ground.

The current-voltage conversion block 20 has the same structure as the conventional current-voltage conversion block 20, and is for current-voltage conversion for converting the output current output from the pyroelectric element 11 into a voltage. A resistor 21 and a field-effect transistor 22 such as a JFET for impedance conversion are provided, and the output current of several fA output from the pyroelectric element 11 by the energy of weak infrared rays emitted from the human body is set to several tens of μV. A minute voltage is output from the drain 22D of the field effect transistor 22.

The pyroelectric element 11 is formed on the substrate 12 separate from the P-type semiconductor substrate 70, and the drain 22D of the field effect transistor 22 connected to the input pad 23.
Are connected to the input 32 of the voltage amplification block 30.

One voltage amplification block 30 has the same structure as the conventional voltage amplification block 30,
Amplifier 33, 33, capacitive element 34, 34, 34, resistor 3
5, 35, 35 and a power supply 36 are provided so that a minute voltage signal output from the drain 22D of the field effect transistor 22 is amplified only in a frequency band of about 0.1 to 10 Hz. As a result, only the frequency component of the output signal from the sensor that accompanies the movement of a person is amplified, and the amplified voltage signal is output from the output end 37.

Further, the comparison block 40 has the same structure as that of the conventional comparison block 40, is equipped with a window comparator section 41 and a logic gate circuit 42, and is amplified by the voltage amplification block 30. When a voltage signal is input, the input voltage signal is compared with a threshold value.

In this example, the window comparator section 41
Is provided with two threshold values, and since a NAND circuit is used as the logic gate circuit 42, when the amplitude of the voltage signal exceeds a certain level, a signal (H level) is output from the output section of the logic gate circuit 42. (Or L level) is output to the detection signal output block 50.

2A and 2B are diagrams mainly showing the detection signal output block 50. FIG. 2A is a circuit diagram of the detection signal output block 50, and FIG. ) Is
It is explanatory drawing which illustrates typically the relationship between the detection signal output block 50 and the input protection part 63 of the voltage amplification block 30 in a semiconductor circuit.

In FIG. 2, the members corresponding to those shown in FIG. 1 are designated by the corresponding reference numerals and the description thereof will be omitted. In FIG. 2, reference numeral 60 denotes a signal processing unit, which includes a current / voltage conversion block 20, a voltage amplification block 30, and a comparison block 40. Incidentally, 62 is a P-type semiconductor substrate 7
Reference numeral 63 denotes a signal processing unit 60, which is a P diffusion unit that defines the potential of 0.
C i denotes a parasitic capacitance formed on the P-type semiconductor substrate 70 when the input protection unit 63 of the signal processing unit 60 is formed, and 64 denotes N diffusion that defines the potential of the N well region 71. The layers are shown.

According to such an infrared detector 1, the current / voltage conversion block 20, the voltage amplification block 30, the comparison block 40, and the detection signal output block 50 are formed on the same P-type semiconductor substrate 70, so that infrared detection can be performed. The size of the container can be reduced.

Further, the detection signal output block 50 is
Since it is configured only by the open drain type P-channel field effect transistor 53, not by the OS inverter circuit type, as is clear from the comparison between FIG. 2 and FIG. 11, the P-type semiconductor substrate is formed when the N-channel field effect transistor is formed. The parasitic capacitance Cn is not formed at 70.

Therefore, when the gate 53G of the P-channel field effect transistor 53 is turned on, the drain 53
It is possible to significantly suppress the electric charge from being transferred as noise to the input protection unit 63 via the D-type P-type semiconductor substrate 70.

The P-channel field effect transistor 53
When the N well region 71 is formed, a parasitic capacitance is also formed between the drain 53D and the N well region 71.
Is fixed to a low impedance by the power supply 51, the parasitic capacitance formed is significantly smaller than that in the case where an N-channel field effect transistor is formed on the P-type semiconductor substrate 70.

Further, the current / voltage conversion block 20, the voltage amplification block 30, the comparison block 40 and the detection signal output block 50 are formed on the same semiconductor substrate to form an integrated circuit (I
When C) is configured, the 1 / f noise generated in the circuit itself becomes a problem. For this reason, the amplifiers 33, 33 are configured as P-channel field effect transistors (PM) advantageous for low noise.
(OS) input configuration is generally performed.

In this case, when the P-type semiconductor substrate 70 is used as the semiconductor substrate, in order to form the amplifiers 33, 33 having the P-channel field effect transistor (PMOS) input configuration, the P-type semiconductor substrate 70 is provided with the N-type semiconductor substrate 70. It is necessary to form a well region, and as a result, the P-channel field effect transistor (PMOS) is separated from the P-type semiconductor substrate 70 by the N-well region.
There is also an advantage that the substrate potentials of the input transistors 3 and 33 can be freely set.

FIG. 3 shows a voltage limiting circuit 81 connected between the output pad 54 and the voltage power supply 51. Drain 5 of P-channel field effect transistor 53
A voltage limiting circuit 81 is additionally connected between the 3D and the power supply 51, and an output pad 54 is connected to the drain 53D. As the voltage limiting circuit 81, for example, the Zener diode 83 shown in FIG. 3B can be cited as a preferable example, but the voltage limiting circuit 81 is not limited to the Zener diode.

As shown in FIG. 2, the detection signal output block 50
, Which is a P-channel field effect transistor 53, the drain 53D when the gate 53G is turned on and off
The variation range of the output voltage of the
However, if the Zener diode 83 is added as shown in the figure, the change width of the output voltage is limited to the Zener voltage.

When the P-type semiconductor substrate is used, the N-well region 71 of the P-channel field effect transistor 53 is fixed to the potential VDD of the power source 51, but the resistance of the N-well region 71 is not zero, so the N-well region 71 is not. P via area 71
The potential of the semiconductor substrate 70 changes.

However, as described above, the drain 53
If the variation width of the output voltage of D is limited by using the voltage limiting circuit 81, the charge injected into the N-well region 71 is also limited by the voltage limiting circuit 81, so that the feedback due to the charge as described above is eliminated and the infrared detector 1 The malfunction of can be reduced.

Further, in FIG. 4, a constant current circuit 90 is added between the comparison block and the gate 53G of the P-channel field effect transistor 53 to keep the fluctuation of the output current of the P-channel field effect transistor 53 at a constant level. The configuration is shown. In FIG. 4, reference numeral 100 indicates a NOT logic gate.

The constant current circuit 90 includes a P-channel field effect transistor 91 and an N-channel field effect transistor 9.
2 and a constant current source 93.

The NOT logic gate 100 is connected to the output terminal of the NAND logic gate 42. The output terminal of the NOT logic gate 100 is a P-channel field effect transistor 9
The source 91S is commonly connected to the source 92S of the N-channel field effect transistor 92, is connected to the voltage power supply 51, and is connected to the drain 91D of the P-channel field effect transistor 53 and the N-channel field effect transistor 92. The drain 92D is a constant current source 9
3 is connected to the ground.

According to such a circuit configuration, for example, N
When H is output to the output terminal of the AND logic gate 42, N
The output terminal of the OT logic gate 100 outputs L, and at this time,
The gate 91G of the P-channel field effect transistor 91 is turned on, the gate 92G of the N-channel field effect transistor 92 is turned off, and the P-channel field effect transistor 5 is turned on.
When the gate 53G of No. 3 is turned off and L is output to the output terminal of the NAND logic gate 42, the NOT logic gate 1
The output terminal of 00 outputs H, and at this time, the gate 91G of the P-channel field effect transistor 91 is turned off and the gate 92G of the P-channel field effect transistor 92 is turned on,
The gate 53G of the P-channel field effect transistor 53 turns on, but when the gate 53G of the P-channel field effect transistor 53 turns on, the gate 92G of the P-channel field effect transistor 92 turns on and the source of the P-channel field effect transistor 53. 53S and drain 53
A constant current flows between D and D due to the current mirror effect.

Therefore, the drain 53 is independent of the size of the external load (not shown) connected to the output pad 54.
Since the output current output from D can be kept constant, the amount of charges injected into the N well region 71 is also limited. Therefore, the fluctuation of the potential of the P-type semiconductor substrate 70 can be further reduced, and the malfunction caused by the charge feedback described above can be reduced.

(Second Configuration Example) In this example, an example using an N-type semiconductor substrate will be described.

FIG. 5 is a circuit block diagram schematically showing the configuration of the infrared detector according to the present invention.

This infrared detector 2 comprises an N-type semiconductor substrate 7
0A, an N-channel field effect transistor (NMOS) 52 is used as the detection signal output block 50, and the detection signal output block 50 is formed in a P well region 71A formed in a predetermined region of the N-type semiconductor substrate 70A. A gate 52G is connected to the output terminal of the comparison block 40, a source 52S is connected to the ground, and a drain 52D is connected to an output pad 54 for connecting an external load circuit (not shown) such as an alarm issuing means. .

N-channel field effect transistor (NMO
The gate 52G of (S) 52 is connected to the output of the comparison block 40, the source 52S is connected to ground, and
The drain 52D is connected to the output pad 54. The output pad 54 is connected to an external load (not shown) such as an alarm issuing means having a pull-up input section.

The current-voltage conversion block 20, the voltage amplification block 30, and the comparison block 40 have the same structure except that the respective constituent members are formed on the N-type semiconductor substrate 70A and have different polarities. Corresponding members include
Corresponding reference characters are assigned and description thereof is omitted.

The infrared detector 2 differs from the conventional infrared detector 101 in that at least the current-voltage conversion block 20 and the detection signal output block 50 are formed on the same N-type semiconductor substrate 70A. . More specifically, in this example, the current-voltage conversion block 20, the voltage amplification block 30, the comparison block 40, and the detection signal output block 50 are all formed on the same N-type semiconductor substrate 70A.

Further, the infrared detector 2 uses an N-channel field effect transistor (NMOS) as the detection signal output block 50. In this example, as the detection signal output block 50, a P well region 71A is formed in a predetermined region of the N-type semiconductor substrate 70A, and the P well region 7 is formed.
N-channel field effect transistor (NMOS) in 1A
52 is used, which is different from the conventional infrared detector 101 having a CMOS inverter circuit as the detection signal output block 50.

FIG. 6 is a diagram mainly showing the detection signal output block 50 of the infrared detector 2, FIG. 6A is a circuit diagram of the detection signal output block 50, and FIG.
Is the detection signal output block 50 and the voltage amplification block 3
It is explanatory drawing which illustrates typically the relationship with 0 of the input protection part 63. In FIG. 6, the members corresponding to those shown in FIG. 2 are designated by the corresponding reference numerals, and the description thereof will be omitted.
In FIG. 6, reference numeral 62 is P for defining the potential of the P-type semiconductor substrate.
The diffusion unit 63 is an input protection unit of the signal processing unit 60,
Ci is N when the input protection unit 63 of the signal processing unit 60 is formed.
The parasitic capacitance formed in the type semiconductor substrate 70A is shown. Reference numeral 64 denotes a P diffusion layer whose end is connected to ground and which defines the reference potential of the N well region 71A.

In this infrared detector 2, the current / voltage conversion block 20, the voltage amplification block 30, and the comparison block 40.
Further, since the detection signal output block 50 is formed on the same N-type semiconductor substrate 70A, the infrared detector can be downsized.

In addition, in this infrared detector 2, the N-type semiconductor substrate 70A is used, and the detection signal output block 50 is
Instead of the CMOS inverter circuit type, it is configured only by the N-channel field effect transistor 52, and the drain 52D of the N-channel field effect transistor 52 is connected to the output pad 54 to form an open drain structure.

In the infrared detector 2, since the P-channel field effect transistor is eliminated from the detection signal output block 50, the parasitic capacitance Cn formed on the N-type semiconductor substrate 70A when the P-channel field effect transistor 53 is formed. Can be eliminated. Thereby, when the gate 52G of the N-channel field effect transistor 52 is turned on, the noise transmitted from the drain 52D to the input protection unit 63 via the N-type semiconductor substrate 70A can be significantly reduced.

In addition, the N-channel field effect transistor (NMOS) generally has a higher output current capability than the P-channel field effect transistor (PMOS), and thus requires only a small area. Therefore, high integration and manufacturing cost are required. There are advantages. Moreover, the detection signal output block 5
When 0 is formed by the N-channel field effect transistor on the P-type semiconductor substrate 70A, a parasitic capacitance is not directly generated between the drain 52D of the N-channel field effect transistor 52 and the substrate 70A, so that the N-type semiconductor substrate 70A is not formed. The noise transmitted to the input protection unit 63 via the can also be reduced.

FIG. 7 shows a structure in which a voltage limiting circuit 81A is additionally connected between the output pad 54 and the voltage power supply 51.

In the present invention, when the semiconductor circuit is composed of the N-type semiconductor substrate 70A, the detection signal output block 50
Since it is composed of an N-channel field effect transistor 52, in order to limit the output voltage thereof, a voltage limiting circuit 81A is connected between the output pad 54 and the voltage power supply 51 as shown in the figure.

As the voltage limiting circuit 81A in this case,
For example, as in the case of the P-type semiconductor substrate, the Zener diode 83 shown in FIG. 7B can be cited as a preferable example, but the drain 52D of the N-channel field effect transistor 52 is connected to the voltage limiting circuit 81A. Any circuit can be used as long as it can be limited to a voltage value lower than the voltage value of the potential VDD of the pull-up power supply 51 of the load, and is not limited to the Zener diode.

The effect of suppressing the fluctuation range of the output voltage by the voltage limiting circuit 81A is that when the voltage limiting circuit 81A is provided in parallel with the N-channel field effect transistor 52, the fluctuation range of the output voltage of the drain 52D when the gate 52G is turned on and off is Limited to Zener voltage.

Further, FIG. 8 shows a constant current circuit 90A between the output terminal of the comparison block 40 and the gate of the N-channel field effect transistor 52 which constitutes the detection signal output block 50.
Shows a configuration in which is connected and added. In addition, in FIG.
Indicates a NOT logic gate.

The constant current circuit 90A is also connected to the output pad 54 because the current flowing when the gate 52G of the N-channel field effect transistor 52 is turned on is held at a constant level by the current mirror effect shown in FIG. The output current is kept constant regardless of the size of the external load.

Accordingly, since the output current does not increase the electric charge more than necessary, it is possible to reduce the malfunction of the infrared detector 2 due to the feedback as described above.

[0079]

As described in detail above, the first aspect of the present invention is as follows.
In the infrared detector described in 4, the current-voltage conversion block,
Since the voltage amplification block, the comparison block and the detection signal output block are formed on the same P-type semiconductor substrate and N-type semiconductor substrate, the infrared detector can be miniaturized. In addition, since the open drain type P-channel field effect transistor and the open drain type N-channel field effect transistor are used as the detection signal output block instead of the CMOS inverter circuit, an inverted voltage is output from the detection signal output block. Also, the drain voltage change is hardly transmitted to other circuit blocks formed on the same semiconductor substrate as noise, and feedback is hardly generated, and malfunction does not easily occur.

In the infrared detectors according to claims 2 and 5,
The output voltage generated when the gates of the open drain type P-channel field effect transistor and the open drain type N-channel field effect transistor are turned on can be limited to the power supply voltage or less by the voltage control circuit additionally connected. The charges injected into the N-well region and the P-well region when the gates of the transistor and the N-channel field effect transistor are turned on can be reduced, and as a result, the change in the voltage of the drain can cause the input protection unit of the signal processing unit and the Since it is difficult to be transmitted to the output terminal of the current-voltage conversion block, it is possible to prevent a malfunction from being fed back to the output pad via the input section of the signal processing section.

In the infrared detectors according to claims 3 and 6,
The output current generated when the gates of the open drain type P-channel field effect transistor and the open drain type N-channel field effect transistor are turned on can be limited by the additionally connected constant current circuit. It is possible to reduce the charges injected into the N well region and the P well region when the gate of the effect transistor is turned on, and as a result, the voltage change of the drain causes the input protection unit of the signal processing unit and the current-voltage conversion block to change. Since it is difficult to reach the output end,
There is no possibility of malfunction due to feedback to the output pad via the input section of the signal processing section.

[Brief description of drawings]

FIG. 1 is a first structural example of an infrared detector according to the present invention (P
FIG. 3 is a circuit block diagram schematically showing a type semiconductor substrate).

FIG. 2A is a circuit diagram of a detection signal output block in the first configuration example, and FIG. 2B is an explanatory diagram showing a semiconductor circuit in the first configuration.

FIG. 3A is a block diagram in which a voltage limiting circuit is connected and added to the first configuration example, and FIG. 3B is a diagram showing the circuit example.

FIG. 4A is a block diagram in which a constant current circuit is connected and added to the first configuration example, and FIG. 3B is a diagram showing the circuit example.

FIG. 5 is a second configuration example of the infrared detector according to the present invention (N
FIG. 3 is a circuit block diagram schematically showing a type semiconductor substrate).

FIG. 6A is a circuit diagram of a detection signal output block in the second configuration example, and FIG. 6B is an explanatory diagram showing a semiconductor circuit in the second configuration.

FIG. 7A is a block diagram in which a voltage limiting circuit is connected and added to the first configuration example, and FIG. 7B is a diagram showing the circuit example.

FIG. 8A is a block diagram in which a constant current circuit is connected and added to the first configuration example, and FIG. 8B is a diagram showing the circuit example.

FIG. 9 is a circuit block diagram schematically showing a configuration of a conventional infrared detector using a CMOS inverter circuit for a detection signal output block.

FIG. 10 is a circuit block diagram schematically showing an infrared detector when the circuit configuration of the conventional infrared detector is integrated into a one-chip IC as it is.

11 is an explanatory diagram schematically illustrating a problem that occurs in the semiconductor circuit of the conventional infrared detector shown in FIG.

[Explanation of symbols]

1, 2 infrared detector 20 Current-voltage conversion block 30 voltage amplification block 40 comparison blocks 50 Detection signal output block 52 N-channel field effect transistor (NMOS) 53 P-channel field effect transistor (PMOS) 54 output pad 70 P-type semiconductor substrate 70A N-type semiconductor substrate 71 N well region 71A P-well area 81, 81A voltage limiting circuit 83 Zener diode 90, 90A constant current circuit

─────────────────────────────────────────────────── ─── Continuation of front page (51) Int.Cl. ⁷ Identification code FI H04N 5/33 H01L 27/14 K (72) Inventor Toshio Fujimura 1048, Kadoma, Kadoma, Osaka Prefecture Matsushita Electric Works Co., Ltd. (56 ) Reference JP-A-4-158583 (JP, A) JP-A-6-188377 (JP, A) JP-A-7-239722 (JP, A) JP-A-5-283998 (JP, A) JP-A-5-283998 (JP, A) 2-67933 (JP, A) JP 63-33691 (JP, A) JP 4-32274 (JP, A) JP 8-50059 (JP, A) JP 7-294336 (JP, A) A) JP 5-26726 (JP, A) JP 3-269390 (JP, A) JP 2-119426 (JP, A) JP 1-191089 (JP, A) JP S60 -151576 (JP, A) JP-A-60-140173 (JP, A) Actual Kaihei 2-115135 (JP, U) Matsu Denko Technical Report, Japan, Matsushita Electric Works stock company marketing section, September 1998, No. 64, p. 52-58 (58) Fields surveyed (Int.Cl. ⁷ , DB name) G01J 1/02 G01J 1/42-1/46 G01J 5/02 G01J 5/12-5/14 G01V 9/04 G01K 7 / 00 G08B 13/189-13/191 H01H 35/00 H01L 27/06-27/08 H01L 27/14 H01L 31/00-31/08 H01L 31/08-31/10 H01L 37/00-37/02 H03K 17/00-17/70 H03K 19/00-19/096 H04N 5/30-5/335

Claims (6)

(57) [Claims] 1. An infrared detector configured by connecting and adding a semiconductor circuit to a pyroelectric element, wherein the semiconductor circuit has the input pad on the same P-type semiconductor substrate on which an output pad and an output pad are formed. A current-voltage conversion block that inputs the output current from the pyroelectric element through the pad and converts it into a voltage signal, and a voltage amplifier that amplifies the output voltage in a predetermined frequency band among the output voltages from the current-voltage conversion block. A block, a comparison block that compares the output voltage of this voltage amplification block with a predetermined absolute value that is set in advance, and outputs a determination signal when the output voltage exceeds the predetermined absolute value, and a comparison block from this comparison block. And a detection signal output block for receiving a discrimination signal and outputting a voltage inversion signal. The detection signal output block is formed on the P-type semiconductor substrate by N An open-drain type P, in which a well region is formed and a gate for inputting a determination signal from the comparison block, a drain connected to the output pad, and a source connected to a voltage power source are provided in the N well region An infrared detector comprising a field effect transistor. 2. The voltage limiting circuit according to claim 1, wherein a voltage limiting circuit is additionally connected between the output pad and the voltage power source, whereby the gate of the open drain type P-channel field effect transistor is turned on. An infrared detector with a structure that limits the fluctuation range of the output voltage that occurs at a certain level. 3. A constant current circuit is connected between the output terminal of the comparison block and the gate of the open drain type P-channel field effect transistor according to claim 1, whereby the open drain type is connected. Infrared detector having a configuration in which the output current generated when the gate of the P-channel field effect transistor of 1 is turned on is maintained at a constant level. 4. An infrared detector configured by connecting and adding a semiconductor circuit to a pyroelectric element, wherein the semiconductor circuit has the input pad on the same N-type semiconductor substrate on which an output pad and an output pad are formed. A current-voltage conversion block that inputs the output current from the pyroelectric element through the pad and converts it into a voltage signal, and a voltage amplifier that amplifies the output voltage in a predetermined frequency band among the output voltages from the current-voltage conversion block. A block, a comparison block that compares the output voltage of this voltage amplification block with a predetermined absolute value that is set in advance, and outputs a determination signal when the output voltage exceeds a predetermined absolute value, and a comparison block from this comparison block. And a detection signal output block that outputs a voltage inversion signal in response to the determination signal. The detection signal output block is provided on the N-type semiconductor substrate as P. An open drain type N having a well region formed therein, in which a gate for inputting a discrimination signal from the comparison block, a drain connected to the output pad, and a source connected to a voltage power source are provided in the P well region. An infrared detector comprising a field effect transistor. 5. The voltage limiting circuit according to claim 4, wherein a voltage limiting circuit is additionally connected between the output pad and the voltage power supply, whereby the gate of the open drain type N-channel field effect transistor is turned on. An infrared detector with a structure that limits the fluctuation range of the output voltage that occurs at a certain level. 6. A constant current circuit is connected and added between the output terminal of the comparison block and the gate of the open drain type N-channel field effect transistor according to claim 4, whereby the open drain type is connected. An infrared detector configured to hold a constant level of output current generated when the gate of the N-channel field effect transistor is turned on.