JP3486779B2 - Driving circuit for solid-state imaging device and electronic still camera - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electronic still camera capable of high shutter speed.

[0002]

2. Description of the Related Art FIG. 8 is a structural explanatory view showing an example of a frame transfer type solid state image pickup device (CCD) used in an electronic still camera, and FIGS. 9 and 10 show drive signals of the frame transfer type solid state image pickup device. It is a waveform diagram. That is, the frame transfer CCD 11 is composed of an image pickup section 11a, a storage section 11b and a horizontal transfer section 11c. The CCD 11 photoelectrically converts incident light that has passed through the imaging lens in the imaging unit 11a, and then controls terminals VI1 to VI4.
And frame shift pulse signals VI1 to VI as shown in FIG. 9 input to the VS1 to VS4 from the drive signal generator.
4 and VS1 to VS4 vertically transfer to the storage unit 11b, and the electric charges for one frame photoelectrically converted by the imaging unit are sequentially stored in the storage unit 11b. In the horizontal transfer unit 11c, one frame stored in the storage unit 11b is stored. The charge of the
The frame shift pulse signal V as shown in FIG. 10 inputted from the drive signal generator to the control terminals VS1 to VS4 of b.
It is vertically transferred to the horizontal transfer unit 11c by S1 to VS4, and is also transferred to an external image processing circuit by the line transfer pulse signals DHT1 and DHT2 as shown in FIG. 10 input from the drive signal generator to the control terminals DHT1 and DHT2 thereof. Forward. The control terminal DHTR of the horizontal transfer unit 11c
A timing pulse signal DHTR as shown in FIG. 10 for synchronizing the transfer timing is input to the drive signal generator. The CCD 11 is 124 × 240.
A pixel outputs an image signal of one field in 1/60 seconds.

In a conventional electronic still camera using a frame transfer type solid-state image pickup device, it is necessary to drive to drive out excess charges accumulated in the device when an image pickup request is made. That is, as shown in FIG. 11, when an imaging request is made, the vertical transfer pulse (a) to
(H) Frame shift pulse signals VI1 to VI
4, VS1 to VS4 are supplied from the drive signal generator to transfer the surplus charge of the image pickup unit 11a to the storage unit 11b. In the period of T2, the frame transfer pulse signals VS1 to VS4 which are vertical transfer pulses (e) to (h) and the line transfer pulse signal DH which is horizontal transfer pulses (i) to (k).
T1, DHT2, and timing pulse signal DHTR are supplied from the drive signal generator to transfer the excess charge of one frame (0 to 123 lines) of the storage unit 11b to the horizontal transfer unit 11c and one screen of the horizontal transfer unit 11c. The excess charge of is read out.

Therefore, further in the period T3, the frame transfer pulse signals VI1 to VI4 and VS1 to VS4 which are the vertical transfer pulses (a) to (h) are supplied from the drive signal generator to the image pickup section 11a in the period T2. Frame shift pulse signals VS1 to VS4 and horizontal transfer pulse (i) that transfer the generated excess charges to lines 0 to 4 of the storage unit 11b (lower part of the storage unit) and are vertical transfer pulses (e) to (h). ~ (K) line transfer pulse signal DHT
1, DHT2, the timing pulse signal DHTR is supplied from the drive signal generator and compressed in the storage unit 11b for the period T
The surplus charge generated in 2 is transferred to the horizontal transfer unit 11c, and the surplus charge in the horizontal transfer unit 11c is read to the outside. In such surplus charge sweeping drive, the exposure time is the period T3.
It is possible to realize a high-speed shutter having a horizontal transfer time of 0 to 4 lines in the above.

[0005]

However, when a higher shutter speed is required, it cannot be realized by the above surplus charge sweeping-out driving method.
In addition, since the vertical transfer and the surplus charge reading are performed twice before the imaged exposure charge is read, there is a drawback that it takes time from the image pickup request to the image pickup start.

The present invention has been made in view of the above circumstances, and an object of the present invention is to provide an electronic still camera capable of increasing the shutter speed and shortening the time from the request for image pickup to the start of image pickup.

[0007]

In order to achieve the above object, the present invention relates to a drive circuit for driving a solid-state image pickup device comprising an image pickup section, a storage section and a horizontal transfer section, in which a surplus charge of the image pickup section is stored. First means for transferring the excess charges transferred to the storage section by the first means to the horizontal transfer section, and second means for reading the excess charges transferred to the horizontal transfer section to the outside. The third means for sweeping the exposure charge photoelectrically converted by the image pickup section to the substrate section while the second means transfers the excess charge to the horizontal transfer section and reads it to the outside; Means for transferring the exposure charge of the image pickup section to the storage section after the means ends the transfer of the excess charge to the horizontal transfer section and the readout to the outside.
And the fifth means for transferring the exposure charge transferred to the storage section by the fourth means to the horizontal transfer section and reading the exposure charge transferred to the horizontal transfer section to the outside. It is what

[0008]

According to the present invention, when the surplus charge in the storage section is transferred to the horizontal transfer section, the charge photoelectrically converted by the image pickup section is swept out to the substrate section, so that the readout of the surplus charge in the horizontal transfer section is completed. Then, the vertical transfer drive of the exposure charge can be immediately performed, and the sum of the charge read time and the vertical transfer time for one horizontal immediately before the end of the readout of the surplus charge of the horizontal transfer portion can be used as the exposure time. Therefore, the exposure time can be shortened to increase the shutter speed, and the time from the request for image pickup to the start of image pickup can be shortened.

[0009]

Embodiments of the present invention will now be described in detail with reference to the drawings. FIG. 1 is a timing chart of one embodiment of the present invention, and FIG. 2 is an explanatory diagram showing a state of a frame transfer type CCD according to one embodiment of the present invention. That is, as shown in FIG. 2A, the imaging unit 11a and the storage unit 1
When an image pickup request is made in a state in which the surplus electric charge e is accumulated in the frame transfer type CCD 11 including the 1b and the horizontal transfer unit 11c, the vertical shift pulses (a) to (h) which are the frame shifts in the period T11 of FIG. The pulse signals VI1 to VI4 and VS1 to VS4 are supplied from the drive signal generator, and as shown in FIG.
The surplus electric charge e of the above is vertically transferred to the storage unit 11b, and the surplus electric charge e of the storage unit 11b is vertically transferred to the horizontal transfer unit 11c side. Next, in the period T12 of FIG. 1, the frame shift pulse signals VS1 to VS4, which are vertical transfer pulses (e) to (h), are supplied from the drive signal generator, and
As shown in (c), the surplus charge e of the storage section 11b is vertically transferred to the horizontal transfer section 11c side. In this case, by performing vertical transfer twice in the storage unit 11b, the excess charges e of N lines (less than the total number of lines) are transferred to the horizontal transfer unit 11c side. Next, the periods T13 and T in FIG.
14, frame transfer pulse signals VS1 to VS4 which are vertical transfer pulses (e) to (h) and line transfer pulse signals DH which are horizontal transfer pulses (i) to (k)
T1, DHT2, and timing pulse signal DHTR are supplied from the drive signal generator to vertically and horizontally transfer the surplus charges e of N lines transferred to the horizontal transfer unit 11c side as shown in FIG. 2C. Read out. in this case,
The exposure charges are photoelectrically converted to the imaging unit 11a while the excess charges e for N lines are vertically and horizontally transferred. Therefore, when the surplus charge e of the storage unit 11b is vertically transferred, as shown in FIG. 3, the frame shift pulse signals VI1 and VI3 and the substrate drive pulse (l) which are vertical transfer pulses (a) and (c) are used. When a certain substrate drive pulse signal NSUB is supplied from the drive signal generator, the exposure charges photoelectrically converted by the image pickup unit 11a are swept out to the overflow drain of the substrate unit. In the periods T13 and T14 of FIG. 1, after the sweeping of the exposure charge to the overflow drain and the reading of the excess charge e of N lines to the outside are completed, the exposure charge is taken by the imaging unit 11a as shown in FIG. 2D. E is photoelectrically converted, and immediately in the period T15 of FIG. 1, the frame shift pulse signals VI1 to VI4 and VS1 to VS4, which are the vertical transfer pulses (a) to (h), are supplied from the drive signal generator, and the imaging unit 11a. The exposure charge E of is transferred vertically to the storage portion 11b. Next, in a period T17 of FIG. 1, frame transfer pulse signals VS1 to VS4 and horizontal transfer pulses (i) to which are vertical transfer pulses (e) to (h).
(K) line transfer pulse signals DHT1 and DHT
2. The timing pulse signal DHTR is supplied from the drive signal generator, and the exposure charge E for one screen transferred to the storage section 11b is vertically and horizontally transferred and read out to the outside.

In this case, the exposure time corresponds to the period T16 in FIG. 1, which is the sum of the charge read time for one horizontal just before the end of the read of the excess charge e on the horizontal transfer section 11c and the vertical transfer time, A shutter speed of 1/10000 second is possible. Further, since the vertical transfer is performed twice in the storage unit 11b, the number of lines for reading out all the excess charges e is smaller than N lines and the total number of lines, so that it is possible to shorten the time from the request for image pickup to the start of image pickup. .

FIG. 4 is a circuit diagram of the pulse signal NSUB driving unit. That is, the pulse signal from the drive signal generator is supplied to the input terminal 21, and the input terminal 21 is connected to the base of the NPN transistor TR via the parallel circuit of the capacitor C1 and the resistor R1. This transistor T
The base of R is connected to the emitter of the transistor TR via the resistor R2, and the emitter of the transistor TR is grounded. The collector of the transistor TR is a resistor R
And a capacitor C2
Is connected to the output terminal 23 via the output terminal 23, and the connection point between the output terminal 23 and the capacitor C2 is connected to the power supply 22 via the parallel circuit of the resistor R4 and the diode D. Output terminal 23
Is connected to the NSUB terminal of the CCD 11. As described above, since the pulse signal NSUB driving unit is level-shifted using the capacitor and the diode, it takes time for the circuit to stabilize, and if this time is a time for M lines, N is read out for all the excess charges e. There is usually a relationship of M <N with the time for the line, and the circuit of the pulse signal NSUB driving unit is stable if the read time for the N lines is provided.

FIG. 5 is a block diagram of an image processing circuit 30 incorporated in the electronic still camera, in which the drive circuit of the present invention is applied to the electronic still camera. In this figure, the electronic still camera is an A / D converter 31,
CDS circuit 32, memory control unit 33, timing generator 34, register 35, integration processing circuit 36, counter 3
7, timer 38, CPU 39, parallel I / O 40,
It is composed of a ROM 41, a RAM 42, an I / O port 43, an interrupt processing unit 44, a serial I / O 45, and a system clock generating unit 46, and has a memory control unit 33, a register 35, a counter 37, a timer 38, a CPU 39, a parallel unit. I / O 40, ROM 41, RAM 42, I / O
Port 43, interrupt processing unit 44, and serial I / O 45
Is connected to the bus 47.

The A / D converter 31 receives an A / D signal according to the processing timing signal input from the timing generator 34.
The conversion processing timing is controlled, and the image signal amplified and output from the CCD 11 by the amplifier 51 is converted into a predetermined digital image signal and output to the CDS circuit 32.

The CDS circuit 32 includes a timing generator 34.
Controlled by a sampling timing signal input from the input terminal and a predetermined control signal input via the register 35, and is superimposed on the digital image signal input from the A / D converter 31 at the output portion of the CCD 11 Correlated double sampling processing that removes reset noise, 1 / f noise, and the like is performed, and the digital image signal from which the noise is removed is output to the memory control unit 33 and the integration processing circuit 36 as image data.

The memory controller 33 includes a timing generator 3
4 is controlled by the access timing signal input from 4 and a predetermined access request signal input from the register 35, and the image data input from the CDS circuit 32 is transferred to the SRAM 52 connected to the outside for writing,
The image data is read from the SRAM 52 and transferred to the parallel I / O 40, the I / O port 43, and the serial I / O 45 via the bus 47.

The timing generator 34 is a processing timing signal for the A / D converter 31 based on the master clock signal input from the master clock generator 46.
Generating various timing signals for controlling various processing timings in the image processing circuit 30, such as a sampling timing signal for the CDS circuit 32, an access timing signal for the memory control unit 33, and an integration processing timing signal for the integration processing circuit 36. At the same time, it outputs a predetermined timing signal for controlling the operation timing of the CCD 11 in the CCD driver 53 connected to the outside.

The register 35 is a CPU via a bus 47.
Various control signals input from 39 are temporarily stored, and the various control signals are output to the CDS circuit 32, the memory control unit 33, and the integration processing circuit 36 according to the timing signal input from the timing generator 34.

The integration processing circuit 36 includes a timing generator 3
CD according to the integration processing timing signal input from
The image data input from the S circuit 32 is integrated, and the integration result is output to the counter 37.

The counter 37 counts up based on the integration result input from the integration processing circuit 36 and notifies the count value to the CPU 39 via the bus 47. The timer 38 sets a delay time or the like of the shutter operation at the time of image capturing, and the set time is set via the bus 47 to the interrupt processing unit 4.
Notify 4.

The CPU 39 executes the error diffusion processing of the image data based on the error diffusion processing program stored in the ROM 41 to generate the binary image data and
A transfer timing control process for transferring the accumulated charges in the CCD 11 which will be described later is executed to control the electronic shutter operation in the CCD 11.

The parallel I / O 40 is connected to the memory controller 3
The image data transferred from No. 3 is output according to a predetermined parallel data communication procedure with the parallel I / O of the electronic device connected to the outside. The ROM 41 stores an error diffusion processing program executed by the CPU 39, and the RAM 42.
Forms a data area for temporarily storing data when the CPU 39 executes error diffusion processing and the like.

The I / O port 43 is connected to an I / O port of an external electronic device or the like, and controls the transfer of image data according to a predetermined data communication control procedure. The interrupt processing unit 44
An interrupt process such as a shutter delay operation is executed according to the delay time set by the timer 38.

The serial I / O 45 communicates with the serial I / O of an electronic device that externally connects the image data transferred from the memory control unit 33 via the bus 47 to a predetermined serial communication procedure (for example, Output according to RS232C).

The SRAM 52 forms a memory area for temporarily storing the image data by the memory control unit 33. The CCD driver 53 generates a frame shift pulse signal and a line transfer pulse signal for controlling operations such as a photoelectric conversion / accumulation period in the CCD 11 and a transfer timing of accumulated charges according to a timing signal input from the timing generator 34. It is generated and output to the CCD 11.

FIG. 6 shows an example of an electronic notebook camera as a usage example of the present invention, which is an integral type. That is, the parallel I / O 40, I of the electronic still camera 61
The I / O port 43 and the serial I / O 45 are connected to the parallel I / O, the I / O port and the serial I / O of the electronic notebook 62.
If they are connected and used in correspondence with O, respectively, the image captured by the electronic still camera 61 is displayed on the display unit 63 of the electronic notebook 62.
Can be displayed on.

FIG. 7 shows another example of an electronic notebook camera as a usage example of the present invention, and this example is an optional type.
That is, the parallel I / O 4 of the electronic still camera 64
If the 0, I / O port 43 and the serial I / O 45 are connected and used in correspondence with the parallel I / O, I / O port and the serial I / O of the electronic notebook 65, the electronic still camera 64 can be used. The captured image can be displayed on the display unit 66 of the electronic notebook 65.

[0027]

As described above, according to the present invention, when the excess charge in the storage section is transferred to the horizontal transfer section, the charge photoelectrically converted by the image pickup section is swept out to the substrate section. The vertical transfer drive of the exposure charges can be performed immediately after the reading of the charges is completed, and the exposure time can be the sum of the charge reading time and the vertical transfer time for one horizontal immediately before the completion of the reading of the excess charges in the horizontal transfer section. . Therefore, the exposure time can be shortened to increase the shutter speed, and the time from the request for image pickup to the start of image pickup can be shortened.

[Brief description of drawings]

FIG. 1 is a timing chart of drive signals according to an embodiment of the present invention.

FIG. 2 is an explanatory diagram showing a state of a frame transfer type solid-state imaging device according to an embodiment of the present invention.

FIG. 3 is a waveform diagram showing an example of a pulse signal at the electronic shutter according to the present invention.

FIG. 4 is a circuit diagram showing an example of a pulse signal NSUB driving unit according to the present invention.

FIG. 5 is a block configuration diagram of an image processing circuit incorporated in an electronic still camera according to an embodiment of the present invention.

FIG. 6 is a configuration diagram showing an example of an electronic notebook camera as a usage example of the present invention.

FIG. 7 is a configuration diagram showing another example of an electronic notebook camera as a usage example of the present invention.

FIG. 8 is a structural explanatory view showing an example of a frame transfer type solid-state imaging device used in an electronic still camera.

9 is a waveform diagram showing a drive signal of the frame transfer type solid-state imaging device of FIG.

10 is a waveform diagram showing a drive signal of the frame transfer type solid-state imaging device of FIG.

FIG. 11 is a timing chart of drive signals according to a conventional electronic still camera.

[Explanation of symbols]

11 ... Frame transfer type CCD, 11a ... Imaging unit, 11b ... Storage unit, 11c ... Horizontal transfer unit, 21 ... Input terminal, 22 ... Power supply, 23 ... Output terminal, 30 ... Image processing circuit, 31 ... A / D converter, 32 ... CDS circuit, 33
... memory controller, 34 ... timing generator, 35 ... register, 36 ... integration processing circuit, 37 ... counter, 38 ... timer, 39 ... CPU, 40 ... parallel I / O, 41 ... R
OM, 42 ... RAM, 43 ... I / O port, 44 ... Interrupt processing circuit, 45 ... Serial I / O, 46 ... System clock generation unit, 47 ... Bus, 51 ... Amplifier, 52 ... SR
AM, 53 ... CCD driver, 61 ... Electronic still camera, 62 ... Electronic notebook, 63 ... Display section, 64 ... Electronic still camera, 65 ... Electronic notebook, 66 ... Display section.

Claims (4)

(57) [Claims] 1. A drive circuit for driving a solid-state image pickup device comprising an image pickup section, a storage section, and a horizontal transfer section, comprising: first means for transferring excess charge of the image pickup section to the storage section; and the first means. Second means for transferring the surplus charge transferred to the storage section to the horizontal transfer section and reading out the surplus charge transferred to the horizontal transfer section to the outside, and the second means for transferring the surplus charge to the horizontal transfer section. And third means for sweeping the exposure charges photoelectrically converted by the image pickup section to the substrate section while reading out to the outside, and the second means for transferring the surplus charges to the horizontal transfer section and to the outside. And a horizontal transfer unit that transfers the exposure charge of the image pickup unit to the storage unit and the exposure charge transferred to the storage unit by the fourth unit. Exposure transferred to Driving circuit of the solid-state image pickup element characterized by comprising a fifth means for reading a load to the outside. 2. A sixth means for transferring the excess charge transferred to the storage section by the first means to the horizontal transfer section side is provided, and the second means is provided by the sixth means. 2. The drive circuit for a solid-state image pickup device according to claim 1, wherein the surplus charge transferred to the side is transferred to the horizontal transfer unit, and the surplus charge transferred to the horizontal transfer unit is read to the outside. 3. A drive circuit for driving a frame transfer type solid-state image pickup device comprising an image pickup section, a storage section, and a horizontal transfer section, wherein a first drive signal for generating a signal for transferring excess charge of the image pickup section to the storage section. Generating means, second drive signal generating means for generating a signal for transferring the surplus charge transferred to the storage section to the horizontal transfer section side by the signal generated by the first drive signal generating means, and the second drive signal generating means. The third drive for generating a signal for transferring the surplus charge transferred to the horizontal transfer unit side to the horizontal transfer unit by the signal generated by the drive signal generating means and for reading out the surplus charge transferred to the horizontal transfer unit to the outside. The signal generating means and the signal generated by the third drive signal generating means are applied to the image pickup section while the surplus charges are transferred to the horizontal transfer section and read out to the outside. Fourth drive signal generating means for generating a signal of the electronic shutter for sweeping the exposure charge, which is more photoelectrically converted, to the overflow drain, and to the horizontal transfer portion of the excess charge by the signal generated by the third drive signal generating means. After the transfer and the reading to the outside are completed, the fifth drive signal generating means for generating a signal for transferring the exposure charge of the image pickup section to the storage section, and the signal generated by the fifth drive signal generating means Solid-state solid-state image pickup device, comprising: sixth drive signal generating means for generating a signal for transferring the exposure charge transferred to the storage part to the horizontal transfer part and for reading the exposure charge transferred to the horizontal transfer part to the outside. Driving circuit for image sensor. 4. An electronic device comprising: a solid-state image sensor including an image-capturing unit, a storage unit, and a horizontal transfer unit; a drive circuit for driving the solid-state image-capturing device; In the still camera, the drive circuit transfers a surplus charge of the image pickup unit to a storage unit, and a surplus charge transferred to the storage unit by the first unit to a horizontal transfer unit and a horizontal transfer unit. Second means for reading out the surplus charges transferred to the transfer section to the outside, and photoelectric conversion by the imaging section while the second means is transferring the surplus charges to the horizontal transfer section and reading out to the outside. The third means for sweeping the exposed charge to the substrate portion, and the second means after the transfer of the excess charge to the horizontal transfer portion and the reading to the outside are completed, and then the exposed charge of the imaging portion is stored in the storage portion. Transfer first Means and a fifth means for transferring the exposure charge transferred to the storage section by the fourth means to the horizontal transfer section and reading out the exposure charge transferred to the horizontal transfer section to the outside. An electronic still camera, wherein the first means starts transfer of surplus charges of the image pickup section when an instruction to start image pickup of the solid-state image pickup device is given by the means.