JP3486798B2 - Digital still camera - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a digital still camera capable of handling still images as digital data.

[0002]

2. Description of the Related Art Recently, a digital still camera has been put into practical use, which is constructed so that an image photoelectrically converted by an image pickup device such as a CCD is recorded on a recording medium such as a memory card, instead of recording the image on a film. There is.

When a digital still camera is used indoors or the like, an illuminating device is required. However, a flashlight for a camera generally used for effective illumination can be used for a large capacity capacitor in a short time. Must be charged for flashing.

On the other hand, the digital camera takes in an image as a device requiring a power source in addition to this illumination device,
It has a circuit such as a signal processing circuit.

[0005]

However, when attempting to charge the strobe and the power supply of the camera by using a single power supply, if the battery is charged with a large current, the power supply voltage will drop and the power supply unit will supply power to each unit. Power cannot be supplied and the system goes down.

Further, if the signal processing and the charging of the lighting means are performed separately in terms of time, the system will not be down, but the total time of the signal processing and the charging time, that is,
It takes a long time to start the next shooting.

In view of the above technical problems, the present invention is to provide a digital still camera capable of shortening the processing time by charging a lighting means and performing image processing with a single power source.

[0008]

The above object can be achieved by the following constitutions.

(1) Illuminating means for illuminating a subject, including a capacitor, charging means for charging the capacitor, signal processing means for performing processing for recording an image signal from the image sensor, and the signal. In a digital still camera having a recording means for recording an image signal obtained from a processing means on a recording medium, and a power source for operating the charging means and the signal processing means, the charging means is a charging device for limiting a charging current. And a charging control means for charging the capacitor with a predetermined limiting current during signal processing, and charging the capacitor with a limiting current larger than the predetermined limiting current except during signal processing. With the digital still camera characterized by the above, the charging time can be shortened by starting the charging operation with a small current immediately after the lighting means emits light.

(2) The digital still camera described in (1) is characterized in that the signal processing is processing for an electric signal obtained from an image of a subject illuminated by the illumination means.

(3) The digital still camera according to (1), characterized in that the signal processing means has a preprocessing circuit, an A / D conversion means, and a signal processing circuit.

[0012]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram showing a schematic configuration of the digital still camera according to the present embodiment.

The digital still camera according to the present embodiment records image data photoelectrically converted by an image pickup device 13 such as a CCD on a recording medium such as a memory card 64. The lens 11, the iris diaphragm 12, and the image pickup device 13 are used. And the like, and the focus drive circuit 2
1, an image pickup processing circuit system 20 including a diaphragm drive circuit 22 and a CCD drive circuit 23, and a preprocess circuit 30 for performing image processing on an analog image signal obtained from the image pickup device 13.
An A / D converter 40, a signal processing circuit 50 for performing image processing on a digital image signal, a digital image data storage circuit system 60 including a memory controller 61, a frame memory 62, an image storage memory 63, and a memory card 64. ,
A control communication system 70 including a main microcomputer 71, a sub-microcomputer 72, a serial port driver 73, a liquid crystal display unit 74, and an operation unit 75, a strobe circuit 80, and a power supply unit 90.
And a power supply 100. The schematic configuration of each unit will be described below.

In the digital still camera shown in FIG. 1, an optical image obtained through the lens 11, the iris diaphragm 12 and the like is formed on the light receiving surface of the image pickup device 13 such as CCD. At this time, the lens 11 and the iris diaphragm 12
Are driven by a focus drive circuit 21 and an aperture drive circuit 22, respectively.

The image pickup device 13 corresponds to the image pickup means in the claims, photoelectrically converts an optical image formed on the light receiving surface into a charge amount, and an analog image signal is generated by a transfer pulse from the CCD drive circuit 23. Is output.

The focus drive circuit 21 is composed of, for example, a stepping motor, and changes the lens position under the control of the main microcomputer 71 so as to appropriately adjust the optical focus surface of the subject on the image pickup device 13.

The diaphragm drive circuit 22 is composed of, for example, an auto iris, and optically changes the diaphragm value under the control of the main microcomputer 71.

The preprocessing circuit 30, the A / D converter 40, the signal processing circuit 50 and the compression / recording processing system by the main microcomputer 71, which are the preprocessing circuits in this embodiment, correspond to the signal processing means in the claims. To do.

The analog image signal supplied from the image pickup device 13 has its noise reduced by CDS (correlated double sampling) processing in the pre-processing circuit 30, and AGC.
The gain is adjusted by, and knee processing for expanding the dynamic range is performed.

The analog image signal is converted into a digital image signal by the A / D converter 40, and then subjected to luminance processing and color processing in the signal processing circuit 50 to obtain a digital video signal (for example, a luminance signal (Y)). Color difference signal (Cr, Cb))
And is output to the memory controller 61.

The signal processing circuit 50 can also output the exposure information, the focus signal, and the white balance information of the image sensor signal to the main microcomputer 71 as needed.

The memory controller 61 accumulates the digital image data input from the signal processing circuit 50 in the frame memory 62 and, conversely, outputs the image data in the frame memory 62 to the signal processing circuit 50.

The frame memory 62 is an image memory capable of accumulating image data of at least one screen. For example, VRAM, SRAM, DRAM or the like is generally used. Here, a VRAM that can operate independently of the CPU bus is used. is doing.

The memory card 64 is a frame memory 62.
The image stored in the image is subjected to image compression processing and the like and recorded.
As the memory card 64, an SRAM card, a DRAM
A card, an EEPROM card or the like can be used, and a modem card or an ISDN card can be used to directly transfer image data to a storage medium at a remote place via a public line.

The main microcomputer 71 mainly controls the sequence of photographing, recording and reproducing, and further performs compression and reproduction of a photographed image and serial port transmission with an external device as required. Here, as the image compression, the JPEG method standardized by CCITT and ISO or the JBIG method is used.

The sub-microcomputer 72 controls man-machine interfaces such as operation switches of the camera body and a liquid crystal display, and transmits information to the main microcomputer 71 as needed. Here, a serial input / output terminal is used for transmitting information with the main microcomputer 71. It also has a built-in clock function and controls the auto date.

The serial port driver 73 performs signal conversion for information transmission between the camera body and external equipment. As a serial transmission means, RS232C
There is a recommended standard for serial communication such as RS422A, but RS232C is used here.

The liquid crystal display section 74 is a display means which is connected to the sub-microcomputer 72 and displays various information such as photographing information.

The operation section 75 is an operation means provided with various mode setting switches and release switches, and is connected to the sub-microcomputer 72. The serial port 76 is an external port connected to the serial port driver 73, and is connected (inserted / removed) with various external devices that perform serial communication.
To be done.

In the configuration shown in FIG. 1, the case where the main microcomputer 71 compresses and decompresses an image is shown, but a dedicated circuit for compression / decompression may be arranged on the CPU bus.

The power supply unit 90 has a voltage of 5V required for the main microcomputer 71, which is each circuit of the digital still camera shown in FIG. 1, the signal processing circuit 50, the image pickup device 13, and the like.
This is a so-called DC / DC converter that generates 3.3V, 15V, -9V, etc. from the VBR of the power supply 100. That is, it is connected to the power supply 100 and supplies power to circuits other than the flash circuit 80.

Next, the configuration and function of the strobe circuit 80 will be described with reference to FIGS. 2, 3 and 4. Figure 2
Is a circuit diagram showing a lighting unit and a charging unit in the strobe circuit 80, FIG. 3 is a circuit diagram showing a charging control unit in the strobe circuit 80, and FIG. 4 is a diagram showing changes in the charging current when the current limits are different. There is.

The strobe circuit 80 is adapted to obtain the light emission timing by the XTRG signal sent from the main microcomputer 71 for controlling the photographing sequence, and as shown in FIG. 2, a booster corresponding to the charging means in the claims. It comprises a charging circuit A, a full charge detection circuit B, a trigger circuit C having a lighting means, and a charge control circuit D. Here, the configuration of each part will be described.

The step-up charging circuit A charges the main capacitor C5 to about 300 V, and as shown in FIG. 2, the oscillation transistor Q2, the oscillation transformer T1, and the capacitor C1.
A noise absorbing capacitor C3, a resistor R6, a rectifying diode D1, transistors Q1 and Q3, resistors R1 to R6, a resistor R10 and a diode D5.

As shown in FIG. 2, the base of the oscillation transistor Q2 is connected to the power source 100 via the resistor R4, the collector-emitter of the transistor Q3 and the resistor R10.

The full charge detection circuit B includes a main capacitor C5.
Is a circuit for detecting whether or not is in a fully charged state of about 300 V, and as shown in FIG. 2, resistors R7 to R9, a transistor Q4, a zener diode ZD1 and a capacitor C4.
And a backflow prevention diode D2.

A series circuit of a resistor R9, a Zener diode ZD1 and a capacitor C4 is connected in parallel with the main capacitor C5. Zener diode ZD1 and capacitor C
The emitter of the transistor Q4 is connected to the connection point with the transistor 4. The base resistance R8 of the transistor Q4 is connected to the capacitor C4. The collector of the transistor Q4 is connected to the FULL terminal. The FULL terminal is connected to the input terminal of the sub-microcomputer 72. The emitter of transistor Q4 is connected to the base of transistor Q3.

As shown in FIG. 2, the trigger circuit C applies a trigger to the base of the xenon lamp Xe, the diode D3 and the trigger transistor Q7 which are connected in parallel with the main capacitor C5, and the xenon lamp Xe which is the light emitting means. And trigger transistor Q7
A switching circuit including resistors R11 to R17 for switching the transistors, transistors Q5 and Q6, and a zener diode ZD2, trigger capacitors C6 and C7, a trigger transformer T2, and resistors R18 to R20. In addition,
The xenon lamp Xe corresponds to the illuminating means in the claims.

FIG. 3 shows the charge control circuit D. The charge control circuit D includes transistors Q11 to Q1 as illustrated.
5, variable resistor VR, and resistors R21 to R26. Then, the output voltage VBR is controlled according to the input states of the CHG-1 signal and the CHG-2 signal, which are charge signals from the sub-microcomputer 72. The input / output relationship is as shown in Table 1. By thus limiting the voltage, the output current for strobe charging is limited. VB is the rated output voltage of the main power supply. I _out is the limit value of the charging current at the terminal V _out shown in FIG. 3 (this terminal is connected to VB1 in FIG. 3), that is, the maximum current.

[0041]

[Table 1]

VBR can be changed by adjusting the varistor VR, and in the present invention, VBR is set smaller than VB. This VB, setting the VBR, the limited current, i.e., the maximum current of the charging current, respectively, I _B, I
Limited to _BR .

FIG. 4 is a graph showing the relationship between the CHG-1 signal and the CHG-2 signal and the charging current. FIG. 4A shows the CHG-1 signal and the charging current when the CHG-2 signal is L. It is the graph shown, and the charging period is short because the charging current is a large current, but if the voltage drop is large, if it is performed during signal processing, the system of the entire camera will go down. FIG. 4B is a graph showing the relationship between the CHG-2 signal and the charging current when the CHG-1 signal is L. Since the charging current is small, even if it is performed during system operation such as signal processing. The above problems do not occur.

FIG. 5 is a time chart showing the operation of the block diagram shown in FIG.

FIG. 5A shows the operation timing of the power source, and FIG. 5B shows the state of the CHG-1 signal.
CHG-1 is H in the periods t _{2 to} t ₃ and the periods t _{11 to} t ₁₂ . FIG. 5 (c) are those showing a state of CHG-2, CHG-2 in period t ₇ ~t ₁₀ is H. Figure 5
(D) shows the state of the Full signal, and Fu
The ll signal detects the fully charged state of the main capacitor C5. FIG. 5E shows the operation state of S1, and the trailing edge of S1 gives the start timing of the preparation for photographing (see FIG. 5G). FIG. 5 (f) shows the operation state of S2, and the trailing edge of S2 gives the start timing of image capture (see FIG. 5 (h)). Figure 5
(G) shows the photographing preparation period t ₄ ~t _5. The main microcomputer 71 will be AE, AF processing performed in the period t ₄ ~t _5. FIG. 5 (h) shows the image capturing period, and the main microcomputer 71 is the image capturing period started by S2, and the image capturing period is one field corresponding to the period of the vertical synchronizing signal from time t _7. Is. Figure 5 (h) compression / recording timing t ₈ ~t
_It shows ₁₀ . The period t ₈ to t ₁₀ corresponds to the processing period of the frame memory 62 by the memory controller 61 and is, for example, 5 to 6 msec.

Next, a series of operations from photographing to memory recording will be outlined in time series with reference to FIG.

When the power is turned on at time t ₁ (see FIG. 5A), the sub-microcomputer 72 starts CH _{2 at} time t _2.
The G-1 signal is set to H (see FIG. 5B). As a result, the boosting charging circuit A shown in FIG. 2 operates to start charging the main capacitor C5. Specifically, the conduction current of the Zener diode ZD1 charges the capacitor C4 until the charging voltage of the main capacitor C5 reaches a level sufficient for light emission.
As a result, the collector current of the transistor Q4 flows due to the conduction of the base current of the transistor Q4. Full from the full charge detection circuit B when the level enough to emit light is reached
The signal changes from H to L (see FIG. 5D).

The sub-microcomputer 72 operates at time t ₃ (see FIG.
(See (d)) After that, after detecting that the main capacitor C5 is sufficiently charged from the state of the FULL signal from the full charge detection circuit B shown in FIG. 2, the key input of the operation unit 75 is ready to be accepted. Become.

Operation unit 75 connected to the sub-microcomputer 72
The release switch of the time t _{4 as} shown in FIG.
When the button is pressed halfway (S1 is turned on), the sub-microcomputer 72 transmits the information to the main microcomputer 71.

When the main microcomputer 71 finds out that the S1 signal has become active, it enters a shooting preparation state at time t _{4 as} shown in FIG. 5 (g). As a result, the CCD image data is subjected to basic signal processing by the signal processing circuit 50, and then focus information is created from the high frequency component of the brightness data and exposure data is created from the low frequency component. The main microcomputer 71 reads these data from the signal processing circuit 50, drives the diaphragm and the focus as necessary, and further controls the gain of the pre-process AGC amplifier to converge until proper exposure and focus are obtained. . This shooting preparation state ends at time t _{5 as} shown in FIG.

When the release switch of the operation unit 75 is fully pressed (S2 on) at time t _{6 as} shown in FIG. 5F, the sub-microcomputer 72 sends the information to the main microcomputer 71. Tell. Main microcomputer 71
Is the signal processing circuit 5 at time t _{7 as} shown in FIG.
Issue an image input command to 0. As a result, the signal processing circuit 50 includes the image pickup device 13, the preprocessing circuit 30, and the A /
The D converter 40 is operated to receive the CCD image. Further, the main microcomputer 71 outputs a fetch command to the memory controller 61. When the memory controller 61 receives the image capture command, it detects a synchronization signal from the signal processing circuit 50 and at a predetermined timing, the signal processing circuit 50.
The image data in the Y-Cr-Cb format or the like output from is captured in the frame memory 62. When the image acquisition to the frame memory 62 is completed, the memory controller 61
Displays the status indicating that the import is complete. By reading this status by the main microcomputer 71, it is recognized that the main microcomputer 71 has finished photographing.

If necessary, an XTRG signal is output to the strobe circuit 80 at the field timing of the captured image. Such timing will be described later with reference to FIG.

As shown in FIG. 5 (h), the main microcomputer 71 performs image compression of the picked-up data from time t ₈ after the end of shooting, and then the card controller 63, the externally connected memory card 64, or the serial card. Port 76
Image data to a personal computer connected to. The compression / recording process ends at time t _{10 as} shown in FIG.

FIG. 6 is a timing chart showing the charging timing of the strobe circuit. Such a timing chart shows the state of charge from the signal processing period to the compression / recording processing period from the end of shooting.

FIG. 6A shows a vertical synchronizing signal, and one cycle of the vertical synchronizing signal corresponds to one field period.

FIG. 6 (b) shows the exposure period.

FIG. 6C shows the timing of the light emission trigger signal XTRG.
Is applied to the trigger circuit C of the strobe circuit 80 from the main microcomputer 71 as described above. Figure 6 (d) shows CH
G-2 shows the same signal as in FIG. 5 (c). FIG. 6 (e) is the same as FIG. 5 (g), and is the period during which the signal processing and image capturing are performed as described above. Figure 6
Since (f) is the same as FIG. 5 (h), its description is omitted.

Fu sent from the full charge detection circuit B
After the change of the ll signal from H to L, the release signal S2 becomes L (active) when the release button is fully pressed at the time t _{6 to} start photographing as shown in FIG. 5 (e). This release signal S2 (see FIG. 5 (e)) and FIG.
Since the time relationship with the vertical synchronizing signal shown in (a) is random, both are fetched into the main microcomputer 71, and the time T ₂
A positive pulse is output to the transistor Q5 from an appropriate time during the next one field period starting from (see FIG. 6A). As a result, the transistor Q5, the transistor Q6, and the trigger transistor Q7 are sequentially turned on. Then, the xenon lamp Xe emits light to illuminate the subject. 1
The discharge time is about 1 msec, while the field is 16 msec.

When the shooting is completed in one field starting from T ₂ , CHG- at time t ₇ as shown in FIG. 6D.
The 2 signal becomes H and the CHG-1 signal becomes L, and the charging control circuit starts charging the main capacitor C5 of the strobe circuit with the charging current limited by the charging voltage VBR lower than the voltage VB. At the same time, from time t ₇ , signal processing such as image capturing and compression recording is started, but since the charging voltage VBR is set low, there is no adverse effect that the camera system goes down, and both can be performed at the same time. It will be possible.

When the signal processing is completed, CHG-
The 1 signal becomes H and the CHG-2 signal becomes L, and the charging control circuit starts charging the main capacitor C5 of the strobe circuit with the charging current based on the charging voltage VB that is larger than VBR that fully utilizes the power supply voltage. The -1 signal goes to L, ending the charging. When the charging ends only during the signal processing, the CHG-1 signal remains L and the charging with the charging voltage VB is not performed.

The change in current consumption from the photographing to the recording as described above will be described with reference to FIG.

FIG. 7 is a graph showing an example of current consumption of the digital still camera of this embodiment with time.

In the graph, the vertical axis represents current consumption (A) and the horizontal axis represents time.

The sub-microcomputer 72, which has received the information on the flash emission, causes the sub-microcomputer 72 to set the CHG-1 signal to L,
The CHG-2 signal is set to H, and the main capacitor C5 is charged with a small current as shown in FIG. Also, from time t ₂
As described above, t ₃ and times t _{11 to} t ₁₂ are the charging period in which the CHG-1 signal is H and the CHG-1 signal is L, and the main capacitor C5 is charged with the large current shown in FIG. It is equivalent. In this example, the small current for strobe charging is limited to 100mA and the current during compression / recording is 400mA.
In A, it is about 600 mA in total.

While the sub-microcomputer 72 is operating, the main microcomputer 71 and the sub-microcomputer 72 are operated as described above.
And serial communication is performed, and the sub-microcomputer 72 can know whether or not strobe light is emitted. The charging period can be shortened by starting the charging operation with a small current immediately after the light emission as in the digital still camera according to the present embodiment.

As described above, according to the present invention, it is not necessary to wait without strobe charging during signal processing, and the strobe circuit can be charged at the same time as signal processing, thus shortening the charging period, The next shooting can be performed promptly.

When the illumination means of the present invention is an illumination means (auto strobe) capable of controlling the light emission time according to the exposure amount, it can be predicted in advance that the light emission amount of the strobe is relatively small, especially during macro photography. By performing control such as setting the limiting current to a low value by the charge control means during simultaneous charging, the influence on the signal processing can be further suppressed and the time can be shortened.

[0068]

As described above, according to the present invention, in the digital still camera having only a single power source for charging the illumination means and the signal processing, the supply voltage for setting the voltage at the time of charging to be lower. By providing the control means, even if signal processing is performed at the same time, there is no adverse effect such as system down of the camera. Therefore, it is possible to charge the illumination means and perform signal processing at the same time, and it is possible to shorten the time until the next shooting.

[Brief description of drawings]

FIG. 1 is a block diagram showing a schematic configuration of a digital still camera according to the present embodiment.

FIG. 2 is a circuit diagram showing a part of a strobe circuit according to the present embodiment.

FIG. 3 is a circuit diagram showing a charge control circuit in the flash circuit according to the present embodiment.

FIG. 4 is a graph showing a charging current according to a CHG-1 signal and a CHG-2 signal.

5 is a time chart showing the operation of the block diagram shown in FIG. 1. FIG.

FIG. 6 is a timing chart showing a charging timing of a strobe circuit.

FIG. 7 is a graph showing current consumption of the digital still camera according to the present embodiment.

[Explanation of symbols]

13 Image sensor 30 Pre-process circuit 40 A / D converter 50 signal processing circuit 61 Memory controller 64 memory card 71 Main microcomputer 72 Sub-microcomputer 90 Power supply unit 100 power supply A boost charging circuit D charge control circuit C5 main capacitor Xe xenon lamp

─────────────────────────────────────────────────── ─── Continuation of front page (51) Int.Cl. ⁷ Identification code FI H04N 5/781 H04N 5/781 510M // H04N 101: 00

Claims (3)

(57) [Claims] 1. A illuminating means for illuminating an object, comprising a capacitor, a charging means for charging the capacitor, a signal processing means for performing processing for recording an image signal from the image sensor, and the signal processing. In a digital still camera having a recording means for recording an image signal obtained from the means on a recording medium, and a power supply for operating the charging means and the signal processing means, the charging means limits charging current to charge control. Means for charging the capacitor with a predetermined limiting current during signal processing, and charging the capacitor with a limiting current larger than the predetermined limiting current except during signal processing. Characteristic digital still camera. 2. The digital still camera according to claim 1, wherein the signal processing is processing on an electric signal obtained from an image of a subject illuminated by the illumination means. 3. The signal processing means includes a preprocessing circuit and A
The digital still camera according to claim 1, further comprising an A / D conversion unit and a signal processing circuit.