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JP3494048B2 - Mounting structure and mounting method of electronic component with bump - Google Patents
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JP3494048B2 - Mounting structure and mounting method of electronic component with bump - Google Patents

Mounting structure and mounting method of electronic component with bump

Info

Publication number
JP3494048B2
JP3494048B2 JP35753198A JP35753198A JP3494048B2 JP 3494048 B2 JP3494048 B2 JP 3494048B2 JP 35753198 A JP35753198 A JP 35753198A JP 35753198 A JP35753198 A JP 35753198A JP 3494048 B2 JP3494048 B2 JP 3494048B2
Authority
JP
Japan
Prior art keywords
electronic component
mounting
electrode
bumps
gold bump
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP35753198A
Other languages
Japanese (ja)
Other versions
JP2000183107A (en
Inventor
秀喜 永福
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Corp
Panasonic Holdings Corp
Original Assignee
Panasonic Corp
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Panasonic Corp, Matsushita Electric Industrial Co Ltd filed Critical Panasonic Corp
Priority to JP35753198A priority Critical patent/JP3494048B2/en
Publication of JP2000183107A publication Critical patent/JP2000183107A/en
Application granted granted Critical
Publication of JP3494048B2 publication Critical patent/JP3494048B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/071Connecting or disconnecting
    • H10W72/073Connecting or disconnecting of die-attach connectors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00Encapsulations, e.g. protective coatings
    • H10W74/10Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/15Encapsulations, e.g. protective coatings characterised by their shape or disposition on active surfaces of flip-chip devices, e.g. underfills
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/724Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/734Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked insulating package substrate, interposer or RDL

Landscapes

  • Wire Bonding (AREA)

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【発明の属する技術分野】本発明は、金バンプが形成さ
れた電子部品を基板に実装して成るバンプ付電子部品の
実装構造および実装方法に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a mounting structure and a mounting method for a bumped electronic component formed by mounting an electronic component having a gold bump on a substrate.

【0002】[0002]

【従来の技術】フリップチップなどのバンプ付電子部品
の実装方法として、接着剤を用いてバンプ付電子部品を
基板に接合する方法が知られている。この方法は基板上
の実装位置に予めエポキシ樹脂などの接着剤を供給して
おき、圧着ツールによってバンプ付電子部品のバンプを
基板に形成された電極面に押圧しながら加熱することに
より、接着剤を硬化させるものである。これにより電子
部品は基板に固着され、実装後にもバンプが電極面に押
圧された状態が保たれバンプと電極との導通が確保され
る。
2. Description of the Related Art As a mounting method of bumped electronic components such as flip chips, a method of bonding the bumped electronic components to a substrate using an adhesive is known. In this method, an adhesive such as an epoxy resin is supplied to the mounting position on the substrate in advance, and the adhesive is applied by heating the bumps of the electronic component with bumps against the electrode surface formed on the substrate with a pressure bonding tool. Is to be cured. As a result, the electronic component is fixed to the substrate, and the state in which the bump is pressed against the electrode surface is maintained even after mounting, so that electrical continuity between the bump and the electrode is secured.

【0003】[0003]

【発明が解決しようとする課題】ところで、実装後の電
子部品の用途によっては、使用環境の雰囲気温度が繰り
返し変化するヒートサイクル下に置かれる場合がある。
このような使用環境でバンプ付電子部品が実装された基
板を用いる場合には、基板と電子部品の熱膨張率の違い
により、接合部には繰り返し熱応力が作用する。このた
め特にバンプの基部、すなわち電子部品とバンプとのの
接合部などに破断を生じる場合があり、実装後の信頼性
が確保されないという問題点があった。
By the way, depending on the application of the electronic component after mounting, it may be placed under a heat cycle in which the ambient temperature of the operating environment repeatedly changes.
When a substrate on which electronic components with bumps are mounted is used in such a use environment, thermal stress repeatedly acts on the joint portion due to the difference in the coefficient of thermal expansion between the substrate and the electronic components. Therefore, there is a problem in that the base of the bump, that is, the joint between the electronic component and the bump may be broken, and the reliability after mounting cannot be ensured.

【0004】そこで本発明は、実装後の信頼性を向上さ
せることができるバンプ付電子部品の実装構造および実
装方法を提供することを目的とする。
Therefore, an object of the present invention is to provide a mounting structure and a mounting method for a bumped electronic component which can improve reliability after mounting.

【0005】[0005]

【課題を解決するための手段】請求項1記載のバンプ付
電子部品の実装構造は、金バンプが形成された電子部品
を表面に金膜が形成された電極を実装部に有する基板に
接着剤により接合して前記金バンプを前記電極に導通さ
せて成るバンプ付電子部品の実装構造であって、前記接
着剤中に含有されたシリカより成るフィラー粒子が前記
金バンプの表面に埋入した状態で前記金バンプと電極と
の当接面に介在している。
According to a first aspect of the present invention, there is provided a mounting structure for an electronic component with bumps, wherein an electronic component having a gold bump is attached to a substrate having an electrode having a gold film formed on a surface thereof in a mounting portion. In the mounting structure of an electronic component with bumps, which is joined by means of conducting the gold bump to the electrode, a state in which filler particles made of silica contained in the adhesive are embedded in the surface of the gold bump. At the contact surface between the gold bump and the electrode.

【0006】 請求項2記載のバンプ付電子部品の実装
方法は、金バンプが形成された電子部品を表面に金膜が
形成された電極を実装部に有する基板に接着剤により接
合して前記金バンプを電極に導通させるバンプ付電子部
品の実装方法であって、シリカより成るフィラー粒子を
含有した接着剤を前記基板の実装部に供給する工程と、
前記金バンプを前記電極に位置合わせして基板に前記バ
ンプ付電子部品を搭載する工程と、このバンプ付電子部
品を基板に対して押圧することにより前記金バンプと電
極の当接面に介在するフィラー粒子を金バンプの表面に
埋入させる工程と、前記接着剤を硬化させる工程とを含
む。
According to a second aspect of the present invention, there is provided a method of mounting an electronic component with bumps, wherein the electronic component having gold bumps is bonded to a substrate having an electrode having a gold film formed on a surface thereof in a mounting portion by an adhesive agent. A method for mounting an electronic component with bumps for conducting a bump to an electrode, comprising a step of supplying an adhesive containing filler particles made of silica to a mounting portion of the substrate,
A step of mounting the electronic component with bumps on a substrate by aligning the gold bumps with the electrodes, and pressing the electronic component with bumps against the substrate to interpose the contact surface between the gold bumps and the electrodes. The method includes the steps of embedding filler particles in the surfaces of the gold bumps and curing the adhesive.

【0007】 本発明によれば、金バンプと電極との当
接面に摺動性の良いシリカより成るフィラー粒子を金バ
ンプ表面にフィラー粒子が埋入した状態で介在させるこ
とにより、金バンプと電極との相対的な変位を容易にし
てヒートサイクルによる応力を緩和させることができ
る。
According to the present invention, the filler particles made of silica having good slidability are intervened in the contact surface between the gold bump and the electrode in a state where the filler particles are embedded in the surface of the gold bump, thereby forming the gold bump. The relative displacement with the electrode can be facilitated to alleviate the stress due to the heat cycle.

【0008】[0008]

【発明の実施の形態】次に本発明の実施の形態を図面を
参照して説明する。図1(a),(b),(c),
(d)は本発明の一実施の形態の電子部品の実装方法の
工程説明図、図2は同電子部品の実装構造の部分拡大図
である。
DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, embodiments of the present invention will be described with reference to the drawings. 1 (a), (b), (c),
(D) is a process explanatory view of a mounting method of an electronic component of an embodiment of the present invention, and FIG. 2 is a partially enlarged view of a mounting structure of the electronic component.

【0009】 図1(a)において、基板1の実装部1
aの上面には電極2が形成されている。電極2の表面に
は薄い金膜2aがメッキなどの方法により形成されてい
る。実装部1aには図1(b)に示すようにエポキシ樹
脂など熱硬化性の樹脂より成る接着剤4が電極2を覆う
ように供給される。接着剤4中には、シリカの微小な粒
子より成るフィラー粒子3が含有されている。フィラー
粒子3は径が0.1〜5μm程度の粒子であり、接着剤
4中の含有率は最大50wt%となっている。
In FIG. 1A, the mounting portion 1 of the substrate 1
An electrode 2 is formed on the upper surface of a. A thin gold film 2a is formed on the surface of the electrode 2 by a method such as plating. As shown in FIG. 1B, an adhesive 4 made of a thermosetting resin such as an epoxy resin is supplied to the mounting portion 1 a so as to cover the electrodes 2. During the adhesive 4, it is contained filler particles 3 made of fine particles of silica mosquitoes. The filler particles 3 are particles having a diameter of about 0.1 to 5 μm, and the content ratio in the adhesive 4 is 50 wt% at maximum.

【0010】次に図1(c)に示すように、バンプ付の
電子部品5を圧着ツール7により保持して基板1の実装
部1aに搭載する。電子部品5には金バンプ6が形成さ
れており、搭載に際しては金バンプ6を電極2に位置合
わせして圧着ツール7により基板1に対して押圧する。
これにより、電極2の表面と金バンプ6の間に挟み込ま
れたフィラー粒子3は軟かい金バンプ6の表面に埋入
し、この状態で金バンプ6の下面は電極2の表面に当接
する。
Next, as shown in FIG. 1C, the electronic component 5 with bumps is held by the crimping tool 7 and mounted on the mounting portion 1a of the substrate 1. Gold bumps 6 are formed on the electronic component 5, and when mounted, the gold bumps 6 are aligned with the electrodes 2 and pressed against the substrate 1 by the pressure bonding tool 7.
As a result, the filler particles 3 sandwiched between the surface of the electrode 2 and the gold bump 6 are embedded in the surface of the soft gold bump 6, and the lower surface of the gold bump 6 contacts the surface of the electrode 2 in this state.

【0011】次いで図1(d)に示すように圧着ツール
7による押圧を保持した状態で、圧着ツール7に設けら
れた加熱手段により電子部品5を加熱する。これにより
接着剤4は熱硬化し、電子部品5は基板1に固着され
る。これにより、金バンプ6は電極2の表面に押圧され
たままの状態が保持され、実装後の金バンプ6と電極2
との電気的導通が確保される。
Then, as shown in FIG. 1D, the electronic component 5 is heated by the heating means provided in the pressure bonding tool 7 while the pressure applied by the pressure bonding tool 7 is maintained. As a result, the adhesive 4 is thermoset, and the electronic component 5 is fixed to the substrate 1. As a result, the gold bumps 6 are kept pressed against the surfaces of the electrodes 2, and the gold bumps 6 and the electrodes 2 after mounting are mounted.
Electrical continuity with is secured.

【0012】 このようにして形成された実装構造の、
金バンプ6と電極2との当接面について図2を参照して
説明する。図2に示すように当接面には、フィラー粒子
3が金バンプ6の表面に埋入した状態で存在する。フィ
ラー粒子3は接着剤4中に最大で50wt%にも達する
高い含有率で含まれているため、金バンプ6と電極2の
当接面には多数のフィラー粒子3が存在する。これらの
フィラー粒子3はシリカであって、滑りやすい材質
球状の微細粒子であるため電極2の表面に対する摺動性
に優れ、フィラー粒子3が存在しない状態と比較して、
金バンプ6の電極2に対する水平方向の変位が容易にな
っている。
In the mounting structure thus formed,
The contact surface between the gold bump 6 and the electrode 2 will be described with reference to FIG. As shown in FIG. 2, on the contact surface, the filler particles 3 are embedded in the surface of the gold bump 6. Since the filler particles 3 are contained in the adhesive 4 at a high content rate of up to 50 wt%, a large number of filler particles 3 are present on the contact surface between the gold bumps 6 and the electrodes 2. Since these filler particles 3 are silica and are fine spherical particles made of a slippery material , they are excellent in slidability with respect to the surface of the electrode 2, and compared with the state in which the filler particles 3 are not present,
The horizontal displacement of the gold bump 6 with respect to the electrode 2 is facilitated.

【0013】このため、基板1が製品として使用される
際に、ヒートサイクル環境下に置かれた場合において
も、基板1と電子部品5との熱膨張率の差に起因する熱
応力は、金バンプ6が電極2に対して相対的に変位する
ことによって大幅に緩和される。したがって、金バンプ
6と電子部品5との接合部に発生する破断など、熱応力
に起因する不具合が低減され、電子部品5の実装後の信
頼性を向上させることができる。
Therefore, when the substrate 1 is used as a product, even if it is placed in a heat cycle environment, the thermal stress due to the difference in the coefficient of thermal expansion between the substrate 1 and the electronic component 5 is The bumps 6 are relatively displaced with respect to the electrodes 2, so that the bumps 6 are significantly relaxed. Therefore, defects caused by thermal stress, such as breakage occurring at the joint between the gold bump 6 and the electronic component 5, are reduced, and the reliability of the electronic component 5 after mounting can be improved.

【0014】[0014]

【発明の効果】本発明によれば、シリカより成るフィラ
ー粒子を金バンプと電極との当接面に金バンプ表面にフ
ィラー粒子が埋入した状態で介在させるようにしたの
で、金バンプの電極に対しての相対的な変位が容易とな
り、ヒートサイクルによる熱応力を緩和して、電子部品
の実装後の信頼性を向上させることができる。
According to the present invention, the filler particles made of silica are interposed between the contact surfaces of the gold bumps and the electrodes with the filler particles embedded in the gold bump surfaces. , relative displacement with respect to the gold bump electrodes is facilitated, and relax the thermal stress due to heat cycle can and Turkey improve the reliability after mounting of electronic components.

【図面の簡単な説明】[Brief description of drawings]

【図1】(a)本発明の一実施の形態の電子部品の実装
方法の工程説明図 (b)本発明の一実施の形態の電子部品の実装方法の工
程説明図 (c)本発明の一実施の形態の電子部品の実装方法の工
程説明図 (d)本発明の一実施の形態の電子部品の実装方法の工
程説明図
FIG. 1A is a process explanatory diagram of an electronic component mounting method according to an embodiment of the present invention. FIG. 1B is a process explanatory diagram of an electronic component mounting method according to an embodiment of the present invention. Process explanatory drawing of the mounting method of the electronic component of one Embodiment (d) Process explanatory drawing of the mounting method of the electronic component of one embodiment of this invention

【図2】本発明の一実施の形態の電子部品の実装構造の
部分拡大図
FIG. 2 is a partially enlarged view of the electronic component mounting structure according to the embodiment of the present invention.

【符号の説明】[Explanation of symbols]

1 基板 2 電極 3 フィラー粒子 4 接着剤 5 電子部品 6 金バンプ 1 substrate 2 electrodes 3 Filler particles 4 adhesive 5 electronic components 6 gold bumps

Claims (2)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】金バンプが形成された電子部品を表面に金
膜が形成された電極を実装部に有する基板に接着剤によ
り接合して前記金バンプを前記電極に導通させて成るバ
ンプ付電子部品の実装構造であって、前記接着剤中に含
有されたシリカより成るフィラー粒子が前記金バンプの
表面に埋入した状態で前記金バンプと電極との当接面に
介在していることを特徴とするバンプ付電子部品の実装
構造。
1. An electronic device with bumps, wherein an electronic component having a gold bump formed thereon is bonded to a substrate having an electrode having a gold film formed on its surface in a mounting portion by an adhesive so that the gold bump is electrically connected to the electrode. A mounting structure of a component, wherein filler particles made of silica contained in the adhesive are present on the contact surface between the gold bump and the electrode in a state of being embedded in the surface of the gold bump. A characteristic mounting structure for electronic components with bumps.
【請求項2】金バンプが形成された電子部品を表面に金
膜が形成された電極を実装部に有する基板に接着剤によ
り接合して前記金バンプを電極に導通させるバンプ付電
子部品の実装方法であって、シリカより成るフィラー粒
子を含有した接着剤を前記基板の実装部に供給する工程
と、前記金バンプを前記電極に位置合わせして基板に前
記バンプ付電子部品を搭載する工程と、このバンプ付電
子部品を基板に対して押圧することにより前記金バンプ
と電極の当接面に介在するフィラー粒子を金バンプの表
面に埋入させる工程と、前記接着剤を硬化させる工程と
を含むことを特徴とするバンプ付電子部品の実装方法。
2. Mounting of an electronic component with bumps, wherein an electronic component having a gold bump formed thereon is bonded to a substrate having an electrode having a gold film formed on its surface in a mounting portion with an adhesive to electrically connect the gold bump to the electrode. A method of supplying an adhesive containing filler particles made of silica to a mounting portion of the substrate, and aligning the gold bump with the electrode to mount the electronic component with bumps on the substrate. A step of embedding the filler particles intervening in the contact surface between the gold bump and the electrode by pressing the electronic component with bumps on the surface of the gold bump, and a step of curing the adhesive. A method of mounting a bumped electronic component, comprising:
JP35753198A 1998-12-16 1998-12-16 Mounting structure and mounting method of electronic component with bump Expired - Lifetime JP3494048B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP35753198A JP3494048B2 (en) 1998-12-16 1998-12-16 Mounting structure and mounting method of electronic component with bump

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP35753198A JP3494048B2 (en) 1998-12-16 1998-12-16 Mounting structure and mounting method of electronic component with bump

Publications (2)

Publication Number Publication Date
JP2000183107A JP2000183107A (en) 2000-06-30
JP3494048B2 true JP3494048B2 (en) 2004-02-03

Family

ID=18454612

Family Applications (1)

Application Number Title Priority Date Filing Date
JP35753198A Expired - Lifetime JP3494048B2 (en) 1998-12-16 1998-12-16 Mounting structure and mounting method of electronic component with bump

Country Status (1)

Country Link
JP (1) JP3494048B2 (en)

Also Published As

Publication number Publication date
JP2000183107A (en) 2000-06-30

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