JP3522683B2 - Codec interface unit and codec interface method identification method - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a codec for a digital transmission system, and more particularly, to a codec interface relating to communication being carried out, which is provided in a wireless device for digital image transmission for portable wireless relay or fixed wireless relay. The present invention relates to a codec interface section and a codec interface method identification method capable of identifying a method and automatically setting the interface method.

[0002]

2. Description of the Related Art FIG. 3 is a schematic diagram showing the configuration of a conventional analog image transmission device. In the figure, 101 is an audio modulator that performs FM modulation related to the input audio signal AUDIO_IN, 102 is FM modulation related to the input video signal VIDEO_IN, and an IF signal of an intermediate frequency generated by superimposing each signal is generated. , A baseband modulator that outputs to a high-frequency processing unit for conversion into an RF frequency signal.

Next, the operation will be described. After the DC voltage for driving the high frequency part is applied, the audio signal FM-modulated by the audio modulator 101 and the video signal FM-modulated by the baseband modulator 102 are superimposed in the baseband modulator 102 to form an intermediate signal. IF of frequency
A signal is generated. Then, the baseband modulator 102
Outputs the generated IF signal to the high frequency unit in order to convert the signal output into a signal of RF frequency for transmission.

[0004]

The conventional image transmission apparatus is intended for analog data as described above. However, in the field of material transmission related to wireless transmission of image data including digitization of television broadcasting, It is clear that the digital system will be used to improve the image quality.
Therefore, development of a codec having an interface function suitable for a digital image transmission device is desired. Further, the codec interface method related to the digital wireless transmission system is mainly an ARIB method which is a domestic standard and a DVB (Digital Video Broadband) which is an international standard.
The casting) -SPI method and the DVB-ASI method are defined, and there is a problem in that the user has to set the codec interface method related to the communication being performed each time.

The present invention has been made to solve the above problems, and automatically identifies the codec interface method used for the coded data input in the communication in progress. The purpose is to obtain a configurable codec interface section.

Further, the present invention provides a codec interface method identification method capable of identifying the codec interface method used in the communication being carried out for the coded data input to the codec interface section of the digital radio transmission system. The purpose is to

[0007]

A codec interface section according to the present invention compares a signal level of a data signal input from a serial data input section with a predetermined input threshold level and outputs a signal according to a comparison result. Serial data signal detecting means, and clock signal detecting means for comparing the signal level of the clock signal input from the clock signal input section according to the ARIB method with a predetermined input threshold level and outputting a signal according to the comparison result. A sync byte detecting means for detecting the sync byte from the data signal input from the serial data input unit to determine the presence or absence of the sync byte;
Based on the detection result by the serial data signal detection means, the detection result by the clock signal detection means, and the detection result by the synchronization byte detection means, the codec interface method relating to the communication being performed is the ARIB method, the DVB-SPI.
And a DVB-ASI method.

A codec interface method identification method according to the present invention is a first method for comparing a signal level of a data signal input from a serial data input section provided in a codec interface section with a predetermined input threshold level.
And in the first step, when the signal level of the data signal is higher than a predetermined input threshold level, the data signal is input from the clock signal input section according to the ARIB system provided in the interface section of the codec. A second step of comparing the signal level of the clock signal with a predetermined input threshold level; and a serial data operation performed when the signal level of the clock signal is less than the predetermined input threshold level in the second step. The third step is to detect the sync byte from the data signal input from the input section and determine the presence or absence of the sync byte.

[0009]

BEST MODE FOR CARRYING OUT THE INVENTION An embodiment of the present invention will be described below. Embodiment 1. 1 is a circuit diagram showing a configuration of an automatic switching circuit of a codec interface section according to Embodiment 1 of the present invention. In FIG. 1, reference numeral 1 denotes a parallel data input unit which is provided as an LVDS parallel interface and which inputs signal data based on the DVB-SPI system,
2 is a driver buffer for performing LVDS conversion for changing the voltage level of data input to the DVB-SPI parallel data input unit 1. 3 is LVTH conversion for changing the voltage level of input data. A driver buffer 4 for inputting data, a serial data input unit 4 which is provided as a serial interface and which inputs signal data based on the ARIB system or the DVB-ASI system, and 5 a clock signal input unit which inputs a clock signal according to the ARIB system, Reference numeral 6 is a cable equalizer (serial data signal detection means) which raises the signal level of the data signal input from the serial data input unit 4 and compares the data signal with a predetermined input threshold level and outputs a comparison result.
Is a cable equalizer (clock signal detecting means) that raises the signal level of the clock signal input from the clock signal input section 5 and compares it with a predetermined input threshold level, and outputs a comparison result, and 8 and 9 are cable equalizers, respectively. 6, 7 is a digital variable resistor for setting the input threshold level, 10 is a clock signal generator that outputs a 27 MHz reference clock signal, and 11 is a DVB-ASI method that is output from the cable equalizer 6. A differential input receiver that inputs a data signal, performs level conversion and serial / parallel conversion, and outputs parallel data and valid data that are synchronized with a reference clock signal input from the clock signal generator 10, and 12 is a communication being performed. Control unit for determining the codec interface method related to Sync byte detection means, determination means)
Reference numeral 13 is a buffer for temporarily storing signal data according to the DVB-ASI system, and reference numerals 14, 15, 16 are driver buffers for performing LVTH conversion for changing the voltage level of input data. The connector in the parallel data input unit 1 is, for example, D-sub2
5 pin is used. In addition, the serial data input unit 4
As the connector in, for example, a BNC_75Ω connector is used. Further, the control unit 12 detects the sync byte from the data signal input from the serial data input unit 4 and detects the sync byte, and determines the presence or absence of the sync byte, and a serial data signal output from the cable equalizer 6. The detection result, the cable equalizer 7
Based on the detection result related to the clock signal output from the above and the detection result output from the synchronization byte detecting means, the ARI is used as the codec interface method related to the communication being performed.
It is configured to have a function as a determination unit that determines whether the system is the B system, the DVB-SPI system, or the DVB-ASI system.

(DATA0A, DATA0B) to (DA
TA7A, DATA7B), (SPICLKA, SPI
CLKB), (PSYNCA, PSYNCB) and (DVALIDA, DVALIDB) are a data signal, a clock signal, a sync byte flag signal and a data valid signal which are input to the parallel data input unit 1 by the DVB-SPI method, respectively. SPIDATA <
7; 0> is a data signal according to the DVB-SPI system, OU
TPUTEN is an enable signal for controlling the operation of the driver buffer 3, ARIBSCLK is a clock signal according to the ARIB system, ARIB_SD is a serial data signal according to the ARIB system, and ASI_NPD <7;0> is a DVB-ASI system synchronized with the reference clock signal. Parallel data signals related to ASIPDCLK and ASI_DV
ALID is a 27 MHz reference clock signal and a data valid signal, respectively.

Next, the operation will be described. FIG. 2 is a flowchart showing a codec interface method identification method according to Embodiment 1 of the present invention. The cable equalizer 6 sets the signal level (usually several tens mv) of the data signal input from the serial data input unit 4 to 800 mv.
The signal level is amplified to a certain degree, the amplified signal level is compared with the input threshold level set by the digital variable resistor 8, and the comparison result is output to the control unit 12. The control unit 12, based on the output data related to this comparison result,
The presence / absence of a data signal input to the serial data input unit 4 is determined (step ST1).

When the signal level of the data signal input from the serial data input section 4 is lower than the input threshold level, the control section 12 considers that there is no BNC input signal, and the codec interface method relating to the communication being performed. Is the DVB-SPI system (step ST
2). At this time, the control unit 12 controls the enable signal OUTPUT.
Activate TEN. As a result, the driver buffer 3 performs LVTH conversion on the data signal input from the parallel data input unit 1, and the obtained parallel data SPIDATA <7;0> is sent to the rear circuit unit as parallel data TSDATA <7; Output as 0>.

When the signal level of the data signal input from the serial data input unit 4 is higher than the input threshold level in the determination in step ST1, the cable equalizer 7 inputs the clock signal as in the case of the cable equalizer 6. The signal level of the clock signal input from the unit 5 is compared with the input threshold level set by the digital variable resistor 9, and the comparison result is output to the control unit 12. The control unit 12 determines the presence / absence of the clock signal input to the clock signal input unit 5 based on the output data related to the comparison result (step ST3).

When the signal level of the clock signal input from the clock signal input unit 5 is higher than the input threshold level, the control unit 12 determines that the codec interface system related to the communication being performed is the ARIB system. (Step ST4). At this time, the control unit 12 inputs the serial data signal ARIB_SD according to the ARIB method and receives the clock signal ARIBSCLK according to the ARIB method.
The serial / parallel conversion is performed in synchronism with, and the parallel data signal TSDATA <7;0> is output to the rear circuit unit via the driver buffer 15.

In the determination in step ST3, if the signal level of the clock signal input from the clock signal input section 5 is lower than the input threshold level, the control section 1
2 is a parallel data signal A output from the differential input receiver 11 for identifying the codec interface method.
SI_NPD <7;0>, parallel synchronous clock signal A
SIPDCLK, data valid signal ASI_DVAL
Enter the ID. Data valid signal ASI_DVAL
ID is a parallel data signal ASI_NPD output in synchronization with the 27 MHz reference clock signal REFCLK.
Used to determine validity / invalidity of <7;0>. Then, the control unit 12 extracts valid data from the TS (transport stream) of the parallel data input in byte units, and detects the synchronization byte “01000111” from the valid data (step ST
5).

When the sync byte is detected, the control unit 12 determines that the codec interface system relating to the communication being performed is the DVB-ASI system (step S).
T6). Parallel data AS according to DVB-ASI method
I_NPD <7;0> contains Null data and is 27
Since the signal is synchronized with the reference clock signal of MHz, it is necessary to perform clock recovery. In this case, since the synchronization byte appears every 188-byte cycle (or 204-byte cycle), the control unit 12 detects the synchronization byte to detect the DVB-ASI system clock synchronized with the DVB-ASI system signal data. Plays and outputs the signal. The buffer 13 implemented as a DPRAM or the like has a function of controlling generation of a data signal excluding Null data and reproduction of a clock signal.

Further, in the determination in step ST5,
When the sync byte is not detected, the control unit 12 determines that the codec interface method relating to the communication being performed is ARI.
It is determined to be the B method (step ST4).

The control unit 12 controls the data signal TSD in order to perform the modulation processing in the circuit unit in the rear.
In addition to ATA <7;0>, a data valid signal DVALID for instructing valid / invalid of the FEC area, a synchronous byte flag signal PSYNC, and byte data TSDATA <
The output clock signal BYTECLK synchronized with 7; 0> is output. Regarding the output clock signal BYTECLK, in the interface unit corresponding to each system,
Selects and outputs a clock signal according to the codec interface method used for ongoing communication.

As described above, according to the first embodiment, the serial data signal detection for comparing the signal level of the data signal input from the serial data input section 4 by the cable equalizer 6 with a predetermined input threshold level. The cable equalizer 7 performs a clock signal detection step of comparing the signal level of the clock signal input from the clock signal input section 5 according to the ARIB method with a predetermined input threshold level, and the control section 12 performs Since the synchronization byte detection step of detecting the synchronization byte from the data signal input from the serial data input unit 4 and determining the presence or absence of the synchronization byte is performed, the signal level of the data signal is changed in the serial data signal detection step. If it is lower than the specified input threshold level, the codec interface method is If the signal level of the clock signal is higher than a predetermined input threshold level in the clock signal detecting step, it is determined that the codec interface method is the ARIB method, and in the sync byte detecting step. If the sync byte is detected, the codec interface method is DVB.
-When it is determined that the ASI method is used and the sync byte is not detected in the sync byte detecting step, it can be determined that the codec interface method is the ARIB method, and when the encoded data signal is input in the digital image transmission system, It is possible to input the encoded data signal after identifying the codec interface method related to ongoing communication and automatically setting it to the codec interface method. It is not necessary to do so, and there is an effect that convenience can be improved.

[0020]

As described above, according to the present invention, the serial level that compares the signal level of the data signal input from the serial data input section with a predetermined input threshold level and outputs the signal related to the comparison result. Data signal detecting means and AR
Clock signal detection means for comparing the signal level of the clock signal input from the clock signal input section according to the IB system with a predetermined input threshold level and outputting a signal according to the comparison result, and input from the serial data input section. Based on the detection result by the synchronous byte detection means, the serial data signal detection means, the detection result by the clock signal detection means and the detection result by the synchronization byte detection means. AR is the codec interface method related to the communication currently being performed.
Since it is configured to include a determining unit that determines whether the system is the IB system, the DVB-SPI system, or the DVB-ASI system, it relates to the communication being performed when the encoded data signal is input in the digital image transmission system. Since it is possible to input the encoded data signal after identifying the codec interface method and automatically setting it to the codec interface method, it is not necessary for the user to make settings related to the codec interface method, which is convenient. The effect that the property can be improved is exhibited.

According to the present invention, the first step of comparing the signal level of the data signal input from the serial data input section provided in the codec interface section with a predetermined input threshold level, and the first step. In the case where the signal level of the data signal is higher than the predetermined input threshold level, the signal level of the clock signal input from the clock signal input section according to the ARIB system provided in the codec interface section is input to the predetermined input level. A second step of comparing with a threshold level, and a second step of carrying out when the signal level of the clock signal is smaller than a predetermined input threshold level, from the data signal input from the serial data input section. A third step of detecting a sync byte and determining the presence or absence of the sync byte Since form was, codec interface scheme when the signal level of the data signal in the first step is less than a predetermined input threshold level D
If the signal level of the clock signal is higher than a predetermined input threshold level in the second step, it is determined that the VB-SPI method is the codec interface method, and in the third step. If the sync byte is detected, it is determined that the codec interface method is the DVB-ASI method, and the third
If the sync byte is not detected in the step, it can be determined that the codec interface system is the ARIB system, and when the coded data signal is input in the digital image transmission system, the codec interface system related to the communication being performed is identified. Since it is possible to automatically input the encoded data signal after automatically setting to the codec interface method, it is not necessary for the user to make settings related to the codec interface method, which improves convenience. There is an effect that can be.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing a configuration of an automatic switching circuit of a codec interface section according to Embodiment 1 of the present invention.

FIG. 2 is a flowchart showing a codec interface method identification method according to Embodiment 1 of the present invention.

FIG. 3 is a schematic diagram showing a configuration of a conventional analog image transmission device.

[Explanation of symbols]

1 parallel data input section, 2, 3, 14, 15, 16
Driver buffer, 4 serial data input section, 5
Clock signal input section, 6 cable equalizer (serial data signal detecting means), 7 cable equalizer (clock signal detecting means), 8, 9 digital variable resistor, 10 clock signal generator, 11 differential input receiver, 12 control section ( Synchronization byte detection means, determination means),
13 buffers.

Claims (2)

(57) [Claims] 1. A serial data signal detecting means for comparing a signal level of a data signal input from a serial data input unit with a predetermined input threshold level and outputting a signal according to a comparison result, and a clock according to an ARIB system. Clock signal detecting means for comparing the signal level of the clock signal input from the signal input section with a predetermined input threshold level and outputting a signal related to the comparison result; and a data signal input from the serial data input section. A synchronization byte detecting means for detecting a synchronization byte to determine the presence / absence of the synchronization byte, and a detection result by the serial data signal detecting means, a detection result by the clock signal detecting means and a detection result by the synchronization byte detecting means. The codec interface method related to the communication being performed is ARIB method, D
A codec interface unit comprising: a determination unit that determines whether the system is a VB-SPI system or a DVB-ASI system. 2. A first step of comparing a signal level of a data signal input from a serial data input section provided in a codec interface section with a predetermined input threshold level, and a data signal in the first step. When the signal level of is greater than the predetermined input threshold level,
A second step of comparing the signal level of the clock signal input from the clock signal input section according to the ARIB system provided in the codec interface section with a predetermined input threshold level; A third step, which is performed when the signal level is lower than a predetermined input threshold level, and detects a sync byte from the data signal input from the serial data input unit to determine the presence or absence of the sync byte. A codec interface method identification method characterized by the above.