JP3527645B2 - Optical scanning device - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an optical scanning device used in a laser beam printer or the like, and more particularly to a laser scanning device (L
SU: laser scan unit), and more particularly to an optical scanning device including a circuit for generating an SOS (start of scan) signal used as a synchronization signal for timing the scanning of laser light.

[0002]

2. Description of the Related Art In an LSU, a laser beam to be scanned is received by a photodiode (hereinafter, referred to as PD) in order to obtain an SOS signal used as a timing signal when scanning the laser beam on an image plane. The SOS signal is generated based on the obtained light reception signal. For example, FIG. 1 is a configuration diagram of an LSU schematically showing an example thereof, which is a laser diode (hereinafter referred to as LD).
The laser beam light LB emitted from the laser beam No. 1 is deflected and scanned by the polygon mirror 2 rotated at a high speed within a predetermined angle range, and the laser beam light LB deflected and scanned is passed through the f.theta. Main scanning is performed on the surface. A photodiode (hereinafter referred to as PD) 5 is arranged on the scanning optical path of the laser beam light LB to receive the laser beam light LB that is deflected and scanned and output a photoelectrically received signal. The SOS signal is obtained by performing signal processing on this in the SOS signal processing circuit 6. Therefore, the control circuit 7 controls the LD drive circuit 8, the polygon mirror drive circuit 9, and the photosensitive drum drive circuit 10 based on the SOS signal, and the generated SOS is generated.
If the drawing by the laser beam light is started after a certain period of time from the signal, the drawing can be executed in the specific area 4a of the photosensitive drum 4, and the drawing synchronized with the scanning can be realized.

[0003]

By the way, the above-mentioned S
In the PD for obtaining the OS signal, it is inevitable that the received light amount of the PD varies due to fluctuations in the power of the laser beam light, surface deflection of the polygon mirror, and the like. In addition, the level of the received light signal may vary due to noise mixed in from the PD to the signal processing circuit or variation in the DC component of the circuit due to dark current or the like. Therefore, a signal component typified by such a level variation of the received light signal is mixed as noise in the received light signal. Therefore, if the received light signal including such noise is used as it is, the SOS signal is generated. The noise causes jitter in the SOS signal on the time axis, the timing of the SOS signal is changed, and it becomes impossible to obtain a highly accurate SOS signal. Particularly, in the conventional SOS signal generation circuit, since the SOS signal is obtained by comparing the light receiving signal of the PD with a predetermined threshold value, the level fluctuation of the light receiving signal appears as the timing fluctuation of the SOS signal.

An object of the present invention is to provide an optical scanning device including an SOS signal generation circuit capable of suppressing noise in a light receiving signal at a PD and stabilizing the timing of an SOS signal.

[0005]

In the optical scanning device of the present invention, the light receiving means for receiving the beam light to generate the SOS signal is a plurality of light receiving elements arranged in the scanning direction of the light beam. In addition, the SOS signal generation circuit divides the plurality of light receiving elements into two groups with one in the arrangement direction, and the received light signals of the light receiving elements of each group are resonantly amplified from a resonance amplified signal. A time signal detecting section for detecting a time signal, a timing detecting section for detecting a timing signal for obtaining a synchronization signal from the light receiving signals of at least a part of the light receiving elements of the light receiving element, and the time signal from the time signal detecting section And a logic circuit section for generating a synchronization signal based on the timing signal from the timing detection section.

The time signal detecting section, the timing detecting section and the logic circuit section in the present invention are configured as follows. That is, in the time signal detecting section, the first and second adding means for adding the received light signals of the respective light receiving elements divided into the two groups and the first and second adding means respectively add the received light signals. The levels of the resonance amplification signals of the first and second resonance amplifiers are compared with the levels of the resonance amplification signals of the first and second resonance amplifiers, and the cross points of the two signals are detected. And a first comparing means for outputting as a signal. The timing detection unit is triggered by the second comparison means for comparing the sum signal of all the received light signals of the light receiving element with a reference level and the comparison output of the second comparison means, and is continued for a predetermined time. A first timer circuit for outputting a timing signal for The timing detection unit includes a third comparing unit that compares respective light reception signals of the first two light receiving elements of the light receiving elements that are first scanned with the light beam, and the second comparing unit.
Fourth comparing means for comparing the sum signal of the respective light receiving signals of the one light receiving element with a reference level, a logical product gate for taking a logical product of the third and fourth comparing means, and a trigger by the output of the logical product gate A third timer circuit that outputs a timing signal that is generated and continues for a predetermined time may be provided. Further, the logic circuit section outputs a first gate signal upon completion of continuous output of the timing signal from the timing detection section, the first gate signal and the time signal from the time signal detection section. A second timer means for outputting a second gate signal that continues for a predetermined time based on the above, and a logic gate means for outputting an SOS signal when the time signal and the second gate signal are input. The configuration is provided.

In the optical scanning device of the present invention, the light receiving signals output from the plurality of light receiving elements are amplified by the resonance amplifier to limit the band, and the amplitude amplification output and the time-axis output of the resonance amplification signal are amplified. Is output.
Therefore, it becomes possible to generate the SOS signal using the resonance amplification signal having a sufficiently high amplitude level, and suppress the level fluctuation of the received light signal and the influence of noise in the circuit,
It is possible to stabilize the timing of signals. Further, by generating the SOS signal based on the cross points obtained by mutually comparing the resonance amplified signals of the light receiving elements divided into groups, it is possible to reduce the influence of level fluctuations and noise components generated in the circuit. It is possible to generate the SOS signal with the accurate timing.

[0008]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, embodiments of the present invention will be described with reference to the drawings. In this embodiment, L shown in FIG.
The present invention is applied to SU, and in the LSU, PD5
The SOS signal is generated by the SOS signal generation circuit 6 based on the received light signal received by and is input to the control circuit 7. The control circuit 7 controls the LD drive circuit 8 based on the input SOS signal.
To control the light emission of the LD, and also to control the polygon mirror drive circuit 9 and the photosensitive drum drive circuit 10, respectively. As a result, the predetermined area 4a of the photosensitive drum 4 is
, The laser beam light is scanned in synchronization with the SOS signal,
Draw the required pattern.

FIG. 2 is a block diagram showing the configuration of the PD 5 and the SOS generating circuit 6. The PD 5 includes N (N is an integer of 2 or more) PD elements PD-1 to PD-N arranged along the scanning direction of the laser beam LB. Here, N is an even number in order to perform arithmetic processing by matching the similarity of waveforms of a plurality of groups, which will be described later, and the PD 5 is composed of 10 (N = 10) PD elements. For example, the opposite conductivity type impurity diffusion regions are arranged in a row at a predetermined interval on a semiconductor substrate of one conductivity type, and electrodes are formed to be connected to the semiconductor substrate and each impurity diffusion region. From the PD elements PD-1 to PD-N, a single pulse light reception signal is output by the photoelectric conversion action when the laser beam light LB is projected. In the present embodiment, the PD
The pitch interval between the elements PD-1 to PD-N is set to about 31 μm from the diameter (width) of the beam to be scanned in the scanning direction. Further, the SOS signal generation circuit 6 is
A time signal detection unit 11 for detecting a time signal which is a reference when generating the SOS signal based on the light reception signal output from D5, and a timing signal used when generating the SOS signal from the time signal And a logic circuit section 13 for logically operating the time signal and the towing signal to output an SOS signal.
It consists of and.

FIG. 3A shows a connection circuit between the PD 5 and the SOS signal generation circuit 6, and particularly the time signal detection section 11
3 is a diagram showing a circuit configuration of FIG. Constituting the PD5 10
Each of the PD elements PD-1 to PD-N has an arrangement order of 1
Every other group is divided into two groups, and the anodes PD-1 to PD-N of each PD element are connected to the first adder 21 and the second adder 22 for every two groups, respectively. The light reception signals of the PD elements are added. Also,
A first narrow band amplifier 23 and a second narrow band amplifier 24 are connected to the output terminals of the adders 21 and 22, respectively, and the added light receiving signals are narrow band amplified. Although not described in detail, each of the narrow band amplifiers 23 and 24 is configured as a resonance amplifier including an LC resonance circuit, and the resonance frequency of the LC resonance circuit is such that the laser beam light scans the PD5. When each PD element P
Of D-1 to PD-N, the single pulsed signal output from the odd-numbered PD element or the even-numbered PD element matches the frequency determined by the cycle when arranged on the time axis, Or, it is set so that they substantially match. The output terminals of the narrow band amplifiers 23 and 24 are connected to the positive and negative input terminals of the first level comparator 25, respectively, and the first level comparator 25
In, the output of the resonance amplification signal of each group is compared,
A crosspoint signal (hereinafter, SOS1 signal) at which the signals of both groups intersect is output.

Further, the timing detection unit 12 is shown in FIG.
As shown in (b), the PD elements PD-1 to PD-N
Are commonly connected to each other, and the outputs of all PD elements are summed and connected to the positive input terminal of the second level comparator 31. The reference voltage Vref is connected to the negative input terminal of the second level comparator 31, the sum signal of the PD element is compared with the reference voltage Vref, and the comparison result is output. A first timer circuit 32 is connected to the output of the second level comparator 31 and is triggered by the H level output from the second level comparator 31 to detect a delay during a set timer time. It is configured to output a signal (hereinafter, a DLY signal).

On the other hand, in the logic circuit section 13, as shown in FIG. 4, the D-type flip-flop (hereinafter referred to as DF) to which the DLY is input to the clock terminal via the inverter 41.
F) 42 is provided, and the negative output of the F) 42 is fed back to the data input, so that the D-FF 42 operates as the DLY.
A positive output signal (hereinafter referred to as WIN1 signal) is inverted and output every time a signal is input. Further, the reset terminal has an SOS described later.
The signal is input through the inverter 43, and the SOS
Reset by signal. On the other hand, the latch 44 to which the crosspoint signal (hereinafter, SOS1 signal) is input
And a second timer circuit 46 to which the SOS1 signal is inputted via an inverter 45. Further, outputs of the latch 44 and the second timer circuit 46 are inputted to respective input terminals of a first AND gate 47. Then, the SOS signal is output from the first AND gate 47 by taking the logical product of these outputs. The WIN1 signal from the D-FF 42 is input to the enable terminal of the second timer circuit 46, and the second timer circuit 46 is triggered when the WIN1 signal is input to execute the timer operation. Also,
The SOS signal is input to the control terminal Cont of the latch 44, and the input signal is output as it is according to the level of the control terminal Cont (the control terminal is at L level), or the output at that time is held ( The control terminal is at the H level).

Next, the operation of the SOS generating circuit 6 having the above configuration will be described with reference to the timing charts of FIGS.
First, in FIG. 5, when the laser beam LB scans the PD 5, a single pulsed light receiving signal is output from each PD element PD-1 to PD-N, and the PD as a whole receives the light of FIG. The signal is obtained. Then, in the time signal detecting section 11, the light receiving signals of every other odd-numbered PD elements are added in the first adder 21, so that each light receiving signal is time-divided as shown in FIG. The signals are arranged on the axis. In addition, by adding the light reception signals of every other even-numbered PD elements in the second adder 22, each light reception signal is equal to the output of the first adder 21 as shown in FIG. The signals are arranged on the time axis with a period offset. On the other hand, in the timing detection unit 12, by obtaining the sum signal of the received light signals of all PD elements,
The sum of all PD signals shown in FIG. Then, this all PD sum signal is applied to the reference voltage Vref in the second comparator 31.
In comparison with, the H level is output when the sum of all PD signals as shown in FIG. And
By operating the first timer circuit 32 for a preset time from the output of the H level to measure the time, a DLY signal in which the H level continues for the set period is output as shown in FIG. To be done. The first timer circuit 32 is provided so that the DLY signal can be stably maintained at the H level for a required period.

Further, in the timing chart shown in FIG.
In the time signal detecting section 11, FIG.
The above-mentioned first and second adders 21, 2 shown in (b)
2 outputs the first and second narrow band amplifiers 23,
When amplified at 24, its output waveform is output as a resonance amplification signal shown by a solid line and a broken line as shown in FIG. 7C, depending on the amplitude characteristic and the phase characteristic of each narrow band amplifier. At this time, due to the resonance amplification action in each of the narrow band amplifiers 23 and 24, each resonance amplification signal has a signal waveform in which each reception signal is sequentially integrated over time, and the resonance amplification signal remains even after the input of the reception signal is completed. It becomes the output signal waveform. Further, since there is a phase difference corresponding to the pitch dimension of the PD element between the received light signals, the resonance amplified signals are output as signals that are 180 degrees out of phase with each other. Then, by comparing these resonance amplified signals in the first level comparator 25, the SOS1 signal whose level is inverted at the cross point where both resonance amplified signals intersect is output as shown in FIG. Become.

Next, in the timing diagram of FIG. 7, the D-FF 42 in the logic circuit section 13 is shown in FIGS.
Thus, the WIN1 signal is inverted at the falling edge of the DLY signal. When the WIN1 signal becomes H level, the second timer circuit 46 enters the input detectable state. In this state, when the falling input of the SOS1 signal in FIG.
The second timer circuit 46 starts its operation, and the output WIN2 signal becomes H level as shown in FIG. Further, the SOS1 signal is input to the latch 44, but at this time point, the SOS signal input to the control terminal Cont is at the L level, so that the output SOS-R signal is as shown in FIG. The SOS1 signal appears at the output as it is and is input to the AND gate 47. Then, as described above, when the WIN2 signal becomes the H level, the SOS1 signal is directly output as the SOS signal through the AND gate 47. Then, when the SOS signal becomes H level, the D-FF 42 is reset, so that the second timer circuit 46 is in the input prohibited state, and the SOS1 that was previously input is input.
After the signal falls, the second timer circuit 46 is no longer triggered. Therefore, as shown in FIG. 6F, after the DLY signal falls, the SOS signal rises (time β) immediately after the first SOS1 falls (time α) that triggers the second timer circuit 46. Begins and the second
The SOS signal continues to be at the H level for the predetermined time set in the timer circuit 46. The SOS-R signal is held at the H level by the rising of the SOS signal. By repeating the above operation, it is possible to generate an SOS signal corresponding to the scanning cycle of the laser beam light, as shown in FIG.

Here, the reason for using the DLY signal will be described. As shown in FIG. 6C, since the resonance amplification signals amplified by the narrow band amplifiers 23 and 24 have small amplitude values in the initial part and the final part, a slight waveform fluctuation causes a timing fluctuation of the SOS signal. It is preferable to set a fixed time point in a region having a large intermediate amplitude value excluding the initial portion and the end portion, and use this time point as the SOS signal. for that reason,
The DLY signal shown in FIG. 6E is generated, the time when the DLY signal is at the H level is appropriately set in the first timer circuit 32, and immediately after the fall of the DLY signal, the SOS1 shown in FIG. It is preferable to set a certain timing point at which the signal first rises and generate the SOS signal shown in FIG. Therefore, in the above-described embodiment, when the received light signal is integrated by resonance amplification to have the maximum amplitude, that is, at the time corresponding to the time when the received light signal in FIGS.
By setting the level, the time when the DLY signal falls can be obtained as the time when the amplitude of the resonance amplified signal becomes maximum, in other words, the time when the amplitude of the resonance amplified signal becomes stable.
It is desirable that the H level period of the DLY signal be reduced to the L level within a time period that is 1/2 of the maximum amplitude of the output signals of the narrow band amplifiers 23 and 24. In particular, it is preferable that the DLY signal be lowered to the L level at a time about one wavelength before or after the time when the outputs of the narrow band amplifiers 23 and 24 become maximum. In this embodiment, at a time about one wavelength before. The first so that the DLY signal is lowered to the L level.
The time of the timer circuit 32 is set. Around this time, the signal is generally stable and considered to be the best.
This makes it possible to generate an SOS signal with stable timing. Since the timing of the SOS signal is at the time of the fall of the SOS1 signal immediately after the fall of the DLY signal, the timing error of the timer in the second timer circuit that generates the DLY signal is SOS.
It does not affect the timing of the signal itself.

As described above, according to the present invention, the received light signal from the PD 5 is amplified by the narrow band amplifiers 23 and 24 for resonance amplification, and the SOS signal is generated based on the resonance amplified signal. , 24 does not cause the output waveforms of the first and second adders 21 and 22 to have similar output waveforms, but the laser beam light scans the PD elements of PD5. Since the timing to perform and the waveform timing of the resonance amplification signal are always maintained in a constant relationship, by detecting an arbitrary fixed time point of the output waveform of the resonance amplification signal as the SOS timing, the SOS of stable timing is obtained. It becomes possible to generate a signal.

Since the DLY signal is output for a preset time after the light receiving signal of the PD 5 is output at a predetermined level, only the initial portion of the light receiving signal is used for DLY. It is also possible to generate a signal. FIG. 8 is a configuration diagram showing an example thereof, and is a diagram corresponding to FIG. 3 of the embodiment. The time signal detector 1
Since the configuration of No. 1 is the same as that of the above-described embodiment, the same reference numerals are given and the description thereof is omitted. In the timing detection unit 14 of this embodiment, the cathodes of the first two PD elements PD-1 and PD-2 that are scanned by the laser beam light of the PD 5 are connected to the timing detection unit 14, and the other PDs are connected.
The cathode of the device is simply a circuit that supplies the bias power supply Vbias. Then, the timing detection unit 14 determines that each P
The cathodes of the D elements PD-1 and PD-2 are connected to the third comparator 51.
Of the PD elements PD-1 and PD
The second cathode output is added by the third adder 52 to obtain the fourth
It is input to one input terminal of the comparator 53, and the reference voltage Vref is input.
I am making a comparison with. Then, the outputs of the third and fourth comparators 51 and 53 are input to the second AND gate 54, and the output of the second AND gate 54 is input to the third timer circuit 55, so that the output is obtained. You are getting the DLY signal.

In this timing detection circuit, as shown in the timing chart of FIG. 9, of the light receiving signals of the PD 5 shown in FIG. 9A, both PD elements PD shown in FIGS.
When the output of the third comparator 51 for detecting the timing of the cross point of −1 and PD-2 and the sum signal of both PD elements PD-1 and PD2 shown in FIGS. By taking the logical product with the output of the fourth comparator 53 which detects that there is, the cross point of both PD elements can be detected as shown in (f) of the figure, and a predetermined time can be measured from the timing of this cross point. By performing the above, the DLY signal can be obtained as shown in FIG. Since the timing detection unit 14 detects the cross points of the PD elements PD-1 and PD-2 and starts the third timer circuit 55, the timing detection unit 14 is started as compared with the timing detection unit 12 of the first embodiment. This is advantageous in improving the accuracy of timing.

In the above embodiment, an example in which the SOS signal is generated using the PD composed of 10 PD elements is shown, but the number is not limited to this. PD
If the number of elements is large, a high level can be obtained depending on the amplitude level of the resonance amplification signal. However, in the present invention, if the amplitude of the resonance amplification signal is stable, the object can be achieved. It is not necessary to increase the number of elements. It is important to set an appropriate number of PDs according to the timing accuracy of the SOS signal required for the LSU. Note that FIG. 10 shows a state where the amplitude level of the resonance amplification signal from the narrow band amplifier is saturated. This figure shows the same signals as the signals of the timing chart of the first embodiment shown in FIG. As described above, when the amplitude level reaches a certain level, it is possible to generate a highly accurate SOS signal without particularly affecting the timing accuracy.

[0021]

As described above, according to the present invention, the light receiving means for receiving the beam light to be scanned and outputting the light receiving signal is constituted by a plurality of light receiving elements arranged in the scanning direction of the beam light. A synchronization signal generation circuit for generating a synchronization signal for synchronizing scanning in the optical scanning means based on a light reception signal from the light receiving means includes a plurality of light receiving elements every other two in the arrangement direction. The SOS signal is divided into two groups, and the SOS signal is generated by the time signal obtained from the resonance amplification signal and the timing signal obtained from the light reception signals of at least a part of the light receiving elements of the light receiving element. Can be obtained as a resonance amplification signal in which the amplitude level output and the output on the time axis are amplified while the band is limited. As a result, the resonance amplification signal with a sufficiently high amplitude level is obtained. It is possible to generate an SOS signal using, by suppressing the effects of noise in the level variation and the circuit of the light receiving signal, it is possible to stabilize the timing of the SOS signal.

[Brief description of drawings]

FIG. 1 is a diagram showing a conceptual configuration of an LSU to which the present invention is applied.

FIG. 2 is a conceptual diagram showing a configuration of a PD according to the first embodiment of the present invention and a block diagram showing a configuration of an SOS signal generation circuit.

FIG. 3 is a circuit diagram showing the configurations of a time signal detector and a timing detector.

FIG. 4 is a circuit diagram of a logic circuit unit.

FIG. 5 is a timing diagram of an operation for obtaining a DLY signal.

FIG. 6 is a timing diagram for obtaining a time signal.

FIG. 7 is a timing diagram for obtaining an SOS signal.

FIG. 8 is a PD and SO in the second embodiment of the present invention.
It is a circuit diagram which shows the structure of an S signal generation circuit.

FIG. 9 is a timing diagram for obtaining a time signal.

FIG. 10 is a timing diagram showing an operation in a state where the gain of the narrow band amplifier is saturated.

[Explanation of symbols]

1 laser diode 2 polygon mirror 3 fθ lens 4 photosensitive drum 5 photodiodes 6 SOS signal generation circuit 7 control circuit 8, 9, 10 drive circuit 11 hours signal detector 12 Timing detector 13 Logic circuit section 14 Timing detector 21,22 adder 23, 24 Narrow band amplifier (resonant amplifier) 25 First Level Comparator 31 Second Level Comparator 32 First Timer Circuit 42 D flip-flop 46 Second timer circuit

Claims (9)

(57) [Claims] 1. A light source, an optical scanning unit for deflecting a beam of light emitted from the light source to scan the photosensitive surface, a light receiving unit for receiving the scanned beam of light and outputting a light receiving signal, An optical scanning device comprising a synchronization signal generation circuit for generating a synchronization signal for synchronizing scanning in the light scanning means based on a light reception signal from the light reception means, wherein the light reception means are arranged in a scanning direction of the light beam. The synchronizing signal generating circuit divides the plurality of light receiving elements into two groups with one in the arrangement direction, and outputs the light receiving signals of the light receiving elements of each group. A time signal detection unit that detects a time signal from the resonance amplified signal that is resonantly amplified, and a timing signal for obtaining a synchronization signal from the light reception signals of at least some of the light receiving elements of the light receiving elements An optical scanning device comprising: a timing detection unit; and a logic circuit unit that generates a synchronization signal based on a time signal from the time signal detection unit and a timing signal from the timing detection unit. 2. The time signal detecting section includes first and second adding means for adding the received light signals of the respective light receiving elements divided into the two groups, and the first and second adding means. The levels of the resonance amplification signals of the first and second resonance amplifiers for resonance amplification of the added received light signals are compared with the levels of the resonance amplification signals of the first and second resonance amplifiers to detect the cross points of both signals, The optical scanning device according to claim 1, further comprising a first comparison unit that outputs the point as a time signal. 3. The resonance frequency of each of the first and second resonant amplifiers is set to match or substantially match a cycle of a light reception signal output from each group of the light receiving elements. Optical scanning device. 4. The second timing comparing section compares a sum signal of all light receiving signals of the light receiving element with a reference level.
4. The optical scanning device according to claim 3, further comprising: a comparison means; and a first timer circuit that outputs a timing signal that is triggered by the comparison output of the second comparison means and continues for a predetermined time. 5. The timing detector includes third comparing means for comparing respective received light signals of the first two light receiving elements of the light receiving elements which are first scanned with the light beam, and the two light receiving elements. A fourth comparing means for comparing the sum signal of the respective received light signals with a reference level, a logical product gate for performing a logical product of the third and fourth comparing means, and a predetermined output triggered by the logical product gate. The optical scanning device according to claim 3, further comprising a third timer circuit that outputs a timing signal that continues for a time. 6. The logic circuit section outputs a first gate signal upon completion of continuous output of the timing signal from the timing detection section, and the first gate signal and the time signal detection section. Second timer means for outputting a second gate signal that continues for a predetermined time based on the time signal, and a logic gate for outputting a synchronization signal when the time signal and the second gate signal are input The optical scanning device according to claim 4, further comprising: 7. The timing signal output from the timing detector is continuously output at least during a time when a light receiving signal from the light receiving unit is output. Optical scanning device. 8. The optical signal according to claim 7, wherein the output of the timing signal output from the timing detector is stopped within a time period that is 1/2 of the maximum amplitude of the output signal from each resonance amplifier. Scanning device. 9. The output of the timing signal output from the timing detection unit is stopped at least at a time about one wavelength after the time at which the output of each resonance amplifier is maximized. Optical scanning device.