JP3536649B2 - Method for removing heavy metal impurities in semiconductor wafer and method for manufacturing semiconductor wafer having this step - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for removing heavy metal impurities from a semiconductor wafer for manufacturing a semiconductor device such as an IC or an LSI, and a method for manufacturing a semiconductor wafer having such a step for removing heavy metal impurities.

[0002]

2. Description of the Related Art Conventionally, in a semiconductor wafer manufacturing process for manufacturing a semiconductor device such as an IC or an LSI, heavy metal impurities such as iron, copper, and nickel are mixed into a wafer surface or a bulk in a wafer manufacturing process or a wafer process process. May be. It is known that the presence of these heavy metals in the operation region of a semiconductor device causes deterioration of characteristics such as hindering operation of the semiconductor device.

As a method of removing such heavy metal impurities in a wafer, a so-called gettering technique is commonly used. The gettering technology is an extrinsic gettering that gives a gettering effect by applying a strain field or chemical action to the wafer from the outside.
ng: EG) and intrinsic gettering (Intrinsi) using the strain field of lattice defects generated inside the wafer.
c Getterring: IG). In gettering, heavy metal impurities are diffused and trapped in such a strain field by heat treatment.

For EG, a backside damage method in which mechanical strain is formed on the back surface of the wafer by sandblasting or the like, a ring getter method in which high-concentration phosphorus is diffused from the back surface of the wafer, and a polycrystalline silicon film grown on the back surface of the wafer And a polyback seal method utilizing a strain field or lattice mismatch at the interface with the substrate or at the grain boundary.

However, in these methods, there is a danger of contaminating the wafer by the process of forming a strain field for improving the gettering ability, and a heat treatment is required to remove heavy metal impurities. There is a risk that the wafer may be contaminated by this heat treatment, and it is difficult to perform a heat treatment suitable for removing heavy metal impurities once the device is manufactured. In addition, there is a disadvantage that the strain field is relaxed by the high-temperature heat treatment in the device manufacturing process (wafer process), the gettering ability is reduced, and a desired gettering effect cannot be obtained.

On the other hand, IG is a method in which a wafer is subjected to a heat treatment to precipitate oxygen in the wafer and to trap heavy metal impurities in the precipitates and crystal defects induced by the heat treatment. (IG treatment) involves the risk of contaminating the wafer by this IG treatment, and heat treatment is also required to capture heavy metal impurities. In addition, the gettering ability is greatly affected by the wafer quality such as the oxygen concentration or thermal history contained in the wafer, and it is difficult to obtain a desired gettering ability stably. It may also occur in the fabrication region and degrade device characteristics.

[0007]

SUMMARY OF THE INVENTION The present invention has been made in view of such problems, and does not require a pretreatment such as sandblasting or heat treatment, which easily causes secondary contamination, and a wafer such as an oxygen concentration. It is not affected by quality and does not require high-temperature heat treatment for removing heavy metal impurities, and can be applied at any desired stage of the semiconductor wafer manufacturing process, and therefore has no problem such as a reduction in removal capability. Providing a method for removing heavy metal impurities,
By adopting this as a step in the method of manufacturing a semiconductor wafer, it is possible to obtain a high-quality semiconductor wafer and to improve the manufacturing yield, productivity, and electrical characteristics of the semiconductor device to be manufactured. Aim.

[0008]

According to a first aspect of the present invention, there is provided a semiconductor wafer, comprising irradiating a surface of a semiconductor wafer with X-rays to remove heavy metal impurities in the wafer or the surface. This is a method of removing heavy metal impurities in a semiconductor wafer by causing agglomeration in the vicinity and then removing the heavy metal aggregation layer.

As described above, by irradiating a semiconductor wafer with X-rays, heavy metal impurities agglomerate on the surface of the wafer and then remove this agglomerated layer, so that there is no danger of secondary contamination such as heat treatment. In addition, it is possible to reliably remove heavy metal impurities from the wafer regardless of the quality of the wafer and at any stage of the process.

In this case, as described in claim 2 of the present invention, the time for irradiating the surface of the semiconductor wafer with X-rays is 3 hours.
As set forth in claim 3, X-ray irradiation conditions are a tube voltage of 20 kV or more and a tube current of 20 mA or more. Further, as described in claim 4, X-rays are incident on the wafer. Preferably, the angle is 0.2 degrees or less.

As described above, when X-ray irradiation conditions are specified, heavy metal impurities in the wafer are sufficiently agglomerated on the surface by strong X-rays having a tube voltage of 20 kV or more and a tube current of 20 mA or more, and the irradiation time is sufficiently increased to obtain a deep portion. Heavy metals can be aggregated on or near the removable surface. Also,
It is preferable to set the incident angle of X-rays to 0.2 degrees or less in order to coagulate in a shallow place from the surface to facilitate the removal of the coagulated layer and not to damage the device manufactured on the wafer as much as possible. .

Next, according to a fifth aspect of the present invention, an electric field is applied to the surface of a semiconductor wafer to cause heavy metal impurities in the wafer to agglomerate on or near the surface, and then remove the heavy metal aggregation layer. By,
This is a method for removing heavy metal impurities in a semiconductor wafer.

As described above, heavy metal impurities can be aggregated on the wafer surface by applying an electric field to the surface of the semiconductor wafer. Therefore, as in the case of X-rays,
By removing the agglomerated layer in which heavy metal impurities are agglomerated, there is no danger of secondary contamination such as heat treatment, and regardless of wafer quality, it can be applied at any stage of the process to ensure Heavy metal impurities can be removed from the wafer.

In this case, as a method of applying an electric field for aggregating heavy metal impurities of the semiconductor wafer on the surface or in the vicinity of the surface, the surface of the wafer may be subjected to corona discharge treatment (claim 6), or an electrode may be used. A voltage can be applied to the surface of the wafer by a contact type or a non-contact type (claim 7).

According to such a method, a strong electric field can be applied very easily without contaminating the semiconductor wafer, and heavy metal impurities can be efficiently aggregated on or near the surface.

In the present invention, when the heavy metal impurities in the wafer are aggregated on the surface or in the vicinity of the surface, it is preferable that the wafer is heated to 300 ° C. or less. As described above, if the silicon wafer is heated at a low temperature, the diffusion of the heavy metal is fast, so that the heavy metal impurities can be efficiently aggregated on the surface or near the surface in a short time.

Further, as described in the ninth, tenth, and eleventh aspects of the present invention, the heavy metal aggregation layer can be removed by etching, polishing, or grinding. As described above, if the heavy metal aggregated on the wafer surface is removed by etching, polishing, or grinding, the aggregated layer of heavy metal impurities can be easily and reliably removed. Which method to use may be appropriately selected depending on the wafer to be processed and the convenience of the process.

The method for removing heavy metal impurities in a semiconductor wafer according to the present invention is particularly effective when the semiconductor wafer is silicon. This is because the presence of heavy metal impurities becomes a problem particularly in semiconductor devices manufactured from silicon wafers with higher integration and higher precision.

According to the thirteenth aspect of the present invention, the method for removing heavy metal impurities is employed as one step of a method for manufacturing a semiconductor wafer. Heavy metal impurities can be removed from the wafer. Therefore, it is useful in a method for manufacturing a silicon semiconductor wafer as described in claim 14.

In this case, as described in claim 15,
If the heavy metal impurity removing step is performed in the etching step in the wafer manufacturing step, the aggregated layer of heavy metal impurities after X-ray irradiation or after the application of an electric field can be removed together with the etching step. In addition, if the heavy metal impurity removing step is performed in a mirror polishing step in a wafer manufacturing step, an aggregated layer of heavy metal impurities after X-ray irradiation or after an electric field is applied is also removed in a mirror polishing step. You can do it.

Further, if the heavy metal impurity removing step is performed before the wafer process step, a wafer process such as a high-temperature heat treatment can be performed on the wafer from which the heavy metal impurities have been removed. Claim 1
As described in No. 8, if the heavy metal impurity removing step is performed after the high-temperature heat treatment in the wafer process step,
Even if the wafer is contaminated with heavy metal impurities by the high-temperature heat treatment, it can be reliably removed. Further, if the heavy metal impurity removing step is performed before the wiring step in the wafer process step as described in claim 19, since all the high-temperature heat treatments that contaminate the wafer are completed, If heavy metal impurities are sometimes removed, operation failure of the device based on the heavy metal impurities can be eliminated.

Hereinafter, the present invention will be described in more detail.
The present inventors have found that heavy metal impurities in a silicon wafer bulk that could not be detected by conventional wafer surface analysis means,
In particular, among them, as a result of intensive research on a highly sensitive detection method of Cu, which is difficult to detect and causes deterioration of device characteristics to be manufactured, for example, X-rays are detected under specific conditions using a total reflection X-ray fluorescence analyzer. It has been found that when irradiated for a long time, Cu aggregates on the wafer surface, and it becomes possible to measure by analyzing the aggregation region. It has also been found that such a phenomenon that heavy metals agglomerate on the wafer surface also occurs when an electric field is applied to the wafer surface.

Therefore, by applying such a phenomenon, the surface of the semiconductor wafer is irradiated with X-rays or an electric field is applied to cause heavy metal impurities in the semiconductor wafer to aggregate on the surface. The inventors have found that if the layer is removed by etching or other methods, heavy metal impurities in the semiconductor wafer can be removed without heat treatment or the like, and the present invention has been completed. If this method of removing heavy metal impurities is adopted as one step of a method for manufacturing a semiconductor wafer, various disadvantages of the conventional gettering method can be overcome.

According to the present invention, a high-power X is used for aggregating heavy metal impurities, particularly Cu, in the wafer bulk on the surface.
It has been found that it is extremely effective to perform long-time irradiation or to apply a strong electric field. That is, the total reflection X-ray fluorescence analysis is a method for non-destructively analyzing trace elements that are unevenly distributed on the “surface” or “near the surface” of a substance, and cannot detect the inside of a bulk in principle. is there. Conventionally, when impurity analysis is performed using total reflection fluorescent X-rays, X-rays are also emitted when evaluating impurities. Generally, when impurity analysis is performed using total reflection fluorescent X-rays, the measurement time, that is, the time for irradiating with X-rays for evaluation is as long as 10 to 17 minutes. However, in the case where no impurities having a detection limit or more existed on the wafer surface in advance, it was not possible to detect aggregation of Cu from the inside of the bulk to the surface only by irradiation during this analysis time.

However, by repeatedly performing impurity analysis using total reflection fluorescent X-rays, those which cannot be detected until now can be gradually detected. Although it depends on the contamination status of Cu and the output of X-rays, even if the surface is below the lower limit of detection, if there is much contamination inside the bulk, 30
It can be detected by X-ray irradiation for about a minute. Further, even if the contamination inside the bulk is small, the detection can be performed by extending the irradiation time of the X-ray. That is,
It was found that Cu in the bulk was gathered on the surface by X-ray irradiation.

It is preferable that the intensity of the X-ray irradiated to coagulate Cu is as high as possible. For example, when an enclosed X-ray tube is used as an X-ray generator and the X-ray intensity is output at a tube voltage of 40 kV and a tube current of 40 mA, a silicon wafer that can be detected by irradiation for about 5 hours (another analysis method) At 1.1 × 10 ¹¹
wafers where atoms / cm ² of Cu were detected)
X-ray intensity 1/4 output (tube voltage about 20 kV, tube current 20
When measured at mA), Cu was detected after 25 hours or more. This means that the higher the X-ray intensity is, the more preferable it is, which means that the aggregation of Cu is promoted and the surface is aggregated in a short time.

In the present invention, X for coagulating Cu is used.
The line intensity is preferably such that the tube voltage is 20 kV or more and the tube current is 20 mA or more. This is because the X-ray intensity varies depending on the type of the X-ray tube used or the setting of the monochromator, but if the tube voltage or the tube current is lower than this value, the X-ray intensity becomes lower.
This is because the line intensity is insufficient and Cu cannot be easily aggregated, or the X-ray irradiation time required to aggregate on the surface as described above becomes extremely long.

The incident angle of X-rays may be any number in principle, but is preferably 0.2 degrees or less. If it exceeds 0.2 degrees, X-rays can easily reach deep inside the wafer,
This is because Cu is aggregated at a deeper position, and as a result, the thickness of the aggregated layer becomes thick, and it takes time to remove the aggregated layer. Therefore, it is preferable that the incident angle of the X-rays on the wafer be 0.2 degrees or less. Here, the X-ray incident angle refers to an angle between the wafer surface and the incident X-ray.

The irradiation time of the X-rays on the wafer should be changed depending on the intensity of the X-rays, the concentration of Cu in the bulk, and the like, but the X-ray intensity is such that the tube voltage is 20 kV or more and the tube current is 20 mA or more. X-ray irradiation time is
It is preferable to carry out for 30 minutes or more. If the time is less than 30 minutes, Cu may not sufficiently aggregate on the surface even if the X-ray intensity is high.

By irradiating the surface of the semiconductor wafer with X-rays as described above, heavy metal impurities in the wafer can be agglomerated on the surface or in the vicinity of the surface. Heavy metal impurities can be removed.

In this case, irradiating the surface of the semiconductor wafer with X-rays does not only mean irradiating X-rays from the front side of the wafer, but also irradiating X-rays from the back side. Depending on the case, irradiation may be performed from the peripheral side, and the irradiation method may be selected as needed. In particular, after entering a wafer process for manufacturing a device on a semiconductor wafer, it is preferable to irradiate X-rays from the back side of the wafer. This is because irradiation from the front side may affect the device being manufactured, and it may be difficult to remove the aggregated layer after X-ray irradiation.

On the other hand, heavy metal impurities in the semiconductor wafer can be aggregated on the surface by applying an electric field to the surface of the wafer. The details of the reason why the application of an electric field to the surface of the semiconductor wafer can cause the heavy metal mixed in the bulk to agglomerate on or near the surface have not been elucidated yet. It is known that Cu in a silicon wafer is positively charged (D. Gilles, W. Schroter and
W. Bergholz, Phys. Rev. B41 (1990) 5770). Therefore, even at room temperature, if Cu and other heavy metals in the silicon wafer are positively charged, by performing a treatment such that the wafer surface is negatively charged, Cu and other heavy metals can be added to the wafer surface or Attracted near the surface,
It seems that they may aggregate.

For example, when a negative electric field is applied to a P-type silicon wafer, a band structure as shown in FIG. 1 is obtained. At this time, the surface layer is in an accumulation state, and it is considered that the bending of this band can attract a heavy metal having a positive charge in the bulk to the vicinity of the surface.

In the present invention, as a method for applying an electric field for aggregating the heavy metal in the wafer on the surface or in the vicinity of the surface, any method can be used as long as an electric field can be applied to the surface of the semiconductor wafer. It is preferable to apply a voltage to the surface of the semiconductor wafer in a contact type or a non-contact type by using a corona discharge treatment or an electrode. In this case, as long as an electric field is applied to the surface, the heavy metal agglomerates along the electric field. Therefore, it is not always necessary that the surface of the wafer is actually negatively charged. It is also possible to cause heavy metal impurities to agglomerate on the surface by allowing negative ions to be present on the surface by a method of pouring negative ions into the surface.

Here, the corona discharge treatment means that the diameter is 100
A high voltage of 6 to 10 kV is applied to a metal wire of about micron to cause corona discharge to treat the surface of a target dielectric or the like, and is widely used in electrophotography and the like.

In this method, for example, a corona discharge device whose conceptual diagram is shown in FIG. 2 can be used. That is, for example, a P-type silicon wafer 2 is placed on the stage 1, and the metal wire electrode 3 is disposed between the metal wire electrode 3 disposed substantially above the center of the silicon wafer 2 and the stage 1 so that the metal wire electrode 3 becomes a negative electrode. A high voltage is applied to generate corona discharge on the silicon wafer. Then, the surface of the silicon wafer on the stage charged positively has negative ions 4
Will be poured down.

Thus, an electric field is applied to the P-type silicon wafer, and the heavy metal in the positively charged wafer bulk is attracted to the surface. In this case, in order to effectively aggregate heavy metal impurities on the wafer surface, it is desirable to perform a corona discharge treatment at 1 × 10 ¹⁰ q / cm ² per ^second for 4 minutes or more.

A method of applying a voltage to the surface of a silicon wafer in a contact type or a non-contact type using electrodes can be performed by, for example, an apparatus whose conceptual diagram is shown in FIGS. .

FIG. 3 shows a case where the electrode 5 is brought into contact with the surface of the silicon wafer 2, and FIG. 4 shows a case where the electrode 5 is arranged substantially above the center of the silicon wafer 2. In such a configuration, by applying a high voltage between the back side of the P-type silicon wafer 2 and the electrode so that the electrode becomes a negative electrode, the positively charged heavy metal in the wafer bulk can be attracted to the surface. it can. In this case, the shape of the electrode may be any shape, and for example, various shapes such as a needle shape (probe) or a plate shape can be used. This is more preferable because there is no possibility of contaminating the toner.

In the method based on corona discharge, the amount of negative ions falling in one second is increased and the time is lengthened, whereby the amount of heavy metal impurities such as Cu attracted to the surface layer and aggregated can be further increased. it can. In the method using an electrode, by increasing the applied voltage and lengthening the time, the amount of heavy metal impurities such as Cu attracted to the surface layer and aggregated can be further increased.

According to such a method using corona discharge treatment or electrodes, unlike the case of heat treatment, the semiconductor wafer is not easily contaminated with heavy metals, and it is extremely simple and efficient. Impurities can be aggregated on or near the surface.

In the present invention, when the heavy metal impurities in the wafer are aggregated on the surface or in the vicinity of the surface by X-ray irradiation or corona discharge treatment, voltage application using electrodes, or other methods as described above, Preferably, the semiconductor wafer is heated to 300 ° C. or less. As described above, if the semiconductor wafer is slightly heated, the diffusion of heavy metal impurities is fast, so that the effect of aggregating the heavy metal impurities on the surface or in the vicinity of the surface is large, and the heavy metal impurities are efficiently attracted to the surface layer of the semiconductor wafer in a short time. It is also possible to reduce the processing time, the irradiation intensity, the amount of ions falling, the applied voltage, and the like.

In this case, the reason why the temperature is set to 300 ° C. or lower is that if the temperature is higher than this, the semiconductor wafer may be contaminated as in the case of performing a new heat treatment on the semiconductor wafer. If the heating is at a low temperature of 300 ° C. or less, there is almost no concern about contamination of impurities from the heating source, other members, and the like.

As described above, when the surface of the semiconductor wafer is irradiated with X-rays or an electric field is applied,
In order to heat the semiconductor wafer to a low temperature of 0 ° C. or lower, for example, in the corona discharge treatment apparatus shown in FIG. 2, a heater such as a heating wire is built in the stage 1, and the semiconductor wafer 2 placed on the stage 1 is heated by heating the stage 1. Should be heated. The heating mode is not limited to this, and the wafer may be heated by lamp heating, high-frequency heating, or the like that can heat the wafer in a non-contact manner.

Next, the removal of heavy metal impurities agglomerated on the wafer surface may be performed by etching, polishing, grinding, or the like, which is usually performed on a semiconductor wafer. The etching may be performed by immersing the semiconductor wafer in an acidic solution (for example, HF + nitric acid) or an alkaline solution (for example, NaOH, KOH). According to this method, the heavy metal impurity aggregation layer can be removed very easily, and there is almost no fear of newly contaminating the wafer.
However, since the entire surface of the wafer is etched away, when etching a wafer having a portion that cannot be removed by etching, such as a wafer after device fabrication, it is necessary to mask the portion before etching. .

For polishing, for example, a wafer is sandwiched between an upper and lower platen on which a polishing pad is attached, and while the free abrasive grains are supplied to the polishing portion, the platen is rotated in the reverse direction to rotate one or both surfaces of the wafer. It may be polished. With this method, the heavy metal impurity aggregation layer can be easily removed, and
Since the surface of the polished wafer is extremely flat, the quality of the processed wafer is also good.

The grinding may be performed by, for example, surface grinding of the wafer surface using fixed abrasive grains such as a grindstone.
With this method, the removal rate and removal amount are large,
The heavy metal impurity aggregation layer can be removed very simply and quickly.

Since these etching, polishing, and grinding must not be performed only for removing heavy metal impurities agglomerated on the wafer surface, etching, polishing, and grinding are performed in a usual semiconductor wafer manufacturing process. X-ray irradiation or application of an electric field to the wafer before the step is performed, and then these steps are performed to remove the heavy metal impurity coagulation layer in combination with the etching, polishing, and grinding in the original semiconductor wafer manufacturing process. May be.

By employing such a method for removing heavy metal impurities as one step of a method for manufacturing a semiconductor wafer, heavy metal impurities can be reliably removed from the semiconductor wafer when necessary without heat treatment or the like. be able to.

By the way, a method for manufacturing a semiconductor wafer is as follows.
Although it is composed of an extremely large number of steps and is complicated and diversified, a rough step in manufacturing an integrated circuit such as an IC is a wafer manufacturing step (FIG. 5) as shown in FIG.
(A)) and a wafer process step (FIG. 5 (B)). In the present invention, these are collectively referred to as a semiconductor wafer manufacturing method.

The wafer manufacturing process shown in FIG. 5A includes a Czochralski method (CZ method) and a floating zone method (F
Z method), etc., by slicing a single crystal rod manufactured by a single crystal manufacturing apparatus such as an inner peripheral blade cutting device or a wire saw to obtain a thin disk-shaped wafer;
Chamfering step B for chamfering the outer peripheral edge of the wafer obtained in the slicing step A in order to prevent cracking or chipping
And a lapping step C for lapping the chamfered wafer to flatten the wafer, an etching step D for removing the processing strain remaining on the sliced or chamfered and lapped wafer surface, and polishing the surface of the etched wafer. And a final polishing step F for cleaning the mirror-polished wafer to remove abrasives and foreign substances adhering to the mirror-polished wafer.

The wafer process step shown in FIG. 5B includes an oxidation step G for forming an oxide film on the surface of the wafer, a photolithography step H for applying a photosensitive resin to form a pattern on the wafer, and exposing the photosensitive resin to light. A diffusion step I for diffusing impurities into the windows of the oxide film which has been patterned and opened in the photolithography step, and devices and circuits are produced by repeating these steps. An insulating film forming step J for insulation, a wiring step K for depositing and wiring a conductive metal, and finally a protective film are formed to complete the manufacture of the semiconductor wafer. After that, each chip is cut and an operation test is performed. The subsequent steps are referred to as an assembling step, a test process step, and the like.

In such a semiconductor wafer manufacturing method, the heavy metal impurity removing step of the present invention does not require heat treatment or the like, so that it can be performed at any stage in principle. In this case, the heavy metal impurity removing step can be performed in the etching step D in the wafer manufacturing step. That is, heavy metal impurities are aggregated on the wafer surface by irradiating the wafer after the lapping step C with X-rays or applying an electric field, and then the etching step D is performed. By doing so, the aggregated layer of heavy metal impurities after X-ray irradiation or electric field application can be removed together in the etching step D.

Further, the heavy metal impurity removing step can be performed in the mirror polishing step E in the wafer manufacturing step.
That is, X-ray irradiation or an electric field is applied to the wafer after the etching step D to apply heavy metal impurities to the wafer surface, and then the mirror polishing step E is performed. By doing so, the aggregated layer of heavy metal impurities after X-ray irradiation or electric field application can be removed together in the mirror polishing step E.

The heavy metal impurity removing step may be performed after the wafer manufacturing step (FIG. 5A), that is, before the wafer processing step (FIG. 5B). This is because a wafer process in which high-temperature heat treatment or the like is performed on a wafer from which heavy metal impurities have been reliably removed can be performed.

Further, the heavy metal impurity removing step may be performed after the high temperature heat treatment such as the diffusion step I in the wafer process. When a semiconductor wafer is subjected to high-temperature heat treatment, it is easily contaminated by heavy metal impurities, but even if the wafer is contaminated by these high-temperature heat treatments, it is possible to reliably remove heavy metal impurities by performing the treatment of the present invention thereafter. It is.

Further, the heavy metal impurity removing step can be performed before the wiring step K in the wafer process step. Since all high-temperature heat treatments that contaminate the wafer are completed before the wiring process, if heavy metal impurities are removed according to the present invention at this time, device malfunctions based on heavy metal impurities can be eliminated. Is possible.

[0058]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of the present invention will be specifically described below with reference to examples, but the present invention is not limited to these.

[0059]

EXAMPLE (Example 1) 200 mm in diameter and 725 μm in thickness
A single crystal silicon wafer having both sides mirror-polished was prepared, and the mirror surface was irradiated with X-rays to test whether heavy metal impurities could be aggregated on the surface and removed. The irradiation of X-rays was performed using a total reflection X-ray fluorescence analyzer (TREX610 manufactured by Technos), and the X-ray source was a tungsten sealed tube with a tube voltage of 40 kV, a tube current of 40 mA,
The conditions were such that the X-ray incidence angle was 0.09 degrees.

The single-crystal silicon wafer used is a commonly used one, and its surface is not contaminated by heavy metal impurities. First, when the surface concentration of heavy metal impurities on this wafer was measured by a total reflection X-ray fluorescence spectrometer, it was confirmed that the concentration was below the lower limit of detection.

Next, after contaminating the silicon wafer with a solution containing Cu, Cu is diffused into the inside of the wafer bulk by a heat treatment, and then the surface concentration is again measured by the total reflection fluorescence X.
When measured with a line analyzer, it was confirmed that the value was below the lower limit of detection.

That is, the surface of a normal silicon wafer does not reach a concentration that can be detected by a total reflection X-ray fluorescence analyzer, and even if the silicon wafer is intentionally contaminated, Cu is introduced into the bulk by heat treatment. It can be seen that if diffused, contamination near the surface cannot be detected. The lower limit of detection of the apparatus of this embodiment is 8.1 × 10 ⁹ a
toms / cm ² .

Next, the contaminated wafer in which the Cu was diffused was irradiated with X-rays under the above-mentioned conditions. The analysis of the Cu concentration on the surface was performed simultaneously with the irradiation of X-rays by a total reflection X-ray fluorescence analyzer. The integration of X-rays was performed hourly, and the conversion of concentration was also performed based on the integrated X-ray intensity for one hour. FIG. 6A shows the change with time of the concentration of Cu detected by this analysis.
Shown in

FIG. 6A shows the time-dependent change of detected Cu in a wafer intentionally contaminated with Cu. The Cu concentration, which was initially lower than the lower limit of detection, was reduced by X-ray irradiation for 5 hours. Has exceeded the lower limit of detection, and can be detected by the total reflection X-ray fluorescence spectrometer. Thereafter, the amount of detected Cu increases with the irradiation time. That is, by irradiating X-rays, heavy metal impurities Cu
Are aggregated on the wafer surface.

Next, a total of 4
After irradiating with X-rays for 0 hour, the wafer was immersed in a 50% by weight aqueous solution of NaOH, and the surface of the silicon wafer was etched away by about 10 nm. Next, the surface Cu concentration of the wafer from which the surface layer was removed by etching was measured again by a total reflection X-ray fluorescence analyzer.

FIG. 6B shows the measurement results. As is clear from the results, the concentration of Cu has been the lower limit of detection from the beginning, and the lower limit of detection (8.1 × 10 ⁹ atoms / c) is the same as in the initial stage of measurement even after 35 hours of X-ray irradiation.
m ² ). That is, the heavy metal impurity layer aggregated on the surface by X-ray irradiation is removed by etching,
After that, even if the X-ray is irradiated for a long time, the heavy metal impurities in the bulk are removed, so that the heavy metal impurities no longer aggregate on the surface and are not detected.

Example 2 150 mm in diameter and 625 in thickness
Six micron P-type single crystal silicon mirror-finished wafers were prepared, and after the following treatments were performed, the Cu concentration on the surface was measured. The measurement was performed using a total reflection X-ray fluorescence analyzer (TREX610 manufactured by Technos), and the X-ray source was a tungsten sealed tube, a tube voltage of 30 kV and a tube current of 200 mA were selected as conditions for evaluation.

Of the six single-crystal silicon wafers used for evaluation, two were left uncontaminated and the other two were contaminated with a solution containing low-concentration Cu, and then the Cu was processed by heat treatment. Diffused inside the bulk,
The remaining two sheets were contaminated with a solution containing high-concentration Cu, and then Cu was diffused into the wafer bulk by heat treatment.

Of these two sheets, one was measured for the surface Cu concentration by a total reflection X-ray fluorescence analyzer under the above conditions. On the other hand, of the two sheets, the remaining one was subjected to surface treatment by corona discharge. The apparatus used is as shown in FIG. 2, and the processing conditions are 1 × 10 ¹⁰ per second.
While maintaining the wafer at 250 ° C. at q / cm ² ,
The corona discharge treatment was performed for 120 minutes. After the treatment, the surface Cu concentration was measured by a total reflection X-ray fluorescence analyzer in the same manner as described above.

FIG. 7 shows the result. Looking at this figure,
Naturally, even if the silicon wafer is not contaminated, even if the silicon wafer is intentionally contaminated, if Cu is diffused into the bulk by heat treatment, the contamination near the surface will be lower than the lower detection limit, and total reflection X-ray fluorescence It turns out that it cannot be detected by the analysis.

On the other hand, it can be seen that Cu diffused in the bulk and cannot be detected on the surface can be detected by performing surface treatment by corona discharge as in the present invention. That is, by applying an electric field to the surface by corona discharge, C diffused into the bulk.
It can be seen that u is attracted to the surface and aggregates.

Next, this silicon wafer was immersed in a 50% by weight aqueous solution of NaOH in the same manner as in Example 1, and the surface of the silicon wafer was etched away by about 10 nm. Next, the wafer from which the surface layer was removed by etching was again measured for its surface Cu concentration by a total reflection X-ray fluorescence spectrometer. As a result, the concentration of Cu was lower than the detection limit from the beginning. Cu after discharge treatment
Could not be detected.

The present invention is not limited to the above embodiment. The above-described embodiment is an exemplification, and has substantially the same configuration as the technical idea described in the claims of the present invention, and any device having the same operation and effect can be realized by the present invention. It is included in the technical scope of the invention.

For example, in the above embodiment, the mirror surface (the mirror surface of the polished wafer) is irradiated with an X-ray or an electric field is applied.
The line irradiation and the electric field application are not particularly limited to the surface state of the wafer, but may be any surface state such as after lapping, after etching, after surface grinding, after device fabrication, and the like.

Further, in the above-described embodiment, the case where the semiconductor wafer is made of semiconductor silicon has been described as an example. However, the present invention is not limited to this.
For example, germanium or GaAs, GaP, In
The present invention can be similarly applied to a compound semiconductor single crystal wafer such as P.

In the above description, the method of manufacturing a semiconductor wafer has been described with reference to typical steps in the case of manufacturing an IC. However, this is merely an example.
There are a variety of methods for manufacturing semiconductor wafers, and there are other steps in addition to the above-described typical examples. In addition, the order of the steps is changed, inserted, omitted, etc. according to the purpose. In addition, the device to be manufactured is not limited to an integrated circuit such as an IC, and the present invention is applicable to a case where a so-called individual semiconductor such as a diode is manufactured.

[0077]

According to the present invention, the semiconductor wafer is irradiated with an X-ray or an electric field to thereby remove the heavy metal impurity layer agglomerated on the surface. It is possible to remove heavy metal impurities in the wafer without requiring a pretreatment which easily causes contamination and without being affected by wafer quality such as oxygen concentration. In addition, high-temperature heat treatment for removing heavy metal impurities is not required, and it can be applied at any desired stage of the semiconductor wafer manufacturing process, and there is no problem such as a reduction in removal capability.

Therefore, by employing this as one step of the method for manufacturing a semiconductor wafer, a high-quality semiconductor wafer can be obtained, and the manufacturing yield, productivity, and electrical characteristics of the semiconductor device to be manufactured can be improved. Quality can be improved.

[Brief description of the drawings]

FIG. 1 is an explanatory diagram for explaining a band structure when a negative electric field is applied to a P-type silicon wafer in the present invention.

FIG. 2 is a conceptual diagram of a corona discharge device used in a corona discharge treatment method.

FIG. 3 is a conceptual diagram of an apparatus for applying a voltage to the surface of a silicon wafer in a contact manner using electrodes.

FIG. 4 is a conceptual diagram of a device for applying a voltage to the surface of a silicon wafer in a non-contact manner using electrodes.

FIG. 5 is a process chart showing an example of a process for manufacturing an IC. (A) Wafer manufacturing process, (B) Wafer process process.

FIG. 6 is a graph showing a change over time in a detected amount of Cu on a wafer surface with X-ray irradiation in Example 1. (A) a wafer after intentional contamination of Cu, and (B) a wafer from which an aggregation layer of surface heavy metal impurities has been removed by etching.

FIG. 7 is a result diagram of Example 2.

[Explanation of symbols]

1 ... stage, 2 ... silicon wafer, 3 ... metal wire electrode, 4 ... negative ion,
5 ... electrodes.

────────────────────────────────────────────────── ─── Continuation of the front page (56) References JP-A-11-101755 (JP, A) JP-A-11-201880 (JP, A) JP-A 9-190993 (JP, A) JP-A-6-2018 252077 (JP, A) JP-A-6-252078 (JP, A) JP-A-6-196402 (JP, A) JP-A-9-199383 (JP, A) JP-A 8-279516 (JP, A) (58) Field surveyed (Int.Cl. ⁷ , DB name) H01L 21/322 C30B 33/04 H01L 21/268 H01L 21/3065

Claims (19)

(57) [Claims] 1. A method for removing heavy metal impurities in a semiconductor wafer by irradiating a surface of the semiconductor wafer with X-rays to aggregate heavy metal impurities in the wafer on or near the surface, and then removing a heavy metal aggregation layer. how to. 2. The method according to claim 1, wherein the time of irradiating the surface of the semiconductor wafer with X-rays is 30 minutes or more.
3. The method for removing heavy metal impurities in a semiconductor wafer according to item 2. 3. The X-ray irradiation condition is set at a tube voltage of 20 kV.
3. The method for removing heavy metal impurities in a semiconductor wafer according to claim 1, wherein the tube current is set to 20 mA or more. 4. The method according to claim 1, wherein the incident angle of the X-rays on the wafer is 0.
4. The method for removing heavy metal impurities in a semiconductor wafer according to claim 1, wherein the temperature is set to twice or less. 5. A heavy metal impurity in the semiconductor wafer is removed by applying an electric field to the surface of the semiconductor wafer to aggregate heavy metal impurities in the wafer on or near the surface, and then removing the heavy metal aggregation layer. Method. 6. The method for removing heavy metal impurities in a semiconductor wafer according to claim 5, wherein the method of applying an electric field to the surface of the semiconductor wafer is performed by performing a corona discharge treatment on the surface of the semiconductor wafer. Method. 7. The method of applying an electric field to the surface of a semiconductor wafer by applying a voltage to the surface of the wafer in a contact or non-contact manner using electrodes. 3. The method for removing heavy metal impurities in a semiconductor wafer according to item 2. 8. The method according to claim 1, wherein when the heavy metal impurities in the wafer are agglomerated on the surface or near the surface, the wafer is heated to 300 ° C. or less. A method for removing heavy metal impurities from a semiconductor wafer. 9. The method for removing heavy metal impurities in a semiconductor wafer according to claim 1, wherein the removal of the heavy metal aggregation layer is performed by etching. 10. The method for removing heavy metal impurities in a semiconductor wafer according to claim 1, wherein the removal of the heavy metal aggregation layer is performed by polishing. 11. The method for removing heavy metal impurities in a semiconductor wafer according to claim 1, wherein the heavy metal aggregation layer is removed by grinding. 12. The method for removing heavy metal impurities in a semiconductor wafer according to claim 1, wherein the semiconductor wafer is silicon. 13. A method for manufacturing a semiconductor wafer, comprising at least the heavy metal impurity removing step according to any one of claims 1 to 11. 14. The method for manufacturing a semiconductor wafer according to claim 13, wherein the semiconductor wafer is silicon. 15. The method for manufacturing a semiconductor wafer according to claim 13, wherein said heavy metal impurity removing step is performed in an etching step in a wafer manufacturing step. 16. The method for manufacturing a semiconductor wafer according to claim 13, wherein said heavy metal impurity removing step is performed in a mirror polishing step in a wafer manufacturing step. 17. The method according to claim 13, wherein said heavy metal impurity removing step is performed before a wafer process step.
15. A method for manufacturing a semiconductor wafer according to claim 14. 18. The method according to claim 13, wherein the step of removing heavy metal impurities is performed after a high-temperature heat treatment in a wafer process. 19. The method for manufacturing a semiconductor wafer according to claim 13, wherein the step of removing heavy metal impurities is performed before a wiring step in a wafer process step.