JP3556190B2 - Spread modulation device, spread modulation method, program, and information recording medium - Google Patents

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a filter device, a spread modulation device, a filter method, a spread modulation method, a program, and an information recording medium.
[0002]
[Prior art]
2. Description of the Related Art Conventionally, wireless communication technologies based on systems such as an IMT 2000 W-CDMA system, an lCDMA 2000 system, and a wireless LAN IEEE 802.11b have been proposed. In such wireless communication, CDMA (Code Division Multiple Access) is used to use the same frequency band for a plurality of communication connections.
[0003]
In CDMA, a plurality of communication connections can be put in the same frequency band and a desired communication connection can be separated from the same frequency band by spreading and modulating communication information using different spreading codes.
[0004]
On the other hand, in these wireless communications, it is common to convert information to be transmitted into a series of complex numbers to perform processing.
[0005]
[Problems to be solved by the invention]
Therefore, in such a wireless communication technique, a simple technique for performing spread modulation using a spread code having good separation performance is required.
[0006]
An object of the present invention is to provide a filter device, a spread modulation device, a filter method, a spread modulation method, a program, and an information recording medium suitable for performing such spread modulation.
[0007]
[Means for Solving the Problems]
To achieve the above object, the following invention is disclosed in accordance with the principle of the present invention.
[0008]
The filter device according to the first aspect of the present invention uses a predetermined real impulse constant r (−1 ≦ r ≦ 1), a predetermined real number constant x (x ≠ 0), and a predetermined delay time constant D, Filtering a sequence of complex numbers, an input receiving unit, a real delay unit, a real amplification unit, a real addition unit, an imaginary delay unit, an imaginary amplification unit, an imaginary addition unit, and an output unit, The configuration is as follows.
[0009]
Here, the input receiving unit receives an input of a complex number sequence.
[0010]
On the other hand, the real delay unit converts the sequence of the real part of the complex number sequence received by the input receiving unit into 0, D, 2D, 3D,..., (N−1) D (where N is a predetermined value). A plurality of sequences delayed by a positive integer are output.
[0011]
Furthermore, the real amplification unit, when the delay time is T, multiplies a plurality of sequences amplified and multiplied by x (-r) ^{NT / D} , when each of the plurality of sequences output by the real delay unit is output. Output. As described above, each of the delay time T of a plurality of streams obtained by delayed, 0, D, 2D, 3D, ..., because it is (N-1) D, the gain for each,
x (-r) ^{N-0 / D} = x (-r) ^N ,
x (-r) ^{ND / D} = x (-r) ^N-1 ,
x (-r) ^{N-2D / D} = x (-r) ^N-2 ,
x (-r) ^{N-3D / D} = x (-r) ^N-3 ,… ,
x (-r) ^{N- (N-1) D / D} = x (-r) ¹
It becomes.
[0012]
Then, the real adder outputs the sum of the plurality of streams amplified and output by the real amplifier.
[0013]
On the other hand, the imaginary delay unit delays the imaginary part sequence by 0, D, 2D, 3D,..., (N−1) D among the complex number sequences received by the input receiving unit. Output the series.
[0014]
Further, the imaginary amplification unit, when the delay time is T, a plurality of sequences amplified and multiplied by x (-r) ^{NT / D} , when each of the plurality of sequences output by the imaginary delay unit is T. Output. As described above, each of the delay time T of a plurality of streams obtained by delayed, 0, D, 2D, 3D, ..., because it is (N-1) D, the gain for each,
x (-r) ^{N-0 / D} = x (-r) ^N ,
x (-r) ^{ND / D} = x (-r) ^N-1 ,
x (-r) ^{N-2D / D} = x (-r) ^N-2 ,
x (-r) ^{N-3D / D} = x (-r) ^N-3 ,… ,
x (-r) ^{N- (N-1) D / D} = x (-r) ¹
It becomes.
[0015]
The imaginary adding unit outputs the sum of the plurality of streams amplified and output by the imaginary amplifying unit.
[0016]
On the other hand, the output unit outputs a complex number sequence in which the sequence output by the real addition unit is a real part and the sequence output by the imaginary addition unit is an imaginary part.
[0017]
In the filter device of the present invention, the real delay unit and the imaginary delay unit are D, 2D, and D, respectively, instead of “delay by 0, D, 2D, 3D,..., (N−1) D, respectively”. Delay by 3D, ..., (N-1) D, ND, and the real and imaginary amplifiers "amplify by x (-r) ^{NT / D} times if the delay time is T" Instead, when the delay time is T, it can be configured to amplify by multiplying by x (−r) ^{N− (TD) / D.} In this case, the amplification factor for each is
x (-r) ^{N- (DD) / D} = x (-r) ^N ,
x (-r) ^{N- (2D-D) / D} = x (-r) ^N-1 ,
x (-r) ^{N- (3D-D) / D} = x (-r) ^N-2 , ... ,
x (-r) ^{N-((N-1) DD) / D} = x (-r) ² ,
x (-r) ^{N- (ND-D) / D} = x (-r) ¹
It becomes.
[0018]
Further, in the filter device of the present invention, the real amplifying unit and the imaginary amplifying unit are configured such that “if the delay time is T, the signal is amplified by multiplying by x (−r) ^{NT / D} ” instead of the delay time. In the case of T, it can be configured to amplify by multiplying x (−r) ^{1 + T / D.} In this case, the amplification factor for each is
x (-r) ^{1 + 0 / D} = x (-r) ¹ ,
x (-r) ^{1 + D / D} = x (-r) ² ,
x (-r) ^{1 + 2D / D} = x (-r) ³ ,
x (-r) ^{1 + 3D / D} = x (-r) ⁴ ,… ,
x (-r) ^{1+ (N-1) D / D} = x (-r) ^N
It becomes.
[0019]
In the filter device of the present invention, the real delay unit and the imaginary delay unit are D, 2D, and D, respectively, instead of “delay by 0, D, 2D, 3D,..., (N−1) D, respectively”. Delay by 3D, ..., (N-1) D, ND, and the real and imaginary amplifiers "amplify by x (-r) ^{NT / D} times if the delay time is T" Instead, when the delay time is T, the delay time can be multiplied by x (−r) ^{T / D} and amplified. In this case, the amplification factor for each is
x (-r) ^{D / D} = x (-r),
x (-r) ^{2D / D} = x (-r) ² ,
x (-r) ^{3D / D} = x (-r) ³ ,… ,
x (-r) ^{(N-1) D / D} = x (-r) ^N-1 ,
x (-r) ^{ND / D} = x (-r) ^N
It becomes.
[0020]
A filter device according to another aspect of the present invention performs a filtering process on a complex number sequence using a predetermined impulse constant r (−1 ≦ r ≦ 1) and a predetermined delay time constant D; It has a real processing unit, an imaginary processing unit, and an output unit, and is configured as follows.
[0021]
Here, the input receiving unit receives an input of a complex number sequence.
[0022]
On the other hand, the real processing unit receives, as an input, a sequence of the real part of the complex number sequence received by the input receiving unit, and outputs a filtered sequence.
[0023]
Further, the imaginary processing unit receives, as an input, a sequence of an imaginary part of the complex number sequence received by the input receiving unit, and outputs a filtered sequence.
[0024]
Then, the output unit outputs a complex number sequence in which the sequence output by the real processing unit is a real part and the sequence output by the imaginary processing unit is an imaginary part.
[0025]
On the other hand, the real processing unit and the imaginary processing unit output a plurality of sequences obtained by delaying the input sequence, amplify each of the plurality of sequences, output the sum of the amplified sequences, and The delay times of the plurality of streams form an arithmetic progression having a tolerance D, and the amplification factor for each of these forms a geometric progression having a common ratio -r or a common ratio -1 / r.
[0026]
The predetermined real impulse constant r can be configured to be equal to 2-3 ^1/2 in fixed point representation with a predetermined precision.
[0027]
In the filter device according to the present invention, the real delay unit, the real amplification unit, the real addition unit, the imaginary delay unit, the imaginary amplification unit, and the imaginary addition unit include an ASIC (Application Specific Integrated Circuit) and a DSP (Digital Signal Processor). Alternatively, it can be configured to be constituted by an FPGA (Field Programmable Gate Array).
[0028]
A spread modulation apparatus according to another aspect of the present invention uses the above-described filter apparatus, includes a scramble unit and a modulation unit, and is configured as follows.
[0029]
Here, the scrambling unit outputs a complex number obtained by scrambling a real part and an imaginary part of the input digital complex number with a predetermined spreading code having a chip rate of 1 / D.
[0030]
On the other hand, the modulation section applies the complex number output from the scrambling section as an input to the filter device and performs spread modulation.
[0031]
Further, in the spread modulation apparatus of the present invention, scrambling by the scrambling unit can be configured to conform to the IMT 2000 W-CDMA system standard, the CDMA 2000 system standard, or the wireless LAN IEEE 802.11b standard.
[0032]
In the spread modulation apparatus of the present invention, the scrambling unit may be configured to scramble one of a Gold code, a Baker sequence, and a Walsh-Hadamard code as a spread code.
[0033]
Further, in the spread modulation apparatus of the present invention, the spread code of the scramble section can be configured to be given at each point of the trajectory of the ergodic mapping dynamics system.
[0034]
Further, in the spread modulation apparatus of the present invention, the mapping dynamic system having the ergodic property of the scramble portion can be configured to be a mapping dynamic system having a Chebyshev polynomial of second or higher order.
[0035]
A filtering method according to another aspect of the present invention includes a step of filtering a sequence of complex numbers using a predetermined impulse constant r (−1 ≦ r ≦ 1) and a predetermined delay time constant D; It includes an actual processing step, an imaginary processing step, and an output step, and is configured as follows.
[0036]
Here, in the input receiving step, a series of complex numbers is received.
[0037]
On the other hand, in the actual processing step, of the complex number sequences received in the input receiving step, the sequence of the real part is received as an input and the filtered sequence is output.
[0038]
Further, in the imaginary processing step, of the complex number series received in the input receiving step, a series of imaginary parts is received as an input, and a filtered series is output.
[0039]
Then, in the output step, a complex number sequence is output in which the sequence output in the real processing step is a real part and the sequence output in the imaginary processing step is an imaginary part.
[0040]
On the other hand, in the real processing step and the imaginary processing step, a plurality of sequences obtained by delaying the input sequence are output, each of the plurality of sequences is amplified, and the sum of the amplified sequences is output. The delay times of the plurality of streams form an arithmetic progression having a tolerance D, and the amplification factor for each of these forms a geometric progression having a common ratio -r or a common ratio -1 / r.
[0041]
Further, in the filter method of the present invention, the predetermined real impulse constant r can be configured to be equal to 2-3 ^1/2 in a fixed-point representation with a predetermined precision.
[0042]
In the filter method of the present invention, the real delay step, the real amplification step, the real addition step, the imaginary delay step, the imaginary amplification step, and the imaginary addition step are configured to be executed in an ASIC, a DSP, or an FPGA. can do.
[0043]
A spread modulation method according to another aspect of the present invention uses the above filter method, includes a scramble step and a modulation step, and is configured as follows.
[0044]
Here, in the scrambling step, a complex number obtained by scrambling the real part and the imaginary part of the input digital complex number with a predetermined spreading code having a chip rate of 1 / D is output.
[0045]
On the other hand, in the modulation process, the complex number output in the scrambling process is provided as an input to the filter method, and spread modulation is performed.
[0046]
Further, in the spread modulation method of the present invention, scrambling in the scrambling step can be configured to conform to the IMT 2000 W-CDMA system standard, the CDMA 2000 system standard, or the wireless LAN IEEE802.11b standard.
[0047]
Further, in the spread modulation method of the present invention, in the scrambling step, any one of a Gold code, a Baker sequence, and a Walsh-Hadamard code may be scrambled as a spread code.
[0048]
Further, in the spread modulation method of the present invention, the spread code in the scrambling step can be configured to be given at each point of the trajectory of the ergodic mapping dynamics system.
[0049]
Further, in the spread modulation method of the present invention, the mapping dynamic system having ergodicity in the scrambling step may be configured to be a mapping dynamic system having a second order or higher Chebyshev polynomial.
[0050]
A program according to another aspect of the present invention causes a computer (including an ASIC, a DSP, and an FPGA) to function as the filter device or the spread modulation device, or causes a computer to execute the filter method or the spread modulation method. Configure to run.
[0051]
Further, the program of the present invention can be recorded on a computer-readable information recording medium (including a compact disk, a flexible disk, a hard disk, a magneto-optical disk, a digital video disk, a magnetic tape, or a semiconductor memory).
[0052]
A general-purpose computer including a storage device, a computing device, an output device, a communication device, a portable terminal such as a PHS (Personal Handyphone System) device and a game device, an information processing device such as a parallel computer, and an ASIC. , A DSP, an FPGA, or the like, the filter device, the spread modulation device, the filter method, and the spread modulation method described above can be realized.
[0053]
Further, independently of these devices, the information recording medium of the present invention can be distributed and sold at stores and the like, and the program of the present invention itself can be distributed and sold via a computer communication network.
[0054]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, embodiments of the present invention will be described. The embodiments described below are for the purpose of explanation, and do not limit the scope of the present invention. Therefore, those skilled in the art can adopt embodiments in which each of these elements or all elements are replaced with equivalents, but these embodiments are also included in the scope of the present invention. .
[0055]
(First Embodiment)
FIG. 1 is a schematic diagram showing a schematic configuration of the filter device according to the first embodiment of the present invention.
[0056]
The filter device 101 of the present embodiment filters a complex number sequence using a predetermined impulse constant r (−1 ≦ r ≦ 1) and a predetermined delay time constant D, and performs input processing on the input receiving unit 102 and actual processing. It includes a unit 103, an imaginary processing unit 104, and an output unit 105.
[0057]
First, the input receiving unit 102 receives an input of a complex number sequence.
[0058]
Next, the real processing unit 103 receives, as an input, a sequence of the real part of the complex number sequence received by the input receiving unit 102 and outputs a filtered sequence.
[0059]
On the other hand, the imaginary processing unit 104 receives a sequence of an imaginary part as an input from among the series of complex numbers whose input has been received by the input receiving unit 102, and outputs a filtered sequence.
[0060]
The processes performed by the real processing unit 103 and the imaginary processing unit 104 can be executed in parallel.
[0061]
Then, output section 105 outputs a complex number sequence in which the sequence output from real processing section 103 is a real part and the sequence output from imaginary processing section 104 is an imaginary part.
[0062]
Here, the real processing unit 103 and the imaginary processing unit 104 output a plurality of sequences obtained by delaying the input sequence, amplify each of the plurality of sequences, and output a sum of the amplified sequences. However, the delay times of the plurality of streams form an arithmetic progression of the tolerance D, and the amplification factor for each of them forms a geometric progression of the common ratio r or the common ratio -1 / r.
[0063]
FIG. 2 is a schematic diagram illustrating a schematic configuration of an FIR (Finite Impulse Response) filter included in the real processing unit 103 and the imaginary processing unit 104. Hereinafter, description will be made with reference to this figure.
[0064]
The FIR filter 201 includes a plurality of delay units 202, a plurality of amplification units 203, and an addition unit 204.
[0065]
As for the input sequence, the plurality of delay units 202 output the input sequence by delaying the input sequence by a predetermined delay time D. Therefore, in the present embodiment, a sequence delayed by 0, D, 2D, 3D,..., (N−1) D is input to each of the plurality of amplifying units 203. Here, N is the number of delay sequences.
[0066]
Note that another delay device may be arranged before the plurality of delay units 202. In this case, the delay times of the delayed sequences provided to the plurality of amplifying units 203 are each added by the delay time of another delay device. In particular, if the delay time of this other delay device is also D, a sequence delayed by D, 2D, 3D, 4D,..., (N-1) D is input to each of the plurality of amplifying units.
[0067]
On the other hand, the amplification factors of the plurality of amplification units 203 are x, x (-r), x (-r) ² , x (-r) ³ , ..., x (-r) ^N. Here, x (x ≠ 0) is a predetermined real constant, -r (-1 ≦ r ≦ 1 ) is a predetermined impulse constant, r = 2 ^{- 3 1/2} may be desirable to.
[0068]
The adder 204 adds the outputs of the plurality of amplifiers 203.
[0069]
Therefore, turn the sequence _{input, ..., s -2, s -1} , s 0, s 1, s 2, when was ..., the output of the FIR filter 201 is as follows (ease of understanding Therefore, the delay time of the output with respect to the input is ignored, and the input has an infinite length.)
[0070]
…,
x (s- _N-1 (-r) ^N-1 + ... + s- ₄ (-r) ² + s- ₃ (-r) ¹ + s- ₂ ),
x (s− _N (−r) ^N−1 +... + s ₋₃ (−r) ² + s ₋₂ (−r) ¹ + s ₋₁ ),
_{^{x (s -N + 1 (-r}} ) N-1 + ... + s -2 (-r) 2 + s -1 (-r) 1 + s 0),
_{^{x (s -N + 2 (-r}} ) N-1 + ... + s -1 (-r) 2 + s 0 (-r) 1 + s 1),
_{^{x (s -N + 3 (-r}} ) N-1 + ... + s 0 (-r) 2 + s 1 (-r) 1 + s 2),
…
[0071]
The amplification factors of the plurality of amplifying units 203 are x (−r) ^N−1 , x (−r) ^N−2 ,..., X (−r) ² , x (−r) ¹ ,. x may be used.
[0072]
With this configuration, the delay times of the plurality of delay sequences output from the plurality of delay units 202 form an arithmetic progression of the tolerance D, and the amplification factor for each of them is the common ratio (−r) or This results in a geometric progression of the common ratio (−1 / r).
[0073]
The inventors disclose the theoretical background of such an FIR filter 201 in Japanese Patent Application No. 2001-8740. For example, it has been found that the use of the FIR filter 201 in a CDMA communication system can increase the number of users by 15% as compared with the conventional case.
[0074]
In the present embodiment, the real part and the imaginary part of the complex number sequence are respectively filtered using two FIR filters 201.
[0075]
Note that each of the delay unit 202, the amplification unit 203, and the addition unit 204 can be configured by a simple arithmetic circuit. Therefore, the calculation may be performed based on software using a computer, or the calculation may be performed using dedicated hardware such as an ASIC, DSP, or FPGA.
[0076]
(Second embodiment)
In the second embodiment of the present invention, the above-described filter device 101 is applied to a W-CDMA standard mobile phone. FIG. 3 is a schematic diagram showing a schematic configuration of a spread modulation apparatus that performs spread modulation processing for W-CDMA using the above filter apparatus.
[0077]
Spread modulation apparatus 301 includes scramble section 302 and modulation section 303.
[0078]
Here, the scramble unit 302 outputs a complex number obtained by scrambling the real part and the imaginary part of the input digital complex number with a predetermined spreading code having a chip rate of 1 / D.
[0079]
Since this embodiment is for W-CDMA, scrambling is performed according to the IMT2000 W-CDMA system standard. However, other wireless communication systems (CDMA2000 system standard, wireless LAN IEEE802 .11b)), scrambling suitable for the system is performed.
[0080]
FIG. 3 shows an example in which the real part and the imaginary part are scrambled together. In the embodiment shown in FIG. 3, the scrambling is performed using a gold code having a length of 2 ²⁵ -1 as a scrambling code. This Gold code is generated by taking an exclusive OR for each bit of the M-sequence generated from the generator polynomial on the two kinds of 25-order finite field GF (2).
[0081]
In addition, H. Holma and A. Toskala, "W-CDMA for UTMS" (John Wiley and Son, 2001) or 3rd Generation Partnership Project (3GPP); According to the W-CDMA standard, a scrambling code is generated at 3.84 M chips / sec.
[0082]
The scrambled multi-bit information is converted by a sign mapper (SM) into a “bit string” or “sequence of“ bit strings ”, and these are given to the filter device 101 in the modulation unit 303 as a complex number sequence input. Can be The output of the filter device 101 in the modulation unit 303 is the output of the spread modulation device 301.
[0083]
The scrambling unit can be configured to scramble the spreading code using any one of a Gold code, a Baker sequence, and a Walsh-Hadamard code as a spreading code.
[0084]
In addition, the spreading code of the scramble part may be given at each point of the trajectory of the ergodic mapping dynamics system. An example of a mapping dynamic system having ergodicity is a system that maps _a Chebyshev polynomial F _a (•) of order 2 or more to a.
[0085]
The Chebyshev polynomial is
F _a (a, cos θ) = cos (a θ)
, And can be defined by the addition theorem of the cosine function. On the other hand, it can be directly expressed by a rational polynomial as follows.
F ₀ (x) = 1;
F ₁ (x) = x;
^{_{F 2 (x) = 2x 2}} -1;
^{_{F 3 (x) = 4x 3}} -3x;
…
[0086]
Each of the Chebyshev polynomials y = F _a (x) is a rational mapping that maps an open interval −1 <x <1 to an open interval −1 <y <1.
[0087]
When an appropriate initial value x ₀ (−1 <x ₀ <1) is given to _a Chebyshev polynomial Fa (·) (a ≧ 2) of second or higher order, a recurrence equation x _{i + 1} = F _n (x _i ) (i ≧ 1)
Can be used as a spreading code. The random numbers included in the random number sequence x ₀ , x ₁ , x ₂ ,.
[0088]
On the other hand, the modulator 303 applies the complex number output from the scrambler 302 as an input to the filter device 101, and performs spread modulation. As described above, the chip length of the input digital signal and the delay time of the delay unit 202 in the FIR filter 201 used by the modulation unit 303 are both equal to the predetermined delay time D.
[0089]
(Experimental result)
Hereinafter, results of experiments performed on the characteristics of the filter device 101 used in the above embodiment and the characteristics of the transmitted signal will be described.
[0090]
FIG. 4 is a graph showing the frequency characteristics of the filter device 101 (the horizontal axis is a frequency of 0 MHz to 5 MHz, and the vertical axis is an intensity of -90 db to 10 db). FIG. 5 is a graph showing a spectrum distribution of a signal transmitted by the above-mentioned spread modulation device 301 (the horizontal axis is a frequency of 0 Hz to 0.5 Hz, and the vertical axis is -120 db to 10 db).
[0091]
As shown in FIG. 4, the frequency spectrum of the filter device 101 has an intensity of about -2 db to 2 db with respect to a frequency of 0 MHz to 5 MHz. As shown in FIG. 5, the frequency spectrum after the spread modulation has a low intensity at the frequencies of 0 to 0.1 Hz and 0.4 to 0.5 Hz in the shape of a mountain skirt, but has a low intensity of 0.15 Hz to 0.35 Hz. In the range, the intensity shows a flat spectrum shape.
[0092]
From these observations, it can be seen that the frequency characteristic of the filter device 101 is the same as that of a filter (all pass filter) that passes through all frequency bands, and that the filter device 101 does not affect the spectrum distribution of a transmitted signal.
[0093]
A W-CDMA system was configured with a transmission rate of 60 kbps, 15 users, and a WWGN channel E ₀ / N ₀ of 10 db, and simulated experiments were performed. Then, according to the conventional method, the bit error rate was 0.0012, whereas the bit error rate was 0.00075 according to the present embodiment. Therefore, the bit error rate was reduced by about 60%, indicating the effectiveness of the present invention.
[0094]
Therefore, when the present invention is applied to wireless communication, even if a plurality of transmitting devices and a plurality of receiving devices are communicating in the same frequency band, the confidentiality is maintained and the number of communicators is adjusted according to the number of communicators used. It can communicate with each other, guaranteeing quality.
[0095]
【The invention's effect】
As described above, according to the present invention, a filter device, a spread modulation device, a filter method, a spread modulation method, a program, and a program suitable for performing spread modulation using a spread code having good separation performance in wireless communication technology , An information recording medium can be provided.
[Brief description of the drawings]
FIG. 1 is a schematic diagram illustrating a schematic configuration of a filter device according to a first embodiment of the present invention.
FIG. 2 is a schematic diagram illustrating a schematic configuration of an FIR filter used in the filter device according to the first embodiment of the present invention.
FIG. 3 is a schematic diagram illustrating a schematic configuration of a spread modulation device according to a second embodiment of the present invention.
FIG. 4 is a graph showing a simulation experiment result of a frequency response of the filter device of the present technique.
FIG. 5 is a graph showing a simulation result of a bit error rate of the present technique.
[Explanation of symbols]
101 filter device 102 input receiving unit 103 real processing unit 104 imaginary processing unit 105 output unit 201 FIR filter 202 delay unit 203 amplifying unit 204 adding unit 301 spreading modulator 302 scrambling unit 303 modulating unit

Claims (19)

The real and imaginary parts of the input digital complex 1 / D A scrambling unit that outputs a complex number scrambled by a predetermined spreading code of
  A modulation unit that provides the complex number output by the scramble unit as an input to a filter device and performs spread modulation.
  A spread modulation device comprising:
  The spreading code for the real part and the spreading code for the imaginary part of the scramble part are given at each point of the trajectory of the ergodic mapping dynamical system. Is a mapping dynamics system with
  The filter device has a predetermined impulse constant r (-1 ≤ r ≤ 1) And predetermined delay time constant D And filter the sequence of complex numbers using
  (A) an input receiving unit that receives an input of a series of complex numbers;
  (B) a real processing unit that receives a sequence of a real part as an input and outputs a filtered sequence, out of a series of complex numbers received by the input receiving unit;
  (C) an imaginary processing unit that receives a sequence of an imaginary part as an input and outputs a filtered sequence, out of the complex sequence received by the input receiving unit;
  (D) an output unit that outputs a complex number sequence in which the sequence output by the real processing unit is a real part and the sequence output by the imaginary processing unit is an imaginary part;
  With
  (E) The real processing unit and the imaginary processing unit output a plurality of sequences obtained by delaying an input sequence, amplify each of the plurality of sequences, and output a sum of the amplified sequences. The delay time of the multiple series is D And the amplification factor for each of these is the common ratio -r Or common ratio -1 / r Form a geometric progression of
  Characterized by that. 2. The spread modulation apparatus according to claim 1, further comprising the following filter device instead of the filter device.
  Given real impulse constant r (-1 ≤ r ≤ 1) And a given real constant x (x ≠ 0) And predetermined delay time constant D And a filter device for filtering a sequence of complex numbers using
  An input receiving unit that receives an input of a series of complex numbers,
  Of the sequence of complex numbers received by the input receiving unit, the sequence of the real part is 0 , D , 2D , 3D ,…, (N-1) D (N Is a given positive integer ) An actual delay unit that outputs a plurality of sequences delayed only by
  Each of the plurality of streams delayed and output by the actual delay unit is represented by the delay time T If it is, x (-r) ^{N-T / D} An actual amplification unit that outputs a plurality of multiplied and amplified series,
  A real adder that outputs a sum of a plurality of streams amplified and output by the real amplifier,
  Of the series of complex numbers received by the input receiving unit, the series of imaginary parts are respectively 0 , D , 2D , 3D ,…, (N-1) D An imaginary delay unit that outputs a plurality of sequences delayed by only
  Each of the plurality of real number sequences output after being delayed by the imaginary delay unit, T If it is, x (-r) ^{N-T / D} An imaginary amplifier for outputting a plurality of multiplied and amplified sequences;
  An imaginary addition unit that outputs a sum of a plurality of streams that have been amplified and output by the imaginary amplification unit,
  An output unit that outputs a sequence of complex numbers with the sequence output by the real addition unit as a real part and a sequence output by the imaginary addition unit as an imaginary part,
  A filter device comprising: The spread modulation device according to claim 2,
  In the filter device,
  The real delay section and the imaginary delay section are each described as 0 , D , 2D , 3D ,…, (N-1) D Instead of just delaying " D , 2D , 3D ,…, (N-1) D , ND Just delay,
  The real amplification section and the imaginary amplification section have the T If it is, x (-r) ^{N-T / D} Instead of "doubling and amplifying" T If it is, x (-r) ^{N- (T-D) / D} Multiply and amplify
  Characterized by that. The spread modulation device according to claim 2,
  In the filter device,
  The real amplification section and the imaginary amplification section have the T If it is, x (-r) ^{N-T / D} Instead of "doubling and amplifying" T If it is, x (-r) ^{1 + T / D} Multiply and amplify
  Characterized by that. The spread modulation device according to claim 2,
  In the filter device,
  The real delay section and the imaginary delay section are each described as 0 , D , 2D , 3D ,…, (N-1) D Instead of just delaying " D , 2D , 3D ,…, (N-1) D , ND Just delay,
  The real amplification section and the imaginary amplification section have the T If it is, x (-r) ^{N-T / D} Instead of "doubling and amplifying" T If it is, x (-r) ^{T / D} Multiply and amplify
  Characterized by that. The spread modulation device according to any one of claims 1 to 5,
  The scrambling by the scrambling unit is performed according to the IMT 2000 W-CDMA system standard, the CDMA 2000 system standard, or the wireless LAN IEEE 802. . According to 11b standard
  Characterized by that. The spread modulation device according to any one of claims 1 to 6, wherein
  In the filter device,
  The predetermined actual impulse constant r Is a fixed-precision fixed-point number representation 2-3 ^1/2 be equivalent to
  Characterized by that. The spread modulation device according to any one of claims 1 to 7,
  In the filter device,
  The real delay unit, the real amplification unit, the real addition unit, the imaginary delay unit, the imaginary amplification unit, and the imaginary addition unit include an ASIC (ASIC). Application Specific Integrated Circuit ), DSP ( Digital Signal Processor ) Or FPGA ( Field Programmable Gate Array Composed by
  Characterized by that. The real and imaginary parts of the input digital complex 1 / D A scrambling step of outputting a complex number scrambled by a predetermined spreading code of
  A modulation step of providing the complex number output in the scrambling step as an input to the filter method and performing spread modulation.
  A spread modulation method comprising:
  The spreading code for the real part and the spreading code for the imaginary part of the scrambling process are given at each point on the trajectory of the ergodic mapping dynamics system. Is a mapping dynamics system with
  The filter method includes a predetermined impulse constant r (-1 ≤ r ≤ 1) And predetermined delay time constant D And filter the sequence of complex numbers using
  (A) an input receiving step of receiving an input of a series of complex numbers;
  (B) an actual processing step of receiving a sequence of a real part as an input and outputting a filtered series, among the series of complex numbers received in the input receiving step,
  (C) an imaginary processing step of receiving a sequence of an imaginary part as an input and outputting a filtered series, out of the series of complex numbers received in the input receiving step;
  (D) an output step of outputting a sequence of complex numbers in which the sequence output in the real processing step is a real part and the sequence output in the imaginary processing step is an imaginary part;
  With
  (E) In the actual processing step and the imaginary processing step, a plurality of sequences obtained by delaying an input sequence are output, each of the plurality of sequences is amplified, and the sum of the amplified sequences is output. The delay time of the multiple series is D And the amplification factor for each of these is the common ratio -r Or common ratio -1 / r Form a geometric progression of
  A method comprising: The spread modulation method according to claim 9, further comprising the following filter method instead of the filter method.
  Given real impulse constant r (-1 ≤ r ≤ 1) And a given real constant x (x ≠ 0) And predetermined delay time constant D And a filtering method for filtering a sequence of complex numbers using
  An input receiving step of receiving an input of a series of complex numbers,
  Of the series of complex numbers whose input has been accepted in the input accepting step, the series of real parts are respectively 0 , D , 2D , 3D ,…, (N-1) D (N Is a given positive integer ) An actual delay step of outputting a plurality of sequences delayed only by
  Each of the plurality of streams delayed and output in the actual delay step is represented by a delay time T If it is, x (-r) ^{N-T / D} An actual amplification step of outputting a plurality of multiplied and amplified series,
  An actual addition step of outputting a sum of a plurality of streams amplified and output in the actual amplification step,
  Of the series of complex numbers whose input has been received in the input receiving step, the series of imaginary parts are respectively 0 , D , 2D , 3D ,…, (N-1) D An imaginary delay step of outputting a plurality of sequences delayed by only
  Each of the plurality of real number sequences delayed and output in the imaginary delay step is represented by the delay time T If it is, x (-r) ^{N-T / D} An imaginary amplification step of outputting a plurality of multiplied and amplified sequences,
  An imaginary addition step of outputting a sum of a plurality of streams amplified and output in the imaginary amplification step,
  An output step of outputting a complex number sequence in which the sequence output in the real addition step is a real part and the sequence output in the imaginary addition step is an imaginary part,
  A filter method comprising: The spread modulation method according to claim 10, wherein
  In the filtering method,
  In the actual delay step and the imaginary delay step, 0 , D , 2D , 3D ,…, (N-1) D Instead of just delaying " D , 2D , 3D ,…, (N-1) D , ND Just delay,
  In the real amplification step and the imaginary amplification step, "the delay time T If it is, x (-r) ^{N-T / D} Instead of "doubling and amplifying" T If it is, x (-r) ^{N- (T-D) / D} Multiply and amplify
  A method comprising: The spread modulation method according to claim 10, wherein
  In the filtering method,
  In the real amplification step and the imaginary amplification step, "the delay time T If it is, x (-r) ^{N-T / D} Instead of "doubling and amplifying" T If it is, x (-r) ^{1 + T / D} Multiply and amplify
  A method comprising: The spread modulation method according to claim 10, wherein
  In the filtering method,
  In the actual delay step and the imaginary delay step, 0 , D , 2D , 3D ,…, (N-1) D Instead of just delaying " D , 2D , 3D ,…, (N-1) D , ND Just delay,
  In the real amplification step and the imaginary amplification step, "the delay time T If it is, x (-r) ^{N-T / D} Instead of "doubling and amplifying" T If it is, x (-r) ^{T / D} Multiply and amplify
  A method comprising: The spread modulation method according to any one of claims 9 to 13, wherein
  The scrambling by the scrambling process may be performed according to the IMT 2000 W-CDMA system standard, the CDMA 2000 system standard, or the wireless LAN IEEE 802. . According to 11b standard
  Characterized by that. The spread modulation method according to any one of claims 9 to 14, wherein
  In the filtering method,
  The predetermined actual impulse constant r Is a fixed-precision fixed-point number representation 2-3 ^1/2 be equivalent to
  A method comprising: The spread modulation method according to any one of claims 9 to 15, wherein
  In the filtering method,
  The real delay step, the real amplification step, the real addition step, the imaginary delay step, the imaginary amplification step, and the imaginary addition step include an ASIC ( Application Specific Integrated Circuit ), DSP ( Digital Signal Processor ) Or FPGA ( Field Programmable Gate Array Executed in
  A method comprising: A computer is caused to function as the spread modulation device according to any one of claims 1 to 8.
  A program characterized by the following. A computer is caused to execute the spread modulation method according to any one of claims 9 to 16.
  A program characterized by the following. A computer-readable information recording medium (compact disk, flexible disk, hard disk, magneto-optical disk, digital video disk, magnetic tape, or semiconductor memory including the program according to claim 17 or 18). .).

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