JP3596247B2 - DC motor speed controller - Google Patents

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a speed control device that controls the speed of a DC motor.
[0002]
[Prior art]
Conventionally, a DC motor speed controller includes a setter that sets a command speed that is a desired rotation speed, a voltage controller that applies a voltage to the DC motor, and a speed that detects the rotation speed of the DC motor at predetermined time intervals. And a detector.
[0003]
Then, in order to rotate the DC motor at the command speed, the voltage controller compares the rotation speed obtained by the speed detector with a desired rotation speed, and if the rotation speed obtained by the speed detector is higher, the DC The control is performed such that the voltage applied to the electric motor is reduced, and if the rotation speed obtained by the speed detector is low, the voltage applied to the DC motor is increased.
[0004]
When the detected rotation speed is zero, the applied voltage to the DC motor is increased until the rotation speed reaches the command speed. However, if a large rotational load is applied to the DC motor and the voltage is continuously applied even though the DC motor is not rotating, the DC motor generates heat and causes a failure. Therefore, in the conventional DC motor speed control device, the voltage controller is provided with a timer and a predetermined time T is set in advance. Even if the voltage is continuously applied to the DC motor for the predetermined time T, the speed detector is not used. When the speed detected by the control is zero, the application of the voltage is stopped to prevent the DC motor from generating heat.
[0005]
Conventionally, when the speed detector fails and the speed detected by the speed detector is zero even though the DC motor is rotating at the desired rotation speed, the desired rotation speed is output from the speed detector. When the voltage applied to the DC motor is increased so as to be output, the DC motor is driven at or above a desired rotation speed, which may damage the DC motor or a load connected to the DC motor. . However, when the speed detected by the speed detector is zero as described above, the application of the voltage to the DC motor is stopped after the elapse of the predetermined time T, so that the load connected to the DC motor or the DC motor is Can be prevented from being damaged.
[0006]
[Problems to be solved by the invention]
However, in the DC motor speed control device having the above-described configuration, if the predetermined time T is shortened from the viewpoint of protecting the DC motor and the load connected to the DC motor, a large rotating load is suddenly applied, and the speed is temporarily detected. When the speed becomes zero, the voltage applied to the DC motor is stopped immediately after the predetermined time T elapses, so that the conventional DC motor has a problem that a load with large fluctuations cannot be rotationally driven. Further, if the predetermined time T is increased to avoid this problem, there is a problem that the protection for the DC motor and the load connected to the DC motor becomes incomplete.
[0007]
The present invention has been made in view of the above problems, and an object of the present invention is to stop immediately even if a large rotating load is temporarily applied to the DC motor and the detection speed becomes zero. Another object of the present invention is to provide a DC motor speed control device capable of preventing damage to a DC motor and a load connected to the DC motor.
[0008]
[Means for Solving the Problems]
The invention according to claim 1 is a setting device that specifies a command speed that is a speed at which the DC motor is to be rotated, a speed detector that detects a rotation speed of the DC motor and outputs a detected speed, A voltage controller for adjusting a command voltage applied to the DC motor so that the command speed coincides with the DC motor, wherein a current detector for detecting a motor current of the DC motor and outputting a detected current. The detection is performed to determine whether the detection speed is zero due to a large load applied to the DC motor or in a failure state in which the detection speed is zero because the speed detector has failed. Judging from the speed and the command voltage and the detection current, adding a speed detection abnormality determiner that outputs an assertion signal,The speed detection abnormality determiner is in the constrained state if the detected current is equal to or greater than a first predetermined current when the detected speed is zero and the voltage applied to the DC motor is the first predetermined voltage. A first determining means for determining that the detected current is zero when the detection speed is zero and the voltage applied to the DC motor is equal to or higher than a second predetermined voltage set lower than the first predetermined voltage. A second determination unit that determines that the vehicle is in the failure state if the current is equal to or less than a second predetermined current set higher than the first predetermined current;The voltage applied to the DC motor is stopped when the speed detection abnormality determiner determines that the speed detector is restrained or malfunctions.
[0009]
According to a second aspect of the present invention, in the DC motor speed control device according to the first aspect, a voltage limiter that limits a voltage applied to the DC motor to a first predetermined voltage when the detected speed is zero is provided. It is characterized by having.
0010]
Claim3The described invention,Claim 1 or Claim 2In the DC motor speed control device, the speed detection abnormality determiner, a first timer that can arbitrarily set a constraint determination time from the determination of the restraint state to output a constraint determination signal, the first timer, A second timer capable of arbitrarily setting a failure determination time from when it is determined to be in a failure state to when a failure determination signal is output is provided.
0011]
Claim4The described invention,Claim 3In the DC motor speed control device, the constraint determination time and the failure determination time are set in the first timer and the second timer so that the failure determination time is shorter than the constraint determination time. It is a feature.
0012]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, an embodiment of the present invention will be described in detail with reference to FIGS. FIG. 1 is a block diagram of the speed control device. FIG. 2 is a block diagram of the speed detection abnormality determiner. FIGS. 3A and 3B are timing charts showing the relationship between various outputs and time during normal operation. FIG. 3A shows the output of a start / stop signal, FIG. 3B shows the output of a command voltage, and FIG. (D) represents the output of the motor speed, which is the actual rotation speed of the DC motor, (e) represents the output of the command speed and the detected speed, and (f) represents the output of the constraint signal. , (G) represent the output of the fault determination signal. 4A and 4B are timing charts showing the relationship between various outputs and time when the restraint state occurs. FIG. 4A shows the output of a start / stop signal, FIG. 4B shows the output of a command voltage, and FIG. ) Represents the output of the detected current, (d) represents the output of the motor speed which is the actual rotation speed of the DC motor, (e) represents the output of the command speed and the detected speed, and (f) represents the output of the constraint signal. (G) represents the output of the failure determination signal. FIG. 5 is a timing chart showing the relationship between various outputs and time when the rate of increase of the command speed is relatively small in a state where the speed detector has failed, and FIG. 5 (a) shows the output of a start / stop signal; (B) represents the output of the command voltage, (c) represents the output of the detected current, (d) represents the output of the motor speed which is the actual rotation speed of the DC motor, and (e) represents the command speed and the detected speed. (F) represents the output of the constraint signal, and (g) represents the output of the fault determination signal. FIG. 6 is a timing chart showing the relationship between various outputs and time when the rate of increase of the commanded speed is relatively small in a state where the speed detector has failed. FIG. 6A shows the output of the start / stop signal. (B) represents the output of the command voltage, (c) represents the output of the detected current, (d) represents the output of the motor speed which is the actual rotation speed of the DC motor, and (e) represents the command speed and the detected speed. (F) represents the output of the constraint signal, and (g) represents the output of the fault determination signal. FIG. 7 is a timing chart showing the relationship between various outputs and time when a failure occurs in the speed detector during normal operation. FIG. 7A shows the output of a start / stop signal, and FIG. 7B shows the command voltage. (C) represents the output of the detected current, (d) represents the output of the motor speed which is the actual rotation speed of the DC motor, (e) represents the output of the command speed and the detected speed, (F) represents the output of the constraint signal, and (g) represents the output of the failure determination signal.
00Thirteen]
The speed control device of the DC motor M shown in FIG. 1 includes a setting device 1, a general control device 2, a display device 3, a speed control device 4, a voltage limiter 5, a voltage control device 6, a power supply voltage 7, a speed detector 8, a current detector 9, and a speed detection abnormality determiner 10.
0014]
The DC motor M outputs a torque proportional to the motor current Im. The relationship between the applied voltage Vm, the motor current Im, and the motor speed ωm is expressed as Im = (Vm−Ke × ωm) / R, where the motor resistance is R and the back electromotive force constant is Ke.
00Fifteen]
The setting device 1 sets and instructs an operation state such as start and stop for the DC motor M. When the rotation direction of the DC motor M is set, the setter 1 outputs a command direction to the DC motor M, When the rotation speed of the motor M is set, the command speed ω1 is output to the DC motor M.
0016]
The overall controller 2 includes a central processing unit, a memory (both not shown), and the like, and has an arithmetic function and a storage function. The general controller 2 outputs a command speed ω1 based on an output signal of the setting device 1 and an output signal of a speed detection abnormality determiner 10 described later, and outputs a start / stop signal Start / Stop when starting. Or a display signal Sign, which is a signal for displaying the operating state of the DC motor M.
0017The display 3 receives the display signal Sign output from the general controller 2 and displays the current or past operation status of the DC motor M and the like.
0018]
The speed controller 4 issues a command that is a voltage to be applied to the DC motor M by, for example, PI control (proportional / integral control) so that the command speed ω1 matches the detected speed ω2 detected by the speed detector 8. This is for calculating the voltage V1.
0019]
When the detection speed ω2 is zero, the voltage limiter 5 limits the command voltage V1 to the restricted maximum voltage Vrock. Therefore, when ω2 is zero, the maximum value of the command voltage applied to the DC motor M is the constrained maximum voltage Vrock.
0020]
The voltage controller 6 adjusts the power supply voltage 7 by PWM control or the like in response to the command voltage V1 in a state where the start / stop signal Start / Stop is turned on from the setting device 1 via the overall controller 2. The voltage Vm is applied to the DC motor M. Further, when the start / stop signal Start / Stop is turned off, the application of the voltage to the DC motor M is stopped.
0021]
The speed detector 8 includes a tachogenerator, an encoder, an F / V converter (frequency / voltage converter), and the like, and is proportional to the motor speed ωm that is the actual rotation speed of the DC motor M. The detection speed ω2 is output.
0022]
The current detector 9 amplifies the motor current Im of the DC motor M output via a shunt resistor or the like and outputs a detection current I1.
0023]
When the detected speed ω2 of the DC motor M is zero based on the command voltage V1, the detected speed ω2, and the detected current I1, the cause is that the speed detector 8 is in a failure state. It is determined whether the motor is in a state in which a large rotating load is suddenly applied to the DC motor M (hereinafter, this state is referred to as a restricted state).
0024]
As a result, the operation of the DC motor M is determined based on the command voltage V1 and the detection current I1, whereas the control of the DC motor M is conventionally performed only from the detection speed ω2, and the result is used to control the DC motor M. It can be reflected. Therefore, more precise and safer control can be performed on the DC motor M than with the conventional speed control device. Hereinafter, the determination performed by the speed detection abnormality determiner 10 and the control of the DC motor M performed accordingly will be described.
0025]
The speed detection abnormality judging device 10 shown in FIG. 2 includes reference generators 20a,... 20e, comparators 21a,.
0026]
Each of the reference generators 20a,... 20e generates a predetermined reference value.
0027]
21e compare the reference value generated from the reference generators 20a,... 20e with the input value, and if a predetermined condition is met, the control signals from the comparators 21a,. ST1,... ST5 are output.
0028]
The comparator 21a compares the constraint maximum voltage Vrock, which is a reference value generated by the reference generator 20a, with the command voltage V1, and outputs a control signal ST1 if the constraint maximum voltage Vrock is equal to the command voltage V1. is there.
0029]
The comparator 21b compares the constrained detection current Irock, which is a reference value generated by the reference generator 20b, with the detected current I1, and outputs a control signal ST2 when the detected current I1 becomes equal to or more than the constrained detection current Irock. is there.
0030]
The comparator 21c compares the failure detection voltage Vfault, which is a reference value generated by the reference generator 20c, with the command voltage V1, and outputs a control signal ST3 when the command voltage V1 becomes higher than the failure detection voltage Vfault. is there. Note that the failure detection voltage Vfault is set lower than the constraint maximum voltage Vrock.
0031]
The comparator 21d compares the fault detection current Ifault, which is a reference value generated by the reference generator 20d, with the detection current I1, and outputs a control signal ST4 if the detection current I1 is equal to or smaller than the fault detection current Ifault. is there. Note that the fault detection current Ifault is set higher than the constraint detection current Irock so as not to make an erroneous determination that the vehicle is in the restricted state despite the failure state.
0032]
The comparator 21e compares zero speed, which is a reference value generated by the reference generator 20e, with the detected speed ω2, and outputs a control signal ST5 if the detected speed ω2 is zero.
0033]
The constraint timer 22 outputs a constraint signal Srock when all of the control signals ST1, ST2, and ST5 are output. That is, when the detection speed ω2 is zero, the restriction timer 22 detects the detection current equal to or higher than the restriction detection current Irock even though the command voltage V1 has reached the restriction maximum voltage Vrock which is the maximum value of the voltage that can be applied. If I1 has been obtained, it is determined that the DC motor M is not rotationally driven, and a constraint signal Srock is output.
0034]
In the constraint timer 22, the time from when all of the control signals ST1, ST2, and ST5 are output to when the constraint signal Srock is output (hereinafter, referred to as a constraint determination time Trock) can be arbitrarily set.
0035]
Note that the constraint timer 22 resets the constraint assertion time Trock if any one of the control signals ST1, ST2, and ST5 is lost while counting the constraint assertion time Trock, and the control signals ST1, ST2, and ST5 are reset again. The constraint determination time Trock is not counted until all are output.
0036]
The failure timer 23 outputs a failure determination signal Sfault when all of the control signals ST3, ST4, ST5 are output. That is, when the detection speed ω2 is zero, the failure timer 23 can obtain only the detection current I1 equal to or less than the failure detection current Ifault even though the command voltage V1 applies a voltage equal to or higher than the failure detection voltage Vfault. If not, since the DC motor M is rotating, the operation of the speed detector 8 is determined to be defective, and the failure determination signal Sfault is output. In the failure timer 23, the time from when all of the control signals ST3, ST4, and ST5 are output to when the failure determination signal Sfault is output (hereinafter, referred to as failure determination time Tfault) can be arbitrarily set. .
0037]
Note that the failure timer 23 resets the failure determination time Tfault if any one of the control signals ST3, ST4, and ST5 is lost while counting the failure determination time Tfault, and the control signals ST3, ST4, and ST5 are reset again. The failure determination time Tfault is not counted until all are output.
0038]
Upon receiving the constraint signal Srock and the failure determination signal Sfault, the general controller 2 immediately sets the command speed ω1 to zero to the speed controller 4 to stop the DC motor M, and displays the fact on the display 3. .
0039]
Next, what kind of control is actually performed on the DC motor M will be described using a timing chart.
0040]
FIG. 3 is a timing chart in a normal state. When the start / stop signal Start / Stop is turned on (see FIG. 3A), the command voltage V1 is applied to the DC motor M so that the DC motor M rotates at the command speed ω1 (see FIG. b)). When the load on the DC motor M increases (see FIG. 3C), the speed control device increases the command voltage V1 so that the detected speed ω2 matches the command speed ω1 (see FIG. 3D). ), The output torque of the DC motor M is increased.
0041]
FIG. 4 is a timing chart in the case where the constraint state has occurred. As in the case of FIG. 3, the speed control device increases the command voltage V1 so that the detected speed ω2 matches the command speed ω1. Then, since the detection speed ω2 (actual motor speed ωm) of the DC motor M is zero, the detection current I1 increases. Then, at time t1, the constraint condition of the DC motor is satisfied, and the constraint timer 22 starts counting the constraint determination time Trock. When the constraint determination time Trock elapses from time t1, the constraint timer 22 determines that the DC motor M is in the constraint state and outputs the constraint signal Srock (see FIG. 4 (f)). Then, the start / stop signal Start / Stop is turned off by the general controller 2 (see FIG. 4A), and the command voltage V1 applied to the DC motor M becomes zero (see FIG. 4B).
0042]
FIG. 5 is a timing chart in the case where the speed detector 8 has failed and the detection current I1 does not exceed the failure detection current Ifault because the rate of increase of the applied voltage V1 is relatively small. Since the speed detector 8 is in a failure state, the command speed ω1 does not match the detected speed ω2 (see FIG. 5E), and the command voltage V1 continues to increase (see FIG. 5B). At time t3, the motor speed ωm of the DC motor M actually increases based on the command voltage V1 (see FIG. 5D), so that the detection current I1 increases, but the failure detection current Ifault exceeds. No (see FIG. 5 (c)). At this point, the failure condition of the DC motor is satisfied (see FIG. 5B), and at time t4 when the failure determination time Tfault has elapsed from time t3, the failure determination signal Sfault is output (see FIG. 5G). . Then, the start / stop signal Start / Stop is turned off by the general controller 2 (see FIG. 5A), and the command voltage V1 applied to the DC motor M becomes zero (see FIG. 5B).
0043]
FIG. 6 is a timing chart in the case where the speed detector 8 has failed and the detection current I1 exceeds the failure detection current Ifault because the rate of increase of the applied voltage V1 is relatively large. Since the speed detector 8 is in a failure state, the command speed ω1 does not match the detected speed ω2 (see FIG. 6E), and the command voltage V1 continues to increase (see FIG. 6B). At time t5, the motor speed ωm of the DC motor M actually increases based on the command voltage V1 (see FIG. 6D), so that the detection current I1 increases but the failure detection current Ifault exceeds the fault detection current Ifault. No (see FIG. 6 (c)). Then, the failure condition of the DC motor is satisfied, and the failure determination time Tfault starts to be counted from time t5 (see FIG. 6B). However, since the command speed V1 for the DC motor M is high (see FIG. 6B), the detection current I1 exceeds the failure detection current Ifault, and at time t6, the speed detector 8 does not establish a failure state. The count value until is reset (see FIG. 6C). However, when the applied voltage V1 is limited to the constrained maximum voltage Vrock, the detection current I1 decreases by driving the DC motor M, and the failure state of the speed detector 8 is established again at time t7. Then, the counting of the failure determination time Tfault is started again at time t7, and at time t8, the failure of the speed detector 8 is determined, and the failure determination signal Sfault is output (see FIG. 6 (g)). Then, the start / stop signal Start / Stop is turned off by the general controller 2 (see FIG. 6A), and the command voltage V1 applied to the DC motor M becomes zero (see FIG. 6B).
0044]
FIG. 7 is a timing chart when a failure occurs in the speed detector 8 during normal operation. Since the speed detector 8 is in a failure state, the command speed ω1 does not match the detected speed ω2 (see FIG. 7 (e)), and the command voltage V1 continues to increase (see FIG. 7 (b)). At time t9, the motor speed ωm of the DC motor M actually increases based on the command voltage V1 (see FIG. 7D), so that the detection current I1 increases but the failure detection current Ifault exceeds the fault detection current Ifault. No (see FIG. 7 (c)). At this point, the speed detection abnormality determiner 10 starts counting the failure determination time Tfault from time t9 because the failure condition of the speed detector 8 is satisfied (see FIG. 7B). However, since the command speed V1 for the DC motor M is high (see FIG. 7B), the detection current I1 exceeds the failure detection current Ifault, and the failure condition of the speed detector 8 is not satisfied at time t10. The count value until is reset (see FIG. 7C). However, when the applied voltage V1 is limited to the constrained maximum voltage Vrock, the detection current I1 decreases by driving the DC motor M, and the failure condition of the speed detector 8 is satisfied again at time t11. Then, the counting of the failure determination time Tfault is started again at time t11, and the failure determination signal Sfault is output at time t12 (see FIG. 7 (g)). Then, the start / stop signal Start / Stop is turned off by the general controller 2 (see FIG. 7A), and the command voltage V1 applied to the DC motor M becomes zero (see FIG. 7B).
0045]
Due to the operation of the speed detection abnormality determiner 10 described above, even if a large rotating load is temporarily applied to the DC motor M and the detection speed becomes zero, the detection current I1 indicates a value equal to or greater than the constraint detection current Irock. As long as the command voltage V1 continues to be applied at least up to the constrained maximum voltage Vrock, the DC motor M does not stop immediately. On the other hand, when the operation of the speed detector 8 is defective and the detected speed ω2 is zero, the DC motor M is immediately stopped, so that damage to the DC motor M and the load connected to the DC motor M is not caused. Can be prevented.
0046]
Further, when the constraint maximum voltage Vrock is applied to the DC motor M, if the constraint determination time Trock is set to be long enough to prevent the DC motor M from being damaged by heat generation, and if the failure determination time Tfault is set to be as short as possible, from the constraint state, The speed control for returning to the normal operation state is performed to the extent that the DC motor M does not cause a failure, and when the speed detector 8 fails, the DC motor M stops immediately. The speed of the DC motor M can be controlled accordingly.
0047]
【The invention's effect】
As described above, according to the first aspect of the present invention, a setting device that specifies a command speed that is a speed at which the DC motor is to be rotated, and a speed that detects the rotation speed of the DC motor and outputs the detected speed. In a speed control device for a DC motor, comprising a detector and a voltage controller that adjusts a command voltage applied to the DC motor so that the detected speed matches the command speed, the motor current of the DC motor is detected. A current detector that outputs a detection current, and whether the detection speed is zero because the large addition is applied to the DC motor or the detection speed is zero because the speed detector is faulty Determine whether it is in a failure state from the detection speed and the command voltage and the detection current, and add a speed detection abnormality determiner that outputs an assertion signal,The speed detection abnormality determiner is in the constrained state if the detected current is equal to or greater than a first predetermined current when the detected speed is zero and the voltage applied to the DC motor is the first predetermined voltage. A first determining means for determining that the detected current is zero when the detection speed is zero and the voltage applied to the DC motor is equal to or higher than a second predetermined voltage set lower than the first predetermined voltage. A second determination unit that determines that the vehicle is in the failure state if the current is equal to or less than a second predetermined current set higher than the first predetermined current;Since the speed detection abnormality determiner stops the voltage applied to the DC motor at the time of determining the restraint or failure of the speed detector, a large rotating load is temporarily applied to the DC motor, and the detection speed is reduced. Even if it becomes zero, there is an effect that a speed control device for a DC motor that does not stop immediately and can prevent damage to a DC motor and a load connected to the DC motor can be provided.Further, there is an effect that it is possible to accurately determine whether the DC motor is in the constrained state or whether the speed detecting means is in the failure state.
0048]
According to a second aspect of the present invention, in the DC motor speed controller according to the first aspect, a voltage limiter that limits a voltage applied to the DC motor to a first predetermined voltage when the detected speed is zero. Is provided, an effect that an abnormally high voltage can be prevented from being applied to the DC motor.
0049]
Claim3In the described invention,Claim 1 or Claim 2In the DC motor speed control device, the speed detection abnormality determiner includes a first timer that can arbitrarily set a constraint determination time from when it is determined that the vehicle is in a constraint state to when a constraint determination signal is output; A second timer that can arbitrarily set the failure determination time from when it is determined that there is a failure determination signal to when the failure determination signal is output, so that the DC motor is switched from the locked state or the failure state according to the usage state of the DC motor. This has the effect that the time until the stoppage can be set according to the user's will.
0050]
Claim4In the described invention,Claim 3In the DC motor speed control device, the constraint determination time and the failure determination time are set in the first timer and the second timer so that the failure determination time is shorter than the constraint determination time. When both cases are satisfied, it is possible to avoid the problem that the constraint determination time elapses before the failure determination time elapses, and it is possible to more quickly detect the failure of the speed detector.
[Brief description of the drawings]
FIG. 1 is a block diagram of a speed control device.
FIG. 2 is a block diagram of a speed detection abnormality determiner.
FIG. 3 is a timing chart showing a relationship between various outputs and time in a normal operation.
FIG. 4 is a timing chart showing a relationship between various outputs and time when a restraint state occurs.
FIG. 5 is a timing chart showing the relationship between various outputs and time when the rate of increase of the command speed is relatively small when the speed detector has failed.
FIG. 6 is a timing chart showing the relationship between various outputs and time when the increase rate of the command speed is relatively small in a state where the speed detector has failed.
FIG. 7 is a timing chart showing a relationship between various outputs and time when a failure occurs in the speed detector during normal operation.
[Explanation of symbols]
M DC motor
1 Setter
5 Voltage limiter
6 Voltage controller
8 Speed detector
9 Current detector
10 Speed detection abnormality judgment device
22 Restriction timer (first determination means, first timer)
23 failure timer (second determination means, second timer)
ω1 command speed
ω2 detection speed
V1 command voltage
Vrock first predetermined voltage
Vfault Second predetermined voltage
I1 Detection current
Irock first predetermined current
Ifault the second predetermined current

Claims (4)

A setting device that specifies a command speed that is a speed at which the DC motor is to be rotated, a speed detector that detects the rotation speed of the DC motor and outputs a detected speed, and that the detected speed matches the command speed. A DC motor speed control device comprising a voltage controller for adjusting a command voltage applied to a DC motor, a current detector for detecting a motor current of the DC motor and outputting a detection current, and a large addition to the DC motor. Is applied, the detection speed is zero, or the detection speed is faulty, and the detection speed is zero, so that the detection speed is zero. Judging from the current and adding a speed detection abnormality judgment device that outputs an assertion signal,
The speed detection abnormality determiner is in the constrained state if the detected current is equal to or greater than a first predetermined current when the detected speed is zero and the voltage applied to the DC motor is the first predetermined voltage. A first determining means for determining that the detected current is zero when the detection speed is zero and the voltage applied to the DC motor is equal to or higher than a second predetermined voltage set lower than the first predetermined voltage. A second determination unit that determines that the vehicle is in the failure state if the current is equal to or less than a second predetermined current set higher than the first predetermined current;
A speed control device for a DC motor, wherein the voltage applied to the DC motor is stopped when the speed detection abnormality determiner determines that the speed detector is restrained or malfunctions. 2. The DC motor speed control device according to claim 1, further comprising a voltage limiter that limits a voltage applied to the DC motor to a first predetermined voltage when the detected speed is zero. The speed detection abnormality determiner is a first timer that can arbitrarily set a constraint assertion time from the determination of the constraint state to the output of the constraint assertion signal, and after determining that the failure state. 3. The DC motor speed control device according to claim 1 , further comprising a second timer capable of arbitrarily setting a failure determination time until a failure determination signal is output. 4. The DC according to claim 3 , wherein the first timer and the second timer set the constraint determination time and the failure determination time such that the failure determination time is shorter than the constraint determination time. Motor speed control device.

Images