JP3609137B2 - Oscillator circuit - Google Patents

Description

[0001]
[Industrial application fields]
The present invention relates to an oscillation circuit that performs CR oscillation by connecting an external resistor and an external capacitor to a semiconductor integrated circuit.
[0002]
[Prior art]
FIG. 3 is a circuit diagram showing a conventional oscillation circuit disclosed in, for example, Japanese Patent Laid-Open No. 60-46610. In FIG. 3, 1 is a semiconductor integrated circuit in which a part of the oscillation circuit is built, and 2 is V _DD. power potential, 3 and 4 in series connected resistor and external capacitor external between the ground 5 of the power supply 2 and V _SS potential of the V _DD potential.
[0003]
Further, 6 is a clock input terminal as a pin terminal provided in the semiconductor integrated circuit 1, 8 is a reference voltage input unit, 9 is an input voltage input to the clock input terminal 6 and the reference voltage input unit 8 is obtained. It is a comparator that compares with a reference input voltage.
[0004]
Further, reference numeral 10 denotes a set / reset type flip-flop which receives the output of the comparator 9, that is, outputs a high level signal from the Q terminal when the above input voltage ≧ reference input voltage.
Reference numeral 11 denotes a delay circuit that delays the output of the flip-flop 10, and reference numeral 12 denotes a frequency divider that divides the output of the delay circuit 11 by, for example, ½ and outputs it as a system clock.
[0006]
The output side of the delay circuit 11 is connected to the R terminal of the flip-flop 10, and the Q terminal of the flip-flop 10 is connected to the gate of an N-channel transistor 13 that is also built in the semiconductor integrated circuit 1.
[0007]
The drain of the N-channel transistor 13 is connected to one input circuit of the comparator 9 connected to the clock input terminal 6, and the source is grounded inside the semiconductor integrated circuit 1.
[0008]
Next, the operation will be described. First, the external resistor 3 and the external capacitor 4 receive a voltage from the power supply 2 and input a voltage to the clock input terminal 6. This input voltage is compared with the reference input voltage from the reference voltage input unit 8 by the comparator 9.
[0009]
In the comparator 9, when the input voltage is equal to or higher than the reference input voltage, the flip-flop 10 outputs a high level signal from the Q terminal in response to this result, and the N-channel transistor 13 is turned on based on this signal. Become.
[0010]
For this reason, the potential of the clock input terminal 6 connected to the drain of the N-channel transistor 13 is lowered to the _VSS potential. Therefore, a low-level signal is output from the Q terminal of the flip-flop 10, and the N-channel transistor 13 Turn off.
[0011]
However, due to the charging time constant of the external resistor 3 and the external capacitor 4, the input voltage at the clock input terminal 6 reaches the reference input voltage again, and further exceeds this, so that the flip-flop is again based on the output of the comparator 9. The Q terminal of 10 outputs a high level signal, and thereafter the same operation as described above is repeated to oscillate.
[0012]
On the other hand, the output of the flip-flop 10 is used as an internal system clock in the semiconductor integrated circuit 1 via the delay circuit 11 and the frequency divider 12 while continuing the oscillation operation in this way.
[0013]
[Problems to be solved by the invention]
Since the conventional oscillation circuit is configured as described above, the semiconductor integrated circuit 1 is provided with only one clock input terminal 6 for connecting the connection midpoint between the external resistor 3 and the external capacitor 4. Although the RC oscillation operation can be realized, there is a problem that an external circuit having a ceramic oscillator or a crystal oscillator that requires two terminals cannot be connected to the semiconductor integrated circuit 1.
[0014]
In addition, in order to enable connection of such an external circuit, the number of pins and pin arrangement of the semiconductor integrated circuit 1 must be uniquely set in advance, such as by providing two input terminals. These parts have the same function, and there is a problem that it is difficult to realize a pin-compatible semiconductor integrated circuit.
[0015]
The present invention has been made to solve the above-described problems. In addition to allowing a clock input terminal and a clock output terminal of a semiconductor integrated circuit to be short-circuited externally, a CR oscillation operation can be performed. An object of the present invention is to obtain an oscillation circuit that can be provided with other circuit functions and can be made pin-compatible by making it possible to connect an external circuit other than a CR circuit to each clock input terminal and clock output terminal.
[0016]
Another object of the present invention is to provide an oscillation circuit capable of performing a CR oscillation operation by grounding a clock output terminal externally.
[0017]
[Means for Solving the Problems]
According to the first aspect of the present invention, the source of the oscillation control N-channel transistor is grounded in the semiconductor integrated circuit, the drain is provided in the semiconductor integrated circuit, and can be short-circuited externally to the clock input terminal. This is connected to the correct clock output terminal.
[0018]
According to a second aspect of the present invention, there is provided an oscillation circuit in which a drain of an N-channel transistor is connected to a clock input terminal in a semiconductor integrated circuit, a source is provided in the semiconductor integrated circuit, and a clock output terminal that can be externally grounded Connected.
[0019]
[Action]
According to another aspect of the present invention, there is provided an oscillation circuit in which a drain of an N-channel transistor provided in a semiconductor integrated circuit is connected to a clock output terminal provided in the semiconductor integrated circuit, whereby the clock output terminal and the clock input terminal are connected. When a short circuit connection is made, a CR oscillation circuit can be formed. On the other hand, by canceling the short circuit connection, these clock input terminals and clock output terminals can be used to connect two terminals of a ceramic oscillator and a crystal oscillator. By connecting, it is possible to form an oscillation circuit of a type different from the above, or to test the oscillation circuit by inputting an external clock.
[0020]
According to a second aspect of the present invention, there is provided an oscillation circuit comprising: a source of an N channel transistor provided in a semiconductor integrated circuit is connected to a clock output terminal provided in the semiconductor integrated circuit; When grounded, a CR oscillation circuit can be formed. On the other hand, by releasing the grounding, the oscillation circuit can be tested by inputting an external clock using the clock input terminal and the clock output terminal. .
[0021]
【Example】
Example 1.
An embodiment of the present invention will be described below with reference to the drawings. In FIG. 1, 1 is a semiconductor integrated circuit in which a part of an oscillation circuit is incorporated, 2 is a power supply having a V _DD potential, and 3 and 4 are connected in series between a power supply 2 having this V _DD potential and a ground 5 having a _VSS potential. Connected external resistor and external capacitor.
[0022]
Further, 6 is a clock input terminal as a pin terminal provided in the semiconductor integrated circuit 1, 8 is a reference voltage input unit, 9 is an input voltage input to the clock input terminal 6 and the reference voltage input unit 8 is obtained. It is a comparator that compares with a reference input voltage.
[0023]
Further, reference numeral 10 denotes a set / reset type flip-flop which receives the output of the comparator 9, that is, outputs a high level H signal from the Q terminal when the above input voltage ≧ reference input voltage is satisfied.
Reference numeral 11 denotes a delay circuit that delays the output of the flip-flop 10, and reference numeral 12 denotes a frequency divider that divides the output of the delay circuit 11 by, for example, ½ and outputs it as a system clock.
[0025]
The output side of the delay circuit 11 is connected to the R terminal of the flip-flop 10, and the Q terminal of the flip-flop 10 is connected to the gate of an N-channel transistor 13 that is also built in the semiconductor integrated circuit 1.
[0026]
The drain of the N-channel transistor 13 is connected to a clock output terminal 7 provided outside the semiconductor integrated circuit 1, and this is provided at a predetermined position of the semiconductor integrated circuit 1 together with the clock input terminal 6. Yes.
[0027]
Next, the operation will be described. First, when an oscillation operation is performed using the external resistor 3 and the external capacitor 4 and the semiconductor integrated circuit 1, the clock input terminal 6 and the clock output terminal 7 are connected to the outside of the semiconductor integrated circuit 1. Connect with a short circuit using lead wires.
[0028]
That is, the clock output terminal 7 is connected to the drain terminal of the N-channel transistor 13 for controlling the clock input terminal 6 to the ground level ( _VSS potential), and the clock output terminal 7 is connected to the clock input terminal 6. On the other hand, short-circuit externally with lead wires.
[0029]
As a result, according to the charge / discharge time constants of the external resistor 3 and the external capacitor 4, the N-channel transistor 13 is repeatedly turned on and off and starts oscillating as in the conventional case. That is, in this embodiment, an oscillation operation is performed by the RC oscillation circuit.
[0030]
On the other hand, if necessary, the short-circuit connection between the clock input terminal 6 and the clock output terminal 7 is canceled, an external clock is input to the clock input terminal 6, and the output clock from the clock output terminal 7 is monitored. Oscillator circuit testing can be performed.
[0031]
The clock input terminal 6 and the clock output terminal 7 are connected to a two-terminal circuit constituting a ceramic oscillation circuit, a crystal oscillation circuit, or the like, so that the number and arrangement of pins as the terminals 6 and 7 are changed. Thus, it can be used as a semiconductor integrated circuit having a different type of oscillation circuit.
[0032]
That is, in this embodiment, the clock input terminal 6 and the clock output terminal 7 can be used not only for the RC oscillation circuit but also for testing the oscillation circuit and for forming other types of oscillation circuits.
[0033]
Example 2
FIG. 2 shows another embodiment of the present invention. In this embodiment, the drain of the N-channel transistor 13 in the semiconductor integrated circuit 1 is connected to the clock input terminal 6 in the semiconductor integrated circuit 1, more specifically, a circuit connecting the clock input terminal 6 and the comparator 9. Is connected to.
[0034]
The source of the N-channel transistor 13 is connected to the clock output terminal 7 which can be externally connected to the ground, and the gate is connected to the Q terminal of the flip-flop 10 as described above.
[0035]
Therefore, in this embodiment, when the oscillation operation is performed using the external resistor 3 and the external capacitor 4 and the semiconductor integrated circuit 1, the clock output terminal 7 is read outside the semiconductor integrated circuit 1. Connect to the ground 5 using a wire or the like, and lower it to the ground level ( _VSS potential).
[0036]
As a result, according to the charge / discharge time constants of the external resistor 3 and the external capacitor 4, the N-channel transistor 13 is repeatedly turned on and off in the same manner as described in the first embodiment, and starts an oscillation operation. The oscillation operation by the RC oscillation circuit is continued.
[0037]
On the other hand, the ground connection of the clock output terminal 7 is released, an external clock is input to the clock input terminal 6, and the output of the clock output terminal 7 is monitored. The oscillator circuit can be tested without changing the number or position of the pins.
[0038]
Further, in this embodiment, if the clock output terminal 7 is connected to the _VSS potential at the shortest distance during the oscillation operation as the CR oscillation circuit, the noise environment is further improved as compared with the case of the first embodiment. become.
[0039]
【The invention's effect】
As described above, according to the first aspect of the present invention, the source of the N channel transistor for oscillation control is grounded in the semiconductor integrated circuit, the drain is provided in the semiconductor integrated circuit, and externally to the clock input terminal. Since it is configured to connect to a short-circuitable clock output terminal, CR oscillation operation can be performed by short-circuiting the clock input terminal and clock output terminal of the semiconductor integrated circuit externally. There is an effect that a terminal and clock output terminal can be made pin compatible so as to have other circuit functions.
[0040]
According to a second aspect of the present invention, the drain of the N-channel transistor is connected to the clock input terminal in the semiconductor integrated circuit, and the source is provided to the clock output terminal provided in the semiconductor integrated circuit and externally connectable to the ground. Since it is configured to connect, CR oscillation operation can be performed by grounding the clock output terminal externally, and pin-compatible so that each of the clock input terminals and clock output terminals can have other circuit functions. There is an effect that can be obtained.
[Brief description of the drawings]
FIG. 1 is a circuit diagram showing an oscillation circuit according to an embodiment of the present invention.
FIG. 2 is a circuit diagram showing an oscillation circuit according to another embodiment of the present invention.
FIG. 3 is a circuit diagram showing a conventional oscillation circuit.
[Explanation of symbols]
1 semiconductor integrated circuit, 3 external resistor, 4 external capacitor, 6 clock input terminal, 7 clock output terminal, 10 flip-flop, 13 N channel transistor.

Claims (2)

Provided in a semi-conductor integrated circuit, and outputs a clock input terminal connected to the connection point of the external resistor and external capacitor, a high level signal when the input voltage of the clock input terminal exceeds the reference value flip And the high-level signal from the flip-flop is received by the gate and turned on, the clock input terminal is pulled to the ground level, the signal output from the flip-flop is set to low level, and then the external resistor and In an oscillation circuit including an N-channel transistor for oscillation control that causes the input voltage to exceed the reference value by a time constant of an external capacitor,
The source of the N-channel transistor is grounded in the semiconductor integrated circuit, and the drain is connected to a clock output terminal provided in the semiconductor integrated circuit and capable of being short-circuited externally to the clock input terminal. Oscillator circuit. Provided in a semi-conductor integrated circuit, and outputs a clock input terminal connected to the connection point of the external resistor and external capacitor, a high level signal when the input voltage of the clock input terminal exceeds the reference value flip And the high-level signal from the flip-flop is received by the gate and turned on, the clock input terminal is pulled to the ground level, the signal output from the flip-flop is set to low level, and then the external resistor and In an oscillation circuit including an N-channel transistor for oscillation control that causes the input voltage to exceed the reference value by a time constant of an external capacitor,
The drain of the N channel transistor is connected to the clock input terminal in the semiconductor integrated circuits, provided the source to the semiconductor integrated circuit, and characterized by being connected to the outside contact groundwater ability clock output terminal Oscillator circuit.

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