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JP3624857B2 - Mounting structure of semiconductor device - Google Patents
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JP3624857B2 - Mounting structure of semiconductor device - Google Patents

Mounting structure of semiconductor device Download PDF

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Publication number
JP3624857B2
JP3624857B2 JP2001181323A JP2001181323A JP3624857B2 JP 3624857 B2 JP3624857 B2 JP 3624857B2 JP 2001181323 A JP2001181323 A JP 2001181323A JP 2001181323 A JP2001181323 A JP 2001181323A JP 3624857 B2 JP3624857 B2 JP 3624857B2
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JP
Japan
Prior art keywords
electrode
semiconductor device
mounting structure
mounting
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
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JP2001181323A
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Japanese (ja)
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JP2002373915A (en
Inventor
崇 中村
忠彦 境
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Corp
Panasonic Holdings Corp
Original Assignee
Panasonic Corp
Matsushita Electric Industrial Co Ltd
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Priority to JP2001181323A priority Critical patent/JP3624857B2/en
Publication of JP2002373915A publication Critical patent/JP2002373915A/en
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/071Connecting or disconnecting
    • H10W72/072Connecting or disconnecting of bump connectors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/071Connecting or disconnecting
    • H10W72/073Connecting or disconnecting of die-attach connectors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/20Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/241Dispositions, e.g. layouts
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/724Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL

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  • Wire Bonding (AREA)

Description

【0001】
【発明の属する技術分野】
本発明は、半導体チップなどの半導体装置を基板に実装して成る半導体装置の実装構造に関するものである。
【0002】
【従来の技術】
半導体チップなどの半導体装置の基板への実装は、一般に半導体チップに形成された突出電極である金属バンプを基板に形成された端子電極に接合することにより行われる。この電極相互の接合においては、多数の電極全てを良好に導通させる必要がある。一般に金属バンプや端子電極の高さ寸法や形状は必ずしも均一であるとは限らず、高さのばらつきや電極表面の凹凸などによって、実装時において電極間が完全に接触しない場合が生じる。このため、半導体装置の実装時には半導体装置を基板に対して押圧し、高さがばらついた電極のうちの高めの電極を押しつぶして均一な接触状態を得るようにしている。
【0003】
【発明が解決しようとする課題】
しかしながら従来の半導体装置の実装においては、均一な接触状態を得るためには電極そのものを高さ方向に塑性変形させる必要があることから、実装時には高い押圧荷重を必要としていた。そして押圧荷重が十分でない場合には、部分的に接触不良を生じて良好な導通が得られず、実装不良が発生するという問題点があった。
【0004】
そこで本発明は、低押圧荷重で良好な導通状態を実現することができる半導体装置の実装構造を提供することを目的とする。
【0005】
【課題を解決するための手段】
請求項1記載の半導体装置の実装構造は、表面に突起部を有する電極が形成された半導体装置を基板に実装する半導体装置の実装構造であって、前記電極及び前記電極が有する前記突起部の幅寸法は前記基板に形成された端子電極の幅寸法よりも大きく、前記電極を端子電極に対して押圧して接合した状態において、前記突起部の一部が端子電極の上面に当接して押しつぶされている。
【0006】
請求項2記載の半導体装置の実装構造は、請求項1記載の半導体装置の実装構造であって、前記電極は半導体装置にメッキによって形成されたメッキバンプであり、前記突起部は前記メッキバンプの縁部の突部である。
【0007】
本発明によれば、半導体装置の電極及び突起部の幅寸法を基板に形成された端子電極の幅寸法よりも大きく設定し、電極を端子電極に対して押圧する際に突起部のみが端子電極の上面に当接して押しつぶされることにより、低押圧荷重で良好な導通を確保することができる。
【0008】
【発明の実施の形態】
次に本発明の実施の形態を図面を参照して説明する。図1(a)は本発明の一実施の形態の半導体装置の側面図、図1(b)は本発明の一実施の形態の半導体装置の電極の側面図、図1(c)は本発明の一実施の形態の半導体装置の電極の下面斜視図、図2は本発明の一実施の形態の半導体装置の実装方法の工程説明図、図3(a)は本発明の一実施の形態の半導体装置の実装構造の斜視図、図3(b)は本発明の一実施の形態の実装構造の断面図、図4(a)は本発明の一実施の形態の半導体装置の電極の斜視図、図4(b)は本発明の一実施の形態の半導体装置の実装構造の斜視図、図4(c)は本発明の一実施の形態の実装構造の断面図である。
【0009】
まず図1を参照して半導体装置1について説明する。図1(a)において、半導体装置1の下面には電極2が形成されている。電極2はメッキによって形成されたものであり、図1(b)、(c)に示すように、電極2には縁部に沿って表面2aよりも突出した突部2b(長辺方向),2c(短辺方向)が形成されている。この突部2b,2cは、メッキの過程においてメッキ材質が縁部に偏って付着することにより生じる。突部2b,2cの材質としては、金、半田等の金属や合金等が使用される。
【0010】
次に図2を参照して半導体装置1の基板3への実装について説明する。図2(a)において、基板3の上面には端子電極4が形成されている。端子電極4は細長形状となっており(図3(a)参照)、幅寸法dは電極2の幅寸法(短辺方向の寸法)D(図3(a)参照)よりも小さい寸法に設定されている。基板3上面の半導体装置実装位置には、樹脂接着材5が塗布されている。なお基板3上面に樹脂接着材5を供給する方法としては、ペースト状の樹脂接着材5を塗布する方法の他に、シート状の接着材を貼りつける方法でもよい。
【0011】
次に図2(b)に示すように、半導体装置1を実装ヘッド6によって保持し、基板3の実装位置に位置合わせする。次いで図2(c)に示すように、実装ヘッド6によって半導体装置1を基板3に対して押圧する。これにより、電極2は端子電極4に対して押圧され、図3(a)に示すように電極2の縁部の突部のうち、短辺方向の突部2cが押圧力によって押しつぶされる。
【0012】
このとき、電極2と端子電極4との当接具合は各電極によってばらついているが、突部2cが押しつぶされることにより、全ての電極2は端子電極4と良好に導通する。また図2(c)に示す押圧荷重Fは、突部2cのみを押しつぶすだけの押圧荷重でよいため、電極全体を押しつぶすのに必用とされる押圧荷重と比較して小さなものとなっている。したがって、実装時に過大な押圧荷重で押圧することによる半導体装置1の破損を防止することができる。そしてこの後、押圧を保持した状態で半導体装置1を加熱することにより樹脂接着材5が熱硬化し、電極2を端子電極4に導通させた半導体装置1の実装構造が完成する。
【0013】
図3(b)は,この実装構造のA−A断面を示している。半導体装置1が樹脂接着材5によって接合された状態において、突部2cが部分的に押しつぶされていることにより、電極2の端子電極4に対する幅方向(矢印a方向)の変位が拘束される。したがって、実装後の熱応力によって接合部に発生する横方向の変位を有効に拘束することができ、実装強度を増加させることができる。
【0014】
なお、上述の半田メッキによって形成された電極2以外にも、図4(a)に示すように端子電極4との接合面7bの中央に短辺方向に連続した突起部7aを設けた電極7を用いるようにしてもよい。このとき、電極7及び突起部7aの幅寸法D’は、前述の電極2と同様に端子電極4の幅寸法dよりも大きくする。このような電極7が形成された半導体装置1’を端子電極4が形成された基板3に実装する際においても、図4(b)、(c)に示すように突起部7aが端子電極4によって部分的に押しつぶされる。これにより、図4(c)(B−B断面)に示すように、電極7の幅方向(矢印b方向)の変位が拘束され、図3に示す例と同様に実装強度を増加させることができる。
【0015】
また上記実施の形態においては、半導体装置1を樹脂接着材5を用いて基板3に接合する例を示しているが、これ以外の接合方法、例えば端子電極4に半田をプリコートしておき電極2と半田接合する方法や、電極2と端子電極4の表面を拡散接合などの方法で直接金属間接合する方法など、各種の接合方法を適用することができる。
【0016】
【発明の効果】
本発明によれば、半導体装置の電極及び突起部の幅寸法を基板に形成された端子電極の幅寸法よりも大きく設定し、電極を端子電極に対して押圧する際に突起部のみが端子電極の上面に当接して押しつぶされることにより、低押圧荷重で良好な導通を確保することができる。
【図面の簡単な説明】
【図1】(a)本発明の一実施の形態の半導体装置の側面図
(b)本発明の一実施の形態の半導体装置の電極の側面図
(c)本発明の一実施の形態の半導体装置の電極の下面斜視図
【図2】本発明の一実施の形態の半導体装置の実装方法の工程説明図
【図3】(a)本発明の一実施の形態の半導体装置の実装構造の斜視図
(b)本発明の一実施の形態の実装構造の断面図
【図4】(a)本発明の一実施の形態の半導体装置の電極の斜視図
(b)本発明の一実施の形態の半導体装置の実装構造の斜視図
(c)本発明の一実施の形態の実装構造の断面図
【符号の説明】
1 半導体装置
2,7 電極
2b,2c 突部
3 基板
4 端子電極
5 樹脂接着材
[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor device mounting structure in which a semiconductor device such as a semiconductor chip is mounted on a substrate.
[0002]
[Prior art]
Mounting of a semiconductor device such as a semiconductor chip on a substrate is generally performed by joining metal bumps, which are protruding electrodes formed on the semiconductor chip, to terminal electrodes formed on the substrate. In joining the electrodes to each other, it is necessary to conduct all of the many electrodes satisfactorily. In general, the height dimensions and shapes of metal bumps and terminal electrodes are not necessarily uniform, and there may be cases where the electrodes are not completely in contact with each other due to variations in height, irregularities on the electrode surface, and the like. For this reason, when the semiconductor device is mounted, the semiconductor device is pressed against the substrate, and the higher electrodes among the electrodes with varying heights are crushed to obtain a uniform contact state.
[0003]
[Problems to be solved by the invention]
However, in conventional semiconductor device mounting, in order to obtain a uniform contact state, the electrode itself needs to be plastically deformed in the height direction, and thus a high pressing load is required during mounting. When the pressing load is not sufficient, there is a problem in that poor contact occurs partially and good conduction cannot be obtained, resulting in poor mounting.
[0004]
In view of the above, an object of the present invention is to provide a semiconductor device mounting structure capable of realizing a good conduction state with a low pressing load.
[0005]
[Means for Solving the Problems]
The mounting structure of a semiconductor device according to claim 1 is a mounting structure of a semiconductor device for mounting on a substrate a semiconductor device having an electrode having a protruding portion formed on a surface thereof, wherein the protruding portion of the electrode and the electrode has the protruding portion. The width dimension is larger than the width dimension of the terminal electrode formed on the substrate, and in a state where the electrode is pressed against the terminal electrode and joined, a part of the protruding portion comes into contact with the upper surface of the terminal electrode and is crushed. It is.
[0006]
The mounting structure of the semiconductor device according to claim 2 is the mounting structure of the semiconductor device according to claim 1, wherein the electrode is a plating bump formed on the semiconductor device by plating, and the protrusion is formed of the plating bump. It is a protrusion at the edge.
[0007]
According to the present invention, the width dimension of the electrode and the protrusion of the semiconductor device is set larger than the width dimension of the terminal electrode formed on the substrate, and when the electrode is pressed against the terminal electrode, only the protrusion is the terminal electrode. By contacting and crushing the upper surface, good conduction can be secured with a low pressing load.
[0008]
DETAILED DESCRIPTION OF THE INVENTION
Next, embodiments of the present invention will be described with reference to the drawings. 1A is a side view of a semiconductor device according to an embodiment of the present invention, FIG. 1B is a side view of an electrode of the semiconductor device according to an embodiment of the present invention, and FIG. 2 is a bottom perspective view of an electrode of a semiconductor device according to an embodiment, FIG. 2 is a process explanatory diagram of a semiconductor device mounting method according to an embodiment of the present invention, and FIG. 3A is an embodiment of the present invention. FIG. 3B is a cross-sectional view of the mounting structure according to the embodiment of the present invention, and FIG. 4A is a perspective view of the electrode of the semiconductor device according to the embodiment of the present invention. 4B is a perspective view of the mounting structure of the semiconductor device according to the embodiment of the present invention, and FIG. 4C is a cross-sectional view of the mounting structure of the embodiment of the present invention.
[0009]
First, the semiconductor device 1 will be described with reference to FIG. In FIG. 1A, the electrode 2 is formed on the lower surface of the semiconductor device 1. The electrode 2 is formed by plating. As shown in FIGS. 1B and 1C, the electrode 2 has a protrusion 2b (long side direction) protruding from the surface 2a along the edge, 2c (short side direction) is formed. The protrusions 2b and 2c are generated when the plating material is unevenly attached to the edge in the plating process. As the material of the protrusions 2b and 2c, a metal such as gold or solder, an alloy, or the like is used.
[0010]
Next, the mounting of the semiconductor device 1 on the substrate 3 will be described with reference to FIG. In FIG. 2A, a terminal electrode 4 is formed on the upper surface of the substrate 3. The terminal electrode 4 has an elongated shape (see FIG. 3A), and the width dimension d is set smaller than the width dimension (dimension in the short side direction) D of the electrode 2 (see FIG. 3A). Has been. A resin adhesive 5 is applied to the semiconductor device mounting position on the upper surface of the substrate 3. The method for supplying the resin adhesive 5 to the upper surface of the substrate 3 may be a method for applying a sheet-like adhesive in addition to the method for applying the paste-like resin adhesive 5.
[0011]
Next, as shown in FIG. 2B, the semiconductor device 1 is held by the mounting head 6 and aligned with the mounting position of the substrate 3. Next, as shown in FIG. 2C, the semiconductor device 1 is pressed against the substrate 3 by the mounting head 6. As a result, the electrode 2 is pressed against the terminal electrode 4, and the protrusion 2c in the short side direction is crushed by the pressing force among the protrusions at the edge of the electrode 2 as shown in FIG.
[0012]
At this time, the contact state between the electrode 2 and the terminal electrode 4 varies depending on each electrode, but all the electrodes 2 are electrically connected to the terminal electrode 4 satisfactorily by the protrusion 2c being crushed. Further, the pressing load F shown in FIG. 2 (c) may be a pressing load that only crushes only the protrusion 2c, and thus is smaller than the pressing load necessary to crush the entire electrode. Therefore, the semiconductor device 1 can be prevented from being damaged by being pressed with an excessive pressing load during mounting. After that, by heating the semiconductor device 1 in a state where the pressure is held, the resin adhesive 5 is thermoset, and the mounting structure of the semiconductor device 1 in which the electrode 2 is electrically connected to the terminal electrode 4 is completed.
[0013]
FIG. 3B shows an AA cross section of this mounting structure. In a state where the semiconductor device 1 is bonded by the resin adhesive 5, the protrusion 2 c is partially crushed, and thereby the displacement of the electrode 2 in the width direction (arrow a direction) with respect to the terminal electrode 4 is restrained. Therefore, it is possible to effectively restrain the lateral displacement generated in the joint due to the thermal stress after mounting, and to increase the mounting strength.
[0014]
In addition to the electrode 2 formed by the above-described solder plating, as shown in FIG. 4A, an electrode 7 provided with a protrusion 7a continuous in the short side direction at the center of the joint surface 7b with the terminal electrode 4 is provided. May be used. At this time, the width dimension D ′ of the electrode 7 and the protrusion 7 a is made larger than the width dimension d of the terminal electrode 4 in the same manner as the electrode 2 described above. Even when the semiconductor device 1 ′ having such an electrode 7 is mounted on the substrate 3 having the terminal electrode 4 formed thereon, as shown in FIGS. Is partially crushed by. Thereby, as shown in FIG. 4C (cross section BB), the displacement in the width direction (arrow b direction) of the electrode 7 is constrained, and the mounting strength can be increased as in the example shown in FIG. it can.
[0015]
Moreover, in the said embodiment, although the example which joins the semiconductor device 1 to the board | substrate 3 using the resin adhesive material 5 is shown, other joining methods, for example, the terminal electrode 4 is precoated with solder and the electrode 2 is used. Various joining methods can be applied, such as a solder joining method and a method in which the surfaces of the electrode 2 and the terminal electrode 4 are directly joined to each other by a method such as diffusion joining.
[0016]
【The invention's effect】
According to the present invention, the width dimension of the electrode and the protrusion of the semiconductor device is set larger than the width dimension of the terminal electrode formed on the substrate, and when the electrode is pressed against the terminal electrode, only the protrusion is the terminal electrode. By contacting and crushing the upper surface, good conduction can be secured with a low pressing load.
[Brief description of the drawings]
1A is a side view of a semiconductor device according to an embodiment of the present invention, FIG. 1B is a side view of an electrode of a semiconductor device according to an embodiment of the present invention, and FIG. 1C is a semiconductor according to an embodiment of the present invention. FIG. 2 is a bottom perspective view of an electrode of the device. FIG. 2 is a process explanatory diagram of a semiconductor device mounting method according to an embodiment of the invention. FIG. 3A is a perspective view of a mounting structure of a semiconductor device according to an embodiment of the invention. FIG. 4B is a cross-sectional view of a mounting structure according to an embodiment of the present invention. FIG. 4A is a perspective view of an electrode of a semiconductor device according to an embodiment of the present invention. Perspective view of mounting structure of semiconductor device (c) Cross-sectional view of mounting structure of one embodiment of the present invention
DESCRIPTION OF SYMBOLS 1 Semiconductor device 2, 7 Electrode 2b, 2c Projection 3 Substrate 4 Terminal electrode 5 Resin adhesive

Claims (2)

表面に突起部を有する電極が形成された半導体装置を基板に実装する半導体装置の実装構造であって、前記電極及び前記電極が有する前記突起部の幅寸法は前記基板に形成された端子電極の幅寸法よりも大きく、前記電極を端子電極に対して押圧して接合した状態において、前記突起部の一部が端子電極の上面に当接して押しつぶされていることを特徴とする半導体装置の実装構造。A mounting structure of a semiconductor device for mounting on a substrate a semiconductor device having an electrode having a protruding portion on the surface, wherein the width dimension of the protruding portion of the electrode and the electrode is that of a terminal electrode formed on the substrate A mounting of a semiconductor device characterized in that a part of the protrusion is pressed against an upper surface of the terminal electrode when the electrode is larger than a width dimension and pressed and joined to the terminal electrode. Construction. 前記電極は半導体装置にメッキによって形成されたメッキバンプであり、前記突起部は前記メッキバンプの縁部の突部であることを特徴とする請求項1記載の半導体装置の実装構造。2. The mounting structure of a semiconductor device according to claim 1, wherein the electrode is a plating bump formed on the semiconductor device by plating, and the protrusion is a protrusion at an edge of the plating bump.
JP2001181323A 2001-06-15 2001-06-15 Mounting structure of semiconductor device Expired - Lifetime JP3624857B2 (en)

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JP2002373915A JP2002373915A (en) 2002-12-26
JP3624857B2 true JP3624857B2 (en) 2005-03-02

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