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JP3633405B2 - Synchronous rectifier - Google Patents
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JP3633405B2 - Synchronous rectifier - Google Patents

Synchronous rectifier Download PDF

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Publication number
JP3633405B2
JP3633405B2 JP31623399A JP31623399A JP3633405B2 JP 3633405 B2 JP3633405 B2 JP 3633405B2 JP 31623399 A JP31623399 A JP 31623399A JP 31623399 A JP31623399 A JP 31623399A JP 3633405 B2 JP3633405 B2 JP 3633405B2
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JP
Japan
Prior art keywords
signal
synchronous rectifier
detector
phase
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP31623399A
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Japanese (ja)
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JP2001133206A (en
Inventor
修造 上野
義幸 大森
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Mitutoyo Corp
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Mitutoyo Corp
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  • Length Measuring Devices With Unspecified Measuring Means (AREA)
  • Transmission And Conversion Of Sensor Element Output (AREA)
  • Rectifiers (AREA)
  • Measurement Of Length, Angles, Or The Like Using Electric Or Magnetic Means (AREA)

Description

【0001】
【発明の利用分野】
本発明は、真円度測定機械、粗さ測定器等の変位を検出器によって検出する際に使用される同期整流器に関する。
【0002】
【従来の技術】
従来の同期整流器は、代表的には図3に示されるような構成であり、基本信号発振回路10からの基準信号(図4A)に基づいて検出器11により検出器変位信号を検出し、この検出器変位信号(図4B)を後段のアンプ12に送る。この場合、検出器11は、差動トランスによって構成され、基本信号発振回路10の出力である基準信号は、図示しない差動トランスの一次側励振コイルの一つに供給され、もう一つの一次側励振コイルには検出した入力信号が供給され、差動トランスの出力コイルから取り出された信号はアンプ12の入力側に供給されることになる。
アンプ12の出力側は、同期整流回路15の一つの入力側に接続され、この同期整流回路15の他の入力側には、基本信号発振回路10の出力(図4A)が位相補正回路16を介して供給されている。同期整流回路15は、基本信号発振回路10の出力(図4A)に基づいてアンプ12の出力(図4B)を同期整流して図4Cに示されるような検出器変位信号を得る。なお、位相補正回路16は、基本信号の位相を手動調整できる手動可変抵抗VRを備えている。
【0003】
【発明が解決しようとする課題】
しかし、このような構成では、図4Cに示されるように同期整流後の検出器信号に逆極性の立ち下がり波形Pが生じ、これが誤差要因となってしまう。このため、通常位相補正回路16の手動可変抵抗VRを調整して誤差要因を除去するように個々の波形を観測しながら調整を行わなければならない。特に問題であるのは、この位相補正作業を、イニシアルセッティング時や故障による交換時に毎回行わなければならないことである。
このような問題を解決するために、本発明の目的は、検出器変位信号と基準信号との間の位相ずれを自動的に補正できるようにした同期整流における位相ずれ補正回路を提供するにある。
【0004】
【課題を解決するための手段】
この目的を達成するため、本発明は、電源投入時の基準信号および検出器変位信号のゼロ位相時にそれぞれトリガ信号を発生するトリガ信号発生回路と、これらのトリガ信号発生回路のトリガ信号間の時間を計測する計測手段と、この計測手段の出力に基づいて基準信号と検出器変位信号との間の位相補正をする位相補正手段と、位相補正された基準信号と検出器変位信号を同期整流する同期整流回路とを供えたことを特徴とする同期整流器が提供される。
【0005】
【発明の実施の形態】
図1は、本発明による同期整流器の一実施の形態を示しており、前述した図3と同じものあるいは同じ機能を有するものは同符号を用いて示される。図1において、この同期整流器は、基本信号発振回路10からの信号(図1A)に基づいて検出器11により検出器変位信号を検出し、この検出器変位信号(図4C)を後段のアンプ12に送る。この場合、検出器11は、差動トランスによって構成され、基本信号発振回路10の出力は、差動トランスの一次側励振コイルの一つに接続され、もう一つの一次側励振コイルには検出入力信号が供給され、差動トランスの出力コイルがアンプ12の入力側に接続されている。
【0006】
アンプ12の出力側は、同期整流回路15の入力側に接続され、同期整流回路15の他の入力側には、基本信号発振回路10の出力(図2A)が位相補正回路16を介して供給されている。同期整流回路15は、基本信号発振回路10の出力(図2A)に基づいてアンプ12の出力(図2C)を同期整流して図4Eに示されるような検出器信号を得る。
【0007】
以上の構成及び動作は、図3に示した従来の構成と同じであるが、本発明の実施の形態は、以下の点において異なる。
すなわち、電源投入時位相補正回路16の出力は、基本信号発振回路10の出力と同じであり、図2Aに示される基本信号がそのまま現れる。この基本信号はトリガ発生回路21に送られ、ゼロ位相を正の方向に向かって通過するときに立ち上がる基準トリガ信号(図2B)を発生する。
【0008】
また、アンプ12から取り出された検出器変位信号は、トリガ発生回路22に送られ、検出器変位信号がゼロ位相を正の方向に通過するときに立ち上がる検出パルス信号(図2D)を発生する。図2Bの基準信号に対応した基準トリガ信号と検出トリガ信号との間の時間差(t1)を計測回路23によって計算し、この時間差t1に応じた位相ずれをCPU24とメモリ25とにより求める。得られた位相ずれは、位相同期回路16の電子ボリュームVRdに与えられ、基準信号の位相を検出器変位信号の位相に合致するように基準信号の位相が合わせられる。
【0009】
このような構成にすると、検出器変位信号の基準信号に対する位相ずれを自動的に補正することができ、調整工数を従来よりも少なくでき、また、従来の調整時における調整者によるばらつきがなくなり、安定した位相ずれ補正を行うことができる。また、温度変化、経年変化による位相ずれも補正でき、本発明による同期整流器を用いた装置の安定した精度保証が得られることになる。また、上述したような構成にすると、CPU24により位相補正のON/OFFを制御することもできる。このON/OFF制御は、表示装置・入力装置を用いると、ユーザから行うこともできる。
【0010】
上述した実施の態様では、基準信号発振回路側に位相補正回路を挿入して基準信号の位相を検出器変位信号に合わせるようにしたけれども、検出器変位信号側に位相補正回路を挿入して位相ずれを補正するようにしてもよい。この場合には、CPUからデジタルノイズが混入する可能性があるため注意が必要である。
【0011】
【発明の効果】
以上述べたように、本発明による同期整流器を用いれば、検出器変位信号の基準信号に対する位相ずれを自動的に補正することができ、調整工数を従来よりも少なくでき、また、従来の調整時における調整者によるばらつきがなくなり、安定した位相ずれ補正を行うことができる。また、温度変化、経年変化による位相ずれも補正でき、本発明による同期整流器を用いた装置の安定した精度保証が得られることになる
【図面の簡単な説明】
【図1】本発明による同期整流器の一実施の形態を示すブロック構成図である。
【図2】(A)〜(E)の波形は図1に示される本発明の同期整流器の動作を説明するための波形図である。
【図3】従来の同期整流器の代表的な構成を示すブロック構成図である。
【図4】(A)〜(C)に示される波形は図3に示される本発明の同期整流器の動作を説明するための波形図である。
【符号の説明】
10 基準信号発振回路
11 検出器
12 アンプ
15 同期整流回路
16 位相補正回路
VR ボリューム
21,22 トリガ発生回路
23 計測回路
24 CPU
25 メモリ
電子VRd 電子ボリューム
[0001]
[Field of the Invention]
The present invention relates to a synchronous rectifier used when detecting a displacement of a roundness measuring machine, a roughness measuring instrument or the like by a detector.
[0002]
[Prior art]
A conventional synchronous rectifier is typically configured as shown in FIG. 3, and a detector displacement signal is detected by a detector 11 based on a reference signal (FIG. 4A) from a basic signal oscillation circuit 10. A detector displacement signal (FIG. 4B) is sent to the amplifier 12 at the subsequent stage. In this case, the detector 11 is constituted by a differential transformer, and the reference signal that is the output of the basic signal oscillation circuit 10 is supplied to one of primary excitation coils of a differential transformer (not shown), and the other primary side The detected input signal is supplied to the excitation coil, and the signal extracted from the output coil of the differential transformer is supplied to the input side of the amplifier 12.
The output side of the amplifier 12 is connected to one input side of the synchronous rectifier circuit 15, and the output (FIG. 4A) of the basic signal oscillation circuit 10 is connected to the phase correction circuit 16 on the other input side of the synchronous rectifier circuit 15. Is supplied through. The synchronous rectification circuit 15 synchronously rectifies the output (FIG. 4B) of the amplifier 12 based on the output (FIG. 4A) of the basic signal oscillation circuit 10 to obtain a detector displacement signal as shown in FIG. 4C. The phase correction circuit 16 includes a manual variable resistor VR that can manually adjust the phase of the basic signal.
[0003]
[Problems to be solved by the invention]
However, in such a configuration, as shown in FIG. 4C, a falling waveform P having a reverse polarity is generated in the detector signal after synchronous rectification, which becomes an error factor. For this reason, adjustment must be performed while observing individual waveforms so as to remove the error factor by adjusting the manual variable resistor VR of the normal phase correction circuit 16. Particularly problematic is that this phase correction operation must be performed every time initial setting or replacement due to failure.
In order to solve such a problem, an object of the present invention is to provide a phase shift correction circuit in synchronous rectification capable of automatically correcting a phase shift between a detector displacement signal and a reference signal. .
[0004]
[Means for Solving the Problems]
In order to achieve this object, the present invention provides a trigger signal generation circuit that generates a trigger signal at the time of zero phase of a reference signal and a detector displacement signal at power-on, and a time between trigger signals of these trigger signal generation circuits. Measuring means for measuring the phase, phase correcting means for correcting the phase between the reference signal and the detector displacement signal based on the output of the measuring means, and synchronously rectifying the phase-corrected reference signal and detector displacement signal A synchronous rectifier is provided that includes a synchronous rectifier circuit.
[0005]
DETAILED DESCRIPTION OF THE INVENTION
FIG. 1 shows an embodiment of a synchronous rectifier according to the present invention, and those having the same or the same functions as those in FIG. 3 are denoted by the same reference numerals. In FIG. 1, this synchronous rectifier detects a detector displacement signal by a detector 11 based on a signal (FIG. 1A) from a basic signal oscillation circuit 10, and this detector displacement signal (FIG. 4C) is detected by an amplifier 12 at a subsequent stage. Send to. In this case, the detector 11 is constituted by a differential transformer, the output of the basic signal oscillation circuit 10 is connected to one of the primary side excitation coils of the differential transformer, and the other primary side excitation coil has a detection input. A signal is supplied, and the output coil of the differential transformer is connected to the input side of the amplifier 12.
[0006]
The output side of the amplifier 12 is connected to the input side of the synchronous rectification circuit 15, and the output (FIG. 2A) of the basic signal oscillation circuit 10 is supplied to the other input side of the synchronous rectification circuit 15 via the phase correction circuit 16. Has been. The synchronous rectification circuit 15 synchronously rectifies the output (FIG. 2C) of the amplifier 12 based on the output (FIG. 2A) of the basic signal oscillation circuit 10 to obtain a detector signal as shown in FIG. 4E.
[0007]
The above configuration and operation are the same as the conventional configuration shown in FIG. 3, but the embodiment of the present invention is different in the following points.
That is, the output of the power-on phase correction circuit 16 is the same as the output of the basic signal oscillation circuit 10, and the basic signal shown in FIG. 2A appears as it is. This basic signal is sent to the trigger generation circuit 21 to generate a reference trigger signal (FIG. 2B) that rises when the zero phase passes in the positive direction.
[0008]
The detector displacement signal extracted from the amplifier 12 is sent to the trigger generation circuit 22 to generate a detection pulse signal (FIG. 2D) that rises when the detector displacement signal passes through the zero phase in the positive direction. A time difference (t1) between the reference trigger signal corresponding to the reference signal in FIG. 2B and the detection trigger signal is calculated by the measurement circuit 23, and a phase shift corresponding to the time difference t1 is obtained by the CPU 24 and the memory 25. The obtained phase shift is applied to the electronic volume VRd of the phase synchronization circuit 16, and the phase of the reference signal is adjusted so that the phase of the reference signal matches the phase of the detector displacement signal.
[0009]
With such a configuration, the phase shift of the detector displacement signal with respect to the reference signal can be automatically corrected, the adjustment man-hours can be reduced compared to the conventional one, and there is no variation by the adjuster during the conventional adjustment, Stable phase shift correction can be performed. Further, the phase shift due to temperature change and secular change can be corrected, and stable accuracy assurance of the apparatus using the synchronous rectifier according to the present invention can be obtained. Further, with the configuration as described above, the CPU 24 can also control ON / OFF of phase correction. This ON / OFF control can also be performed by the user using a display device / input device.
[0010]
In the above-described embodiment, the phase correction circuit is inserted on the reference signal oscillation circuit side so that the phase of the reference signal matches the detector displacement signal. However, the phase correction circuit is inserted on the detector displacement signal side to The deviation may be corrected. In this case, care must be taken because digital noise may be mixed from the CPU.
[0011]
【The invention's effect】
As described above, by using the synchronous rectifier according to the present invention, the phase shift of the detector displacement signal with respect to the reference signal can be automatically corrected, the adjustment man-hours can be reduced as compared with the conventional adjustment, and the conventional adjustment can be performed. In this case, the variation by the adjuster is eliminated, and stable phase shift correction can be performed. In addition, the phase shift due to temperature change and aging change can be corrected, and the stable accuracy guarantee of the apparatus using the synchronous rectifier according to the present invention can be obtained.
FIG. 1 is a block diagram showing an embodiment of a synchronous rectifier according to the present invention.
2A to 2E are waveform diagrams for explaining the operation of the synchronous rectifier of the present invention shown in FIG.
FIG. 3 is a block diagram showing a typical configuration of a conventional synchronous rectifier.
4A to 4C are waveform diagrams for explaining the operation of the synchronous rectifier of the present invention shown in FIG.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 10 Reference signal oscillation circuit 11 Detector 12 Amplifier 15 Synchronous rectification circuit 16 Phase correction circuit VR Volume 21, 22 Trigger generation circuit 23 Measurement circuit 24 CPU
25 Memory Electronic VRd Electronic Volume

Claims (2)

検出器変位信号のゼロ位相時に関連して第1のトリガ信号を発生する第1のトリガ信号発生手段と、基準信号発振回路から送出される基準信号のゼロ位相時に関連して第2のトリガ信号を発生する第2のトリガ信号発生手段と、第1のトリガ信号と第2のトリガ信号との間の時間差を計算する演算手段と演算結果に基づいて、検出器変位信号または基準信号の位相を補正する補正手段と、検出器変位信号と基準信号のうち前記補正手段によって補正された信号と残りの信号を受けて同期整流する同期整流回路とを備えたことを特徴とする同期整流器。A first trigger signal generating means for generating a first trigger signal in relation to the zero phase of the detector displacement signal; and a second trigger signal in relation to the zero phase of the reference signal sent from the reference signal oscillation circuit. Based on the calculation result and the second trigger signal generating means for generating the time difference between the first trigger signal and the second trigger signal, and the phase of the detector displacement signal or the reference signal A synchronous rectifier comprising: a correcting means for correcting; and a synchronous rectifier circuit that receives the signal corrected by the correcting means among the detector displacement signal and the reference signal and the remaining signal and synchronously rectifies the received signal. 前記検出器変位信号は、前記基準信号発振回路から送出される基準信号に基づいて差動トランス形式の検出器から得られることを特徴とする請求項1記載の同期整流器。2. The synchronous rectifier according to claim 1, wherein the detector displacement signal is obtained from a differential transformer type detector based on a reference signal sent from the reference signal oscillation circuit.
JP31623399A 1999-11-08 1999-11-08 Synchronous rectifier Expired - Fee Related JP3633405B2 (en)

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JP3633405B2 true JP3633405B2 (en) 2005-03-30

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Publication number Priority date Publication date Assignee Title
CN100397762C (en) * 2003-11-21 2008-06-25 上海芯华微电子有限公司 Digital three phase shift trigger integrated circuit
JP5098042B2 (en) * 2008-02-13 2012-12-12 株式会社ワコム Position detection apparatus and position detection method

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