JP3636431B2

JP3636431B2 - Automatic frequency controller

Info

Publication number: JP3636431B2
Application number: JP2001010692A
Authority: JP
Inventors: 浩一筒井
Original assignee: Denso Ten Ltd
Current assignee: Denso Ten Ltd
Priority date: 2001-01-18
Filing date: 2001-01-18
Publication date: 2005-04-06
Anticipated expiration: 2021-01-18
Also published as: JP2002217993A

Description

【０００１】
【発明の属する技術分野】
本発明はディジタル変調を適用した移動体通信システム用の自動周波数制御装置に係り、特に、いったん同期が確立した後に送信周波数に追従することの可能な自動周波数制御装置に関する。
【０００２】
【従来の技術】
ディジタル変調を適用した移動体通信システムの受信機にあっては、送信機と同期を確立するだけでなく、いったん同期が確立した後にも受信機の局部発信回路の周波数を送信周波数と一致するように制御することが必要となる。
図１は従来のディジタル変調波受信機の構成図であって、中間周波信号に変換された送信波は直交復調器１０で直交復調された後、復調器１１でデータが復調される。
【０００３】
直交復調器用の局部発振器１４の発振周波数を送信周波数に一致させるために、直交復調器１０の出力を周波数弁別器１２で周波数弁別し、さらにループフィルタ１３でフィルタリングした信号で局部発振器１４の発振周波数を制御している。
図２は周波数弁別器の構成図であって、いわゆる「たすきがけ」回路を構成している。
【０００４】
即ち、実数成分（Ｉ）は実数成分（Ｉ）を１クロックτだけ遅延させる実数成分遅延器１２１及び第１の乗算器１２２を介して加算器１２５に送られ、虚数成分（Ｑ）は虚数成分（Ｑ）を１クロックτだけ遅延させる虚数成分遅延器１２３及び第２の乗算器１２４を介して加算器１２５に送られる。
そして、第１の乗算器１２２の出力と第２の乗算器１２４の出力は加算器１２３で加算され、周波数弁別器１２の出力となる。
【０００５】
なお、第１の乗算器１２２では実数成分遅延器１２１の出力と虚数成分（Ｑ）とが乗算され、第２の乗算器１２４では虚数成分遅延器１２３の出力と実数成分（Ｉ）とが乗算される。
上記の「たすきがけ」回路を使用することにより、弱電界地区であっても安定した周波数弁別が可能となっている。
【０００６】
ところでディジタル変調のように受信波の振幅には情報が含まれず、受信波の位相にだけ情報が含まれる場合には、リミッタで振幅制限した後に復調することが普通である。
【０００７】
【発明が解決しようとする課題】
しかしながら、リミッタで振幅制限した場合には電界が強すぎると弁別能力が低下してしまうという課題が生じる。
図３は受信信号のパワースペクトル図であって、横軸は周波数を、縦軸はパワーを表す。
【０００８】
即ち、強電界においてはリミッタが無い時は中心周波数ｆ₀ を中心とする送信波と雑音を確実に分離することが可能であるが、リミッタが有る時は送信波と雑音のパワー差が小となり送信波と雑音を確実に分離することが困難となる。
本発明は上記課題に鑑みなされたものであって、弱電界においても強電界においても確実に送信周波数に追従可能な自動周波数制御装置を提供することを目的とする。
【０００９】
【課題を解決するための手段】
第１の発明に係る自動周波数制御装置は、フレーム毎にＮシンボルからなる同期シンボルが挿入されるディジタル変調信号を復調する受信機に使用される自動周波数制御装置であって、
ディジタル変調信号をディジタル化するディジタル化手段と、入力信号を１シンボル期間遅延させる１シンボル遅延器を（Ｎ−１）段直列接続した構成を有しディジタル化手段の出力から１〜（Ｎ−１）シンボル期間遅延した信号を生成する遅延部と、ディジタル化手段の出力を同期シンボルの最後尾シンボルに対応するベクトルで逆変調する第１の逆変調器及び前記遅延部内の第１〜（Ｎ−１）段の１シンボル遅延器の出力を同期シンボルの（Ｎ−１）〜１番目のシンボルに対応するベクトルで逆変調する第２〜Ｎの逆変調器を具備する逆変調部と、逆変調部から出力される逆変調ベクトルの収束度合の評価値を演算する逆変調ベクトル収束評価値演算部と、逆変調ベクトル収束評価値演算部で演算された逆変調ベクトルの収束度合の評価値が予め定められた閾値より強くなったときを同期検出タイミングであると判定するタイミング判定手段と、タイミング判定手段で同期検出タイミングであると判定されたときに逆変調部から出力される逆変調ベクトルに基づいて周波数制御信号を生成する周波数制御信号生成手段を具備する。
【００１０】
第１の発明にあっては、１シンボル期間づつ遅延されたベクトルを逆変調したの逆変調ベクトル収束度合の評価値が閾値より強くなったときに、逆変調ベクトルに基づいて局部発振器の発振周波数を制御する周波数制御信号が生成される。第２の発明に係る自動周波数制御装置は、周波数制御信号生成部が、逆変調部の第１〜Ｎの逆変調器から出力されるＮ個の逆変調ベクトルを所定角の０〜（Ｎ−１）倍正方向に回転するＮ個のベクトル正回転器を具備するベクトル正回転手段と、ベクトル正回転手段から出力される正回転ベクトルの収束度合の評価値を演算する正回転ベクトル収束評価値演算手段と、逆変調部の第１〜Ｎの逆変調器から出力されるＮ個の逆変調ベクトルを所定角の０〜（Ｎ−１）倍負方向に回転するＮ個のベクトル負回転器を具備するベクトル負回転手段と、ベクトル負回転手段から出力される負回転ベクトルの収束度合の評価値を演算する負回転ベクトル収束評価値演算手段と、タイミング判定手段で同期検出タイミングであると判定されたときに逆変調ベクトル収束評価値演算部、正回転ベクトル収束評価値演算手段及び負回転ベクトル収束評価値演算手段で演算された収束度合の評価値に基づいて周波数制御出力を判定する周波数制御出力判定手段と、を具備する。
【００１１】
第２の発明にあっては、ベクトル正回転部によって逆変調ベクトルを正方向に回転した正回転ベクトルの収束度合の評価値、ベクトル負回転部によって逆変調ベクトルを負方向に回転した負回転ベクトルの収束度合の評価値、及び逆変調ベクトルの収束度合の評価値に基づいて局部発振器の発振周波数を制御する周波数制御信号が生成される。
【００１２】
第３の発明に係る自動周波数制御装置は、周波数制御信号生成部が、逆変調部の第１〜Ｎの逆変調器から出力されるＮ個の逆変調ベクトルを所定角の０〜（Ｎ−１）倍正方向に回転するベクトル正回転手段と、ベクトル正回転手段から出力される正回転ベクトルの収束度合の評価値を演算する正回転ベクトル収束評価値演算手段と、逆変調部の第１〜Ｎの逆変調器から出力されるＮ個の逆変調ベクトルを所定角の０〜（Ｎ−１）倍負方向に回転するベクトル負回転手段と、ベクトル負回転手段から出力される負回転ベクトルの収束度合の評価値を演算する負回転ベクトル収束評価値演算手段と、逆変換ベクトル収束評価値演算部で演算された逆変換ベクトルの収束度合の評価値が正回転ベクトル収束評価値演算部で演算された正回転ベクトルの収束度合の評価値より弱いときはベクトル正回転手段及び正回転ベクトル収束評価値演算手段による処理を今回演算された正回転ベクトルの収束度合の評価値が前回演算された正回転ベクトルの収束度合の評価値より強となるまで繰り返しその後所定角の繰り返し回数倍した周波数増加信号を出力するベクトル正回転処理手段と、逆変換ベクトル収束評価値演算部で演算された逆変換ベクトルの収束度合の評価値が負回転ベクトル収束評価値演算部で演算された負回転ベクトルの収束度合の評価値より弱いときはベクトル負回転手段及び負回転ベクトル収束評価値演算手段による処理を今回演算された負回転ベクトルの収束度合の評価値が前回演算された負回転ベクトル収束度合の評価値より強となるまで繰り返しその後所定角の繰り返し回数倍した周波数減少信号を出力するベクトル負回転処理手段と、を具備する。
【００１３】
第３の発明に係る自動周波数制御装置は、逆変調ベクトルの正方向及び負方向への回転を繰り返すことによって、局部発振器の発振周波数を制御する周波数制御信号が生成される。
【００１４】
【発明の実施の形態】
図４は本発明に係る自動周波数制御装置を適用したディジタル変調波受信機の構成図であって、従来のディジタル変調波受信機の復調器１１及び周波数弁別器１２に代えて本発明に係る自動周波数制御装置４が適用される。
図５は本発明に係る自動周波数制御装置の構成図であって、直交復調器１０から出力されるフレーム同期信号を含むディジタル変調信号の実数成分（Ｉ）及び虚数成分（Ｑ）は、それぞれＡ／Ｄコンバータ４０でディジタル化される。
【００１５】
図６はＱＰＳＫの信号配置図であって、ＱＰＳＫ（４値位相シフト・キーイング変調）においては（０，０）、（１，０）、（１，１）及び（０，１）の４状態を取り得るので、Ｎ状態（２Ｎビット）をフレーム同期信号とすることができる。例えば（０，０）、（１，０）及び（１，１）の３状態（６ビット）をフレーム同期信号とした場合には、フレーム同期信号は（０，０，１，０，１，１）となる。
【００１６】
上記のフレーム同期信号を含むディジタル変調信号は、Ａ／Ｄコンバータ４０でディジタル化され、ローパスフィルタの一種であるマッチドフィルタ４１を介して１シンボル遅延部列に導かれる。なお、１シンボル遅延部列は、（Ｎ−１）個の１シンボル遅延部４２１、４２２・・・４２Ｎ−１を直列接続して構成される。
【００１７】
マッチドフィルタ４１並びに（Ｎ−１）個の１シンボル遅延部４２１、４２２・・・４２Ｎ−１の出力は、Ｎ個の逆変調部４３１、４３２・・・４３Ｎによって逆変換される。同期シンボルが上記６ビットであれば、１シンボル遅延部は４２１及び４２２の２個となる。
図７は１つの逆変調部の構成図であって、各逆変調部４３ｉは、マッチドフィルタ４１並びにＮ個の１シンボル遅延部４２１、４２２・・・４２Ｎの出力を予め定められている同期シンボルのベクトル値で除算する。
【００１８】
同期シンボルが上記６ビットであれば、逆変調器は４３１，４３２及び４３３の３個となり、逆変調器４３１、４３２及４３３の除数ベクトルは、それぞれの送信ベクトルと同じ（＋１＋ｊ）、（−１＋ｊ）及び（−１−ｊ）となる。
送信波が伝送路で歪みを受けないものとすれば、受信ベクトルは送信ベクトルと一致するので、逆変調部４２１、４２２・・・４２Ｎの出力はそれぞれ‘１＋ｊ０’（＝１）となる。
【００１９】
従って、逆変調部４２１、４２２・・・４２Ｎの出力が‘１’に近づいたことをもって同期したと判定することが可能となる。
即ち、逆変調ベクトル収束評価値演算部４４において逆変調ベクトルの収束度合の評価値が演算される。そして、タイミング判定部４５において収束度合の評価値が予め定められた閾値よりも小であるかを判定し、閾値よりも小であるときはそれをフレーム同期クロックとして出力する。
【００２０】
逆変調ベクトルの収束度合の評価値が閾値より小であるときにのみフレーム同期クロックを出力するのは、フェージングや雑音の影響が大きい場合、即ち収束度合の評価値が弱い場合にも周波数制御を実行すると、却って局部発振器の発振周波数が送信周波数から離れてしまうおそれがあるからである。
なお、Ａ／Ｄコンバータ４０及びタイミング判定部４５は、サンプルクロック生成器４６で生成されるサンプルクロックによって駆動される。
【００２１】
さらに、フレーム同期クロックが出力されるタイミングで、周波数制御信号生成手段４７で生成される局部発振器１４の発振周波数を制御するための周波数制御信号も出力される。
図８は周波数制御信号生成部の第１の実施形態の構成図であって、逆変調部４２１、４２２・・・４２Ｎから出力される逆変調ベクトルを正方向（反時計回り）に回転するベクトル正回転器４７１１〜４７１Ｎと、正回転されたベクトルの収束度合の評価値を演算する正回転ベクトル収束評価値演算部４７２と、逆変調ベクトルを負方向（時計回り）に回転するベクトル負回転器４７３１〜４７３Ｎと、負回転されたベクトルの収束度合の評価値を演算する負正回転ベクトル収束評価値演算部４７４と、正回転ベクトル収束度合の評価値及び負回転ベクトル収束度合の評価値並びに逆変調ベクトルの収束度合の評価値に基づいて周波数の上げ下げ信号を出力する周波数制御出力判定手段４７５よりなる。
【００２２】
図９はベクトル回転器の作用説明図であって、正方向に回転する場合を示しており、１シンボル遅延部から出力される逆変調ベクトルを遅延が小であるほど大きく回転させる。
即ち遅延のないマッチドフィルタ４１の出力には第１のベクトル正回転器４７１１でベクトルｒ_N-1 (絶対値‘１、角度（Ｎ−１）×θ°のベクトル）を乗算し、第１段目の１シンボル遅延器４２１の出力には第２のベクトル正回転器４７１２でベクトルｒ_N-2 (絶対値‘１’、角度（Ｎ−２）×θ°のベクトル）を乗算する。以下同様に処理し、第（Ｎ−１）段目の１シンボル遅延器４２Ｎ−１の出力にはベクトルｒ₀ （絶対値‘１’、角度０°のベクトル）を乗算する。
【００２３】
ベクトル負回転器４７３１、４７３２・・・４７３Ｎでは、マッチドフィルタ４１及び（Ｎ−１）個の１シンボル遅延器４２１、４２２・・・４２Ｎ−１の出力ベクトルを遅延量に応じて負方向（時計回り）に回転する。
そして、正回転ベクトル収束評価値演算部４７２でベクトル正回転器４７１１〜４７１Ｎの出力ベクトルの収束度合の評価値Ｖ（Ｓ₊ ）が演算され、負回転ベクトル収束評価値演算部４７４でベクトル負回転器４７３１〜４７３Ｎの出力ベクトルの収束度合の評価値Ｖ（Ｓ_- ）が演算される。
【００２４】
図１０は周波数制御出力判定部の動作説明図であって、正回転ベクトル収束評価値演算部４７２で演算された正回転ベクトルの収束度合の評価値力Ｖ（Ｓ₊ )と、負回転ベクトル収束評価値演算部４７４で演算された負回転ベクトルの収束度合の評価値Ｖ（Ｓ_- )とを比較する。
そして、Ｖ（Ｓ_- ）＜Ｖ（Ｓ₊ ）の場合、即ち図９（イ）の場合であれば、現在の局部発振器１４の発振周波数が送信周波数より大であると判定して、ループフィルタ１３を介して局部発振器１４に発振周波数を下げる指令を出力する。
【００２５】
逆に、Ｖ（Ｓ_- )＞Ｖ（Ｓ₊ )、即ち図９（ロ）の場合であれば、現在の局部発振器１４の発振周波数が送信周波数より小であると判定して、ループフィルタ１３を介して局部発振器１４に発振周波数を上げる指令を出力する。
上述のように、本発明に係る自動周波数制御装置４により、ループフィルタ１３を介して局部発振器１４の発振周波数を上下することにより、局部発振器１４の発振周波数を送信周波数に追従させることが可能となる。
【００２６】
逆変調ベクトル収束評価値演算部４４、正回転ベクトル収束評価値演算部４７２及び負回転ベクトル収束評価値演算部４７４は、逆変調ベクトル、負回転ベクトル及び正回転ベクトルが収束したことを判定できれば構成は特に規定されない。
図１１は収束評価値演算部の第１実施形態の構成図であって、（Ｎ−１）個の減算器１１１１〜１１１Ｎ−１において、隣り合う逆変調部（例えば第１の逆変調部４３１と第２の逆変調部４３２）の出力の差、隣り合うベクトル正回転部（例えば第１のベクトル正回転部４７１１と第２のベクトル正回転部４７１２）の出力の差、又は隣り合うベクトル負回転部（例えば第１のベクトル負回転部４７３１と第２のベクトル負回転部４７３２）の出力の差を算出する。
【００２７】
各減算器１１１１〜１１１Ｎ−１の出力の絶対値が対応する絶対値演算器１１２１〜１１２Ｎ−１において演算され、絶対値演算器１１２１〜１１２Ｎ−１の出力の和が加算器１１３で演算され、その和が閾値判定部４５及び周波数制御出力判定部４７に対する出力となる。
第１の実施形態に係る収束評価値演算部にあっては、隣接する信号の差を算出するため、受信信号に重畳した雑音の影響を受け易い。
【００２８】
図１２は収束評価値演算部の第２実施形態の構成図であって、耐雑音性を向上することを可能とする。
ベクトル平均値演算部１２０において、逆変調器４３１〜４３Ｎ、ベクトル正回転部４７１１〜４７１Ｎ又はベクトル負回転部４７３１〜４７３Ｎから出力されるベクトルの平均値が演算される。
【００２９】
そして、減算器１２１１〜１２１Ｎ−１において、このベクトルの平均値と、逆変調器４３１〜４３Ｎから出力される逆変調ベクトル、ベクトル正回転部４７１１〜４７１Ｎから出力される正回転ベクトル又はベクトル負回転部４７３１〜４７３Ｎから出力される負回転ベクトルの差が演算される。
各ベクトル差の２乗値が２乗値演算器１２２１〜１２２Ｎ−１で算出され、その平均値が平均値演算部１２３で演算される。
【００３０】
ベクトル平均値演算部１２０で演算されたベクトル平均値の２乗値が平均値２乗値演算部１２４で算出され、除算部１２５において平均値演算部１２３の出力を正規化するために使用される。
そして、正規化されたベクトル平均値が、閾値判定部４５及び周波数制御出力判定部４７５に対する出力となる。
【００３１】
第２実施形態に係る収束評価値演算部は、耐雑音性を向上することが可能であるものの、構成が複雑となる。
そこで、ベクトル平均値は正回転しても負回転してもあまり変化しないことに注目して、構成を簡略化する。
図１３は収束評価値演算部の第３の実施形態の構成図であって、逆変調ベクトル収束度合の評価値算出部４４の構成は図１２に示す第２の実施形態と同一である。
【００３２】
図１４は第３の実施形態で使用される回転ベクトル（正回転ベクトル及び負回転ベクトル）収束評価値演算部の第１の実施形態の構成図であって、図１１に示す第２実施形態に係る収束評価値演算部からベクトル平均値演算部１２０、ベクトル平均値２乗部１２４が除去される。
そして、正回転ベクトル収束評価値演算部４７２及び負回転ベクトル収束評価値演算部４７４では、逆変調ベクトル収束評価値演算部４４のベクトル平均値演算部１１０で演算されるベクトル平均値が各回転ベクトルとの偏差の演算に使用され、平均２乗部１１４で演算されるベクトル平均値２乗値が正規化のために使用される。
【００３３】
さらに除算器は、ハードウエアで構成してもソフトウエアで構成しても規模が大きくなる。一方送信周波数からの偏差だけを求める場合には、ベクトル平均値による正規化を省略することが可能となる。
図１５は回転ベクトル収束評価値演算部の第２実施形態の構成図であって、図１４に示す回転ベクトル収束評価値演算部からさらに除算部１２５が除去され、平均値演算部１２３の出力がそのまま周波数制御出力判定部４７５に出力される。
【００３４】
上記実施形態にあっては、送信周波数と受信周波数の偏差の正負に応じて局部発振部１４の発振周波数を調整する操作を繰り返すことにより、受信周波数を送信周波数に追従させているため、追従完了までに時間を要する。
そこで、周波数制御信号生成部４７をプログラマブルロジック、例えばマイクロコンピュータで構成することにより、発振周波数の追従操作を１回とすることも可能である。
【００３５】
図１６は、周波数制御信号生成部４７で実行される制御信号生成ルーチンのフローチャートであって、ステップ１６１で逆変調部４３１〜４３Ｎの出力である逆変調ベクトル群を読み込む。
ステップ１６２で初期処理を実行し、ステップ１６３で逆変調ベクトルの収束度合の評価値Ｖ（Ｓ₀ ）が正回転ベクトルの収束度合の評価値Ｖ（Ｓ₊ ）より大であるかを判定する。
【００３６】
ステップ１６３で肯定判定されたとき、即ちＶ（Ｓ₀ ）>Ｖ（Ｓ₊ ）であるときは、ステップ１６４でベクトル正回転処理を実行してこのルーチンを終了する。
逆にステップ１６３で否定判定されたとき、即ちＶ（Ｓ₀ ）≦Ｖ（Ｓ₊ ）であるときは、ステップ１６５で逆変調ベクトルの収束度合の評価値Ｓ₀ が負回転ベクトルの収束度合の評価値Ｓ_- より大であるかを判定する。
【００３７】
ステップ１６５肯定判定されたとき、即ちＶ（Ｓ₀ ）>Ｖ（Ｓ_- ）あるときは、ステップ１６６でベクトル負回転処理を実行してこのルーチンを終了する。
逆にステップ１６５で否定判定されたとき、即ちＶ（Ｓ₀ ）≦Ｖ（Ｓ_- ）かつＶ（Ｓ₀ ）≦Ｖ（Ｓ₊ ）であるときは、局部発振器１４の発振周波数を変更することなく直接このルーチンを終了する。
【００３８】
図１７はステップ１６２で実行される初期処理のフローチャートであって、ステップ１６２１で逆変調ベクトルの収束度合の評価値Ｖ（Ｓ₀ ）を演算する。
次にステップ１６２２で逆変調ベクトルを＋ＡＨｚ相当正回転し、ステップ１６２３で正回転ベクトルの収束度合の評価値Ｖ（Ｓ₊ ）を演算する。
さらに、ステップ１６２４で逆変調ベクトルを−ＡＨｚ相当負回転し、ステップ１６２５で負回転ベクトルの収束度合の評価値Ｖ（Ｓ_- ）を演算してこの処理を終了する。
【００３９】
図１８はステップ１６４で実行されるベクトル正回転処理のフローチャートであって、ステップ１６４１で回転回数Ｃを初期値‘１’に設定する。
次にステップ１６４２で前回の回転ベクトルをさらに＋ＡＨｚ相当回転して新たな回転ベクトルを演算し、ステップ１６４３で新たな回転ベクトルの収束度合の評価値Ｖ（Ｓ₊₊）を演算する。
【００４０】
ステップ１６４４で前回の正方向回転ベクトル群での収束度合の評価値Ｖ（Ｓ₊ ）が新たな回転ベクトルの収束度合の評価値Ｖ（Ｓ₊₊）より大であるかを判定する。
ステップ１６４４で肯定判定されたとき、即ちＶ（Ｓ₊ ）>Ｖ（Ｓ₊₊）であれば、ステップ１６４５でＶ（Ｓ₊ ）をＶ（Ｓ₊₊）で更新し、ステップ１６４６で回転回数Ｃをインクリメントしてステップ１６４２に戻る。
【００４１】
逆にステップ１６４４で否定判定されたとき、即ちＶ（Ｓ₊ ）≦Ｖ（Ｓ₊₊）であれば、ステップ１６４７で局部発振器１４に対して発振周波数を（＋Ｃ×Ａ）Ｈｚ変更する指令を出力して、この処理を終了する。
図１９はステップ１６６で実行されるベクトル負回転処理のフローチャートであって、ステップ１６６１で回転回数Ｃを初期値‘１’に設定する。
【００４２】
次にステップ１６６２で前回の回転ベクトルをさらに−ＡＨｚ相当回転して新たな回転ベクトルを演算し、ステップ１６６３で新たな回転ベクトルの収束度合の評価値Ｖ（Ｓ_--）を演算する。
ステップ１６６４で前回の負方向回転ベクトル群での収束度合の評価値Ｖ（Ｓ_- ）が新たな回転ベクトルの収束度合の評価値Ｖ（Ｓ_--）より大であるかを判定する。
【００４３】
ステップ１６６４で肯定判定されたとき、即ちＶ（Ｓ_- ）>Ｖ（Ｓ_--）であれば、ステップ１６６５でＶ（Ｓ_- ）をＶ（Ｓ_--）で更新し、ステップ１６６６で回転回数Ｃをインクリメントしてステップ１６６２に戻る。
逆にステップ１６６４で否定判定されたとき、即ちＶ（Ｓ_- ）≦Ｖ（Ｓ_--）であれば、ステップ１６４７で局部発振器１４に対して発振周波数を（−Ｃ×Ａ）Ｈｚ変更する指令を出力して、この処理を終了する。
【００４４】
なお本発明に係る自動周波数制御装置は、ハードワイヤドロジックによって構成しても、プログラマブルロジックによって構成しても、あるいは両者の混合によって構成してもよい。
さらに、周波数制御が過制御にならない限りループフィルタ１３を省略し、自同周波数制御装置によって直接局部発振器を制御することも可能である。
【００４５】
【発明の効果】
本発明に係る自動周波数制御装置によれば、局部発振器の発振周波数を弱電界においても、強電界においてはリミッタの動作不動作に拘らず送信周波数に追従させることが可能となる。
【図面の簡単な説明】
【図１】従来のディジタル変調波受信機の構成図である。
【図２】周波数弁別器の構成図である。
【図３】受信信号のパワースペクトル図である。
【図４】本発明に係る自動周波数制御装置を適用したディジタル変調波受信機の構成図である。
【図５】本発明に係る自動周波数制御装置の構成図である。
【図６】ＱＰＳＫの信号配置図である。
【図７】逆変調部の構成図である。
【図８】周波数制御信号生成部の第１の実施形態の構成図である。
【図９】ベクトルの正回転の説明図である。
【図１０】周波数制御出力判定部の動作説明図である。
【図１１】収束評価値演算部の第１の実施形態の構成図である。
【図１２】収束評価値演算部の第２の実施形態の構成図である。
【図１３】収束評価値演算部の第３の実施形態の構成図である。
【図１４】回転ベクトル収束評価値演算部の第１の実施形態の構成図である。
【図１５】回転ベクトル収束評価値演算部の第２の実施形態の構成図である。
【図１６】制御信号生成ルーチンのフローチャートである。
【図１７】初期処理のフローチャートである。
【図１８】ベクトル正回転処理のフローチャートである。
【図１９】ベクトル負回転処理のフローチャートである。[0001]
BACKGROUND OF THE INVENTION
The present invention relates to an automatic frequency control apparatus for a mobile communication system to which digital modulation is applied, and more particularly to an automatic frequency control apparatus capable of following a transmission frequency once synchronization is established.
[0002]
[Prior art]
In a receiver of a mobile communication system to which digital modulation is applied, not only the synchronization with the transmitter is established, but also after the synchronization is established, the frequency of the local oscillator circuit of the receiver matches the transmission frequency. It is necessary to control it.
FIG. 1 is a configuration diagram of a conventional digital modulation wave receiver. A transmission wave converted into an intermediate frequency signal is demodulated by a quadrature demodulator 10 and then demodulated by a demodulator 11.
[0003]
In order to make the oscillation frequency of the local oscillator 14 for the quadrature demodulator coincide with the transmission frequency, the output of the quadrature demodulator 10 is frequency discriminated by the frequency discriminator 12 and further filtered by the loop filter 13, and the oscillation frequency of the local oscillator 14 is obtained. Is controlling.
FIG. 2 is a block diagram of the frequency discriminator, which constitutes a so-called “taskage” circuit.
[0004]
That is, the real component (I) is sent to the adder 125 via the real component delay device 121 and the first multiplier 122 that delay the real component (I) by one clock τ, and the imaginary component (Q) is the imaginary component. (Q) is sent to the adder 125 through the imaginary component delay unit 123 and the second multiplier 124 that delay the clock by 1 clock τ.
Then, the output of the first multiplier 122 and the output of the second multiplier 124 are added by the adder 123 and become the output of the frequency discriminator 12.
[0005]
The first multiplier 122 multiplies the output of the real component delayer 121 and the imaginary component (Q), and the second multiplier 124 multiplies the output of the imaginary component delayer 123 and the real component (I). Is done.
By using the “tasukike” circuit described above, stable frequency discrimination is possible even in a weak electric field area.
[0006]
By the way, when the amplitude of the received wave does not include information as in the case of digital modulation, and only the information is included in the phase of the received wave, demodulation is usually performed after limiting the amplitude with a limiter.
[0007]
[Problems to be solved by the invention]
However, when the amplitude is limited by the limiter, there arises a problem that the discrimination capability is lowered if the electric field is too strong.
FIG. 3 is a power spectrum diagram of a received signal, where the horizontal axis represents frequency and the vertical axis represents power.
[0008]
That is, in a strong electric field, when there is no limiter, it is possible to reliably separate the transmission wave centered at the center frequency f ₀ and noise, but when there is a limiter, the power difference between the transmission wave and noise becomes small. It becomes difficult to reliably separate the transmission wave and noise.
The present invention has been made in view of the above problems, and an object of the present invention is to provide an automatic frequency control device that can reliably follow a transmission frequency in both a weak electric field and a strong electric field.
[0009]
[Means for Solving the Problems]
An automatic frequency control device according to a first aspect of the present invention is an automatic frequency control device used for a receiver that demodulates a digital modulation signal in which a synchronization symbol consisting of N symbols is inserted for each frame,
A digitizing means for digitizing the digital modulation signal and a 1-symbol delay unit for delaying the input signal for one symbol period are connected in series (N-1) stages, and 1 to (N-1) from the output of the digitizing means. ) A delay unit for generating a signal delayed by a symbol period, a first inverse modulator for inversely modulating the output of the digitizing means with a vector corresponding to the last symbol of the synchronization symbol, and first to (N− 1) Inverse modulation unit including second to N inverse modulators for inversely modulating the output of the 1-symbol delay unit of the stage with a vector corresponding to (N-1) to the first symbol of the synchronization symbol; The inverse modulation vector convergence evaluation value calculation unit for calculating the evaluation value of the degree of convergence of the inverse modulation vector output from the input unit and the evaluation of the degree of convergence of the inverse modulation vector calculated by the inverse modulation vector convergence evaluation value calculation unit Timing determination means for determining that the synchronization detection timing is greater than a predetermined threshold, and an inverse modulation vector output from the inverse modulation unit when the timing determination means determines that it is the synchronization detection timing Frequency control signal generating means for generating a frequency control signal based on the above.
[0010]
In the first invention, when the evaluation value of the degree of convergence of the inverse modulation vector obtained by inversely modulating the vector delayed by one symbol period becomes stronger than the threshold, the oscillation frequency of the local oscillator based on the inverse modulation vector A frequency control signal for controlling is generated. In the automatic frequency control device according to the second aspect of the invention, the frequency control signal generation unit converts N inverse modulation vectors output from the first to N inverse modulators of the inverse modulation unit to 0 to (N− 1) Vector positive rotation means having N vector positive rotators rotating in the double positive direction, and positive rotation vector convergence evaluation value for calculating an evaluation value of the degree of convergence of the positive rotation vector output from the vector positive rotation means N vector negative rotators for rotating N inverse modulation vectors output from the arithmetic means and the first to N inverse modulators of the inverse modulator in the negative direction 0 to (N-1) times the predetermined angle. Negative rotation vector convergence evaluation value calculating means for calculating the evaluation value of the degree of convergence of the negative rotation vector output from the vector negative rotation means, and the timing determination means determine that it is the synchronization detection timing Inverse modulation when A frequency control output determination means for determining a frequency control output based on the evaluation value of the degree of convergence calculated by the Kuttle convergence evaluation value calculation unit, the positive rotation vector convergence evaluation value calculation means and the negative rotation vector convergence evaluation value calculation means; It has.
[0011]
In the second invention, the evaluation value of the degree of convergence of the positive rotation vector obtained by rotating the reverse modulation vector in the positive direction by the vector positive rotation unit, and the negative rotation vector obtained by rotating the reverse modulation vector in the negative direction by the vector negative rotation unit A frequency control signal for controlling the oscillation frequency of the local oscillator is generated based on the evaluation value of the degree of convergence and the evaluation value of the degree of convergence of the inverse modulation vector.
[0012]
In the automatic frequency control device according to the third aspect of the invention, the frequency control signal generation unit converts N inverse modulation vectors output from the first to N inverse modulators of the inverse modulation unit to 0 to (N− 1) Vector positive rotation means that rotates in the double positive direction, positive rotation vector convergence evaluation value calculation means that calculates an evaluation value of the degree of convergence of the positive rotation vector output from the vector positive rotation means, and a first of the inverse modulation unit Vector negative rotation means for rotating N inverse modulation vectors output from the -N inverse modulators in a negative direction 0 to (N-1) times the predetermined angle, and negative rotation vector output from the vector negative rotation means The negative rotation vector convergence evaluation value calculating means for calculating the evaluation value of the degree of convergence of the input vector, and the evaluation value of the degree of convergence of the inverse transformation vector calculated by the inverse transformation vector convergence evaluation value computing unit is obtained by the positive rotation vector convergence evaluation value computing unit. Calculated positive rotation vector When the evaluation value of the degree of convergence is weaker than the evaluation value of the positive rotation vector, the evaluation value of the degree of convergence of the positive rotation vector calculated this time is processed by the vector positive rotation means and the positive rotation vector convergence evaluation value calculation means. Vector forward rotation processing means that outputs a frequency increase signal that is repeated until it becomes stronger than the evaluation value and then multiplied by the number of repetitions of a predetermined angle, and the evaluation value of the degree of convergence of the inverse transformation vector calculated by the inverse transformation vector convergence evaluation value computation unit Is weaker than the evaluation value of the degree of convergence of the negative rotation vector calculated by the negative rotation vector convergence evaluation value calculation unit, the processing by the vector negative rotation means and the negative rotation vector convergence evaluation value calculation means is performed on the negative rotation vector calculated this time. Repeat until the evaluation value of the convergence degree becomes stronger than the evaluation value of the negative rotation vector convergence degree calculated last time And vector negative rotation processing means for outputting the number obtained by multiplying a frequency decrease signal, comprising a.
[0013]
The automatic frequency control device according to the third aspect of the invention generates a frequency control signal for controlling the oscillation frequency of the local oscillator by repeatedly rotating the inverse modulation vector in the positive direction and the negative direction.
[0014]
DETAILED DESCRIPTION OF THE INVENTION
FIG. 4 is a block diagram of a digital modulated wave receiver to which the automatic frequency control apparatus according to the present invention is applied. The automatic modulation controller according to the present invention is replaced with the demodulator 11 and frequency discriminator 12 of the conventional digital modulated wave receiver. A frequency control device 4 is applied.
FIG. 5 is a block diagram of an automatic frequency control apparatus according to the present invention. The real component (I) and the imaginary component (Q) of the digital modulation signal including the frame synchronization signal output from the quadrature demodulator 10 are respectively A Digitized by the / D converter 40.
[0015]
FIG. 6 is a signal arrangement diagram of QPSK. In QPSK (quaternary phase shift keying modulation), four states (0, 0), (1, 0), (1, 1) and (0, 1) are shown. Therefore, the N state (2N bits) can be used as a frame synchronization signal. For example, when three states (6 bits) of (0, 0), (1, 0) and (1, 1) are used as the frame synchronization signal, the frame synchronization signal is (0, 0, 1, 0, 1, 1).
[0016]
The digital modulation signal including the frame synchronization signal is digitized by the A / D converter 40 and guided to the 1-symbol delay unit string via the matched filter 41 which is a kind of low-pass filter. The 1-symbol delay unit string is configured by connecting (N−1) 1-symbol delay units 421, 422,... 42N−1 in series.
[0017]
The outputs of the matched filter 41 and the (N−1) 1-symbol delay units 421, 422,... 42N−1 are inversely converted by N inverse modulation units 431, 432,. If the synchronization symbol is the 6 bits, there are two 1-symbol delay units 421 and 422.
FIG. 7 is a configuration diagram of one inverse modulation unit, and each inverse modulation unit 43i has a predetermined synchronization symbol output from the matched filter 41 and N 1-symbol delay units 421, 422... 42N. Divide by the vector value of.
[0018]
If the synchronization symbol is 6 bits, there are three inverse modulators 431, 432 and 433, and the divisor vectors of the inverse modulators 431, 432 and 433 are the same as the respective transmission vectors (+ 1 + j), (−1 + j). ) And (-1-j).
If it is assumed that the transmission wave is not distorted in the transmission path, the reception vector matches the transmission vector, so that the outputs of the inverse modulation units 421, 422,... 42N are '1 + j0' (= 1), respectively.
[0019]
Accordingly, it can be determined that the outputs of the inverse modulation units 421, 422,...
That is, the inverse modulation vector convergence evaluation value calculation unit 44 calculates an evaluation value of the degree of convergence of the inverse modulation vector. Then, the timing determination unit 45 determines whether the evaluation value of the degree of convergence is smaller than a predetermined threshold value, and when it is smaller than the threshold value, outputs it as a frame synchronization clock.
[0020]
The frame synchronization clock is output only when the evaluation value of the degree of convergence of the inverse modulation vector is smaller than the threshold value, even when the influence of fading or noise is large, that is, when the evaluation value of the degree of convergence is weak. This is because if executed, the oscillation frequency of the local oscillator may be separated from the transmission frequency.
The A / D converter 40 and the timing determination unit 45 are driven by the sample clock generated by the sample clock generator 46.
[0021]
Further, a frequency control signal for controlling the oscillation frequency of the local oscillator 14 generated by the frequency control signal generation means 47 is also output at the timing when the frame synchronization clock is output.
FIG. 8 is a block diagram of the first embodiment of the frequency control signal generation unit, in which the inverse modulation vector output from the inverse modulation units 421, 422... 42N is rotated in the forward direction (counterclockwise). Positive rotators 4711 to 471N, a positive rotation vector convergence evaluation value calculation unit 472 that calculates an evaluation value of the degree of convergence of a positively rotated vector, and a vector negative rotator that rotates an inverse modulation vector in the negative direction (clockwise) 4731 to 473N, a negative positive rotation vector convergence evaluation value calculation unit 474 that calculates an evaluation value of the degree of convergence of the negatively rotated vector, an evaluation value of the positive rotation vector convergence degree, an evaluation value of the negative rotation vector convergence degree, and vice versa. The frequency control output determination means 475 outputs a frequency increase / decrease signal based on the evaluation value of the degree of convergence of the modulation vector.
[0022]
FIG. 9 is a diagram for explaining the operation of the vector rotator, and shows a case where the vector rotator rotates in the forward direction. The inverse modulation vector output from the 1-symbol delay unit is rotated larger as the delay is smaller .
In other words, the output of the matched filter 41 without delay is multiplied by the vector r _N-1 (vector of absolute value '1, angle (N-1) × θ °) by the first vector positive rotator 4711 to obtain the first stage. A second vector positive rotator 4712 multiplies the output of the first 1-symbol delay unit 421 by a vector r _N-2 (absolute value “1”, angle (N−2) × θ ° vector). Thereafter, the same processing is performed, and the output of the (N−1) -th stage 1-symbol delay unit 42N-1 is multiplied by a vector r ₀ (absolute value “1”, vector with an angle of 0 °).
[0023]
In the vector negative rotators 4731 , 4732 ... 473N , the output vectors of the matched filter 41 and (N−1) 1-symbol delay units 421, 422. Around).
Then, the positive rotation vector convergence evaluation value calculation unit 472 calculates the evaluation value V (S ₊ ) of the degree of convergence of the output vectors of the vector positive rotators 4711 to 471N, and the negative rotation vector convergence evaluation value calculation unit 474 calculates the vector negative rotation. An evaluation value V (S ₋ ) of the degree of convergence of the output vectors of the units 4731 to 473N is calculated.
[0024]
FIG. 10 is an explanatory diagram of the operation of the frequency control output determination unit. The evaluation value force V (S ₊ ) of the degree of convergence of the positive rotation vector calculated by the positive rotation vector convergence evaluation value calculation unit 472 and the negative rotation vector convergence. The evaluation value V (S ₋ ) of the degree of convergence of the negative rotation vector calculated by the evaluation value calculation unit 474 is compared.
If V (S ₋ ) <V (S ₊ ), that is, the case of FIG. 9A, it is determined that the current oscillation frequency of the local oscillator 14 is higher than the transmission frequency, and the loop filter A command to lower the oscillation frequency is output to the local oscillator 14 via 13.
[0025]
Conversely, if V (S ₋ )> V (S ₊ ), that is, the case of FIG. 9B, it is determined that the current oscillation frequency of the local oscillator 14 is lower than the transmission frequency, and the loop filter 13 A command to increase the oscillation frequency is output to the local oscillator 14 via.
As described above, the automatic frequency control device 4 according to the present invention allows the oscillation frequency of the local oscillator 14 to follow the transmission frequency by raising and lowering the oscillation frequency of the local oscillator 14 via the loop filter 13. Become.
[0026]
The inverse modulation vector convergence evaluation value calculation unit 44, the positive rotation vector convergence evaluation value calculation unit 472, and the negative rotation vector convergence evaluation value calculation unit 474 are configured if it can be determined that the inverse modulation vector, the negative rotation vector, and the positive rotation vector have converged. Is not specified.
FIG. 11 is a configuration diagram of the first embodiment of the convergence evaluation value calculation unit. In (N−1) subtractors 1111 to 111N−1, adjacent demodulation units (for example, first demodulation unit 431). And the second inverse modulation unit 432), the difference between the outputs of the adjacent vector positive rotation units (for example, the first vector positive rotation unit 4711 and the second vector positive rotation unit 4712), or the adjacent vector negative The difference between the outputs of the rotation units (for example, the first vector negative rotation unit 4731 and the second vector negative rotation unit 4732) is calculated.
[0027]
The absolute values of the outputs of the subtracters 1111 to 111N-1 are calculated by the corresponding absolute value calculators 1121 to 112N-1, and the sum of the outputs of the absolute value calculators 1121 to 112N-1 is calculated by the adder 113. The sum is an output to the threshold value determination unit 45 and the frequency control output determination unit 47.
In the convergence evaluation value calculation unit according to the first embodiment, since the difference between adjacent signals is calculated, the convergence evaluation value calculation unit is easily affected by noise superimposed on the received signal.
[0028]
FIG. 12 is a block diagram of the second embodiment of the convergence evaluation value calculation unit, which makes it possible to improve noise resistance.
In the vector average value calculation unit 120, the average value of vectors output from the inverse modulators 431 to 43N, the vector positive rotation units 4711 to 471N, or the vector negative rotation units 4731 to 473N is calculated.
[0029]
Then, in the subtracters 1211 to 121N-1, the average value of the vectors, the inverse modulation vector output from the inverse modulators 431 to 43N, the positive rotation vector output from the vector positive rotation units 4711 to 471N, or the vector negative rotation The difference between the negative rotation vectors output from the units 4731 to 473N is calculated.
The square value of each vector difference is calculated by the square value calculators 1221 to 122N−1, and the average value is calculated by the average value calculator 123.
[0030]
A square value of the vector average value calculated by the vector average value calculation unit 120 is calculated by the average value square value calculation unit 124 and used by the division unit 125 to normalize the output of the average value calculation unit 123. .
Then, the normalized vector average value becomes an output to the threshold value determination unit 45 and the frequency control output determination unit 475.
[0031]
Although the convergence evaluation value calculation unit according to the second embodiment can improve noise resistance, the configuration is complicated.
Therefore, the configuration is simplified by paying attention to the fact that the vector average value does not change so much whether it rotates positively or negatively.
FIG. 13 is a configuration diagram of the third embodiment of the convergence evaluation value calculation unit, and the configuration of the evaluation value calculation unit 44 for the degree of inverse modulation vector convergence is the same as that of the second embodiment shown in FIG.
[0032]
FIG. 14 is a configuration diagram of the first embodiment of the rotation vector (positive rotation vector and negative rotation vector) convergence evaluation value calculation unit used in the third embodiment. The second embodiment shown in FIG. The vector average value calculation unit 120 and the vector average value square unit 124 are removed from the convergence evaluation value calculation unit.
Then, in the positive rotation vector convergence evaluation value calculation unit 472 and the negative rotation vector convergence evaluation value calculation unit 474, the vector average value calculated by the vector average value calculation unit 110 of the inverse modulation vector convergence evaluation value calculation unit 44 is the rotation vector. The vector mean value square value computed by the mean square unit 114 is used for normalization.
[0033]
Furthermore, the scale of the divider increases regardless of whether it is configured by hardware or software. On the other hand, when only the deviation from the transmission frequency is obtained, normalization by the vector average value can be omitted.
FIG. 15 is a block diagram of the second embodiment of the rotation vector convergence evaluation value calculation unit. The division unit 125 is further removed from the rotation vector convergence evaluation value calculation unit shown in FIG. The signal is output to the frequency control output determination unit 475 as it is.
[0034]
In the above embodiment, since the reception frequency is made to follow the transmission frequency by repeating the operation of adjusting the oscillation frequency of the local oscillation unit 14 according to the sign of the deviation between the transmission frequency and the reception frequency, the follow-up is completed. It takes time to complete.
Therefore, by configuring the frequency control signal generation unit 47 with a programmable logic, for example, a microcomputer, the oscillation frequency can be tracked once.
[0035]
FIG. 16 is a flowchart of a control signal generation routine executed by the frequency control signal generation unit 47. In step 161, the inverse modulation vector group that is the output of the inverse modulation units 431 to 43N is read.
In step 162, initial processing is executed, and in step 163, it is determined whether the evaluation value V (S ₀ ) of the degree of convergence of the inverse modulation vector is greater than the evaluation value V (S ₊ ) of the degree of convergence of the positive rotation vector.
[0036]
When an affirmative determination is made at step 163, that is, when V (S ₀ )> V (S ₊ ), vector forward rotation processing is executed at step 164 and this routine is terminated.
Conversely, when a negative determination is made in step 163, that is, when V (S ₀ ) ≦ V (S ₊ ), the evaluation value S _{0 of the} degree of convergence of the inverse modulation vector in step 165 is the degree of convergence of the negative rotation vector. It is determined whether the evaluation value is greater than S ₋ .
[0037]
If the determination in step 165 is affirmative, that is, if V (S ₀ )> V (S ₋ ), vector negative rotation processing is executed in step 166 and this routine is terminated.
Conversely, when a negative determination is made in step 165, that is, when V (S ₀ ) ≦ V (S ₋ ) and V (S ₀ ) ≦ V (S ₊ ), the oscillation frequency of the local oscillator 14 is changed. Exit this routine directly instead.
[0038]
FIG. 17 is a flowchart of the initial process executed in step 162. In step 1621, the evaluation value V (S ₀ ) of the degree of convergence of the inverse modulation vector is calculated.
Next, in step 1622, the inverse modulation vector is rotated forward corresponding to + A Hz, and in step 1623, an evaluation value V (S ₊ ) of the degree of convergence of the forward rotation vector is calculated.
Further, in step 1624, the inverse modulation vector is negatively rotated by −AHz, and in step 1625, the evaluation value V (S ₋ ) of the degree of convergence of the negative rotation vector is calculated and the process is terminated.
[0039]
FIG. 18 is a flowchart of vector forward rotation processing executed in step 164. In step 1641, the number of rotations C is set to an initial value “1”.
Next, at step 1642, the previous rotation vector is further rotated by + AHz to calculate a new rotation vector, and at step 1643, the evaluation value V (S ₊₊ ) of the convergence degree of the new rotation vector is calculated.
[0040]
In step 1644, it is determined whether or not the evaluation value V (S ₊ ) of the convergence degree in the previous positive direction rotation vector group is larger than the evaluation value V (S ₊₊ ) of the convergence degree of the new rotation vector.
When an affirmative determination is made in step 1644, that is, if V (S ₊ )> V (S ₊₊ ), V (S ₊ ) is updated with V (S ₊₊ ) in step 1645, and the number of rotations in step 1646 Increment C and return to step 1642.
[0041]
Conversely, if a negative determination is made in step 1644, that is, if V (S ₊ ) ≦ V (S ₊₊ ), a command to change the oscillation frequency to (+ C × A) Hz is issued to the local oscillator 14 in step 1647. This is output and the process is terminated.
FIG. 19 is a flowchart of vector negative rotation processing executed in step 166. In step 1661, the number of rotations C is set to an initial value “1”.
[0042]
Then further -AHz corresponding rotation of the rotation vector of the previous Step 1662 calculates a new rotation vector, the evaluation value V of the convergence degree of the new rotation vector in step 1663 _- for calculating the (S).
Evaluation value of degree of convergence of the negative rotating vector group in the preceding Step 1664 V (S _-) evaluation value V of the convergence degree of the new rotation vector _- determines is greater than (S).
[0043]
When an affirmative determination is made in step 1664, i.e., V (S _{_-) -} if, V in step 1665> V (S) _- and V (S) (S _-) update, the rotation number in step 1666 Increment C and return to step 1662.
Conversely, when a negative determination is made in step 1664, that is, if V (S ₋ ) ≦ V (S ₋ ), a command to change the oscillation frequency (−C × A) Hz to the local oscillator 14 in step 1647. Is output and the process is terminated.
[0044]
The automatic frequency control device according to the present invention may be configured by hard-wired logic, programmable logic, or a mixture of both.
Further, it is possible to omit the loop filter 13 and control the local oscillator directly by the self-frequency control device unless the frequency control is over-controlled.
[0045]
【The invention's effect】
According to the automatic frequency control device of the present invention, the oscillation frequency of the local oscillator can be made to follow the transmission frequency even in a weak electric field, regardless of whether the limiter operates or not in a strong electric field.
[Brief description of the drawings]
FIG. 1 is a configuration diagram of a conventional digital modulated wave receiver.
FIG. 2 is a configuration diagram of a frequency discriminator.
FIG. 3 is a power spectrum diagram of a received signal.
FIG. 4 is a block diagram of a digital modulated wave receiver to which an automatic frequency control device according to the present invention is applied.
FIG. 5 is a block diagram of an automatic frequency control device according to the present invention.
FIG. 6 is a signal arrangement diagram of QPSK.
FIG. 7 is a configuration diagram of an inverse modulation unit.
FIG. 8 is a configuration diagram of a first embodiment of a frequency control signal generation unit.
FIG. 9 is an explanatory diagram of normal rotation of a vector.
FIG. 10 is an operation explanatory diagram of a frequency control output determination unit.
FIG. 11 is a configuration diagram of a first embodiment of a convergence evaluation value calculation unit.
FIG. 12 is a configuration diagram of a second embodiment of a convergence evaluation value calculation unit.
FIG. 13 is a configuration diagram of a convergence evaluation value calculation unit according to a third embodiment.
FIG. 14 is a configuration diagram of a first embodiment of a rotation vector convergence evaluation value calculation unit.
FIG. 15 is a configuration diagram of a second embodiment of a rotation vector convergence evaluation value calculation unit.
FIG. 16 is a flowchart of a control signal generation routine.
FIG. 17 is a flowchart of initial processing.
FIG. 18 is a flowchart of vector forward rotation processing.
FIG. 19 is a flowchart of vector negative rotation processing;

Claims

An automatic frequency control device used in a receiver for demodulating a digital modulation signal in which a synchronization symbol consisting of N symbols is inserted for each frame,
Digitizing means for digitizing the digitally modulated signal;
A delay unit for generating a delay signal from the output of the digitizing means, having a configuration in which a one-symbol delay device for delaying an input signal for one symbol period is connected in series;
Out of the outputs of the digitizing means and the 1-symbol delay unit in the delay unit, N adjacent outputs 1 to N are inversely modulated by vectors corresponding to the N to 1st symbols of the synchronization symbols. An inverse modulator comprising a modulator;
An inverse modulation vector convergence evaluation value calculation unit for calculating an evaluation value of the degree of convergence of the inverse modulation vector output from the inverse modulation unit;
Timing determination means for determining that the evaluation value of the degree of convergence of the inverse modulation vector calculated by the inverse modulation vector convergence evaluation value calculation unit is stronger than a predetermined threshold is the synchronization detection timing;
An automatic frequency control apparatus comprising frequency control signal generation means for generating a frequency control signal based on an inverse modulation vector output from the inverse modulation unit when the timing determination means determines that the synchronization detection timing is reached.

An automatic frequency control device used in a receiver for demodulating a digital modulation signal in which a synchronization symbol consisting of N symbols is inserted for each frame,
Digitizing means for digitizing the digitally modulated signal;
A delay for generating a signal delayed by 1 to (N-1) symbol periods from the output of the digitizing means, having a configuration in which (N-1) stages of 1 symbol delay devices for delaying the input signal by one symbol period are connected in series. And
The outputs of the first demodulator that demodulates the output of the digitizing means with a vector corresponding to the last symbol of the synchronization symbol, and the outputs of the first to (N-1) stage 1-symbol delay units in the delay unit. A demodulator comprising second to N demodulators that demodulate with a vector corresponding to (N-1) to the first symbol of the synchronization symbol;
An inverse modulation vector convergence evaluation value calculation unit for calculating an evaluation value of the degree of convergence of the inverse modulation vector output from the inverse modulation unit;
Timing determination means for determining that the evaluation value of the degree of convergence of the inverse modulation vector calculated by the inverse modulation vector convergence evaluation value calculation unit is stronger than a predetermined threshold as the synchronization detection timing;
An automatic frequency control apparatus comprising frequency control signal generation means for generating a frequency control signal based on an inverse modulation vector output from the inverse modulation unit when the timing determination means determines that the synchronization detection timing is reached.

The frequency control signal generator is
N vector positive rotators for rotating N inverse modulation vectors output from the first to N inverse modulators of the inverse modulation unit in a positive direction 0 to (N−1) times the predetermined angle. Vector forward rotation means;
Positive rotation vector convergence evaluation value calculation means for calculating an evaluation value of the degree of convergence of the positive rotation vector output from the vector positive rotation means;
There are provided N vector negative rotators that rotate N inverse modulation vectors output from the first to N inverse modulators of the inverse modulation unit in a negative direction by 0 to (N−1) times a predetermined angle. Vector negative rotation means,
Negative rotation vector convergence evaluation value calculation means for calculating an evaluation value of the degree of convergence of the negative rotation vector output from the vector negative rotation means;
When it is determined by the timing determination means that the synchronization detection timing is reached, the inverse modulation vector convergence evaluation value calculation unit, the positive rotation vector convergence evaluation value calculation means, and the negative rotation vector convergence evaluation value calculation means are calculated. automatic frequency control device according to claim 1 or 2 comprising a frequency control output determining means for determining the frequency control output based on the evaluation value of the degree of convergence.

The inverse modulation vector convergence evaluation value calculator is
Deviation calculating means comprising (N-1) subtractors for calculating a deviation between the outputs of two adjacent inverse modulators in the inverse modulating means;
Absolute value computing means comprising (N-1) absolute value computing units for computing the absolute value of the output of the subtractor in the deviation computing means;
Adding means for adding the outputs of (N-1) absolute value calculators in the absolute value calculator;
The positive rotation vector convergence evaluation value computing means is
Deviation calculating means comprising (N-1) subtractors for calculating a deviation between the outputs of two adjacent vector positive rotators in the vector positive rotating means;
Absolute value computing means comprising (N-1) absolute value computing units for computing the absolute value of the output of the subtractor in the deviation computing means;
Adding means for adding the outputs of (N-1) absolute value calculators in the absolute value calculator;
The negative rotation vector convergence evaluation value calculation means is
Deviation calculating means comprising (N-1) subtractors for calculating a deviation between the outputs of two adjacent vector negative rotators in the vector negative rotating means;
Absolute value computing means comprising (N-1) absolute value computing units for computing the absolute value of the output of the subtractor in the deviation computing means;
4. The automatic frequency control device according to claim 3 , further comprising adding means for adding outputs of (N-1) absolute value calculators in the absolute value calculator.

The inverse modulation vector convergence evaluation value calculator is
Vector average value calculating means for calculating a vector average value of the inverse modulation vectors output from the (N-1) inverse modulators in the inverse modulation means;
A difference between the inverse modulation vector output from the (N-1) inverse modulators in the inverse modulation means and the vector average value computed by the vector mean value computing means is computed (N-1) pieces. Deviation calculating means comprising a subtractor;
Vector mean value square value computing means for computing the square value of the vector mean value computed by the mean value vector computing means;
A vector deviation square value computing means comprising (N-1) square value computing units for computing the square value of the vector deviation computed by the subtractor in the deviation computing means;
An average value calculating means for calculating an average value of the outputs of the (N-1) square value calculators in the vector deviation square value calculating means;
Normalizing means for normalizing the output of the mean value computing means with the output of the mean vector square value computing means;
The positive rotation vector convergence evaluation value computing means is
Vector average value calculating means for calculating a vector average value of positive rotation vectors output from (N-1) vector positive rotators in the vector positive rotation means;
The deviation between the positive rotation vector output from the (N-1) vector positive rotators in the vector positive rotation means and the vector average value calculated by the vector average value calculation means is calculated (N-1). Deviation calculating means comprising a plurality of subtractors;
Vector mean value square value computing means for computing the square value of the vector mean value computed by the vector mean value computing means;
A vector deviation square value computing means comprising (N-1) square value computing units for computing the square value of the vector deviation computed by the subtractor in the deviation computing means;
An average value calculating means for calculating an average value of the outputs of the (N-1) square value calculators in the vector deviation square value calculating means;
Normalization means for normalizing the output of the average value calculation means with the vector mean value square value output from the vector mean value square value calculation means;
The negative rotation vector convergence evaluation value calculation means is
Vector average value calculating means for calculating a vector average value of negative rotation vectors output from (N−1) vector negative rotators in the vector negative rotation means;
The deviation between the negative rotation vector output from the (N−1) vector negative rotators in the vector negative rotation means and the vector average value calculated by the vector average value calculation means is calculated (N−1). Deviation calculating means comprising a plurality of subtractors;
Vector mean value square value computing means for computing the square value of the vector mean value computed by the vector mean value computing means;
A vector deviation square value computing means comprising (N-1) square value computing units for computing the square value of the vector deviation computed by the subtractor in the deviation computing means;
An average value calculating means for calculating an average value of the outputs of the (N-1) square value calculators in the vector deviation square value calculating means;
4. The automatic frequency control device according to claim 3 , further comprising normalization means for normalizing an output of the average value calculation means with a vector average value square value output from the vector average value square value calculation means.

The inverse modulation vector convergence evaluation value calculator is
Vector average computing means for computing the vector average of the inverse modulation vectors output from the (N-1) inverse modulators in the inverse modulation means;
(N-1) subtractors for calculating the deviation between the inverse modulation vector output from the (N-1) inverse modulators in the inverse modulation means and the vector average computed by the vector average computation means. Deviation calculating means comprising:
Vector mean value square value computing means for computing the square value of the vector mean value computed by the vector mean value computing means;
A vector deviation square value computing means comprising (N-1) square value computing units for computing the square value of the vector deviation computed by the subtractor in the deviation computing means;
Average value calculating means for calculating the average value of the outputs of the (N-1) square value calculators in the deviation vector square value calculating means;
Normalization means for normalizing the output of the average value calculation means with the vector mean value square value output from the vector mean value square value calculation means;
The positive rotation vector convergence evaluation value computing means is
A positive rotation vector output from (N−1) vector positive rotators in the vector positive rotation means and a vector average value calculated by the vector average value calculation means of the inverse modulation vector convergence evaluation value calculation unit. Deviation calculating means comprising (N-1) subtractors for calculating the deviation;
A vector deviation square value computing means comprising (N-1) square value computing units for computing the square value of the vector deviation computed by the subtractor in the deviation computing means;
An average value calculating means for calculating an average value of the outputs of the (N-1) square value calculators in the vector deviation square value calculating means;
Normalization means for normalizing the output of the average value calculation means with the vector average value square value calculated by the vector average value square value calculation means of the inverse modulation vector convergence evaluation value calculation section;
The negative rotation vector convergence evaluation value calculation means is
The negative rotation vector output from the (N−1) vector negative rotators in the vector negative rotation means and the vector average value calculated by the vector average value calculation means of the inverse modulation vector convergence evaluation value calculation unit Deviation calculating means comprising (N-1) subtractors for calculating the deviation;
Vector mean value square value computing means for computing the square value of the vector mean value computed by the mean value vector computing means;
A vector deviation square value computing means comprising (N-1) square value computing units for computing the square value of the vector deviation computed by the subtractor in the deviation computing means;
An average value calculating means for calculating an average value of the outputs of the (N-1) square value calculators in the vector deviation square value calculating means;
Claim 3 having a normalization means for normalizing with the calculated vector mean square values in the vector mean square value computing means of the inverse modulation vectors convergent evaluation value calculating unit output of said average value calculating means The automatic frequency control apparatus described in 1.

The inverse modulation vector convergence evaluation value calculator is
Vector average value calculating means for calculating a vector average value of output vectors of (N-1) demodulators in the inverse modulating means;
(N-1) subtractors for calculating a deviation between the output vector of the (N-1) inverse modulators in the inverse modulation means and the vector average value calculated by the vector average value calculation means. Deviation calculating means for
Vector mean value square value computing means for computing the square value of the mean value vector computed by the vector mean value computing means;
A vector deviation square value computing means comprising (N-1) square value computing units for computing the square value of the vector deviation computed by the subtractor in the deviation computing means;
An average value calculating means for calculating an average value of the outputs of the (N-1) square value calculators in the vector deviation square value calculating means;
Normalizing means for normalizing the output of the mean value computing means with the output of the mean vector square value computing means;
The positive rotation vector convergence evaluation value computing means is
A positive rotation vector output from (N−1) vector positive rotators in the vector positive rotation means and a vector average value calculated by the vector average value calculation means of the inverse modulation vector convergence evaluation value calculation unit. Deviation calculating means comprising (N-1) subtractors for calculating the deviation;
A vector deviation square value computing means comprising (N-1) square value computing units for computing the square value of the vector deviation computed by the subtractor in the deviation computing means;
An average value calculating means for calculating an average value of the outputs of the (N-1) square value calculators in the vector deviation square value calculating means;
The negative rotation vector convergence evaluation value calculation means is
The negative rotation vector output from the (N−1) vector negative rotators in the vector negative rotation means and the vector average value calculated by the vector average value calculation means of the inverse modulation vector convergence evaluation value calculation unit Deviation calculating means comprising (N-1) subtractors for calculating the deviation;
A vector deviation square value computing means comprising (N-1) square value computing units for computing the square value of the vector deviation computed by the subtractor in the deviation computing means;
4. The automatic frequency control device according to claim 3 , further comprising an average value calculating means for calculating an average value of outputs of (N-1) square value calculators in the deviation vector square value calculating means.

The frequency control signal generator is
Vector forward rotation means for rotating N inverse modulation vectors output from the first to N inverse modulators of the inverse modulation unit in a positive direction of 0 to (N-1) times a predetermined angle;
Positive rotation vector convergence evaluation value calculation means for calculating an evaluation value of the degree of convergence of the positive rotation vector output from the vector positive rotation means;
Vector negative rotation means for rotating N inverse modulation vectors output from the first to N inverse modulators of the inverse modulation unit in a negative direction 0 to (N-1) times a predetermined angle;
Negative rotation vector convergence evaluation value calculation means for calculating an evaluation value of the degree of convergence of the negative rotation vector output from the vector negative rotation means;
When the evaluation value of the degree of convergence of the inverse transformation vector calculated by the inverse transformation vector convergence evaluation value calculation unit is weaker than the evaluation value of the degree of convergence of the positive rotation vector calculated by the positive rotation vector convergence evaluation value calculation unit, The processing by the vector positive rotation means and the positive rotation vector convergence evaluation value calculation means is repeated until the evaluation value of the degree of convergence of the positive rotation vector calculated this time becomes stronger than the evaluation value of the degree of convergence of the positive rotation vector calculated last time. Then, vector normal rotation processing means for outputting a frequency increase signal multiplied by the number of repetitions of the predetermined angle, and
When the evaluation value of the degree of convergence of the inverse conversion vector calculated by the inverse conversion vector convergence evaluation value calculation unit is weaker than the evaluation value of the degree of convergence of the negative rotation vector calculated by the negative rotation vector convergence evaluation value calculation unit, The processing by the vector negative rotation means and the negative rotation vector convergence evaluation value calculation means is repeated until the evaluation value of the convergence degree of the negative rotation vector calculated this time becomes stronger than the evaluation value of the negative rotation vector convergence degree calculated last time. , then the automatic frequency control device according to claim 1 or 2, anda vector negative rotation processing means for outputting the number of repetitions multiplying frequency decrease signal of the predetermined angle.