JP3658664B2 - Thin film transistor manufacturing method - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a method for manufacturing a thin film transistor (hereinafter referred to as TFT), and more particularly to a method for manufacturing a TFT capable of controlling the generation of metal silicide.
[0002]
[Prior art]
In a conventional TFT, chromium (Cr) may be used to make ohmic contact when wiring is connected to the source / drain region of a semiconductor layer made of amorphous silicon, for example. When Cr is deposited on the entire surface of the amorphous silicon, Cr silicide having a relatively low resistivity can be formed at the interface between the amorphous silicon and Cr at a low temperature of about 100 ° C., leaving the Cr silicide in the source / drain regions. A silicide TFT can be obtained by forming a drain electrode.
[0003]
[Problems to be solved by the invention]
Cr silicide can realize a good ohmic contact, however, when wet etching of Cr and Cr silicide in unnecessary portions, Cr can be easily etched using a ceric ammonium nitrate solution. The Cr silicide layer formed at the interface between amorphous silicon and amorphous silicon is difficult to etch with this etchant and cannot be sufficiently etched using hydrofluoric acid. Although the etching of the Cr silicide layer is performed simultaneously with the dry etching of the underlying amorphous silicon, the etching rate by the dry etching of the Cr silicide is slower than the etching rate of the amorphous silicon. There are problems such as the generation of residues.
[0004]
The problem to be solved by the present invention lies in what method should be taken to make it easy to etch the silicide layer and obtain a TFT with a high yield.
[0005]
[Means for Solving the Problems]
The invention described in claim 1
Patterning a silicon nitride film for channel etching on a semiconductor layer made of amorphous silicon or polysilicon; and
An n ⁺ -Si film doped with an n-type impurity is formed on the semiconductor layer and the silicon nitride film, and then the surface of the n ⁺ -Si film is subjected to chemical treatment or ultraviolet irradiation to form an oxide thin film. Process,
Forming a metal film constituting silicide on the oxide thin film, and forming a metal silicide layer between the metal film and the n ⁺ -Si film;
After the wet etching of the metal layer, a process of patterning by reactive ion etching continuously from the metal silicide layer to the semiconductor layer;
It is characterized by having.
[0006]
According to the first aspect of the present invention, by forming an oxide thin film on the surface of the n ⁺ -Si film , the thickness of the metal silicide layer generated between the n ⁺ -Si film and the subsequently formed metal film can be minimized. This makes it possible to form a metal silicide layer that is easy to etch. Therefore, the workability of the metal silicide layer and the n ⁺ -Si film by etching can be improved, and the yield of the thin film transistor can be increased.
[0008]
The invention according to claim 2 is characterized in that the chemical solution is a resist stripping solution. In the second aspect of the present invention, since the surface treatment only needs to be performed with the resist stripping solution used in the photolithography process of the normal manufacturing process, the workability by etching the metal silicide layer, the n ⁺ -Si film, and the semiconductor layer is improved. It can be improved easily.
[0010]
The invention according to claim 3 is characterized in that the metal film is made of Cr.
[0011]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, details of a manufacturing method of a TFT according to the present invention will be described based on embodiments. (Embodiment 1)
In this embodiment, the present invention is applied to the manufacture of a TFT substrate in an active matrix liquid crystal display device.
[0012]
First, in this embodiment, on a glass substrate 1 as a transparent substrate, a gate electrode 2A made of, for example, an aluminum (Al) film, a gate line, an external connection terminal portion 2B of the gate line, and an electrostatic protection element are well known. Pattern by method. In the figure, the gate electrode 2A and the external connection terminal portion 2B are shown, and the gate line and the electrostatic protection element are not shown. Thereafter, as shown in FIG. 1A, an anodic oxidation mask 3 is patterned with a photoresist on the external connection terminal portion 2B of the gate line and the connection terminal (not shown) of the electrostatic protection element.
[0013]
Next, the pattern made of Al is anodized to form anodized films 2a and 2b as shown in FIG. 1B, and then the anodizing mask 3 is peeled off. Next, as shown in FIGS. 1C to 2B, a silicon nitride (SiN) film 4 as a gate insulating film, an amorphous silicon (hereinafter referred to as a-Si) film 5 as a semiconductor layer, A silicon nitride (hereinafter referred to as BL-SiN) film 6 for a channel etching stopper is continuously formed. Then, as shown in FIG. 2B, the BL-SiN film 6 is patterned using photolithography technique and etching technique so as to remain as a channel etching stopper above the gate electrode 2A.
[0014]
Next, as shown in FIG. 3A, an n ⁺ -Si film 7 doped with an n-type impurity as a semiconductor thin film is formed by, for example, a plasma CVD method. The a-Si film 5 and the n ⁺ -Si film 7 constitute a semiconductor part. Thereafter, the entire glass substrate 1 is immersed in a resist stripping solution made of alkanolamine, glycol ether, dimethyl sulfoxide (DMSO), etc., and the surface of the n ⁺ -Si film 7 is oxidized, as shown in FIG. An extremely thin silicon oxide film 7A is formed. The thickness of the silicon oxide film 7A is set so that the resist stripping solution concentration and immersion time (several minutes) are about 2 nm. Thereafter, as shown in FIG. 3C, a Cr film 8 is formed by sputtering. At this time, a Cr silicide layer 8A is formed at the interface between the Cr film 8 and the silicon oxide film 7A.
[0015]
Next, as shown in FIG. 4A, the resist 9 for forming the source / drain is patterned by using a photolithography technique. Then, using this resist 9 as a mask, the Cr film 8 is wet etched using an aqueous solution of ceric ammonium nitrate. Subsequently, reactive ion etching (RIE) is performed using a chlorine-based gas, and the Cr silicide layer 8A, the silicon oxide film 7A, the n ⁺ -Si film 7, and the a-Si film 5 are successively etched. As a result, in such a gas system, the SiN film 4 and the BL-SiN film 6 are not etched, and are processed into a shape as shown in FIG.
[0016]
Thereafter, as shown in FIG. 4C, a pixel electrode 10 made of ITO is formed using a known technique. Next, the SiN film 4 on the connection terminals of the external connection terminal portion 2B and the electrostatic protection element (not shown) is RIE using, for example, a fluorine-based gas such as sulfur hexafluoride (SF ₆ ) or carbon tetrafluoride (CF ₄ ). To open the window. Then, after depositing a metal film made of, for example, Al on the entire surface, patterning is performed to form a source electrode 11S, a drain electrode 11D, and an external connection terminal pad 11P as shown in FIG. In this way, the TFT 12 as shown in FIG. 5A is formed. Thereafter, as shown in FIG. 5B, the overcoat film 13 made of SiN is patterned so that the external connection terminal pads 11P and the pixel electrodes 10 are exposed, and then an alignment film (not shown) is formed. The manufacture of the TFT substrate is completed.
[0017]
In the present embodiment, as described above, the surface of the n ⁺ -Si film 7 is oxidized with a resist stripping solution to form an extremely thin silicon oxide film 7A, so that Cr silicide formed at the interface with the Cr film 8 is formed. The thickness of the layer 8A can be reduced. The graph shown in FIG. 6 is a sheet when the surface of an n ⁺ -Si film having a film thickness of 50 nm is processed under various processing conditions, a Cr film is deposited thereon by 25 nm, and the Cr film is removed by wet etching. The result of measuring the resistance is shown. As shown in the figure, by treating the n ⁺ -Si film 7 with the resist stripping solution, the sheet resistance is increased by one to two orders of magnitude compared to the case where it is not treated, and the generation of Cr silicide is controlled. I found out. In addition, since the n ⁺ -Si film 7 is treated with the resist stripping solution, the sheet resistance of the n ⁺ -Si film 7 before forming the Cr film 8 is two orders of magnitude lower. It was found that even a little was formed. FIG. 7 is a graph in which the etching end point is measured using the emission spectrum when the Cr silicide layer and the n ⁺ -Si film are etched by dry etching (RIE) after the Cr film is removed by wet etching as described above. It is. As can be seen from the figure, the etching time of the sample treated with the stripping solution is shorter by about 20% (about 4 seconds) than that without the stripping solution treatment. In addition, although the etching residue was observed in the case where the stripping solution treatment was not performed, the etching residue was not observed in the etching of the sample treated with the stripping solution. As described above, in the present embodiment, the generation of Cr silicide that is difficult to etch is minimized, so that the ohmic contact is ensured and the etching of the Cr silicide layer 8A and the n ⁺ -Si film 7 has high uniformity. It can be performed with good reproducibility. As a result, the manufacturing yield of the TFT substrate can be improved.
[0018]
In this embodiment, the resist stripping solution is used for the surface oxidation of the n ⁺ -Si film 7. However, the resist stripping solution may be used as long as it is a liquid capable of oxidizing the surface of the n ⁺ -Si film very thinly in a short time. It is not limited to. Other liquids include an etchant composed of ceric ammonium nitrate and perchloric acid, an aqueous solution of tetramethylammonium hydride (TMAH), an etchant composed of phosphoric acid, acetic acid and nitric acid, and an etchant composed of hydrochloric acid and nitric acid. And so on.
[0019]
(Embodiment 2)
In this embodiment, the surface of the n ⁺ -Si film 7 formed in the first embodiment is oxidized by ultraviolet irradiation. As an ultraviolet ray source, it is effective to use a low-pressure mercury lamp that generates light having wavelengths of 185 nm and 254 nm, which is used in a UV / ozone cleaning apparatus. When this light source is used, the surface of the n ⁺ -Si film can be oxidized by ultraviolet irradiation for about 1 minute. In addition, the other process in this embodiment is the same as that of above-described Embodiment 1.
[0020]
In the present embodiment, there is an advantage that the water washing process of the chemical solution is unnecessary, the treatment time can be shortened correspondingly, and the cost of the waste liquid treatment is not required. Further, there is an advantage that organic substances on the substrate can be decomposed and removed by the cleaning effect of UV / ozone.
[0021]
As mentioned above, although Embodiment 1 and Embodiment 2 were demonstrated, this invention is not limited to these, The various change accompanying the summary of a structure is possible. For example, in the above embodiment, amorphous silicon is used as the semiconductor layer, but polysilicon can also be applied. Moreover, in the said embodiment, although a metal film consists of Cr, it is also possible to apply refractory metals, such as titanium (Ti), molybdenum (Mo), and tungsten (W), besides this. In the above embodiment, the semiconductor portion is composed of the a-Si film 5 and the n ⁺ -Si film 7. However, the semiconductor portion is composed of only the a-Si film 5 and the surface of the a-Si film 5 is processed to form an oxide film. Thereafter, source / drain electrodes may be formed on the oxide film.
[0022]
【The invention's effect】
As is apparent from the above description, according to the present invention, it is possible to easily etch the silicide layer and to obtain a TFT with a high yield.
[Brief description of the drawings]
FIGS. 1A to 1C are process cross-sectional views illustrating a first embodiment of a TFT manufacturing method according to the present invention. FIGS.
FIGS. 2A and 2B are process cross-sectional views showing Embodiment 1 of a manufacturing method of a TFT according to the present invention. FIGS.
FIGS. 3A to 3C are process cross-sectional views illustrating Embodiment 1 of a manufacturing method of a TFT according to the present invention. FIGS.
FIGS. 4A to 4C are process cross-sectional views showing Embodiment 1 of a TFT manufacturing method according to the present invention. FIGS.
FIGS. 5A and 5B are process cross-sectional views illustrating Embodiment 1 of a method for manufacturing a TFT according to the present invention. FIGS.
FIG. 6 is a graph showing measurement results of sheet resistance when a Cr film is removed by wet etching.
FIG. 7 is a graph in which an etching end point is measured using an emission spectrum when a Cr silicide layer and an n ⁺ -Si film are etched by dry etching (RIE) after the Cr film is removed by wet etching.
[Explanation of symbols]
4 SiN film 5 a-Si film 6 BL-SiN film 6
7 n ⁺ -Si film 7
7A Silicon oxide film 8 Cr film 8A Cr silicide layer

Claims (3)

Patterning a silicon nitride film for channel etching on a semiconductor layer made of amorphous silicon or polysilicon; and
An n ⁺ -Si film doped with an n-type impurity is formed on the semiconductor layer and the silicon nitride film, and then the surface of the n ⁺ -Si film is subjected to chemical treatment or ultraviolet irradiation to form an oxide thin film. Process,
Forming a metal film constituting silicide on the oxide thin film, and forming a metal silicide layer between the metal film and the n ⁺ -Si film ;
After the wet etching of the metal layer, a process of patterning by reactive ion etching continuously from the metal silicide layer to the semiconductor layer;
A method for producing a thin film transistor, comprising: The chemical solution method for fabricating the thin film transistor according to claim 1, wherein the resist removal solution. The metal film, method of manufacturing a thin film transistor according to claim 1 or claim 2, characterized in that in Cr.

Images