JP3658666B2 - Booster circuit and liquid crystal display device - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a booster circuit that boosts and outputs an input voltage, and more particularly to a booster circuit used in a controller or driver semiconductor integrated circuit for an LCD (Liquid Crystal Display).
The present invention also relates to an LCD (Liquid Crystal Display) having a backlight and a booster circuit.
[0002]
[Prior art]
  As a controller for LCD or a booster circuit for driver LSI,FIG.A double booster circuit shown in FIG.
[0003]
As shown in the figure, this double booster circuit is composed of a power supply VDD, switches S11 to S14 controlled by a clock signal Clock and its inverted signal, and capacitors C11 and C12.
The switches S11 to S14 are composed of N-channel MOS transistors. When the clock signal Clock becomes high level, the switches S11 and S13 are turned on and the switches S12 and S14 are turned off. As a result, the power supply VDD and the capacitor C11 are connected in parallel, and the capacitor C11 is charged to the voltage of the power supply VDD.
[0004]
Thereafter, when the clock signal Clock becomes low level, the switches S11 and S13 are turned off, and the switches S12 and S14 are turned on. Thereby, the power supply VDD and the capacitor C11 are connected in series, and the capacitor C12 is connected in parallel to the series circuit of the power supply VDD and the capacitor C11. Therefore, a voltage obtained by adding the voltage of the capacitor C11 to the voltage of the power supply VDD is applied to the capacitor C12. That is, a voltage about twice the voltage of the power supply VDD is applied to the capacitor C12.
[0005]
By repeating the above operation by the clock signal Clock, the capacitor C12 is charged, and a voltage about twice the voltage of the power source VDD can be constantly output from the output terminal.
[0006]
A COG (chip on glass) method has attracted attention as a method for mounting a controller or driver which is a load of the booster circuit of FIG.
[0007]
The COG method is a method in which an LSI 92 such as a controller or a driver is directly mounted on a glass substrate 91 of a liquid crystal panel, as shown in a cross section in FIG. 12, and contributes to circuit miniaturization and the like.
[0008]
[Problems to be solved by the invention]
However, in the COG method, the light from the backlight 93 disposed adjacent to the liquid crystal panel is directly irradiated onto the LSI 92, the semiconductor layer inside the LSI 92 is activated, and the leakage current increases. For this reason, when the backlight 93 is turned on, the load on the booster circuit increases. In addition, a leakage current may occur in the booster circuit switches S11 to S14, and the boosting efficiency may decrease. For this reason, when the backlight 93 is turned on, the output voltage of the booster circuit is lowered.
[0009]
In order to avoid a decrease in boosting efficiency and boosting voltage, the circuit must take into account the maximum load current, such as increasing the capacity of the boosting capacitor or increasing the boosting rate. Current consumption will increase.
[0010]
The present invention has been made in view of the above circumstances, and an object thereof is to provide a booster circuit capable of suppressing a decrease in boosted voltage even when a circuit serving as a load is irradiated with light.
Another object of the present invention is to provide a liquid crystal display device including a booster circuit in which the boosted voltage does not decrease even when a load mounted by the COG method receives light from a backlight.
[0011]
[Means for Solving the Problems]
  In order to achieve the above object, a booster circuit according to a first aspect of the present invention includes:
  Voltage to be boosted and control signalButinputIs, Boost the input voltage with the boost capability according to the control signalTheSupply to semiconductor circuit as loadBoost capability can be changedBoosting means;
  To the semiconductor circuitIrradiatedA sensor that outputs a signal corresponding to the amount of light irradiation;
  A switching circuit that changes the boosting capability of the boosting means by controlling the control signal based on the output of the sensor;
  It is characterized by providing.
[0012]
  As described in the section of the prior art, when light is applied to a semiconductor circuit that is a load, leakage current and the like increase internally, resulting in an increase in power consumption and a decrease in the output voltage of the booster. According to this booster circuit, when the semiconductor circuit is irradiated with a large amount of light based on the output of the sensor, the switching circuit can control the control signal to increase the boosting capability. Accordingly, it is possible to suppress a decrease in boosted voltage due to an increase in load of current consumption due to light irradiation or the like. Further, when the load is not irradiated with light, the power consumption of the boosting means can be reduced by reducing the boosting capability.
  As a sensor, an optical sensor for detecting the intensity of actual light applied to a semiconductor circuit, a sensor for detecting on / off of a light source that irradiates light to the semiconductor circuit, or the like. If it can be discriminated indirectlyThis sensor is preferably arranged inside the semiconductor circuit.
[0013]
The boosting unit is disposed between a power source (which may be a terminal to which a voltage is applied from the outside), a capacitor, and the power source and the capacitor. And a plurality of switches to be connected. In this case, the plurality of switches, for example, connect the power supply and the capacitor in parallel according to the control signal, charge the capacitor with the power supply voltage, and connect the charged capacitor and the power supply in series. And the boosted voltage is output by adding the voltage of the capacitor to the input voltage.
[0014]
As an aspect in which the switching circuit controls the control signal based on the output of the sensor, the frequency of the control signal may be changed. In this case, the boosting unit changes the boosting capability according to the frequency of the control signal. For example, in the boosting unit having the above-described configuration, as the operation clock increases, the amount of charge that can be transferred from the power supply to the capacitor increases (there is a limit), and the boosting capability is improved.
In order to control the frequency of the control signal, the frequency division ratio of the clock signal may be controlled.
[0015]
In addition, the switching circuit is configured so that, based on the output of the sensor, when the amount of received light of the semiconductor circuit exceeds a predetermined reference value, the amount of received light is less than the predetermined reference value per unit time. However, the boosting capability may be improved by lengthening the connection time between the power source and the capacitor.
By increasing the connection time between the power source and the capacitor per unit time, and increasing the amount of charge sent to the capacitor, the boosting capability is improved. Therefore, the present invention is also applicable to this kind of boosting means.
[0016]
The control signal includes a first clock signal that alternately repeats the first level and the second level, and a second clock signal that alternately repeats the third level and the fourth level,
The plurality of switches include a first switch that connects the power source and the capacitor in parallel, and a second switch that connects the power source and the capacitor in series.
The first switch is turned off when the first clock signal is at the first level, and is turned on when the first clock signal is at the second level;
The second switch is off when the second clock signal is at the third level, and is on when the second clock signal is at the fourth level.
The switching circuit is a period in which the first clock signal and the second clock signal are simultaneously at the first level and the third level when the amount of received light is equal to or less than a predetermined reference value based on the output of the sensor. The first clock signal and the second clock signal are prohibited from simultaneously changing to the second level and the fourth level, and the first clock signal is received when the amount of received light exceeds a predetermined reference value. And a period in which both of the second clock signal are simultaneously at the first level and the third level are shorter than when the amount of received light is equal to or less than a predetermined reference value,
It may be a thing.
[0017]
According to this booster circuit, for example, when the first and third levels are high and the second and fourth levels are low, when the amount of light irradiated to the semiconductor circuit is less than a reference value, A period in which both the first and second clock signals are at a low level is provided. This period is a period in which the power source and the capacitor are not connected, the amount of electric charge sent from the power source to the capacitor is reduced, and the current consumption of the booster circuit is also reduced. Further, the first switch and the second switch do not turn on at the same time. Thereby, the electric current which penetrates the 1st and 2nd switch can be intercepted, and current consumption can be reduced more. Therefore, the booster circuit can operate with low power consumption when the semiconductor circuit is not irradiated with light.
[0018]
On the other hand, when the semiconductor circuit is irradiated with a large amount of light, the period during which the first and second clock signals are simultaneously at a low level is removed. As a result, the period during which the power supply and the capacitor are connected is lengthened, and more electric charge is sent to the capacitor, so that the boosting capability of the booster circuit is improved.
[0019]
The capacitor of the boosting means includes a plurality of capacitors (C1, C1 '),
The switching circuit controls the control signal based on the output of the sensor, so that when the irradiation light amount to the semiconductor circuit exceeds a reference value, the irradiation light amount is less than the reference value. The number of capacitors connected to the power supply may be increased to increase the boosting capability of the boosting means.
[0020]
According to this booster circuit, when the output of the sensor is smaller than a predetermined reference value, the current consumption can be reduced by reducing the number of capacitors for boosting operation. Further, when the output of the sensor is larger than a predetermined reference value, the boosting capability can be increased by increasing the number of capacitors that perform the boosting operation.
[0021]
The control signal controlled by the switching circuit includes a first timing signal indicating a timing of connecting at least one of the plurality of capacitors of the boosting means and the power supply in series and a timing of connecting in parallel, and the boosting A second timing signal indicating a timing of connecting at least one of the other capacitors of the means and the power source in series and a timing of connecting in parallel;
The first timing signal and the second timing signal may be different in phase.
[0022]
The first timing signal and the second timing signal may be 180 degrees out of phase.
[0023]
According to such a configuration, the plurality of capacitors of the boosting means are charged / discharged at different timings (for example, timings having different phases by 180 degrees). Then, when a certain capacitor is discharged, another capacitor is charged, and each capacitor operates to supplement each other's charge / discharge operation, and functions as a capacitor having a higher boosting capability.
[0024]
By substantially controlling the on-resistance of the switch based on the output of the sensor, when the amount of light received by the semiconductor circuit exceeds a reference value, the resistance value between the power supply and the capacitor is reduced, and the boosting means You may make it increase the pressure | voltage rise capability. As a method of substantially controlling the on-resistance of the switch, a plurality of switches are connected in parallel and the number of turning on is controlled, and the switch is constituted by a semiconductor switch or the like, and the on-resistance is controlled by a control signal (base There is a method of controlling with current and gate voltage.
[0025]
The boosting unit may include a plurality of boosting units that input a voltage to be boosted, boost the input voltage, and output the boosted voltage. In this case, the switching circuit switches the number of the boosting units that perform the boosting operation based on the output of the sensor. In addition to switching the number of boosting means that operate, the boosting capability of each booster circuit may be changed.
[0026]
The above boosting circuit is mounted on a liquid crystal display panel including a backlight device by a COG method, and is suitable for use in a semiconductor integrated circuit that is irradiated with light from the backlight when the backlight is turned on. It is.
[0027]
  A liquid crystal display device according to the second aspect of the present invention is
  A liquid crystal display panel, a backlight disposed on one surface of the liquid crystal display panel, and turned on or off;Boost capability can be changedA booster circuit; a semiconductor circuit that is a load of the booster circuit and is mounted on the liquid crystal display panel by a COG method; and a detecting unit that detects on and off of the backlight;
  The boosting circuit includes means for increasing the boosting capability when the backlight is on, as compared with when the backlight is off, according to the detection of the detecting means.
  It is characterized by that.
  Furthermore, the liquid crystal display device of the present invention is
  A liquid crystal display panel;
  A backlight disposed on one surface of the liquid crystal display panel and illuminating the liquid crystal display panel;
  A voltage boosting unit capable of changing a voltage boosting capability of receiving a voltage to be boosted and a control signal and boosting and outputting the input voltage with a boosting capability according to the control signal;
  A semiconductor circuit provided in the liquid crystal display panel and supplied with the output of the booster circuit;
  Detecting means for detecting the amount of light irradiated to the semiconductor circuit out of the illumination light from the backlight;
  By controlling the control signal based on the output of the detection means, when the light amount from the backlight detected by the detection means is large, the boosting capability of the boosting means is higher than when the light amount is small. A switching circuit to be changed,
  It is characterized by providing.
[0028]
Since the semiconductor circuit is mounted by the COG method, when the backlight is turned on, the semiconductor circuit is irradiated with light. This increases the leakage current inside the semiconductor circuit and increases the load on the booster circuit. For this reason, the output voltage of the boosting means decreases. However, according to the present invention, when the backlight is turned on, the boosting capability of the booster circuit is improved, so that a decrease in output voltage can be suppressed and the operation of the semiconductor circuit can be maintained in a normal state.
There are a method for detecting on / off of the backlight, a method for detecting light from the backlight, a method for detecting on / off of the power supply of the backlight, and the like.
[0029]
DETAILED DESCRIPTION OF THE INVENTION
The booster circuit according to the first embodiment of the present invention will be described below.
FIG. 1 shows a configuration of a booster circuit according to an embodiment of the present invention.
As shown in the figure, this booster circuit is composed of a double booster 1, an optical sensor 2, and a clock signal switching circuit 3. The booster circuit uses an LSI (LCD controller or driver) 92 implemented by the COG method as shown in FIG. 12 as a load. The LSI 92 is irradiated with light from the backlight 93.
[0030]
  The double boosting means 1FIG.And boosts the power supply voltage VDD twice.
[0031]
As shown in FIG. 2, the optical sensor 2 includes a photodiode 21, a resistor 22, and an inverter 23, and outputs a binary level voltage corresponding to the amount of received light. Here, when the photodiode 21 is not receiving light, the photodiode 21 is turned off, the input terminal of the inverter 23 becomes high level, and the photosensor 2 outputs a low level voltage. On the other hand, when the photodiode 21 receives light, the reverse current of the pn junction of the photodiode 21 increases, the input terminal of the inverter 23 becomes low level, and the photosensor 2 outputs a high level voltage.
FIG. 2 shows an example of the configuration of the optical sensor 2, and an optical sensor having another configuration such as one using a phototransistor may be used. For example, a sensor that determines whether the power of the backlight 93 is on or off may be used.
[0032]
The clock signal switching circuit 3 includes a T-type flip-flop 31, a D-type flip-flop 32, AND circuits 33 and 34, inverters 35, 36 and 37, and an OR circuit 38. Switches the frequency of the clock signal to be supplied.
[0033]
The T-type flip-flop 31 receives the clock signal Clock ′ via the inverter 35, divides the frequency of the clock signal Clock ′ by ½, and outputs it from the output terminal Q1. The D-type flip-flop 32 captures the output signal of the optical sensor 2 in synchronization with the output signal of the T-type flip-flop 31, and outputs the captured signal from the output terminal Q2.
[0034]
The AND circuits 33 and 34 are of an open gate type, and their outputs are wired-or and further pulled up.
The AND circuit 33 opens the gate when the output of the D-type flip-flop 32 is high level, and the AND circuit 34 gates when the output of the inverter 37 is high level, that is, the output of the D-type flip-flop 32 is low level. open. Therefore, the AND circuits 33 and 34 switch between the inverted signal of the clock signal Clock ′ and the output signal of the T-type flip-flop 31 for output.
[0035]
Therefore, the clock signal switching circuit 3 outputs a signal obtained by dividing the frequency of the clock signal Clock ′ by 1/2 when the optical sensor 2 is not receiving light, and when the optical sensor 2 is receiving light. A signal obtained by inverting the clock signal Clock 'is output.
[0036]
Next, the operation of this booster circuit will be described with reference to the time chart of FIG.
The clock signal Clock ′ shown in FIG. 3A supplied to the booster circuit is frequency-divided by a factor of 1/2 by the T-type flip-flop 31, and is output as the signal shown in FIG. Is output from.
[0037]
When the backlight 93 is off and no light is irradiated on the optical sensor 2 (the amount of irradiation light does not exceed the reference level), the output terminal Sout of the optical sensor 2 is as shown in FIG. The voltage at the output terminal Q2 of the D flip-flop 32 is at a low level as shown in FIG. Since the voltage at the output terminal Q2 is at a low level, the output terminal of the AND circuit 33 is fixed to the open state, and the output of the AND circuit 34 is at the same level as the output terminal Q1. Therefore, as shown in FIG. 3E, the input clock signal Clock of the double booster 1 divides the signal of the same level as the output terminal Q1, that is, the frequency of the clock signal Clock ′ by 1/2. Signal.
[0038]
On the other hand, when the backlight 93 is turned on and light is irradiated on the optical sensor 2 (the amount of irradiation light exceeds the reference value), the output terminal Sout of the optical sensor 2 is as shown in FIG. Become high level. This high level is taken in by the D-type flip-flop 32, and the output terminal Q2 of the D-type flip-flop 32 also becomes the high level as shown in FIG. Since the output terminal Q2 is at a high level, the output terminal of the AND circuit 34 is fixed in an open state, and the output of the AND circuit 33 is at a level obtained by inverting the clock signal Clock ′. Therefore, the clock signal Clock has the same frequency as that of the clock signal Clock ′ as shown in FIG.
[0039]
Thus, in this booster circuit, when the backlight 93 is on, the frequency of the drive clock signal Clock of the double booster 1 becomes high, and when the backlight 93 is off, the double booster 1 The frequency of the drive clock signal Clock becomes lower.
[0040]
In the double boosting means 1 shown in FIG. 1, as the frequency of the clock signal is higher, the amount of charge transferred from the power supply VDD to the capacitor C11 per unit time is increased, and the boosting capability is improved. Accordingly, it is possible to prevent the boosted voltage (power supply voltage of the LSI 92) from decreasing even when the load from the backlight 93 increases due to an increase in the leakage current inside the LSI 92 due to the light from the backlight 93.
[0041]
On the other hand, as the frequency of the clock signal supplied to the double booster 1 is lower, the current passing through the switches S12 and S13 decreases, the power consumed by each switch also decreases, and the power consumption decreases.
[0042]
In this manner, the booster circuit controls the frequency of the clock signal according to the on / off state of the backlight 93, so that when the backlight 93 is off, the power consumption is reduced and the backlight 93 is on. In this case, the output voltage drop of the double booster 1 can be reduced.
[0043]
In this embodiment, two division ratios (1 and 1/2) of the clock signal Clock 'are prepared, and the boosting capability of the double boosting means 1 is changed by switching the division ratio. The present invention is not limited to this configuration, and a large number of frequency division ratios may be prepared, and the frequency division ratio may be switched to multiple levels to change the boosting capability of the double booster 1 to multiple levels. The booster circuit may be configured to smoothly change the boosting capability of the double boosting unit 1 by smoothly changing the frequency of the clock signal output to the double boosting unit 1.
[0044]
(Second Embodiment)
FIG. 4 shows the configuration of a booster circuit according to the second embodiment of the present invention.
As shown in the figure, this booster circuit includes a booster 41, an optical sensor 2, and a clock signal switching circuit 43.
The optical sensor 2 is the same as the optical sensor used in the booster circuit according to the first embodiment.
[0045]
The boosting means 41 has substantially the same configuration as the boosting means shown in FIG. 11, but is different from the boosting means of FIG. 11 in that the inverter 15 in FIG. 11 is not provided and the signal Clock ′ is input from the outside.
[0046]
The clock signal switching circuit 43 includes a D-type flip-flop 44, inverters 45 and 46, a NAND circuit 47, and AND circuits 48 and 49. The D-type flip-flop 44 captures the output of the optical sensor 2 in synchronization with the clock signal CK 1, outputs the captured signal from the output terminal Q, and supplies it to the NAND circuit 47 through the inverter 45.
[0047]
The NAND circuit 47 takes the output of the inverter 45 and the NAND of the clock signal CK2 and outputs it. The AND circuit 48 takes an AND of the output of the NAND circuit 47 and the inverted signal of the clock signal CK1, and outputs the result to the terminal Clock ′ of the boosting means 41. The AND circuit 49 takes the AND of the output of the NAND circuit 47 and the clock signal CK1 and outputs it to the terminal Clock of the boosting means 41.
[0048]
Next, the operation of this booster circuit will be described with reference to the time chart of FIG.
As shown in FIGS. 5A and 5B, the clock signals CK1 and CK2 supplied to the clock signal switching circuit 43 have the frequency of the clock signal CK2 twice that of the clock signal CK1, and the clock signal CK2 Is in a relationship in which the level of the clock signal CK1 changes during the high level period.
[0049]
When the backlight 93 is off, the output terminal Sout of the optical sensor 2 is at a low level as shown in FIG. As a result, as shown in FIG. 5D, the output terminal Q of the D-type flip-flop 44 becomes low level, and one input terminal of the NAND circuit 47 becomes high level. Therefore, the output of the NAND circuit 47 is an inverted signal of the clock CK2.
[0050]
Therefore, the AND circuit 49 takes the inverted signal of the clock CK2 and the clock CK1, and outputs the signal shown in FIG. 5E to the clock terminal Clock. On the other hand, the AND circuit 48 takes an AND of the inverted signal of the clock CK2 and the inverted signal of the clock CK1, and outputs a signal shown in FIG. That is, as shown in FIGS. 5E and 5F, the clock input terminals Clock and Clock ′ of the booster 41 are supplied with signals that alternately become high level during the period when the clock signal CK2 is low.
[0051]
Thus, in this booster circuit, when the backlight 93 is off, the signals applied to the terminals Clock and Clock ′ do not simultaneously become high level. Therefore, the switches (corresponding to S12 and S13 in FIG. 11) constituting the through path from the power supply voltage to the ground voltage of the boosting means 41 are not both turned on, and the generation of the through current is prevented and the current consumption is reduced. Can be reduced.
[0052]
On the other hand, when the backlight 93 is on, as shown in FIG. 5C, the output terminal Sout of the optical sensor 2 is at a high level, and the output terminal Q of the D-type flip-flop ) Becomes high level. When the output terminal Q becomes high level, the output of the NAND circuit 47 is fixed at high level. Therefore, the AND circuit 48 outputs an inverted signal of the clock signal CK1, and the AND circuit 49 outputs the clock signal CK1 as it is.
[0053]
Accordingly, as shown in FIGS. 5E and 5F, the signal applied to the terminal Clock and the signal applied to the terminal Clock ′ are mutually inverted. As a result, the period during which the clock signals Clock and Clock ′ are at the high level is longer than when the backlight 93 is off, and the period in which the boosting capacitor of the boosting means 41 is connected to the power supply is longer. The amount of charge supplied to the capacitor increases, and the boosting capability of the booster 41 increases.
[0054]
Note that if a timing occurs when the clock signals Clock and Clock ′ are simultaneously at the high level, a through current will be generated. However, since the waveforms of the clock signals Clock and Clock ′ are inverted signals, such a problem does not occur. .
[0055]
In this manner, the booster circuit according to the second embodiment operates with low power consumption when the backlight 93 is off by controlling the waveform of the clock signal according to whether the backlight 93 is on or off. When the backlight 93 is on, it is possible to mitigate a decrease in the boosted output voltage due to an increase in load.
[0056]
(Third embodiment)
FIG. 6 shows the configuration of a booster circuit according to a third embodiment of the present invention.
As shown in the figure, the booster circuit according to this embodiment includes a booster 61, an optical sensor 2, and a clock signal switching circuit 63.
[0057]
The step-up means 61 is composed of a plurality of capacitors C1, C1 ′, C2 and a plurality of switches S1-S8 using MOS transistors, and the capacitors C1, C1 ′, C2 are changed by changing the open / closed state of the switches S1-S8. And the power supply VDD is boosted by changing the connection state between the power supply VDD and the power supply VDD.
[0058]
Here, the capacitor C1 is connected in parallel to the power supply VDD via the switches S2 and S5, and is connected in series to the power supply VDD via the switches S1 and S6.
[0059]
The capacitor C1 'is connected in parallel to the power supply VDD via the switches S4 and S7, and is connected in series to the power supply VDD via the switches S3 and S8.
[0060]
Capacitor C2 is connected to one end of capacitor C1 via switch S6 and to one end of capacitor C1 'via switch S8. One end of the capacitor C2 is connected to the output terminal of the booster 61.
[0061]
The clock signal switching circuit 63 includes a D-type flip-flop circuit 64, an inverter 65, and two AND circuits 66 and 67. The clock signal Clock and the output signal Sout of the optical sensor 2 are input and the clock signal CK3 is input. , CK4, CK5, CK6 are output.
Here, the clock signal CK3 is obtained by outputting the clock signal Clock input to the clock signal switching circuit 63 as it is. That is, the clock signal CK3 and the clock signal Clock are the same.
The clock signal switching circuit 63 maintains the clock signals CK5 and CK6 at the low level when the output signal Sout of the optical sensor 2 is at the low level.
[0062]
The D-type flip-flop 64 captures the output Sout of the optical sensor 2 in synchronization with the clock signal Clock, and outputs the captured signal from the output terminal Q. The AND circuit 66 takes the AND of the output of the flip-flop 64 and the clock signal Clock and outputs it as the clock signal CK6. The AND circuit 67 takes the AND of the output of the flip-flop 64 and the inverted signal of the clock signal Clock and outputs it as the clock signal CK5.
That is, the clock signal CK3 is supplied to the control terminals of the switches S2 and S5. The clock signal CK4 is supplied to the control terminals of the switches S1 and S6. The clock signal CK5 is supplied to the control terminals of the switches S3 and S8. The clock signal CK6 is supplied to the control terminals of the switches S4 and S7.
[0063]
Next, the operation of this booster circuit will be described with reference to the time chart of FIG. When the backlight 93 is off, the output terminal Sout of the optical sensor 2 is at a low level as shown in FIG. 7B. As a result, as shown in FIG. 7C, the output terminal Q of the D-type flip-flop 64 becomes low level, and the AND circuits 66 and 67 close the gate. Therefore, as shown in FIGS. 7F and 7G, the clock signals CK5 and CK6 are both held at a low level in the normal time without light irradiation.
[0064]
When the clock signals CK5 and CK6 are held at the low level, the switches S3, S4, S7, and S8 maintain the off state. Thus, the capacitor C1 'is not connected to the power supply VDD and the output terminal, and does not contribute to the boosting operation.
[0065]
On the other hand, when the backlight 93 is on, as shown in FIG. 7B, the output terminal Sout of the optical sensor 2 is at a high level, and the output terminal Q of the D-type flip-flop 64 is also connected to the output terminal Q of FIG. As shown in FIG. Therefore, the clock signals CK5 and CK6 output from the AND circuits 66 and 67 are the clock signal Clock and its inverted signal, as shown in FIGS.
[0066]
The switches S3, S4, S7, and S8 are opened / closed by the clock signals CK5 and CK6, so that the capacitor C1 'is connected in parallel to the capacitor C1, and the capacitance of the capacitor C1 is apparently increased.
[0067]
Further, when the switches S3, S4, S7, and S8 are opened / closed, the on-resistance value of each switch that changes the connection state of the capacitor C1 is apparently reduced. That is, when the backlight 93 is turned on, the capacity of the boosting capacitor increases, and the on-resistance value of the switch that drives the boosting capacitor decreases. Accordingly, the boosting capability of the boosting means 61 is increased, and the decrease in the boosted output voltage due to an increase in load is alleviated.
[0068]
In this manner, this booster circuit switches the capacitance of the boosting capacitor and the on-resistance value of the switch between when the light is irradiated and when it is not irradiated, so that the power consumption is normally low. It is possible to mitigate the decrease in the boosted output voltage due to the backlight being turned on and the load increasing.
[0069]
Note that semiconductor switches (bipolar transistors, MOSFETs, etc.) are used as switches, and control signals (base current, gate voltage) are controlled based on the output of the optical sensor 2, and the resistance values of the current paths of these switches are set. You may control.
[0070]
In the booster circuit shown in FIGS. 6 and 7, when the backlight is off, the capacitor C1 'is not used, but the capacitors C1 and C2 are used for boosting.
On the other hand, when the backlight is on, the boosting operation is performed using the capacitors C1, C1 ', and C2.
[0071]
(Fourth embodiment)
FIG. 8 shows the configuration of a booster circuit according to the fourth embodiment of the present invention.
As shown in the figure, the booster circuit according to this embodiment includes a booster 61 ′, an optical sensor 2, and a clock signal switching circuit 63.
[0072]
The optical sensor 2 is the same as the optical sensor 2 shown in FIG. The clock signal switching circuit 63 is the same as the clock signal switching circuit 63 shown in FIG. Therefore, the clock signals CK3, CK4, CK5, and CK6 output from the clock signal switching circuit 63 have the same waveform as that of the time chart shown in FIG.
The clock signal CK3 and the clock signal Clock are the same.
[0073]
The boosting means 61 ′ is composed of a plurality of capacitors C1, C1 ′, C2 and a plurality of switches S1 to S8 using MOS transistors, similarly to the boosting means 61 shown in FIG. 6, and opens and closes the switches S1 to S8. By changing the state, the connection state between the capacitors C1, C1 ′, C2 and the power source VDD is changed, and the voltage of the power source VDD is boosted.
[0074]
However, the booster 61 ′ of this embodiment is different from the booster 61 shown in FIG. 6 in the connection between the control terminals of the switches S1 to S8 and the signal lines of the clock signals CK3, CK4, CK5, and CK6. .
That is, the clock signal CK3 is supplied to the control terminals of the switches S1 and S6. The clock signal CK4 is supplied to the control terminals of the switches S2 and S5. The clock signal CK5 is supplied to the control terminals of the switches S3 and S8. The clock signal CK6 is supplied to the control terminals of the switches S4 and S7.
The other configuration of the booster circuit of this embodiment is the same as that of the booster circuit shown in FIG.
[0075]
Next, the operation of this booster circuit will be described with reference to the time chart of FIG. When the backlight 93 is off, the output terminal Sout of the optical sensor 2 is at a low level as shown in FIG. 7B. As a result, as shown in FIG. 7C, the output terminal Q of the D-type flip-flop 64 becomes low level, and the AND circuits 66 and 67 close the gate. Therefore, as shown in FIGS. 7F and 7G, the clock signals CK5 and CK6 are both held at a low level in the normal time without light irradiation.
[0076]
When the clock signals CK5 and CK6 are held at the low level, the switches S3, S4, S7, and S8 maintain the off state. Thus, the capacitor C1 'is not connected to the power supply VDD and the output terminal, and does not contribute to the boosting operation.
[0077]
On the other hand, when the backlight 93 is on, as shown in FIG. 7B, the output terminal Sout of the optical sensor 2 is at a high level, and the output terminal Q of the D-type flip-flop 64 is also connected to the output terminal Q of FIG. As shown in FIG. Therefore, the clock signals CK5 and CK6 output from the AND circuits 66 and 67 are the clock signal Clock and its inverted signal, as shown in FIGS.
[0078]
The switches S3, S4, S7, and S8 are opened / closed by the clock signals CK5 and CK6, so that the capacitor C1 'is connected to the capacitor C1 in parallel, and the capacitance of the capacitor C1 is apparently increased.
[0079]
Here, the clock signals CK3 and CK4 for driving the capacitor C1 and the clock signals CK5 and CK6 for driving the capacitor C1 'are different in phase by 180 degrees. As a result, the capacitors C1 and C1 'are alternately charged with each other, and alternately supply charges to the capacitor C2. Therefore, the capacitors C1 and C1 'operate so as to supplement each other's charge / discharge operation, and function as capacitors having higher boosting capability.
[0080]
In this way, this booster circuit has low power consumption during normal operation because the phase of the drive signal of the boost capacitor used when light is irradiated is different from the phase of the drive signal of the other boost capacitors. However, it is possible to more effectively alleviate the decrease in the boosted output voltage due to the irradiation of light.
[0081]
(Fifth embodiment)
FIG. 9 shows the configuration of a booster circuit according to the fifth embodiment of the present invention.
As shown in the figure, the booster circuit according to this embodiment includes three triple boosters 81, 82 and 83, an optical sensor 2, a capacitor C3, and switches S9 and S10 using MOS transistors. .
[0082]
The output terminal of the triple booster 81 is directly connected to the capacitor 3. On the other hand, the output terminals of the triple boosting means 82 and 83 are connected to the capacitor 3 via the switches S9 and S10. The switches S9 and S10 open and close based on the output signal of the optical sensor 2. The triple boosting means 82 and 83 operate when the signal supplied to the control terminal Tcont is at a high level, and stop operating when the signal supplied to the control terminal Tcont is at a low level.
[0083]
Next, the operation of this booster circuit will be described.
First, when the backlight 93 is off, the output terminal Sout of the optical sensor 2 is at a low level. As a result, the switches S9 and S10 are turned off, and the output terminals of the triple boosting means 82 and 83 are disconnected from the output terminal of the booster circuit. Further, the triple boosting means 82 and 83 stop operating. Therefore, only one triple booster 81 outputs a boosted voltage to the load.
[0084]
On the other hand, when the backlight 93 is on, the output terminal Sout of the optical sensor 2 is at a high level. As a result, the switches S9 and S10 are turned on, the output terminals of the triple boosting means 82 and 83 are connected to the output terminal of the boosting circuit, and the three triple boosting means 81, 82 and 83 apply the boosted voltage to the load. Output.
[0085]
As described above, this booster circuit switches the number of boosting means to be operated between when the backlight 93 is off and when it is on, so that the LSI 92 is irradiated with light while having low power consumption during normal times. A decrease in the boosted output voltage due to an increase in load can be mitigated.
[0086]
In the above-described embodiment, the double or triple boosting means is used as the boosting means. However, the boosting circuit is not limited to the configuration, and a 4-fold, 5-fold,... N-fold boosting means may be used. .
In FIG. 9, FIG. 12, etc., the power supply VDD is arranged in the boosting means. However, the power supply VDD may be a terminal to which a voltage is applied from the outside, and the power supply circuit is physically arranged in the boosting means. There is no need.
[0087]
Further, the configuration and arrangement of the above-described optical sensor 2 are not limited to those described above, and are arbitrary. For example, as shown in FIG. 10A, the optical sensor 2 may be arranged outside the LSI 92 serving as a load of the booster circuit, and the detection signal of the optical sensor 2 may be supplied to the booster in the LSI 92. Good.
Further, as shown in FIG. 10B, the optical sensor may be arranged inside the LSI 72. In this case, it is desirable to arrange the optical sensor 2 on the surface portion of the LSI 72. Further, the optical sensor 2 may be formed by arranging a photosensitive semiconductor layer on the semiconductor substrate constituting the LSI 72. By disposing the optical sensor 2 inside the LSI 72, it is possible to reduce the size of the LCD controller or driver LSI.
[0088]
Further, as shown in FIG. 11A, a plurality of optical sensors 2 may be arranged inside and outside the LSI 92. In this way, by arranging a plurality of optical sensors 2, it is possible to detect light irradiated to the LSI with higher sensitivity.
[0089]
When a plurality of photosensors 2 are arranged, as shown in FIG. 11B, even if only some of the photosensors 2 detect light by calculating the logical sum of the output signals of these photosensors 2. The boosting capability of the boosting means can be improved.
[0090]
Note that the present invention is not limited to a booster circuit that functions as a power supply for a control circuit or a drive circuit of a liquid crystal display element equipped with a backlight, and is a booster that loads any circuit whose power consumption increases due to light irradiation. Applicable to circuits.
[0091]
【The invention's effect】
As described above, according to the present invention, since the boosting capability of the boosting means is switched based on the output signal of the optical sensor, the load circuit is irradiated with light while suppressing an increase in current consumption during normal times. The reduction in the boosted output voltage due to this can be alleviated.
[Brief description of the drawings]
FIG. 1 is a diagram showing a basic configuration of a booster circuit according to a first embodiment of the present invention.
FIG. 2 is a diagram showing a configuration example of an optical sensor in the booster circuit shown in FIG.
3 is a diagram showing the operation of each part of the booster circuit shown in FIG. 1;
FIG. 4 is a diagram showing a basic configuration of a booster circuit according to a second embodiment of the present invention.
5 is a diagram showing the operation of each part of the booster circuit shown in FIG. 4;
FIG. 6 is a diagram showing a basic configuration of a booster circuit according to a third embodiment of the present invention.
7 is a diagram showing the operation of each part of the booster circuit shown in FIG. 6;
FIG. 8 is a diagram showing a basic configuration of a booster circuit according to a fourth embodiment of the present invention.
FIG. 9 is a diagram showing a basic configuration of a booster circuit according to a fifth embodiment of the present invention.
FIG. 10 is a diagram illustrating an arrangement example of optical sensors.
FIG. 11 is a diagram for explaining an example in which a plurality of photosensors are arranged and a method for processing detection signals of the photosensors in that case.
FIG. 12 is a diagram illustrating an example of a conventional booster circuit.
FIG. 13 is a schematic cross-sectional view of a liquid crystal panel on which an LSI is mounted by a COG method.
[Explanation of symbols]
1 Double boosting means
2 Optical sensor
3 Clock signal switching circuit
31 T-type flip-flop
32 D-type flip-flop
41 Boosting means
43 Clock signal switching circuit
61, 61 'Boosting means
63 Clock signal switching circuit
71, 72, 73 LSI
81, 82, 83 Triple boosting means

Claims (14)

A voltage boosting unit capable of changing a voltage boosting capability to which a voltage to be boosted and a control signal are input , boosting the input voltage with a boosting capability according to the control signal, and supplying the boosted semiconductor circuit to the load;
A sensor that outputs a signal corresponding to the amount of light irradiated to the semiconductor circuit;
A switching circuit that changes the boosting capability of the boosting means by controlling the control signal based on the output of the sensor;
A booster circuit comprising: The booster circuit according to claim 1, wherein the sensor is disposed inside the semiconductor circuit. The boosting means includes a power source that supplies the voltage to be boosted, a capacitor, and a plurality of switches that are arranged between the power source and the capacitor and connect the power source and the capacitor,
The plurality of switches, in accordance with the control signal, connect the power source and the capacitor in parallel, charge the capacitor with the input voltage and connect the charged capacitor and the power source in series, By adding the voltage of the capacitor to the voltage of the power supply, the boosted voltage is output.
The booster circuit according to claim 1, wherein: The switching circuit changes the frequency of the control signal based on the output of the sensor,
The step-up means changes the step-up capability according to the frequency of the control signal;
The booster circuit according to any one of claims 1 to 3, wherein The switching circuit receives a clock signal, divides the clock signal and outputs it as the control signal, and means for changing the dividing ratio of the dividing means based on the output of the sensor With
The booster circuit according to claim 4 . The switching circuit, based on the output of the sensor, when the received light amount of the semiconductor circuit exceeds a reference value, the power supply and the capacitor per unit time than when the received light amount is less than the reference value The boosting circuit according to claim 3 , wherein the boosting capability is improved by extending the connection time of. The control signal includes a first clock signal that alternately repeats the first level and the second level, and a second clock signal that alternately repeats the third level and the fourth level.
The plurality of switches include a first switch that connects the power source and the capacitor in parallel, and a second switch that connects the power source and the capacitor in series.
The first switch is turned off when the first clock signal is at the first level, turned on when the first clock signal is at the second level, and the second switch is turned on when the second clock signal is at the third level. The switching circuit is turned off when it is at the fourth level, and the switching circuit controls the control signal based on the output of the sensor. And a period in which the second clock signal simultaneously becomes the first level and the third level, and prohibits the first clock signal and the second clock signal from simultaneously becoming the second level and the fourth level. When the amount of received light exceeds a reference value, a period during which both the first clock signal and the second clock signal are simultaneously at the first level and the third level is received. Shorter than when the amount is less than the reference value,
The booster circuit according to claim 3 or 6 , characterized in that The capacitor of the boosting means includes a plurality of capacitors,
The switching circuit controls the control signal based on the output of the sensor, so that when the irradiation light amount to the semiconductor circuit exceeds a reference value, the irradiation light amount is less than the reference value. Increasing the number of capacitors connected to the power source to increase the boosting capability of the boosting means,
The booster circuit according to claim 3 , wherein: The control signal controlled by the switching circuit includes a first timing signal indicating a timing of connecting at least one of the plurality of capacitors of the boosting means and the power supply in series and a timing of connecting in parallel, and the boosting A second timing signal indicating a timing of connecting at least one of the other capacitors of the means and the power source in series and a timing of connecting in parallel;
The first timing signal and the second timing signal have different phases.
The booster circuit according to claim 8 , wherein: The switching circuit substantially controls the on-resistance of the switch by the control signal, and when the amount of light received by the sensor exceeds a reference value based on the output of the sensor, the amount of light received by the sensor is a reference value Lowering the resistance value between the power source and the capacitor than in the following case, increasing the boosting capability of the boosting means,
The step-up circuit according to claim 5 , wherein the step-up circuit is configured as described above. The boosting means includes a plurality of boosting units that input a voltage to be boosted, boost the input voltage, and output the boosted voltage.
The switching circuit includes means for switching the number of the boosting units that perform the boosting operation based on the output of the sensor.
The booster circuit according to claim 1. The booster circuit is mounted on a liquid crystal display panel including a backlight device by a COG method, and a load is applied to a semiconductor integrated circuit irradiated with light from the backlight when the backlight is on.
Boosting circuit according to any one of claims 1 to 11, characterized in that. A liquid crystal display panel, a backlight that is disposed on one surface of the liquid crystal display panel, is turned on or off, a booster circuit that can change boosting capability , and a load on the booster circuit, and is mounted on the liquid crystal display panel by the COG method A semiconductor circuit, and detecting means for detecting on and off of the backlight,
The boosting circuit includes means for increasing the boosting capability when the backlight is on, as compared with when the backlight is off, according to the detection of the detecting means.
A liquid crystal display device. A liquid crystal display panel;
A backlight disposed on one surface of the liquid crystal display panel and illuminating the liquid crystal display panel;
A voltage boosting unit capable of changing a voltage boosting capability of receiving a voltage to be boosted and a control signal and boosting and outputting the input voltage with a boosting capability according to the control signal;
A semiconductor circuit provided in the liquid crystal display panel and supplied with the output of the booster circuit;
Detecting means for detecting the amount of light irradiated to the semiconductor circuit out of the illumination light from the backlight;
By controlling the control signal based on the output of the detection means, when the light amount from the backlight detected by the detection means is large, compared to when the light amount is small A switching circuit for changing the boosting capability of the boosting means to be high;
A liquid crystal display device comprising:

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