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JP3672585B2 - Method for manufacturing group 3 nitride semiconductor - Google Patents
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JP3672585B2 - Method for manufacturing group 3 nitride semiconductor - Google Patents

Method for manufacturing group 3 nitride semiconductor Download PDF

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JP3672585B2
JP3672585B2 JP7651294A JP7651294A JP3672585B2 JP 3672585 B2 JP3672585 B2 JP 3672585B2 JP 7651294 A JP7651294 A JP 7651294A JP 7651294 A JP7651294 A JP 7651294A JP 3672585 B2 JP3672585 B2 JP 3672585B2
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Prior art keywords
layer
light emitting
nitride semiconductor
plasma
intensity
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JP7651294A
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JPH07263749A (en
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直樹 柴田
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Toyoda Gosei Co Ltd
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Toyoda Gosei Co Ltd
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Description

【0001】
【産業上の利用分野】
本発明は3族窒化物半導体(AlxGaYIn1-X-YN;X=0,Y=0,X=Y=0 を含む) の気相成長方法に関する。
【0002】
【従来技術】
従来、青色の発光ダイオードとしてGaN 化合物半導体のpn接合を用いたものが知られている。その化合物半導体は直接遷移型であることから発光効率が高いこと、光の3原色の1つである青色を発光色とすること等から注目されている。
【0003】
上記の発光素子では、p層は、GaN にマグネシウム(Mg)をドープした後、電子線を照射したり、加熱処理することでp伝導型を得るようにしている。
【0004】
【発明が解決しようとする課題】
しかし、上記の発光素子は、加熱処理によって、膜中に多量に存在する水素を離脱させている。しかしながら、水素の離脱と共に窒素も同時に離脱するために、加熱処理により結晶性が低下するという問題がある。
よって、この方法で製造した発光素子も発光強度が低いという問題がある。
【0005】
本発明は上記の課題を解決するために成されたものであり、その目的は、AlGaInN を用いた半導体薄膜の結晶性を向上させること及びその半導体を用いた発光素子の発光強度を向上させることである。
【0006】
【課題を解決するための手段】
請求項1に記載の発明は、3族窒化物半導体(AlxGaYIn1-X-YN;X=0,Y=0,X=Y=0 を含む) の製造方法において、3族窒化物半導体(AlxGaYIn1-X-YN;X=0,Y=0,X=Y=0 を含む) の気相成長後に、圧力100torr以下として窒素ラジカルが存在するプラズマ放電領域中で加熱処理することを特徴とする。
【0007】
請求項2に記載の発明は、3族窒化物半導体(AlxGaYIn1-X-YN;X=0,Y=0,X=Y=0 を含む) から成る発光素子において、アクセプタ不純物の添加された3族窒化物半導体(AlxGaYIn1-X-YN;X=0,Y=0,X=Y=0 を含む) の気相成長後に、圧力100torr以下として窒素ラジカルが存在するプラズマ放電領域中で加熱処理されて形成されることを特徴とする。
【0008】
【発明の作用及び効果】
3族窒化物半導体(AlxGaYIn1-X-YN;X=0,Y=0,X=Y=0 を含む) の気相成長後に、圧力100torr以下として窒素ラジカルが存在するプラズマ放電領域中で加熱処理することで、薄膜中に多量に存在する水素が膜外に離脱すると共に窒素プラズマの存在により薄膜から窒素が離脱するのが防止される。
【0009】
この結果、3族窒化物半導体(AlxGaYIn1-X-YN;X=0,Y=0,X=Y=0 を含む) の結晶性が向上する。又、このようにして製造した発光素子は、各層の結晶性が向上するために、発光強度が向上する。
【0010】
【実施例】
第1実施例
図1において、発光ダイオード10は、サファイア基板1を有しており、そのサファイア基板1上に500 ÅのAlN のバッファ層2が形成されている。そのバッファ層2の上には、順に、膜厚約2.0 μm、電子濃度2 ×1018/cm3のシリコンドープGaN から成る高キャリア濃度n+ 層3、膜厚約2.0 μm、電子濃度 2×1018/cm3のシリコンドープの(Alx2Ga1-x2)y2In1-y2N から成る高キャリア濃度n+ 層4、膜厚約0.5 μm、亜鉛及びマグネシウムドープの(Alx1Ga1-x1)y1In1-y1N から成る発光層5、膜厚約1.0 μm、ホール濃度2 ×1017/cm3のマグネシウムドープの(Alx2Ga1-x2)y2In1-y2N から成るp層6が形成されている。そして、p層6に接続するニッケルで形成された電極7と高キャリア濃度n+ 層4に接続するニッケルで形成された電極8が形成されている。電極7と電極8とは、溝9により電気的に絶縁分離されている。
【0011】
次に、この構造の発光ダイオード10の製造方法について説明する。
上記発光ダイオード10は、有機金属化合物気相成長法( 以下「M0VPE 」と記す) による気相成長により製造された。
【0012】
用いられたガスは、NH3 とキャリアガスH2又はN2とトリメチルガリウム(Ga(CH3)3)(以下「TMG 」と記す) とトリメチルアルミニウム(Al(CH3)3)(以下「TMA 」と記す) とトリメチルインジウム(In(CH3)3)(以下「TMAI」と記す) と、ジエチル亜鉛((C2H5)2Zn)(以下、「DEZ 」と記す) とシラン(SiH4)とシクロペンタジエニルマグネシウム(Mg(C5H5)2)(以下「CP2Mg 」と記す)である。
【0013】
まず、有機洗浄及び熱処理により洗浄したa面を主面とする単結晶のサファイア基板1をM0VPE 装置の反応室に載置されたサセプタに装着する。次に、常圧でH2を流速2 liter/分で反応室に流しながら温度1100℃でサファイア基板1を気相エッチングした。
【0014】
次に、温度を 400℃まで低下させて、H2を20 liter/分、NH3 を10 liter/分、TMA を 1.8×10-5モル/分で供給してAlN のバッファ層2が約 500Åの厚さに形成された。次に、サファイア基板1の温度を1150℃に保持し、膜厚約2.2 μm、電子濃度 2×1018/cm3のシリコンドープのGaN から成る高キャリア濃度n+ 層3を形成した。
【0015】
以下、亜鉛(Zn)を発光中心として発光ピーク波長を450nm に設定した場合の発光層5(アクティブ層)及びクラッド層4、6の組成比及び結晶成長条件の実施例を記す。上記の高キャリア濃度n+ 層3を形成した後、続いて、サファイア基板1の温度を1150℃に保持し、N2を20 liter/分、NH3 を 10liter/分、TMG を1.12×10-4モル/分、TMA を0.47×10-4モル/分、TMI を0.1 ×10-4モル/分、及び、シランを導入し、膜厚約2.0 μm、濃度2 ×1018/cm3のシリコンドープの(Al0.3Ga0.7)0.94In0.06N から成る高キャリア濃度n+ 層4を形成した。
【0016】
続いて、温度を860 ℃に保持し、N2を20 liter/分、NH3 を10 liter/分、TMG を1.53×10-4モル/分、TMA を0.47×10-4モル/分、TMI を0.02×10-4モル/分、DEZ を2 ×10-4モル/分で7 分導入し、膜厚約0.3 μmの亜鉛(Zn)のドープされた(Al0.09Ga0.91)0.99In0.01N から成る発光層5を形成した。発光層5は未だこの状態で抵抗率108 Ωcm以上の絶縁体である。この発光層5における亜鉛(Zn)の濃度は、5 ×1017〜3 ×1019/cm3である。
【0017】
続いて、温度を1100℃に保持し、N2を20 liter/分、NH3 を10 liter/分、TMG を1.12×10-4モル/分、TMA を0.47×10-4モル/分、TMI を0.1 ×10-4モル/分、及び、CP2Mg を2 ×10-4モル/分導入し、膜厚約1.0 μmのマグネシウム(Mg)ドープの(Al0.3Ga0.7)0.94In0.06N から成るp層6を形成した。p層6のマグネシウムの濃度は1 ×1019/cm3である。この状態では、p層6は、まだ、抵抗率108 Ωcm以上の絶縁体である。
【0018】
次に、反応室内を一度真空に排気して、残存ガスをN2ガスだけにする。その後、N2ガスを導入し、反応室内の圧力を100torr 以下とした。次に、反応室内を電力10〜100 Wでプラズマ放電させた後、基板の温度を500 〜900 ℃に加熱し、5 〜60分間プラズマアニールする。この放電は高周波、マイクロ波、直流等のいずれの手段でも良い。基板は、N(ラジカル) が存在するプラズマ放電領域中か、アフタグローと呼ばれる励起寿命の短いイオン種は存在しないが寿命の長いラジカル種が存在する領域のいずれかに置かれる。以上の処理により、p層6は、ホール濃度 6×1017/cm3、抵抗率 2Ωcmのp伝導型半導体となった。このようにして、図2に示すような多層構造のウエハが得られた。
【0019】
ここで、プラズマ処理の効果を確かめる各種の実験を以下に述べる。本実験では、不純物無添加の(Al0.09Ga0.91)0.99In0.01N 薄膜について、各種の処理をした後の薄膜のPL強度を測定した。その測定結果を図8〜図11に示す。図8は、プラズマ未処理、アフターグロー、40Wのプラズマで処理した後の薄膜の360nm、380nm、540nmのPL強度を表している。40Wのプラズマで処理した後の薄膜が最もPL強度が向上しているのが理解される。
【0020】
又、プラズマ処理する時の基板温度を各種変化させて薄膜を生成した後の、その薄膜の360nm、380nm、540nmのPL強度を測定した。その測定結果を図9に示す。500〜900℃の範囲では750℃が最もPL強度が高いことが理解される。
【0021】
又、基板温度を700℃として、プラズマ電力を各種変化させて、5分間プラズマ処理した後の薄膜の360nm、380nm、540nmのPL強度を測定した。測定結果を図10に示す。プラズマ電力が40Wの時が最大のPL強度を示すことが理解される。
【0022】
又、基板温度を700℃として、プラズマ電力を40Wとして、処理時間を変化させてプラズマ処理した後の薄膜の360nm、380nm、540nmのPL強度を測定した。測定結果を図11に示す。60分以下ではプラズマ処理時間が長い程、PL強度が大きいことが分かる。
【0023】
次に、発光素子の製造方法の続きを説明する。以下に述べられる図3から図7は、ウエハ上の1つの素子のみを示す断面図であり、実際は、この素子が連続的に繰り返されたウエハについて、処理が行われ、その後、各素子毎に切断される。
【0024】
図3に示すように、p層6の上に、スパッタリングによりSiO2層11を2000Åの厚さに形成した。次に、そのSiO2層11上にフォトレジスト12を塗布した。そして、フォトリソグラフにより、p層6上において、高キャリア濃度n+ 層4に至るように形成される孔15に対応する電極形成部位Aとその電極形成部をp層6の電極と絶縁分離する溝9を形成する部位Bのフォトレジストを除去した。
【0025】
次に、図4に示すように、フォトレジスト12によって覆われていないSiO2層11をフッ化水素酸系エッチング液で除去した。次に、図5に示すように、フォトレジスト12及びSiO2層11によって覆われていない部位のp層6とその下の発光層5、高キャリア濃度n+ 層4の上面一部を、真空度0.04Torr、高周波電力0.44W/cm2 、BCl3ガスを10 ml/分の割合で供給しドライエッチングした後、Arでドライエッチングした。この工程で、高キャリア濃度n+ 層4に対する電極取出しのための孔15と絶縁分離のための溝9が形成された。
【0026】
次に、図6に示すように、p層6上に残っているSiO2層11をフッ化水素酸で除去した。次に、図7に示すように、試料の上全面に、Ni層13を蒸着により形成した。これにより、孔15には、高キャリア濃度n+ 層4に電気的に接続されたNi層13が形成される。そして、そのNi層13の上にフォトレジスト14を塗布して、フォトリソグラフにより、そのフォトレジスト14が高キャリア濃度n+ 層4及びp層6に対する電極部が残るように、所定形状にパターン形成した。
【0027】
次に、図7に示すようにそのフォトレジスト14をマスクとして下層のNi層13の露出部を硝酸系エッチング液でエッチングした。この時、絶縁分離のための溝9に蒸着されたNi層13は、完全に除去される。次に、フォトレジスト14をアセトンで除去し、高キャリア濃度n+ 層4の電極8、p層6の電極7が残された。その後、上記の如く処理されたウエハは、各素子毎に切断され、図1に示すpn構造の窒化ガリウム系発光素子を得た。
【0028】
このようにして得られた発光素子は、駆動電流3.6 Vで、発光ピーク波長450nm、発光強度1000mcd であった。
【0029】
又、上記の発光層5の亜鉛(Zn)の濃度は、それぞれ、1×1017〜1×1020の範囲が発光強度を向上させる点で望ましい。
【0030】
尚、上記の実施例では、(AlxGaYIn1-X-YN;X=0,Y=0,X=Y=0 を含む) を用いた発光素子を示したが、本発明は、発光素子だけではなく、一般的に、、(AlxGaYIn1-X-YN;X=0,Y=0,X=Y=0 を含む) 薄膜の気相成長方法に応用することができる。
【0031】
上記実施例では、pin構造の発光素子について示したが、ppn構造の発光素子であっても良い。即ち、p層をn層に接合するMgとZnのドープされた第1p層とMgだけドープされた第2p層との2重構造にしても良い。
又、窒素プラズマ中での加熱処理はp層だけの処理でも良いが、n層、p層の各層の形成毎に行っても良い。
【図面の簡単な説明】
【図1】本発明の具体的な第1実施例に係る発光ダイオードの構成を示した構成図。
【図2】同実施例の発光ダイオードの製造工程を示した断面図。
【図3】同実施例の発光ダイオードの製造工程を示した断面図。
【図4】同実施例の発光ダイオードの製造工程を示した断面図。
【図5】同実施例の発光ダイオードの製造工程を示した断面図。
【図6】同実施例の発光ダイオードの製造工程を示した断面図。
【図7】同実施例の発光ダイオードの製造工程を示した断面図。
【図8】未処理、アフターグロー、プラズマ処理後の薄膜のPL強度を測定した測定図。
【図9】基板温度を変化させてプラズマ処理した後の薄膜のPL強度を測定した測定図。
【図10】プラズマ電力を変化させたプラズマ処理した後の薄膜のPL強度を測定した測定図。
【図11】プラズマ処理時間を変化させてプラズマ処理した後の薄膜のPL強度を測定した測定図。
【符号の説明】
10…発光ダイオード
1…サファイア基板
2…バッファ層
3…高キャリア濃度n+
4…高キャリア濃度n+
5…発光層
6…p層
7,8…電極
9…溝
[0001]
[Industrial application fields]
The present invention relates to a vapor phase growth method for a group 3 nitride semiconductor (including Al x Ga Y In 1-XY N; X = 0, Y = 0, X = Y = 0).
[0002]
[Prior art]
Conventionally, a blue light emitting diode using a pn junction of a GaN compound semiconductor is known. Since the compound semiconductor is a direct transition type, it has been attracting attention because of its high luminous efficiency and the fact that one of the three primary colors of light is blue.
[0003]
In the above light emitting device, the p layer is obtained by doping the GaN with magnesium (Mg), and then irradiating with an electron beam or heat treatment to obtain a p-conductivity type.
[0004]
[Problems to be solved by the invention]
However, the above light-emitting element releases hydrogen present in a large amount in the film by heat treatment. However, since nitrogen is also released at the same time as hydrogen is released, there is a problem that crystallinity is lowered by heat treatment.
Therefore, the light emitting element manufactured by this method also has a problem that the light emission intensity is low.
[0005]
The present invention has been made to solve the above-described problems, and its purpose is to improve the crystallinity of a semiconductor thin film using AlGaInN and to improve the light emission intensity of a light-emitting element using the semiconductor. It is.
[0006]
[Means for Solving the Problems]
The invention according to claim 1 is a method for producing a group III nitride semiconductor (including Al x Ga Y In 1-XY N; X = 0, Y = 0, X = Y = 0). After vapor phase growth of semiconductors (including Al x Ga Y In 1-XY N; including X = 0, Y = 0, X = Y = 0), heat treatment is performed in a plasma discharge region where nitrogen radicals exist at a pressure of 100 torr or less It is characterized by doing.
[0007]
According to a second aspect of the present invention, there is provided a light emitting device made of a group III nitride semiconductor (including Al x Ga Y In 1-XY N; X = 0, Y = 0, X = Y = 0). Nitrogen radicals exist at a pressure of 100 torr or less after vapor phase growth of the added group III nitride semiconductor (Al x Ga Y In 1-XY N; including X = 0, Y = 0, X = Y = 0) It is formed by heat treatment in the plasma discharge region .
[0008]
[Action and effect of the invention]
Plasma discharge region where nitrogen radicals exist at a pressure of 100 torr or less after vapor phase growth of group III nitride semiconductors (including Al x Ga Y In 1-XY N; X = 0, Y = 0, X = Y = 0) By performing the heat treatment therein , hydrogen present in a large amount in the thin film is released from the film and nitrogen is prevented from being released from the thin film due to the presence of nitrogen plasma.
[0009]
As a result, the crystallinity of the group 3 nitride semiconductor (Al x Ga Y In 1-XY N; including X = 0, Y = 0, X = Y = 0) is improved. In addition, the light emitting device manufactured in this manner has improved light emission intensity because the crystallinity of each layer is improved.
[0010]
【Example】
First embodiment In Fig. 1, a light emitting diode 10 has a sapphire substrate 1, and a 500 サ フ ァ イ ア AlN buffer layer 2 is formed on the sapphire substrate 1. Of On the buffer layer 2, in turn, a film thickness of about 2.0 [mu] m, the electron concentration of 2 × 10 18 / cm high carrier concentration comprising a silicon-doped GaN of 3 n + layer 3, a thickness of about 2.0 [mu] m, an electron concentration 2 × High carrier concentration n + layer 4 consisting of 10 18 / cm 3 silicon-doped (Al x2 Ga 1-x2 ) y2 In 1-y2 N, about 0.5 μm thick, zinc and magnesium doped (Al x1 Ga 1- x1 ) Light-emitting layer 5 made of y1 In 1-y1 N, p film made of magnesium-doped (Al x2 Ga 1-x2 ) y2 In 1-y2 N with a film thickness of about 1.0 μm and a hole concentration of 2 × 10 17 / cm 3 Layer 6 is formed. An electrode 7 made of nickel connected to the p layer 6 and an electrode 8 made of nickel connected to the high carrier concentration n + layer 4 are formed. The electrode 7 and the electrode 8 are electrically insulated and separated by the groove 9.
[0011]
Next, a method for manufacturing the light emitting diode 10 having this structure will be described.
The light emitting diode 10 was manufactured by vapor phase growth using a metal organic compound vapor phase growth method (hereinafter referred to as “M0VPE”).
[0012]
The gases used were NH 3 and carrier gas H 2 or N 2 , trimethylgallium (Ga (CH 3 ) 3 ) (hereinafter referred to as “TMG”) and trimethylaluminum (Al (CH 3 ) 3 ) (hereinafter referred to as “TMA”). ), Trimethylindium (In (CH 3 ) 3 ) (hereinafter referred to as “TMAI”), diethylzinc ((C 2 H 5 ) 2 Zn) (hereinafter referred to as “DEZ”) and silane (SiH 4 ) and cyclopentadienyl magnesium (Mg (C 5 H 5 ) 2 ) (hereinafter referred to as “CP 2 Mg”).
[0013]
First, the single crystal sapphire substrate 1 having the a-plane as a main surface cleaned by organic cleaning and heat treatment is mounted on a susceptor mounted in the reaction chamber of the M0VPE apparatus. Next, the sapphire substrate 1 was vapor-phase etched at a temperature of 1100 ° C. while flowing H 2 at normal pressure and a flow rate of 2 liter / min into the reaction chamber.
[0014]
Next, the temperature is lowered to 400 ° C., H 2 is supplied at 20 liter / min, NH 3 is supplied at 10 liter / min, and TMA is supplied at 1.8 × 10 −5 mol / min. The thickness was formed. Then, maintaining the temperature of the sapphire substrate 1 to 1150 ° C., to form a film thickness of about 2.2 [mu] m, an electron concentration of 2 × 10 18 / cm high carrier concentration n + layer 3 made of GaN of silicon doped 3.
[0015]
Examples of composition ratios and crystal growth conditions of the light emitting layer 5 (active layer) and the cladding layers 4 and 6 when zinc (Zn) is the emission center and the emission peak wavelength is set to 450 nm will be described below. After the above high carrier concentration n + layer 3 is formed, the temperature of the sapphire substrate 1 is maintained at 1150 ° C., N 2 is 20 liter / min, NH 3 is 10 liter / min, and TMG is 1.12 × 10 − 4 mol / min, TMA 0.47 × 10 −4 mol / min, TMI 0.1 × 10 −4 mol / min, and silane introduced, with a film thickness of about 2.0 μm and a concentration of 2 × 10 18 / cm 3 A high carrier concentration n + layer 4 made of doped (Al 0.3 Ga 0.7 ) 0.94 In 0.06 N was formed.
[0016]
Subsequently, the temperature is maintained at 860 ° C., N 2 is 20 liter / min, NH 3 is 10 liter / min, TMG is 1.53 × 10 −4 mol / min, TMA is 0.47 × 10 −4 mol / min, TMI Was introduced at a rate of 0.02 × 10 −4 mol / min and DEZ at 2 × 10 −4 mol / min for 7 minutes, and was doped with zinc (Zn) with a film thickness of approximately 0.3 μm (Al 0.09 Ga 0.91 ) 0.99 In 0.01 N A light emitting layer 5 made of was formed. The light emitting layer 5 is still an insulator having a resistivity of 10 8 Ωcm or more in this state. The concentration of zinc (Zn) in the light emitting layer 5 is 5 × 10 17 to 3 × 10 19 / cm 3 .
[0017]
Subsequently, the temperature is maintained at 1100 ° C., N 2 is 20 liter / min, NH 3 is 10 liter / min, TMG is 1.12 × 10 −4 mol / min, TMA is 0.47 × 10 −4 mol / min, TMI From 0.1 × 10 −4 mol / min and CP 2 Mg of 2 × 10 −4 mol / min, and about 1.0 μm magnesium (Mg) -doped (Al 0.3 Ga 0.7 ) 0.94 In 0.06 N A p-layer 6 was formed. The concentration of magnesium in the p layer 6 is 1 × 10 19 / cm 3 . In this state, the p layer 6 is still an insulator having a resistivity of 10 8 Ωcm or more.
[0018]
Next, the reaction chamber is once evacuated to make the remaining gas only N 2 gas. Thereafter, N 2 gas was introduced, and the pressure in the reaction chamber was adjusted to 100 torr or less. Next, plasma discharge is performed at a power of 10 to 100 W in the reaction chamber, and then the temperature of the substrate is heated to 500 to 900 ° C. and plasma annealed for 5 to 60 minutes. This discharge may be any means such as high frequency, microwave, and direct current. The substrate is placed either in a plasma discharge region where N (radicals) exist, or in a region where there are no long-lived radical species called afterglow, but no long-lived ion species exist. By the above treatment, the p-layer 6 became a p-conduction type semiconductor having a hole concentration of 6 × 10 17 / cm 3 and a resistivity of 2 Ωcm. In this way, a wafer having a multilayer structure as shown in FIG. 2 was obtained.
[0019]
Here, various experiments for confirming the effect of the plasma treatment will be described below. In this experiment, the PL intensity of the thin film after various treatments was measured for the (Al 0.09 Ga 0.91 ) 0.99 In 0.01 N thin film without addition of impurities. The measurement results are shown in FIGS. FIG. 8 shows the PL intensity of 360 nm, 380 nm, and 540 nm of the thin film after being treated with plasma untreated, afterglow, and 40 W plasma. It can be seen that the PL intensity is most improved in the thin film after being treated with 40 W plasma.
[0020]
Further, after the thin film was formed by changing the substrate temperature during the plasma treatment, the PL intensity at 360 nm, 380 nm, and 540 nm of the thin film was measured. The measurement results are shown in FIG. It is understood that the PL intensity is highest at 750 ° C. in the range of 500 to 900 ° C.
[0021]
Further, the PL intensity at 360 nm, 380 nm, and 540 nm of the thin film after the plasma treatment for 5 minutes with various changes in plasma power with the substrate temperature set to 700 ° C. was measured. The measurement results are shown in FIG. It is understood that the maximum PL intensity is shown when the plasma power is 40 W.
[0022]
In addition, the PL intensity at 360 nm, 380 nm, and 540 nm of the thin film after the plasma treatment with the substrate temperature set to 700 ° C., the plasma power set to 40 W, and the treatment time changed was measured. The measurement results are shown in FIG. It can be seen that at 60 minutes or less, the PL intensity increases as the plasma treatment time increases.
[0023]
Next, the continuation of the manufacturing method of a light emitting element is demonstrated. 3 to 7 described below are cross-sectional views showing only one element on the wafer. Actually, processing is performed on a wafer in which this element is continuously repeated, and thereafter, for each element. Disconnected.
[0024]
As shown in FIG. 3, the SiO 2 layer 11 was formed on the p layer 6 to a thickness of 2000 mm by sputtering. Next, a photoresist 12 was applied on the SiO 2 layer 11. Then, by photolithography, the electrode forming portion A corresponding to the hole 15 formed so as to reach the high carrier concentration n + layer 4 on the p layer 6 and its electrode forming portion are insulated and separated from the electrode of the p layer 6. The photoresist at the site B where the groove 9 is to be formed was removed.
[0025]
Next, as shown in FIG. 4, the SiO 2 layer 11 not covered with the photoresist 12 was removed with a hydrofluoric acid etching solution. Next, as shown in FIG. 5, the p layer 6 at a portion not covered with the photoresist 12 and the SiO 2 layer 11, the light emitting layer 5 thereunder, and a part of the upper surface of the high carrier concentration n + layer 4 are vacuum-treated. After dry etching by supplying 0.04 Torr, high frequency power of 0.44 W / cm 2 and BCl 3 gas at a rate of 10 ml / min, dry etching was performed with Ar. In this step, a hole 15 for extracting an electrode for the high carrier concentration n + layer 4 and a groove 9 for insulating separation were formed.
[0026]
Next, as shown in FIG. 6, the SiO 2 layer 11 remaining on the p layer 6 was removed with hydrofluoric acid. Next, as shown in FIG. 7, the Ni layer 13 was formed on the entire upper surface of the sample by vapor deposition. As a result, the Ni layer 13 electrically connected to the high carrier concentration n + layer 4 is formed in the hole 15. Then, a photoresist 14 is applied on the Ni layer 13, and a pattern is formed in a predetermined shape by photolithography so that the electrode portions of the photoresist 14 with respect to the high carrier concentration n + layer 4 and the p layer 6 remain. did.
[0027]
Next, as shown in FIG. 7, the exposed portion of the lower Ni layer 13 was etched with a nitric acid-based etchant using the photoresist 14 as a mask. At this time, the Ni layer 13 deposited in the groove 9 for insulation separation is completely removed. Next, the photoresist 14 was removed with acetone, leaving the electrode 8 of the high carrier concentration n + layer 4 and the electrode 7 of the p layer 6. Thereafter, the wafer processed as described above was cut for each element to obtain a gallium nitride light emitting element having a pn structure shown in FIG.
[0028]
The light-emitting element thus obtained had a drive current of 3.6 V, an emission peak wavelength of 450 nm, and an emission intensity of 1000 mcd.
[0029]
The zinc (Zn) concentration in the light emitting layer 5 is preferably in the range of 1 × 10 17 to 1 × 10 20 in terms of improving the light emission intensity.
[0030]
In the above embodiment, a light emitting element using (Al x Ga Y In 1-XY N; including X = 0, Y = 0, X = Y = 0) is shown. In general, the present invention can be applied to a vapor phase growth method of a thin film (including Al x Ga Y In 1-XY N; X = 0, Y = 0, X = Y = 0).
[0031]
Although the light emitting element having a pin structure is shown in the above embodiment, a light emitting element having a ppn structure may be used. That is, the p layer may have a double structure of a first p layer doped with Mg and Zn that joins the n layer and a second p layer doped with Mg.
In addition, the heat treatment in nitrogen plasma may be performed only for the p layer, but may be performed every time the n layer and the p layer are formed.
[Brief description of the drawings]
FIG. 1 is a configuration diagram illustrating a configuration of a light emitting diode according to a first specific example of the present invention.
FIG. 2 is a cross-sectional view showing a manufacturing process of the light-emitting diode of the same example.
FIG. 3 is a cross-sectional view showing a manufacturing process of the light-emitting diode of the example.
FIG. 4 is a cross-sectional view showing a manufacturing process of the light-emitting diode of the same example.
FIG. 5 is a cross-sectional view showing a manufacturing process of the light-emitting diode of the example.
6 is a cross-sectional view showing a manufacturing process of the light-emitting diode of the example. FIG.
7 is a cross-sectional view showing a manufacturing process of the light-emitting diode of the example. FIG.
FIG. 8 is a measurement diagram in which the PL intensity of a thin film after untreated, afterglow, and plasma treatment was measured.
FIG. 9 is a measurement diagram in which the PL intensity of a thin film after plasma treatment is performed while changing the substrate temperature.
FIG. 10 is a measurement diagram in which the PL intensity of a thin film after plasma treatment with varying plasma power is measured.
FIG. 11 is a measurement diagram in which the PL intensity of a thin film after the plasma treatment is performed while changing the plasma treatment time is measured.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 10 ... Light emitting diode 1 ... Sapphire substrate 2 ... Buffer layer 3 ... High carrier concentration n + layer 4 ... High carrier concentration n + layer 5 ... Light emitting layer 6 ... P layer 7, 8 ... Electrode 9 ... Groove

Claims (2)

3族窒化物半導体(AlxGaYIn1-X-YN;X=0,Y=0,X=Y=0 を含む) の製造方法において、
3族窒化物半導体(AlxGaYIn1-X-YN;X=0,Y=0,X=Y=0 を含む) の気相成長後に、圧力100torr以下として窒素ラジカルが存在するプラズマ放電領域中で加熱処理することを特徴とする製造方法。
In a method for manufacturing a group 3 nitride semiconductor (including Al x Ga Y In 1-XY N; X = 0, Y = 0, X = Y = 0),
Plasma discharge region where nitrogen radicals exist at a pressure of 100 torr or less after vapor phase growth of group III nitride semiconductors (including Al x Ga Y In 1-XY N; X = 0, Y = 0, X = Y = 0) The manufacturing method characterized by heat-processing in.
3族窒化物半導体(AlxGaYIn1-X-YN;X=0,Y=0,X=Y=0 を含む) から成る発光素子において、
アクセプタ不純物の添加された3族窒化物半導体(AlxGaYIn1-X-YN;X=0,Y=0,X=Y=0 を含む) の気相成長後に、圧力100torr以下として窒素ラジカルが存在するプラズマ放電領域中で加熱処理されて形成されることを特徴とする製造方法。
In a light emitting device made of a group III nitride semiconductor (including Al x Ga Y In 1-XY N; X = 0, Y = 0, X = Y = 0),
After vapor phase growth of group III nitride semiconductor (Al x Ga Y In 1-XY N; X = 0, Y = 0, X = Y = 0) to which acceptor impurities are added, nitrogen radicals at a pressure of 100 torr or less A manufacturing method characterized by being formed by being heat-treated in a plasma discharge region where there is .
JP7651294A 1994-03-22 1994-03-22 Method for manufacturing group 3 nitride semiconductor Expired - Fee Related JP3672585B2 (en)

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