JP3689824B2 - Method for polishing plate-like member - Google Patents
Method for polishing plate-like member Download PDFInfo
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- JP3689824B2 JP3689824B2 JP10437296A JP10437296A JP3689824B2 JP 3689824 B2 JP3689824 B2 JP 3689824B2 JP 10437296 A JP10437296 A JP 10437296A JP 10437296 A JP10437296 A JP 10437296A JP 3689824 B2 JP3689824 B2 JP 3689824B2
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- 238000005498 polishing Methods 0.000 title claims description 107
- 238000000034 method Methods 0.000 title claims description 28
- 239000004065 semiconductor Substances 0.000 claims description 15
- 238000005096 rolling process Methods 0.000 claims description 2
- 235000012431 wafers Nutrition 0.000 description 40
- 238000007517 polishing process Methods 0.000 description 11
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 5
- 230000000052 comparative effect Effects 0.000 description 5
- 229910052710 silicon Inorganic materials 0.000 description 5
- 239000010703 silicon Substances 0.000 description 5
- 238000007796 conventional method Methods 0.000 description 3
- 230000005540 biological transmission Effects 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 230000002093 peripheral effect Effects 0.000 description 2
- 230000003746 surface roughness Effects 0.000 description 2
- 239000000969 carrier Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000009191 jumping Effects 0.000 description 1
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- Finish Polishing, Edge Sharpening, And Grinding By Specific Grinding Devices (AREA)
Description
【0001】
【発明の属する技術分野】
本発明は、半導体ウエーハ等の板状部材の研磨方法に関し、例えば半導体ウエーハを、ラッピングまたは鏡面研磨において高平坦度に研磨する方法に関するものである。
【0002】
【従来の技術】
自転する上下定盤間で半導体ウエーハを保持部材に保持した状態で該保持部材を自転させかつ、定盤に対し相対的に公転させて、該ウエーハを研磨する方法はよく知られている。
半導体ウエーハの平坦度を高めることは、ウエーハプロセスにおいて極めて重要な要求事項の一つである。ところで、上記研磨方法において、ウエーハの平坦度に特に重大な影響を与える要素として、ウエーハ保持部材の自転状態および定盤に対する公転状態が挙げられ、また、平坦度向上のためには、ウエーハ保持部材の公転回転数を高めるよりも、自転回転数を増大させる方が効果的であることが実験で確認されている。
【0003】
【発明が解決しようとする課題】
ところが、上記自転回転数を公転回転数よりも高く設定すると、(1)ウエーハ保持部材の寿命が短くなる、(2)ウエーハの厚さが不均一な研磨初期においては、ウエーハが保持部材から外れやすくなるなどの問題があった。
そのため従来技術では、ウエーハ保持部材の自転回転数をrとし、ウエーハ保持部材の公転回転数をRとするとき、rとRの比r/Rを研磨工程の間、0.5〜1.5の範囲内の適宜値に設定していたが、ウエーハの平坦度を高めるには限界があった。
【0004】
したがって本発明の目的は、半導体ウエーハ等の板状部材の平坦度を大幅に高めることができ、これと同時に、上記した従来の問題点(1),(2)を解決することが可能な板状部材の研磨方法を提供することである。
【0005】
【課題を解決するための手段】
本発明の研磨方法は、板状部材を保持部材に保持した状態で該保持部材を定盤上で自転させながら公転させて研磨するに際し、板状部材保持部材の自転回転数をrとし、板状部材保持部材の公転回転数をRとするとき、研磨初期ではこれらの比r/Rを研磨終了時の比r/Rより小さくすることを特徴とする板状部材の研磨方法である。
【0006】
すなわち本発明の研磨方法は、板状部材の保持部材(例えば半導体ウエーハの保持金具)と板状部材とのなじみが良くない研磨初期においてはr/R値を低めに設定することにより、板状部材を保持部材により確実に保持した状態で研磨し、保持部材と板状部材とのなじみが良くなった時点でr/R値を、高平坦度研磨に好適な値に増大させることにより、板状部材の平坦度を従来方法に比べて大幅に向上させるようにしたものである。
【0007】
本発明では、研磨工程の前半においてr/R値を0.5〜1.5の範囲内の適宜値とするが、この範囲は従来技術で広く採用されてきたものであり、この範囲では、高平坦度研磨は無理であるものの、板状部材を保持部材により確実に保持した状態で研磨することができる。
また、本発明においては、研磨工程の後半でr/R値を3〜10の範囲内の適宜値とするが、その理由は、r/R値が3未満では高平坦度研磨が望めず、r/Rが10を超えると、ウエーハ外周部と保持部材との摩擦によって面取り外周部にダメージが入り、特に保持部材からウエーハが飛び出す事故の発生率が高くなるとともに、研磨後ウエーハの平坦度の向上も頭打ちとなるためである。
【0008】
本発明では、前記板状部材の研磨代の1/2を研磨する研磨工程の前半では、前記比r/Rを研磨工程の後半での前記比r/Rより小さくすることが好ましい。具体的には、研磨代の1/2を研磨する研磨工程の前半で前記比r/Rを0.5〜1.5の範囲内の適宜値(一定値)に維持し、研磨工程の後半では前記比r/Rを3〜10の範囲内の適宜値(一定値)に維持する方法が採用できる(これについては後記する実施例の欄を参照)。
この方法は、研磨の途中まではr/R値を低くして、安定した研磨を継続させ、その後にr/R値の増大操作を1回行い、研磨工程の後半において高平坦度研磨を行うものである。
【0009】
本発明では、r/R値を研磨時間の経過とともに次第に増大させる方法も採用できる。この場合、研磨時間の経過に伴って複数回、段階的に増大させてもよいし、研磨時間に経過に伴って無段階(連続的)に増大させてもよい。
【0010】
本発明では、板状部材の研磨代の残りが1μmになる以前にr/R値を最大値に設定するのが好ましい。その理由は、研磨代の残りが1μmになった後に、r/R値を最大値に設定した場合、高平坦度研磨が終了する前に研磨代の残りがなくなってしまうときがあるからである。
また、本発明ではr/R値の増大操作を、タイマーまたは板状部材の厚さ検出手段を用いて、それぞれ自動的に行うことが望ましい。
本発明の研磨方法は、シリコンウエーハ等の半導体ウエーハをラッピング、または鏡面研磨するのに極めて効果的である。
また、研磨初期における比r/Rを研磨終了時の比r/Rより小さくすることを特徴とする本発明に係る板状部材の研磨方法によって上記半導体ウエーハのラッピングまたは鏡面研磨を行う場合には、以下の方法すなわち、板状部材を遊星ギヤからなるキャリア(板状部材保持部材)で保持し、該キャリアを太陽ギヤおよびインターナルギヤに噛合させるとともに、該キャリアを上定盤および下定盤で挟み込んだ状態で自転させながら公転させ、上定盤および下定盤により上記板状部材の上下面を同時に研磨するものが特に好ましい。
【0011】
板状部材を保持部材で保持し、この保持部材を研磨装置にセットして板状部材の研磨を行う場合、その目的は以下の3つ、
(1)板状部材の厚さを規格値にそろえること、
(2)板状部材の平坦度を目標の水準に高めること、
(3)板状部材の表面粗さを均等化すること、
である。
【0012】
言い換えると、研磨前の板状部材は厚さが不揃いで、平らでなく、表面粗さも大きいのが通常である。このような板状部材の複数枚をまとめて保持部材で保持して研磨を行なえば、研磨初期には保持部材が振動を起こすため、円滑な状態の研磨を開始することは困難である。やがて、研磨が進むと板状部材の各寸法が整い、均等なあたりが出て滑らかな研磨に移行して、板状部材の平坦度が高められる。したがって、平坦度向上のための研磨は、研磨工程の後半で行なえばよいことになる。
このように本発明の研磨方法では、研磨工程の前半で板状部材の各寸法を整え、後半で板状部材の平坦度を目標の水準にまで高めるようにしている。
【0013】
なお、保持部材は一般に繰返し使用を前提とするため、研磨の進行方向の寸法すなわち保持部材の厚さは、研磨後の板状部材の厚さに比べて薄くしておくのが通常である。これは、研磨初期において板状部材が保持金具に(相対的に)浅く保持されていること、したがって、研磨初期にあっては、研磨装置および板状部材の動きに非常に大きな負荷がかかることを意味している。
【0014】
一般に半導体ウエーハをラッピングする場合、図1に示す両面ラップ盤が使用される。
このラップ盤は、上定盤1を下定盤2と逆向きに回転させ、これらの定盤間に配置した保持部材すなわちキャリア3(遊星ギア)を、定盤中心の太陽ギア4とその周囲に位置するインターナルギア5とに噛み合わせることにより、このキャリア3を自転させながら下定盤2の回転方向に公転させるように構成したものである。
この両面ラップ盤では、キャリ3内にセットした複数枚の半導体ウエーハに4方向の運動が与えられるため、キャリア3および半導体ウエーハに無理な、または偏った負荷がかからないので確実、かつ、安定したラッピングを行うことができる。
【0015】
図1の両面ラップ盤の構成・作用について更に詳しく説明すると、無段変速機付モータ15の動力がクラッチ17、傘歯車18,19を介して垂直軸20に伝達される。この垂直軸20には複数の歯車21,22,24,25が設けられており、歯車21の回転は、中間歯車16を介して上ラップ盤1の駆動軸6に設けた歯車14に伝達される。歯車22の回転は、太陽ギア4の駆動軸7に設けた歯車13に伝達される。歯車25の回転は、下定盤2の駆動軸12に設けた歯車11に伝達される。歯車24の回転は、インターナルギア5の駆動軸9に設けた歯車10に伝達される。
【0016】
また、本発明により半導体ウエーハのラップを行う場合、図1の装置において上ラップ盤1、下ラップ盤2、太陽ギア4、インターナルギア5の駆動軸をそれぞれ別個の無段変速機付モータで駆動させる構造を有するフォーウエイ方式のラッピング装置を使用することが望ましい。各駆動軸の回転数を変えることにより容易にr/R値を変えることができる。
【0017】
【実施例】
つぎに、本発明の実施例、および従来方法による比較例について説明する。
実施例1
直径150mm、厚さ0.7mmのシリコンウエーハ34枚について、図1に示すラップ盤を用いてラッピングを行った。この場合、保持部材(キャリア)1個当たりのウエーハ保持枚数を4枚とし、キャリアは5個用いた。研磨代は0.1mmとした。
保持部材の自転回転数と公転回転数の比(r/R)を、研磨工程の前半(研磨開始時から、研磨代の1/2が研磨される時点まで)では0.7とし、その後、一旦研磨装置の運転を停止し、r/R値を一挙に3.8に増大させてから研磨工程の後半を実施した。
【0018】
実施例2
実施例1と同一のシリコンウエーハ33枚について、同様のラッピングを行った。研磨代も実施例1と同一とした。
研磨工程の前半(研磨開始時から、研磨代の1/2が研磨される時点まで)ではr/R値を0.7とし、その後、一旦研磨装置の運転を停止し、r/R値を一挙に6.1に増大させて研磨工程の後半を実施した。
【0019】
実施例3
実施例1と同一のシリコンウエーハ25枚について、同様のラッピングを行った。研磨代も実施例1と同一とした。
研磨工程の前半(研磨開始時から、研磨代の1/2が研磨される時点まで)ではr/R値を0.7とし、その後、一旦研磨装置の運転を停止し、r/R値を一挙に9.3に増大させて研磨工程の後半を実施した。
【0020】
比較例1
実施例1と同一のシリコンウエーハ35枚についてラッピングを行った。研磨代も実施例1と同一とした。r/R値は、研磨工程の全工程で0.7の一定値に維持した。
【0021】
実施例1,2,3、比較例1の結果をそれぞれ図2、図3、図4、図5に示す。これらの図は、研磨後ウエーハの平坦度に関するヒストグラムである。これらの図において「平坦度」は、TTVにより評価したものであり、また図中の数字は、比較例1の平均値を1.00としたときの各実施例の平均値を相対値で示したものである。TTVは、ウエーハの全領域を測定したときのウエーハ厚さの最大値と最小値の差の値である。この場合、厚さは、汎用の厚さ測定器を用いて測定した。
【0022】
図1〜図4を比較して明らかなように、本発明の研磨方法によれば、従来の研磨方法による場合に比べて、平坦度が著しく優れた研磨ウエーハを得ることができる。また、本発明では、研磨工程の後半におけるr/R値を、より高く設定することによって、より平坦度の高い研磨ウエーハが得られることが分かる。
【0023】
【発明の効果】
以上の説明で明らかなように、本発明の研磨方法では、板状部材の厚さが不均一な研磨初期(または研磨工程の前半)において、板状部材保持部材の自転回転数と公転回転数の比:r/R値を低めに設定することにより、保持部材で板状部材を確実に保持して安定した研磨を行うことができるので、板状部材の寸法を的確に整えることができるとともに、保持部材に無理な負荷がかからないようになる。
また、研磨終了時(または研磨工程の後半)では、r/R値を従来方法に比べて相当高めに設定することにより、板状部材の平坦度を高水準の目標値に向上させることができる。この場合、あらかじめ研磨初期において板状部材の寸法を整えてあるため、板状部材が保持部材から外れたり、保持部材に無理は荷重がかかって寿命が短くなったりする問題も解決される。
したがって本発明によれば、半導体ウエーハを安定してラッピングまたは鏡面研磨し、平坦度が著しく高いウエーハを作製することができるとともに、ウエーハ保持部材の寿命が延びる効果がある。
【図面の簡単な説明】
【図1】本発明の実施例1〜3で使用したラップ盤の構造を示す断面図である。
【図2】本発明の実施例1の結果を示すヒストグラムである。
【図3】本発明の実施例2の結果を示すヒストグラムである。
【図4】本発明の実施例3の結果を示すヒストグラムである。
【図5】比較例1の結果を示すヒストグラムである。
【符号の説明】
1 上定盤
2 下定盤
3 保持部材(キャリア)
4 太陽ギア
5 インターナルギア[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a method for polishing a plate-like member such as a semiconductor wafer, for example, a method for polishing a semiconductor wafer with high flatness in lapping or mirror polishing.
[0002]
[Prior art]
It is well known to polish the wafer by rotating the holding member while revolving relative to the surface plate while holding the semiconductor wafer between the rotating upper and lower surface plates.
Increasing the flatness of a semiconductor wafer is one of the extremely important requirements in a wafer process. By the way, in the above polishing method, elements that have a particularly significant influence on the flatness of the wafer include the rotation state of the wafer holding member and the revolution state with respect to the surface plate. In order to improve the flatness, the wafer holding member Experiments have confirmed that it is more effective to increase the rotation speed than to increase the revolution speed.
[0003]
[Problems to be solved by the invention]
However, if the rotation speed is set higher than the revolution speed, (1) the life of the wafer holding member is shortened, and (2) the wafer is detached from the holding member at the initial stage of polishing when the wafer thickness is not uniform. There were problems such as becoming easier.
Therefore, in the prior art, when r is the rotation speed of the wafer holding member and R is the revolution speed of the wafer holding member, the ratio r / R between r and R is 0.5 to 1.5 during the polishing step. However, there was a limit to increasing the flatness of the wafer.
[0004]
Accordingly, an object of the present invention is to greatly increase the flatness of a plate-like member such as a semiconductor wafer, and at the same time, a plate capable of solving the above-mentioned conventional problems (1) and (2). It is providing the grinding | polishing method of a shaped member.
[0005]
[Means for Solving the Problems]
The polishing method of the present invention, when it such to rotate the holding member on a platen in a state of holding the plate-like member to the holding member is polished by Racovian rolling, the rotation number of rotations of the plate-shaped member holding member r When the revolution speed of the plate-like member holding member is R, the ratio r / R is made smaller than the ratio r / R at the end of polishing at the initial stage of polishing. is there.
[0006]
That is, in the polishing method of the present invention, the plate-like member holding member (for example, a semiconductor wafer holding metal fitting) and the plate-like member are unfamiliar with each other in the initial stage of polishing. By polishing in a state where the member is securely held by the holding member, and when the familiarity between the holding member and the plate-like member is improved, the r / R value is increased to a value suitable for high flatness polishing. The flatness of the member is greatly improved as compared with the conventional method.
[0007]
In the present invention, in the first half of the polishing step, the r / R value is an appropriate value within the range of 0.5 to 1.5, but this range has been widely adopted in the prior art, and in this range, Although high flatness polishing is impossible, polishing can be performed with the plate-like member securely held by the holding member.
In the present invention, the r / R value is set to an appropriate value within the range of 3 to 10 in the latter half of the polishing step, because the high flatness polishing cannot be expected when the r / R value is less than 3, When r / R exceeds 10, the chamfered outer peripheral portion is damaged due to friction between the wafer outer peripheral portion and the holding member, and in particular, the occurrence rate of the accident of the wafer jumping out of the holding member is increased, and the flatness of the wafer after polishing is increased. This is because the improvement will reach its peak.
[0008]
In the present invention, it is preferable that the ratio r / R is made smaller than the ratio r / R in the second half of the polishing step in the first half of the polishing step of polishing half of the polishing allowance of the plate-like member. Specifically, the ratio r / R is maintained at an appropriate value (constant value) in the range of 0.5 to 1.5 in the first half of the polishing step for polishing half of the polishing allowance, and the latter half of the polishing step. Then, a method of maintaining the ratio r / R at an appropriate value (constant value) within the range of 3 to 10 can be adopted (refer to the column of Examples described later for this).
In this method, the r / R value is lowered until the middle of the polishing, and the stable polishing is continued. Thereafter, the r / R value is increased once, and the high flatness polishing is performed in the latter half of the polishing process. Is.
[0009]
In the present invention, a method of gradually increasing the r / R value with the lapse of the polishing time can also be adopted. In this case, it may be increased stepwise a plurality of times as the polishing time elapses, or may be increased steplessly (continuously) as the polishing time elapses.
[0010]
In the present invention, it is preferable to set the r / R value to the maximum value before the remaining polishing allowance of the plate-like member reaches 1 μm. The reason is that if the r / R value is set to the maximum value after the remaining polishing allowance becomes 1 μm, the remaining polishing allowance may be lost before the high flatness polishing is completed. .
Further, in the present invention, it is desirable to automatically increase the r / R value by using a timer or a plate-like member thickness detecting means.
The polishing method of the present invention is extremely effective for lapping or mirror polishing a semiconductor wafer such as a silicon wafer.
Further, when the semiconductor wafer lapping or mirror polishing is performed by the plate member polishing method according to the present invention, wherein the ratio r / R at the initial stage of polishing is made smaller than the ratio r / R at the end of polishing. The following method, that is, the plate-like member is held by a carrier (plate-like member holding member) made of a planetary gear, the carrier is engaged with the sun gear and the internal gear, and the carrier is held by the upper surface plate and the lower surface plate. It is particularly preferable that the plate member is revolved while being rotated while being sandwiched, and the upper and lower surfaces of the plate member are simultaneously polished by the upper surface plate and the lower surface plate.
[0011]
When holding a plate-like member with a holding member, and setting this holding member in a polishing device to polish the plate-like member, the purpose is as follows:
(1) aligning the thickness of the plate-like member to the standard value;
(2) increasing the flatness of the plate-like member to a target level;
(3) equalizing the surface roughness of the plate member;
It is.
[0012]
In other words, the plate-like member before polishing is generally uneven in thickness, is not flat, and has a large surface roughness. If polishing is performed by holding a plurality of such plate-shaped members together with a holding member, the holding member vibrates at the initial stage of polishing, so that it is difficult to start polishing in a smooth state. Eventually, as the polishing progresses, each dimension of the plate-like member is adjusted, a uniform hit comes out, and the smoothness is transferred to the flatness of the plate-like member. Therefore, the polishing for improving the flatness may be performed in the latter half of the polishing process.
As described above, in the polishing method of the present invention, the dimensions of the plate-like member are adjusted in the first half of the polishing step, and the flatness of the plate-like member is raised to the target level in the second half.
[0013]
In general, since the holding member is premised on repeated use, the dimension in the direction of polishing, that is, the thickness of the holding member, is usually smaller than the thickness of the plate member after polishing. This is because the plate-like member is held relatively (relatively) by the holding metal fitting in the initial stage of polishing, and therefore, a very large load is applied to the movement of the polishing apparatus and the plate-like member in the initial stage of polishing. Means.
[0014]
In general, when wrapping a semiconductor wafer, a double-sided lapping machine shown in FIG. 1 is used.
In this lapping machine, the
In this double-sided lapping machine, movements in four directions are given to a plurality of semiconductor wafers set in the
[0015]
1 will be described in more detail. The power of the continuously
[0016]
Further, when the semiconductor wafer is lapped according to the present invention, the drive shafts of the
[0017]
【Example】
Next, examples of the present invention and comparative examples using the conventional method will be described.
Example 1
Lapping was performed on 34 silicon wafers having a diameter of 150 mm and a thickness of 0.7 mm using the lapping machine shown in FIG. In this case, the number of wafers held per holding member (carrier) was four, and five carriers were used. The polishing allowance was 0.1 mm.
The ratio (r / R) of the rotation speed and revolution speed of the holding member is set to 0.7 in the first half of the polishing process (from the start of polishing to the time when 1/2 of the polishing allowance is polished), and then The operation of the polishing apparatus was once stopped and the r / R value was increased to 3.8 all at once, and then the latter half of the polishing process was performed.
[0018]
Example 2
The same lapping was performed on the same 33 silicon wafers as in Example 1. The polishing allowance was also the same as in Example 1.
In the first half of the polishing process (from the start of polishing until the time when ½ of the polishing allowance is polished), the r / R value is set to 0.7, and then the operation of the polishing apparatus is temporarily stopped to set the r / R value to The latter half of the polishing process was carried out at a stretch to 6.1.
[0019]
Example 3
The same lapping was performed on the same 25 silicon wafers as in Example 1. The polishing allowance was also the same as in Example 1.
In the first half of the polishing process (from the start of polishing until the time when ½ of the polishing allowance is polished), the r / R value is set to 0.7, and then the operation of the polishing apparatus is temporarily stopped to set the r / R value to The latter half of the polishing process was carried out at a stretch to 9.3.
[0020]
Comparative Example 1
Lapping was performed on 35 silicon wafers identical to those in Example 1. The polishing allowance was also the same as in Example 1. The r / R value was maintained at a constant value of 0.7 throughout the polishing process.
[0021]
The results of Examples 1, 2, 3 and Comparative Example 1 are shown in FIGS. 2, 3, 4, and 5, respectively. These figures are histograms relating to the flatness of the polished wafer. In these figures, “flatness” is evaluated by TTV, and the numbers in the figures indicate the average value of each example as a relative value when the average value of Comparative Example 1 is 1.00. It is a thing. TTV is a difference between the maximum value and the minimum value of the wafer thickness when the entire area of the wafer is measured. In this case, the thickness was measured using a general-purpose thickness measuring instrument.
[0022]
As apparent from comparison of FIGS. 1 to 4, according to the polishing method of the present invention, a polishing wafer having remarkably excellent flatness can be obtained as compared with the case of the conventional polishing method. Moreover, in this invention, it turns out that the polishing wafer with higher flatness is obtained by setting r / R value in the latter half of a grinding | polishing process higher.
[0023]
【The invention's effect】
As is apparent from the above description, in the polishing method of the present invention, the rotation speed and revolution speed of the plate member holding member at the initial stage of polishing (or the first half of the polishing process) where the thickness of the plate member is not uniform. Ratio: By setting the r / R value to be low, the holding member can securely hold the plate-like member and perform stable polishing, so that the size of the plate-like member can be accurately adjusted. The holding member is not subjected to an excessive load.
Further, at the end of polishing (or the latter half of the polishing step), the flatness of the plate-like member can be improved to a high level target value by setting the r / R value to be considerably higher than that of the conventional method. . In this case, since the dimension of the plate-like member is adjusted in the initial stage of polishing, the problem that the plate-like member is detached from the holding member or the holding member is overloaded and the life is shortened is solved.
Therefore, according to the present invention, the semiconductor wafer can be stably lapped or mirror-polished to produce a wafer having a remarkably high flatness, and the life of the wafer holding member can be extended.
[Brief description of the drawings]
FIG. 1 is a cross-sectional view showing the structure of a lapping machine used in Examples 1 to 3 of the present invention.
FIG. 2 is a histogram showing the results of Example 1 of the present invention.
FIG. 3 is a histogram showing the results of Example 2 of the present invention.
FIG. 4 is a histogram showing the results of Example 3 of the present invention.
FIG. 5 is a histogram showing the results of Comparative Example 1;
[Explanation of symbols]
1
4
Claims (10)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10437296A JP3689824B2 (en) | 1996-03-28 | 1996-03-28 | Method for polishing plate-like member |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10437296A JP3689824B2 (en) | 1996-03-28 | 1996-03-28 | Method for polishing plate-like member |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH09262760A JPH09262760A (en) | 1997-10-07 |
| JP3689824B2 true JP3689824B2 (en) | 2005-08-31 |
Family
ID=14378970
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP10437296A Expired - Lifetime JP3689824B2 (en) | 1996-03-28 | 1996-03-28 | Method for polishing plate-like member |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3689824B2 (en) |
-
1996
- 1996-03-28 JP JP10437296A patent/JP3689824B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPH09262760A (en) | 1997-10-07 |
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