JP3698151B2 - Battery control device - Google Patents

Description

  The present invention relates to an assembled battery control device configured by connecting a plurality of cells in series.

  An apparatus that detects an abnormality such as an overcharge state or an overdischarge state of an assembled battery configured by connecting a plurality of cells in series is known (see Patent Document 1). When a battery protection IC for 3-4 cells is used to detect an overcharged state or an overdischarged state of a cell, a plurality of battery protection ICs are used if the number of cells constituting the assembled battery is large. Since the abnormality detection signals output from the plurality of battery protection ICs have different voltage levels, the voltage level is adjusted by the voltage level conversion circuit.

JP-A-11-332116 JP-A-11-136873 JP-A-8-294238

  However, since the power used for the voltage level conversion circuit is supplied from some cells constituting the assembled battery, when a current is supplied to the voltage level conversion circuit, the terminal voltage (capacity) varies between the cells. There was a problem that increased.

  An assembled battery control apparatus according to the present invention is an assembled battery control apparatus configured by connecting a plurality of cells in series, and includes a plurality of charge / discharge control circuits that control charge / discharge of a predetermined number of cells, A plurality of voltage level conversion circuits provided for each of the charge / discharge control circuits for converting the voltage levels of signals input to the corresponding charge / discharge control circuits, and control means for simultaneously controlling the plurality of voltage level conversion circuits. When the control means controls a plurality of voltage level conversion circuits simultaneously, power is supplied from the assembled battery to the plurality of voltage level conversion circuits.

  According to the battery pack control apparatus of the present invention, when the control means controls a plurality of voltage level conversion circuits simultaneously, power is supplied from the battery pack to the plurality of voltage level conversion circuits. Occasionally voltage variations between cells can be suppressed.

-First embodiment-
FIG. 1 is a diagram showing a configuration of a first embodiment of a control apparatus for an assembled battery according to the present invention. The assembled battery 1 is configured by connecting a plurality of cells s1 to s4 that can be charged and discharged in series. Abnormality detection circuits a1 to a4, bypass voltage detection circuits b1 to b4, OR circuits OR11 to OR41, N-type MOS transistors Q11 to Q41, first resistors R11 to R41, second resistors R12 to R42, third resistor R13 To R43, fourth resistors R14 to R44, fifth resistors R15 to R45, PNP bipolar transistors Q12 to Q42, and NPN bipolar transistors Q13 to Q43 are provided for each of the cells S1 to S4.

  The abnormality detection circuits a1 to a4 detect that the terminal voltages of the corresponding cells S1 to s4 have risen from the first predetermined voltage V1 to be overcharged, and have fallen from the second predetermined voltage V2 to be excessive. Detect that a discharge has occurred. When overcharge or overdischarge of the cells s1 to s4 is detected, the corresponding abnormality detection circuits a1 to a4 output H (high) level signals, and when neither overcharge nor overdischarge is detected, An L (low) level signal is output. Here, a state in which a current is flowing is a state in which an H level signal is being output, and a state in which a current is not flowing is a state in which an L level signal is being output.

The detection results of the abnormality detection circuits a1 to a4 are input to the OR circuit OR1. The OR circuit OR1 performs a logical OR operation on the abnormality detection results input from the abnormality detection circuits a1 to a4, and inputs the operation results to the charge / discharge control circuit 2 via the isolator c1.

  The charge / discharge control circuit 2 controls charging and discharging of the assembled battery 1 based on a signal of a logical operation result of the OR circuit OR1 input through the isolator c1. The charge / discharge control circuit 2 outputs a control signal for forcibly operating (turning on) a current bypass function described later.

  The bypass voltage detection circuits b1 to b4 detect that the terminal voltages of the corresponding s1 to s4 are higher than the third predetermined voltage V3 and are close to full charge, and flow to the corresponding cells s1 to s4. Bypass part of the current. That is, the N-type MOS transistors Q11 to Q41 connected in parallel to the corresponding s1 to s4 are turned on via the OR circuits OR11 to OR41. Since the N-type MOS transistors Q11 to Q41 are connected in series with the first resistors R11 to R41, when the N-type MOS transistors Q11 to Q41 are turned on, a part of the current flowing in the corresponding cells s1 to s4 Is bypassed to a current bypass circuit configured by series connection of N-type MOS transistors Q11 to Q41 and first resistors R11 to R41.

That is, since the DOD (depth of discharge) is different for each cell, the current bypass function of the current bypass circuit connected to the cell charged to near full charge is activated, and the charging current flowing through the cell is reduced. By continuing to charge other cells, capacity variation between cells can be suppressed.

  The OR circuits OR11 to OR41 are connected via a signal input from the bypass voltage detection circuits b1 to b4, and an inverter circuit constituted by a series connection of PNP type bipolar transistors Q12 to Q42 and second resistors R12 to R42. A logical sum with the input signal is calculated, and ON / OFF of the N-type MOS transistors Q11 to Q41 is controlled. That is, the collector terminals of the PNP-type bipolar transistors Q12 to Q42 are connected in series with the second resistors R12 to R42, and this connection portion is connected to one input terminal of the OR circuits OR11 to OR41.

In this case, when at least one of the two signals input to the OR circuits OR11 to OR41 is an H level signal, the OR circuits OR11 to OR41 output an H level signal. As a result, a positive voltage is applied to the gates of the N-type MOS transistors Q11 to Q41, so that the N-type MOS transistors Q11 to Q41 are turned on. On the other hand, when the two signals input to the OR circuits OR11 to OR41 are both L level signals, the L level signals are output from the OR circuits OR11 to OR41, so that the N-type MOS transistors Q11 to Q41 are turned off. .

  Here, when all the signals input to the OR circuits OR11 to OR41 through the inverter circuit constituted by the serial connection of the PNP bipolar transistors Q12 to Q42 and the second resistors R12 to R42 are at the H level. Regardless of the level of the signal output from the bypass voltage detection circuits b1 to b4, all the N-type MOS transistors Q11 to Q41 are turned on simultaneously. That is, the current bypass function of all cells can be activated.

  The operation of the PNP bipolar transistors Q12 to Q42 and the NPN bipolar transistors Q13 to Q43 will be described. The base terminals of the NPN bipolar transistors Q13 to Q43 are connected to a connection portion between the fourth resistors R14 to R44 and the fifth resistors R15 to R45 connected in series between the corresponding terminals s1 to s4. Yes. The collector terminal is connected to the base terminals of the PNP bipolar transistors Q12 to Q42, and is connected to the emitter terminal of the upper NPN bipolar transistor via the third resistors R13 to R43.

For example, the collector terminal of the NPN bipolar transistor Q13 is connected to the emitter terminal of the NPN bipolar transistor Q23 via the resistor R13. However, the collector terminal of the uppermost NPN-type bipolar transistor Q43 is connected to the positive terminal of the cell s4, that is, the positive terminal of the assembled battery 1 via the third resistor R43. The emitter terminal of the lowest NPN bipolar transistor Q13 is connected to the collector terminal of the NPN bipolar transistor Q1 via a resistor R1.

  The emitter terminal of the NPN bipolar transistor Q1 is connected to the negative terminal of the cell s1, that is, the negative terminal of the battery pack 1. The control signal output from the charge / discharge control circuit 2 is input to the base terminal via the isolator c2. The isolators c 1 and c 2 serve to electrically insulate the circuit connected to the assembled battery 1 and the charge / discharge control circuit 2.

  Here, a case where the control signal output from the charge / discharge control circuit 2 is at the L level will be considered. The L level signal output from the charge / discharge control circuit 2 is converted into an L level signal based on the negative terminal voltage of the cell s1 by the isolator c2, and input to the base terminal of the NPN bipolar transistor Q1. The At this time, since the base terminal and the emitter terminal of the NPN bipolar transistor Q1 are at the same potential, the NPN bipolar transistor Q1 is turned off. Therefore, no current flows between the collector terminal and the emitter terminal of the NPN bipolar transistor Q1.

As a result, the NPN bipolar transistors Q13 to Q43 connected in series with the NPN bipolar transistor Q1 are also turned off. In this case, since the voltage for turning on the PNP bipolar transistors Q12 to Q42 cannot be applied to the base terminals of the PNP bipolar transistors Q12 to Q42, the PNP bipolar transistors Q12 to Q42 are also turned off.

  Since the PNP bipolar transistors Q12 to Q42 are turned off, no current flows through the second resistors R12 to R42. Therefore, the voltages at the collector terminals of the PNP bipolar transistors Q12 to Q42 are applied to the corresponding cells s1 to s4. Each becomes equal to the negative voltage. Therefore, a voltage equal to the negative voltage of the corresponding cells s1 to s4, that is, an L level signal is input to the OR circuits OR11 to OR41, at one input terminal of the OR circuits OR11 to OR41.

  Next, consider the case where the control signal output from the charge / discharge control circuit 2 is at the H level. The H level signal output from the charge / discharge control circuit 2 is converted into an H level signal based on the negative terminal voltage of the cell s1 by the isolator c2 and input to the base terminal of the NPN bipolar transistor Q1. . As a result, the NPN bipolar transistor Q1 is turned on, and a current flows between the collector terminal and the emitter terminal. As a result, the NPN bipolar transistors Q13 to Q43 are also turned on, so that a current flows through the third resistors R13 to R43, and a voltage sufficient to turn on the PNP bipolar transistors Q12 to Q42 is applied to the base terminal. As a result, the PNP bipolar transistors Q12 to Q42 are also turned on.

  Since the current flows through the second resistors R12 to R42 when the PNP type bipolar transistors Q12 to Q42 are turned on, the voltage at the collector terminal of the PNP type bipolar transistors Q12 to Q42 is the positive voltage of the corresponding cells s1 to s4. Almost equal. Accordingly, a voltage substantially equal to the positive voltage of the corresponding cells s1 to s4, that is, an H level signal is input to the OR circuits OR11 to OR41, at one input terminal of the OR circuits OR11 to OR41.

  As a result, all the N-type MOS transistors Q11 to Q41 are simultaneously turned on, and the current bypass function of all the cells s1 to s4 is activated.

  Thus, according to the battery pack control apparatus in the first embodiment, the charge / discharge control circuit 2 outputs the control signal (H level) for operating the current bypass function, so that all currents The bypass function is activated. At this time, the voltage level input to the base terminals of the PNP bipolar transistors Q12 to Q42, that is, the voltage level of the signal input to the OR circuits OR11 to OR41 can be converted to a voltage level suitable for each of the cells s1 to s4. .

  FIG. 3 is a diagram illustrating a configuration of an assembled battery control device that does not include the NPN bipolar transistors Q13 to Q43 and the like included in the assembled battery control device according to the first embodiment. In FIG. 3, the same components as those constituting the battery pack control device shown in FIG.

  The diode D1 and the resistor R10, the diode D2 and the resistor R20, the diode D3 and the resistor R30, and the diode D4 and the resistor R40 each function as a voltage level conversion circuit. That is, the level of the voltage level of the control signal input to the base terminals of the PNP bipolar transistors Q12 to Q42 is adjusted. For example, when the signal output from the charge / discharge control circuit 2 is an H level signal, the NPN bipolar transistor Q1 is turned on, so that a current flows between the collector terminal and the emitter terminal. As a result, current flows through the resistors R10 to R40 via the diodes D1 to D4, and a voltage sufficient to turn on the PNP bipolar transistors Q12 to Q42 is applied to the base terminals of the PNP bipolar transistors Q12 to Q42.

  At this time, the current flowing through the diode D1 and the resistor R10 flows from the positive terminal of the cell s1 to the negative terminal of the cell s1, and the current flowing through the diode D2 and the resistor R20 from the positive terminal of the cell s2 to the negative terminal of the cell s1. And flow. The current flowing through the diode D3 and the resistor R30 flows from the positive terminal of the cell s3 to the negative terminal of the cell s1, and the current flowing through the diode D4 and the resistor R40 flows from the positive terminal of the cell s4 to the negative terminal of the cell s1. . That is, since the power sources of the respective voltage level conversion circuits are different, the currents flowing out from the cells s1 to s4 are different, and a voltage difference is generated between the cells s1 to s4.

  On the other hand, according to the battery pack control apparatus in the first embodiment, the above-described configuration does not cause a voltage difference between the cells s1 to s4. That is, the collector terminals or emitter terminals of the NPN bipolar transistors Q13 to Q43 constituting the voltage level conversion circuit for adjusting the voltage level of the control signal input to the base terminals of the PNP bipolar transistors Q12 to Q42 are connected to the third terminals. Via the resistors R13 to R43, the resistor R1, and the NPN bipolar transistor Q1, between the positive terminal of the cell s4 (the positive terminal of the assembled battery 1) and the negative terminal of the cell s1 (the negative terminal of the assembled battery 1) Connected in series. Further, the fourth resistors R14 to R44 and the fifth resistors R15 to R44 and the fifth resistors R15 to R45 are all set to have the same resistance value and the fifth resistors R15 to R45 are all set to the same resistance value. The current flowing through the series connection portion can be made equal between the cells s1 to s4.

  Thus, according to the assembled battery control device in the first embodiment, all the cells s1 to s4 constituting the assembled battery 1 are used as the power source of the voltage level conversion circuit. It is possible to prevent a voltage difference between the two.

  Note that by setting the resistance values of the resistor R1, the second resistors R12 to R42, the third resistors R13 to R43, the fourth resistors R14 to R44, and the fifth resistors R15 to R45 to a large value, the cell The current supplied from s1 to s4 can be reduced.

-Second Embodiment-
FIG. 2 is a diagram illustrating a configuration of the control device for the assembled battery according to the second embodiment. In FIG. 2, the same components as those in the battery pack control apparatus in the first embodiment shown in FIG. In the battery pack control apparatus according to the first embodiment, the NPN bipolar transistors Q13 to Q43 are used as the voltage level conversion circuit. However, in the battery pack control apparatus according to the second embodiment, the PNP bipolar transistor is used. Q15 to Q45 are used. The AND circuits AND11 to AND41, the NPN bipolar transistors Q14 to Q44, and the sixth resistors R16 to R46 are provided for the respective cells s1 to s4.

  The abnormality detection results by the abnormality detection circuits a1 to a4 are input to the charge / discharge control circuit 2a via the isolator c1 after the OR operation is performed by the OR circuit OR1. The charge / discharge control circuit 2a controls charging and discharging of the assembled battery 1 based on the signal of the OR operation result of the OR circuit OR1. In addition, the charge / discharge control circuit 2a outputs a control signal (L level) for forcibly deactivating (turning off) the current bypass function.

  The functions of the bypass voltage detection circuits b1 to b4 are the same as those of the bypass voltage detection circuits b1 to b4 in the first embodiment. However, the output signals of the bypass voltage detection circuits b1 to b4 are input to the corresponding AND circuits AND11 to AND41. A control signal is input to the other input terminals of the AND circuits AND11 to AND41 via an inverter circuit configured by serial connection of NPN bipolar transistors Q14 to Q44 and sixth resistors R16 to R46. .

When at least one of the two signals input to the AND circuits AND11 to AND41 is an L level signal, the output signals of the AND circuits AND11 to AND41 are at an L level. In this case, since the N-type MOS transistors Q11 to Q41 are turned off, the current bypass function is deactivated. On the other hand, when the two signals input to the AND circuits AND11 to AND41 are both H level signals, the H level signals are output, so that the N-type MOS transistors Q11 to Q41 are turned on and the current bypass function is activated.

  That is, if all the signals input to the AND circuits AND11 to AND41 are set to L level via an inverter circuit constituted by serial connection of NPN bipolar transistors Q14 to Q44 and sixth resistors R16 to R46, the bypass voltage Regardless of the level of the output signals of the detection circuits b1 to b4, all the N-type MOS transistors Q11 to Q41 can be turned off simultaneously. Thereby, the current bypass function of all the cells can be deactivated.

  Operations of the NPN bipolar transistors Q14 to Q44 and the PNP bipolar transistors Q15 to Q45 will be described. The PNP bipolar transistors Q15 to Q45, the seventh resistors R17 to R47, the eighth resistors R18 to R48, and the ninth resistors R19 to R49 are provided for each cell.

The base terminals of the PNP-type bipolar transistors Q15 to Q45 are connected to the connection portion between the eighth resistors R18 to R48 and the ninth resistors R19 to R49 connected in series between the terminals of the corresponding cells s1 to s4. ing. The collector terminal is connected to the base terminals of the NPN bipolar transistors Q14 to Q44, and is connected to the emitter terminal of the next lower PNP bipolar transistor via the seventh resistors R17 to R47. For example, the collector terminal of the PNP bipolar transistor Q25 is connected to the emitter terminal of the PNP bipolar transistor Q15 via the resistor R27. However, the collector terminal of the lowest PNP-type bipolar transistor Q15 is connected to the negative terminal of the cell s1, that is, the negative terminal of the assembled battery 1, via the seventh resistor R17. The emitter terminal of the uppermost PNP bipolar transistor Q45 is connected to the collector terminal of the PNP bipolar transistor Q2 via a resistor R2.

  The emitter terminal of the PNP-type bipolar transistor Q2 is connected to the positive terminal of the cell s1, that is, the positive terminal of the assembled battery 1. The control signal output from the charge / discharge control circuit 2a is input to the base terminal via the isolator c2.

  Here, a case where the control signal output from the charge / discharge control circuit 2a is at the H level will be considered. The H level signal output from the charge / discharge control circuit 2a is converted into an H level signal based on the positive terminal voltage of the cell s4 by the isolator c2, and input to the base terminal of the PNP bipolar transistor Q2. . At this time, since the base terminal and the emitter terminal of the PNP bipolar transistor Q2 are at the same potential, the PNP bipolar transistor Q2 is turned off. Accordingly, no current flows between the collector terminal and the emitter terminal of the PNP bipolar transistor Q2.

As a result, the PNP bipolar transistors Q15 to Q45 connected in series with the PNP bipolar transistor Q2 are also turned off, so that a voltage for turning on the NPN bipolar transistors Q14 to Q44 can be applied to the base terminal. NPN bipolar transistors Q14 to Q44 are also turned off.

  Since the NPN bipolar transistors Q14 to Q44 are turned off, no current flows through the sixth resistors R16 to R46. Therefore, the voltages at the collector terminals of the NPN bipolar transistors Q14 to Q44 are applied to the corresponding cells s1 to s4. Each becomes equal to the positive electrode voltage. Accordingly, a voltage equal to the positive voltage of the corresponding cells s1 to s4, that is, an H level signal is input to the AND circuits AND11 to AND41, at one input terminal of the AND circuits AND11 to AND41.

  Next, consider the case where the control signal output from the charge / discharge control circuit 2a is at the L level. The L level signal output from the charge / discharge control circuit 2a is converted into an L level signal based on the positive terminal voltage of the cell s4 by the isolator c2, and input to the base terminal of the PNP bipolar transistor Q2. . As a result, the PNP bipolar transistor Q2 is turned on, and a current flows between the collector terminal and the emitter terminal. As a result, the PNP bipolar transistors Q15 to Q45 are also turned on, so that the collector terminal voltages of the PNP bipolar transistors Q15 to Q45 rise. Accordingly, since a voltage sufficient to turn on the NPN bipolar transistors Q14 to Q44 is applied to the base terminals of the NPN bipolar transistors Q14 to Q44, the NPN bipolar transistors Q14 to Q44 are also turned on.

  Since the NPN bipolar transistors Q14 to Q44 are turned on, a current flows through the sixth resistors R16 to R46. Therefore, the voltages at the collector terminals of the NPN bipolar transistors Q14 to Q44 are the negative voltages of the corresponding cells s1 to s4. Almost equal. Accordingly, a voltage substantially equal to the negative voltage of the corresponding cells s1 to s4, that is, an L level signal is input to the AND circuits AND11 to AND41, at one input terminal of the AND circuits AND11 to AND41.

  Thereby, all the N-type MOS transistors Q11 to Q41 are simultaneously turned off, and the current bypass function of all the cells s1 to s4 can be deactivated.

  According to the battery pack control apparatus in the second embodiment, each cell is supplied even when a control signal (L level) for forcibly deactivating the current bypass function is output from the charge / discharge control circuit 2a. It can suppress that a voltage difference arises between s1-s4. That is, the collector terminals or emitter terminals of the PNP bipolar transistors Q15 to Q45 constituting the voltage level conversion circuit for adjusting the voltage level of the control signal input to the base terminals of the NPN bipolar transistors Q14 to Q44 are connected to the seventh terminal. Via the resistors R17 to R47, the resistor R2, and the PNP bipolar transistor Q2, between the positive terminal of the cell s4 (the positive terminal of the assembled battery 1) and the negative terminal of the cell s1 (the negative terminal of the assembled battery 1). Connected in series. Further, the eighth resistors R18 to R48 and the ninth resistors R19 to R49 are all set to the same resistance value and the ninth resistors R19 to R49 are set to the same resistance value. The current flowing through the series connection portion can be made equal between the cells s1 to s4.

  As described above, also in the battery pack control apparatus according to the second embodiment, since all the cells s1 to s4 constituting the battery pack 1 are used as the power source of the voltage level conversion circuit, between the cells s1 to s4. Can prevent voltage difference.

  It is to be noted that by setting the resistance values of the resistor R2, the sixth resistors R16 to R46, the seventh resistors R17 to R47, the eighth resistors R18 to R48, and the ninth resistors R19 to R49 to a large value, the cell The current supplied from s1 to s4 can be reduced.

-Third embodiment-
FIG. 4 is a diagram showing the configuration of the battery pack control device according to the third embodiment. In FIG. 4, the same components as those of the battery pack control apparatus in the first embodiment shown in FIG.

  In the battery pack control apparatus according to the third embodiment, a resistor R1a is added to the configuration of the battery pack control apparatus according to the first embodiment shown in FIG. Specifically, one end of the resistor R1a is connected to the connection point between the emitter terminal of the NPN bipolar transistor Q13 and the resistor R1, and the other end of the resistor R1a is connected to the negative terminal of the cell s1. That is, the resistor R1a is connected in parallel with a circuit in which the resistor R1 and the NPN bipolar transistor Q1 are connected in series.

  An operation when the control signal output from the charge / discharge control circuit 2 is at the L level will be described. In this case, the NPN bipolar transistor Q1 is turned off as in the battery pack control apparatus according to the first embodiment. In this case, since the resistor R1a is provided, the NPN bipolar transistor Q13 has a base voltage of the NPN bipolar transistor Q13, a base-emitter voltage of the NPN bipolar transistor Q13, and a resistance value of the resistor R1a. The determined current flows. As a result, current also flows through the other NPN-type bipolar transistors Q23 to Q43. The base voltage of the NPN bipolar transistor Q13 is determined by the voltage of the cell s1 and the resistance ratio of the resistors R14 and R15.

  At this time, by setting the resistance value of the resistor R1a to a large value, the value of the current flowing through the NPN bipolar transistors Q13 to Q43 is reduced. As a result, a voltage sufficient to turn on the transistors is not applied to the base terminals of the PNP bipolar transistors Q12 to Q42. In other words, the resistance value of the resistor R1a is determined so that the PNP bipolar transistors Q12 to Q42 are turned off when the control signal output from the charge / discharge control circuit 2 is at the L level.

  Next, the operation when the control signal output from the charge / discharge control circuit 2 is at the H level will be described. In this case, the NPN-type bipolar transistor Q1 is turned on as in the battery pack control apparatus according to the first embodiment. As a result, a current obtained by adding the current flowing through the resistor R1a and the current flowing through the NPN bipolar transistor Q1 and the resistor R1 flows through the NPN bipolar transistors Q13 to Q43.

  At this time, if the resistance value of the resistor R1 is set to a small value, the current flowing through the NPN bipolar transistors Q13 to Q43 increases, so that the voltage generated between the third resistors R13 to R43 also increases. Accordingly, a voltage sufficient to turn on the transistors is applied to the base terminals of the PNP bipolar transistors Q12 to Q42, and the PNP bipolar transistors Q12 to Q42 are turned on. As a result, since the output signals of all the OR circuits OR11 to OR41 become H level, all the N-type MOS transistors Q11 to Q41 are simultaneously turned on, and the current bypass function of all the cells s1 to s4 is activated.

  In order to achieve the above-described operation, the resistance value of the resistor R1 is determined so that the PNP bipolar transistors Q12 to Q42 are turned on when the control signal output from the charge / discharge control circuit 2 is at the H level. Keep it. However, the resistors R1, R1a, the second resistors R12-R42, the third resistors R13-R43, the fourth resistors R14-R44, the fifth, as in the battery pack control device in the first embodiment. By setting each resistance value of the resistors R15 to R45 to a large value within a settable range, the current supplied from the cells s1 to s4 can be reduced.

  As described above, in the battery pack control apparatus according to the third embodiment, even when an L level control signal is output from the charge / discharge control circuit 2, a current flows through the NPN bipolar transistors Q13 to Q43. Yes. That is, by turning on / off the NPN bipolar transistor Q1, the value of the current flowing through the NPN bipolar transistors Q13-Q43 is changed to control the on / off of the PNP bipolar transistors Q12-Q42. Control inactivity. This is because the current source is constituted by the charge / discharge control circuit 2, the NPN bipolar transistor Q1, and the resistors R1 and R1a, and the current value of the current source is changed when all the current bypass functions are activated. It can also be said.

  As described above, according to the control apparatus for the assembled battery in the third embodiment, the NPN bipolar transistors Q13 to Q43 constituting the voltage level conversion circuit are connected regardless of the state of the signal level output from the charge / discharge control circuit 2. Current can always flow. As a result, in addition to the effect of the battery pack control device according to the first embodiment, the voltage at the collector terminal or emitter terminal of the NPN bipolar transistors Q13 to Q43 is prevented from becoming indefinite, and a stable signal is generated. Can communicate.

  For example, in the battery pack control apparatus according to the first embodiment, when the emitter terminal of the NPN bipolar transistor Q13, that is, the collector terminal of the NPN bipolar transistor Q1 is in an indefinite state, noise is mixed in the circuit. In addition, the collector potential of the transistor Q1 may decrease. In this case, although the L-level signal is output from the charge / discharge control circuit 2, the transistor Q1 is turned on and the N-type MOS transistor Q11 is turned on, so that unintentional forced discharge may be performed. There is. However, according to the battery pack control apparatus of the third embodiment, the current is always passed through the voltage level conversion circuit, thereby avoiding the voltage level conversion circuit from being in an unstable state and unintentionally forcing. Discharge can be prevented.

-Fourth embodiment-
FIG. 5 is a diagram illustrating a configuration of a control apparatus for an assembled battery according to the fourth embodiment. In FIG. 5, the same components as those in the battery pack control device in the second embodiment shown in FIG.

  In the battery pack control apparatus according to the fourth embodiment, a resistor R2a is added to the configuration of the battery pack control apparatus according to the second embodiment shown in FIG. Specifically, one end of the resistor R2a is connected to the connection point between the emitter terminal of the PNP bipolar transistor Q45 and the resistor R2, and the other end of the resistor R2a is connected to the positive terminal of the uppermost cell s4. That is, the resistor R2a is connected in parallel with a circuit in which the resistor R2 and the PNP bipolar transistor Q2 are connected in series.

  First, the operation when the control signal output from the charge / discharge control circuit 2a is at the H level will be described. In this case, the PNP-type bipolar transistor Q2 is turned off as in the battery pack control device in the second embodiment. In this case, since the resistor R2a is provided, the PNP bipolar transistor Q45 has a base voltage of the PNP bipolar transistor Q45, a base-emitter voltage of the PNP bipolar transistor Q45, and a resistance value of the resistor R2a. The determined current flows. As a result, current also flows through the other PNP-type bipolar transistors Q15 to Q35. The base voltage of the PNP bipolar transistor Q45 is determined by the voltage of the cell s4 and the resistance ratio of the resistors R48 and R49.

  At this time, by setting the resistance value of the resistor R2a to a large value, the current value flowing through the PNP bipolar transistors Q15 to Q45 becomes small. Therefore, a voltage sufficient to turn on the transistors is not applied to the base terminals of the NPN bipolar transistors Q14 to Q44. In other words, the resistance value of the resistor R2a is determined so that the NPN bipolar transistors Q14 to Q44 are turned off when the control signal output from the charge / discharge control circuit 2a is at the H level.

  Next, the operation when the control signal output from the charge / discharge control circuit 2a is at the L level will be described. In this case, the PNP-type bipolar transistor Q2 is turned on as in the battery pack control apparatus according to the second embodiment. As a result, a current obtained by adding the current flowing through the resistor R2a and the current flowing through the PNP bipolar transistor Q2 and the resistor R2 flows through the PNP bipolar transistors Q15 to Q45.

  At this time, if the resistance value of the resistor R2 is set to a small value, the current flowing through the PNP bipolar transistors Q15 to Q45 increases, so that the voltage generated between the seventh resistors R17 to R47 also increases. Therefore, a voltage sufficient to turn on the transistors is applied to the base terminals of the NPN bipolar transistors Q14 to Q44, and the NPN bipolar transistors Q14 to Q44 are turned on. As a result, since the output signals of all the AND circuits AND11 to AND41 are at the L level, all the N-type MOS transistors Q11 to Q41 are simultaneously turned off, and the current bypass functions of all the cells s1 to s4 are deactivated.

  In order to achieve the above-described operation, the resistance value of the resistor R2 is determined so that the NPN bipolar transistors Q14 to Q44 are turned on when the control signal output from the charge / discharge control circuit 2a is at the L level. Keep it. However, in the same manner as in the battery pack control apparatus of the second embodiment, the resistors R2 and R2a, the sixth resistors R16 to R46, the seventh resistors R17 to R47, the eighth resistors R18 to R48, and the ninth resistor By setting each resistance value of the resistors R19 to R49 to a large value within a settable range, the current supplied from the cells s1 to s4 can be reduced.

  Thus, in the battery pack control apparatus according to the fourth embodiment, even when an H level control signal is output from the charge / discharge control circuit 2a, a current flows through the PNP bipolar transistors Q15 to Q45. Yes. That is, by turning on / off the PNP bipolar transistor Q2, the value of the current flowing through the PNP bipolar transistors Q15 to Q45 is changed to control the on / off of the NPN bipolar transistors Q14 to Q44, and the current bypass function is activated / Control inactivity. This is because the current source is constituted by the charge / discharge control circuit 2a, the PNP-type bipolar transistor Q2, and the resistors R2 and R2a, and when all the current bypass functions are deactivated, the current value of the current source is changed. It can be said that it is.

  According to the battery pack control apparatus of the fourth embodiment, the PNP-type bipolar transistors Q15 to Q45 constituting the voltage level conversion circuit are always supplied with current regardless of the signal level output from the charge / discharge control circuit 2a. Shed. As a result, in addition to the effect of the battery pack control device according to the second embodiment, the voltage at the collector terminal or emitter terminal of the PNP bipolar transistors Q15 to Q45 is prevented from becoming indefinite, and a stable signal is generated. Can communicate. That is, similarly to the battery pack control apparatus according to the third embodiment, it is possible to prevent the voltage level conversion circuit from being in an unstable state and prevent unintentional forced discharge.

  The present invention is not limited to the embodiments described above. For example, the voltage level conversion circuit uses an NPN bipolar transistor in the first and third embodiments, and uses a PNP bipolar transistor in the second and fourth embodiments. A type MOS transistor can also be used.

  The correspondence between the constituent elements of the claims and the constituent elements of the first embodiment is as follows. That is, N-type MOS transistors Q11 to Q41 and resistors R11 to R41 are charge / discharge control circuits, and NPN bipolar transistors Q13 to Q43, resistors R13 to R43, resistors R14 to R44, and resistors R15 to R45 are voltage level conversion circuits. The NPN bipolar transistor Q1 and the charge / discharge control circuit 2 constitute control means. In addition, in correspondence with the constituent elements of the second embodiment, PNP type bipolar transistors Q15 to Q45, resistors R17 to R47, resistors R18 to R48, and resistors R19 to R49 constitute a PNP type. The bipolar transistor Q2 and the charge / discharge control circuit 2a constitute control means.

  Further, in correspondence with the components of the third embodiment, the resistors R1, R1a, the NPN bipolar transistor Q1 and the charge / discharge control circuit 2 constitute the control means, and the components of the fourth embodiment In this correspondence relationship, the resistors R2 and R2a, the PNP bipolar transistor Q2 and the charge / discharge control circuit 2a constitute the control means. In addition, as long as the characteristic function of this invention is not impaired, each component is not limited to the said structure.

The figure which shows the structure of 1st Embodiment of the control apparatus of the assembled battery by this invention. The figure which shows the structure of 2nd Embodiment of the control apparatus of the assembled battery by this invention. The figure which shows the structure of the control apparatus of the assembled battery which is not equipped with NPN type bipolar transistors Q13-Q43 etc. which the assembled battery control apparatus in 1st Embodiment is equipped. The figure which shows the structure of 3rd Embodiment of the control apparatus of the assembled battery by this invention. The figure which shows the structure of 4th Embodiment of the control apparatus of the assembled battery by this invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 ... Battery assembly, 2, 2a ... Charge / discharge control circuit, c1, c2 ... Isolator, s1-s4 ... Cell, a1-a4 ... Abnormality detection circuit, b1-b4 ... Bypass voltage detection circuit, OR11-OR41, OR1 ... OR Circuit, AND11 to AND41 ... AND circuit, Q11 to Q41 ... N-type MOS transistor, R1, R1a, R2, R2a, R11 to R41, R12 to R42, R13 to R43, R14 to R44, R15 to R45, R16 to R46, R17 to R47, R18 to R48, R19 to R49, R10 to R40 ... resistor, Q2, Q12 to Q42, Q15 to Q45 ... PNP type bipolar transistor, Q1, Q13 to Q43, Q14 to Q44 ... NPN type bipolar transistor, D1 to D4 ... Diode

Claims (13)

In a control apparatus for an assembled battery configured by connecting a plurality of cells in series,
A plurality of charge / discharge control circuits for controlling charge / discharge of a predetermined number of cells;
A plurality of voltage level conversion circuits which are provided for each of the plurality of charge / discharge control circuits and convert voltage levels of signals input to the corresponding charge / discharge control circuits;
Control means for simultaneously controlling the plurality of voltage level conversion circuits,
Each of the voltage level conversion circuits is connected in series with an adjacent voltage level conversion circuit, and the uppermost voltage level conversion circuit is connected to the positive terminal of the uppermost cell among the cells constituting the assembled battery. The lowest voltage level conversion circuit is connected to the negative electrode terminal of the lowest cell among the cells constituting the assembled battery,
When the control means controls the plurality of voltage level conversion circuits at the same time, electric power is supplied from the assembled battery to the plurality of voltage level conversion circuits. In the control apparatus of the assembled battery of Claim 1,
Each of the voltage level conversion circuits includes at least a transistor having three terminals, and a first terminal of the transistor is connected to an input terminal of the charge / discharge control circuit as an output terminal of the voltage level conversion circuit, and a second The terminal is connected to a first terminal of a transistor included in the adjacent voltage level conversion circuit via a first resistor, and the third terminal is connected to the outermost of the predetermined number of cells corresponding to the charge / discharge control circuit. A voltage obtained by dividing the voltage between the positive terminal of the upper cell and the negative terminal of the lowermost cell is applied,
The control device for an assembled battery, wherein the control means turns on all the transistors when simultaneously controlling the plurality of voltage level conversion circuits. The control apparatus for an assembled battery according to claim 1 or 2,
The control means is a semiconductor switch provided between the plurality of voltage level conversion circuits connected in series and the assembled battery, and short-circuits both ends when simultaneously controlling the plurality of voltage level conversion circuits. Thus, the battery pack control device supplies power from the battery pack to the plurality of voltage level conversion circuits. In the control apparatus of the assembled battery in any one of Claims 1-3,
A first terminal of a transistor included in the uppermost voltage level conversion circuit is connected to a positive electrode terminal of the uppermost cell among the cells constituting the assembled battery via a second resistor,
The second terminal of the transistor included in the lowest voltage level conversion circuit is connected to the negative terminal of the lowest cell among the cells constituting the assembled battery via the first resistor and the control means. A battery pack control device. In the control apparatus of the assembled battery of Claim 1,
Each of the voltage level conversion circuits includes at least a transistor having three terminals, and a first terminal of the transistor is connected to an input terminal of the charge / discharge control circuit as an output terminal of the voltage level conversion circuit, The terminal is connected to a first terminal of a transistor included in the adjacent voltage level conversion circuit via a first resistor, and the third terminal is connected to the outermost of the predetermined number of cells corresponding to the charge / discharge control circuit. A voltage obtained by dividing the voltage between the positive terminal of the upper cell and the negative terminal of the lowermost cell is applied,
When the plurality of voltage level conversion circuits are controlled at the same time, the control means changes the value of the current flowing through all the transistors. In the control apparatus of the assembled battery of Claim 1 or 5,
The control means is a current source provided between the plurality of voltage level conversion circuits connected in series and the assembled battery. When controlling the plurality of voltage level conversion circuits simultaneously, the current of the current source An assembled battery control device, wherein power is supplied from the assembled battery to the plurality of voltage level conversion circuits by changing a value. In the control apparatus of the assembled battery in any one of Claim 5 or 6,
A first terminal of a transistor included in the uppermost voltage level conversion circuit is connected to a positive electrode terminal of the uppermost cell among the cells constituting the assembled battery via a second resistor,
The assembled battery, wherein a second terminal of a transistor included in the lowest voltage level conversion circuit is connected to the negative electrode terminal of the lowest cell among the cells constituting the assembled battery via the control means. Control device. In the control apparatus of the assembled battery of Claim 4 or 7,
The assembled battery control device, wherein the transistor is an NPN bipolar transistor, the first terminal is a collector terminal, the second terminal is an emitter terminal, and the third terminal is a base terminal. In the control apparatus of the assembled battery of Claim 4 or 7,
The assembled battery control device, wherein the transistor is an N-type MOS transistor, the first terminal is a drain terminal, the second terminal is a source terminal, and the third terminal is a gate terminal. In the control apparatus of the assembled battery in any one of Claims 1-3,
A first terminal of a transistor included in the lowest voltage level conversion circuit is connected to a negative electrode terminal of the lowest cell among the cells constituting the assembled battery via a second resistor,
The second terminal of the transistor included in the highest voltage level conversion circuit is connected to the positive terminal of the highest cell among the cells constituting the assembled battery via the first resistor and the control means. A battery pack control device. In the control apparatus of the assembled battery in any one of Claim 5 or 6,
A first terminal of a transistor included in the lowest voltage level conversion circuit is connected to a negative electrode terminal of the lowest cell among the cells constituting the assembled battery via a second resistor,
The assembled battery, wherein a second terminal of a transistor included in the highest voltage level conversion circuit is connected to the positive terminal of the highest cell among the cells constituting the assembled battery via the control means. Control device. The control apparatus for an assembled battery according to claim 10 or 11,
The assembled battery control device, wherein the transistor is a PNP bipolar transistor, the first terminal is a collector terminal, the second terminal is an emitter terminal, and the third terminal is a base terminal. The control apparatus for an assembled battery according to claim 10 or 11,
The assembled battery control device, wherein the transistor is a P-type MOS transistor, the first terminal is a drain terminal, the second terminal is a source terminal, and the third terminal is a gate terminal.

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