JP3709050B2 - Data update system - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a data update system in which a plurality of processor modules access and process data on a shared memory.
[0002]
In recent years, a plurality of processor modules (PM) are combined to access a shared memory for distributed processing. At this time, depending on the business (for example, the schedule management business of many employees), it is necessary to update data at each PM at high speed.
[0003]
[Prior art]
Conventionally, in a system composed of a plurality of PMs, a shared memory is provided in order to guarantee the identity of data, and each PM accesses the shared memory to update data and perform business processing.
[0004]
[Problems to be solved by the invention]
As described above, when multiple PMs perform business processing, the business processing is performed by storing data in the shared memory or referring to the data in the shared memory in order to guarantee the sameness of data among the PMs. I was going. For this reason, the access speed of the shared memory is generally slow, and if multiple PMs access the shared memory at the same time, one of them is kept waiting, and access is performed while guaranteeing the identity of the data at high speed. There was a problem that it could not be executed.
[0005]
In the present invention, in order to solve this problem, in a system in which a plurality of PMs perform processing, the data of the shared memory is copied to the main memory of each PM, and one of the plurality of PMs is being updated. Even if the PM goes down, it is necessary to cope without giving a large load to each PM.
[0006]
[Means for Solving the Problems]
Means for solving the problem will be described with reference to FIG.
In FIG. 1, PM1 is a processor module, which reads a program from a storage medium, loads it on the main memory 2, activates it, and performs various business processes. Here, the PM1 is composed of the main memory 2, the CPU 3, and the like. It is what is done.
[0007]
The main memory 2 stores data and programs.
The CPU 3 performs various business processes in accordance with a program. Here, the current PM 1 includes a shared memory management process 4 and a main memory management process 5, and the standby PM 1 includes a standby process 31 and a shared memory management process 4. And main memory management process 5.
[0008]
The standby process 31 is a process possessed by the standby PM 1 and performs various processes necessary for standby.
The shared memory management process 4 is for updating the shared memory 6.
[0009]
The main memory management process 5 updates the main memory 2 with reference to the shared memory.
The shared memory 6 is a memory for guaranteeing data identity among the plurality of PMs 1.
[0010]
Next, the operation will be described.
After the PM 1 updates and copies the contents of the shared memory 6 to the main memory 2, it notifies the other PM 1 of the update of the shared memory 6, and the main memory management process 5 of the other PM 1 that has received the update notification stores the shared memory 6. By referring to the data, the data is copied to the main memory 3 to ensure the identity of the data.
[0011]
At this time, after the current PM 1 updates and copies the data in the shared memory 6 to the main memory 3, the update notification is sent to all other current and standby PMs 1.
[0012]
In addition, the standby PM periodically monitors the occurrence of a failure in any of the active PMs 1, and when the failure occurs, the contents of the shared memory 6 are copied to the main memory 2 so that the current work is taken over based on the ID. The PM is instructed to rewrite each main memory.
[0013]
DETAILED DESCRIPTION OF THE INVENTION
Next, embodiments and operations of the present invention will be described in detail sequentially with reference to FIGS.
[0014]
FIG. 1 shows a system configuration diagram of the present invention.
In FIG. 1, PM 1 is a processor module connected to the bus 7, and here is composed of a main memory 2 and a CPU 3.
[0015]
The main memory 2 is a memory for storing and reading data and programs. Here, the same data as the data in the shared memory 6 is stored and referred to at high speed for quick business processing. belongs to.
[0016]
The CPU 3 performs various business processes in accordance with a program on the main memory 2 loaded from a storage medium. Here, the current PM 1 includes a shared memory management process 4 and a main memory management process 5, and is a standby PM 1. Consists of a standby process 31, a shared memory management process 4, and a main memory management process 5.
[0017]
The standby process 31 is a process in which the standby PM 1 performs various processes necessary for standby.
The shared memory management process 4 updates the data in the shared memory 6 in response to a data update request from the terminal 8 or the like, or is shared by the main memory management process 5 when the data in the shared memory 6 is updated. For example, it notifies the fact that the data in the memory 6 has been updated.
[0018]
When the main memory management process 5 receives a notification from the shared memory management process 4 or another main memory management process 5 that the shared memory 6 has been updated, the main memory management process 5 stores the data read by referring to the shared memory 6 into the main memory. 2 to ensure the sameness between the data in the shared memory 6 and the data in the main memory 2. In addition, the main memory management process 5 stores the data read with reference to the shared memory 6 in the main memory 2, and then indicates that the data in the shared memory 6 has been updated in the main memory management process 5 of the other PM1. Notice.
[0019]
The shared memory 6 is a memory shared by a plurality of PMs 1 and is used for guaranteeing data identity among the plurality of PMs 1.
The bus 7 is a bus for a plurality of PMs 1 to access the shared memory 6 with each other.
[0020]
The terminal 8 requests the current PM 1 to update the data in the shared memory 6.
Next, the operation of the configuration of FIG. 1 will be described in detail with reference to FIG.
[0021]
FIG. 2 is a diagram for explaining the operation of the present invention. Here, PM (# 1) and PM (# 2) are active, and PM (# 3) is standby.
In FIG. 2, in S1, the shared memory management process 4 of the current PM 1 receives the definition information update. This receives an update of definition information in the shared memory 6 from the terminal 8 of FIG.
[0022]
In S2, the shared memory is updated based on the update information. This is because the shared memory management process 4 updates the shared memory 6 (for example, updates the schedule) based on the update information (definition information) received in S1.
[0023]
In S3, a shared memory update notification is sent. In this update, the shared memory management process 5 that updated the shared memory 6 in S2 updates the shared memory 6 to the main memory management process 5 and prompts the update of the data in the main memory 2 to guarantee the identity of the data. Make a notification.
[0024]
In S11, the main memory management process 5 receives this update notification in response to the update notification in S3.
In S <b> 12, the main memory management process 5 updates the main memory 2 based on the contents of the shared memory 6. As a result, the data in the main memory 2 is the same as the data in the shared memory 6 and the identity of the data is guaranteed.
[0025]
S13 notifies shared memory update notification to all other active and standby PM1s. Then, the main memory 2 is updated based on the contents of the shared memory 6 in the same manner as S11 through S12 described above in S31 through S12 in the active PM (# 2) 1 and in the standby PM (# 3) 1 in S31 through S32. , Guarantee the identity of the data.
[0026]
As described above, when there is a request for updating the data in the shared memory 6 from the terminal 8, the shared memory management process 4 of the current PM 1 updates the contents of the shared memory 6 and then updates the main memory management process 5 After the main memory management process 5 refers to the shared memory 6 to update the main memory 2, the main memory management process 5 notifies the other main PM1 and the standby PM1 main memory management process 4 of the update, and similarly the PM1 The main memory management process 4 updates the main memory 2 with reference to the shared memory 6, and the data in the main memory 2 of the plurality of PMs 1 is guaranteed to be identical to the data in the shared memory 6. It becomes possible to execute business processing at high speed by referring to the data in the storage 2 respectively.
[0027]
FIG. 3 shows a flowchart of the present invention when a failure occurs. This shows an operation when a failure occurs in any one of the plurality of working or standby PMs 1 in FIG. Here, the standby PM 1 has processing means for periodically checking whether a failure has occurred in the working PM 1.
[0028]
In FIG. 3, S41 acquires the ID of the failure PM. This is because a failure has occurred in one of the current or standby PMs 1 in FIG. 1, and the ID used by the failure PM 1 is acquired.
[0029]
In S42, the faulty PM is registered as a standby in the shared memory 6. This is based on the ID acquired in S41, and the earliest standby PM1 registers the PM in which a failure has occurred in the shared memory 6 as the standby PM (the current PM or the standby PM is the standby PM).
[0030]
In S43, the contents of the shared memory are copied to the main memory. This is because the earliest standby PM 1 copies the contents of the shared memory 6 to its own main memory 2.
In S44, it is determined whether the faulty PM is currently used. In the case of YES, since the faulty PM1 is found to be active, in S45, all other PMs (other active and standby PMs) are notified of the update of the shared memory 6, and the process proceeds to S46. On the other hand, in the case of NO in S44, it is determined that the PM1 in which the failure has occurred is the standby PM1, and therefore the process proceeds to S46.
[0031]
S46 takes over the business based on the ID. This takes over the current business or standby business based on the ID of the PM 1 in which the failure has occurred.
In S47, the operation is resumed.
[0032]
As described above, when a failure occurs in the working or standby PM1, the standby PM1 immediately acquires the ID of the failed PM1, registers the failed PM1 in the standby PM1, and then stores the contents of the shared memory 6 in the main memory. 2, if the failed PM1 is the current PM1, the update of the shared memory 6 is notified to all other PM1s, and the operation is resumed. On the other hand, the failed PM1 is the standby PM1. When it is time to resume work. As a result, even if a failure occurs in any PM1, the contents of the shared memory 6 accessed by a plurality of PM1 and the contents of the main memory 2 in each PM1 are guaranteed, and then the main memory 2 is stored. It is possible to execute business processing at high speed by referring to it.
[0033]
In FIG. 3, S51 restarts the failure PM. This restarts the PM in which an OS (operating system) (not shown) has failed.
In S52, the standby is recognized based on the information in the shared memory. This is because the standby PM1 taken over in S42 described above registers the failure PM1 ID in the shared memory 6 as standby, and the OS recognizes the failure PM1 as standby based on this information.
[0034]
S53 starts a standby process. This starts the standby process 31 in the standby PM (# 3) 1 of FIG.
In S54, the contents of the shared memory are copied to the main memory. As a result, the identity between the contents of the shared memory 6 and the contents of the main memory 2 of the faulty PM 1 is guaranteed.
[0035]
In S55, it is determined whether it is currently used. Here, the determination is NO and the process is on standby, so the process waits at S57.
As described above, the troubled PM1 is registered as the standby PM1 in the shared memory 6 in the above-described S42, and in S51 to S57, the OS finds the registered troubled standby PM1 and restarts it. The standby PM 1 can copy the contents of the shared memory 6 to the main memory 2 to guarantee the identity and then resume the business as the standby PM 1 (normally waiting for the failure of the current PM 1). Become.
[0036]
【The invention's effect】
As described above, according to the present invention, in a system in which a plurality of processor modules (PM) perform processing, a configuration having a copy of the data in the shared memory 6 in the main memory of each processor module is employed, and periodically. Since each processor module does not check whether the shared memory has changed, the load on each processor module can be reduced.
[Brief description of the drawings]
FIG. 1 is a system configuration diagram of the present invention.
FIG. 2 is an operation explanatory diagram of the present invention.
FIG. 3 is a flowchart when a failure occurs according to the present invention.
[Explanation of symbols]
1: PM (processor module)
2: Main memory 3: CPU
31: Standby process 4: Shared memory management process 5: Main memory management process 6: Shared memory 7: Bus 8: Terminal

Claims (3)

In a data update system in which a plurality of processor modules access and process data on a shared memory,
The data updating system includes a plurality of processor modules, said plurality of processor modules is constituted by a shared memory for storing data to be used,
Each of the above processor modules
Main memory for storing data;
Main memory management that receives an update notification that prompts updating of the data in the main memory, stores the data in the main memory with reference to the shared memory , and notifies other processor modules of an instruction to update the data in the main memory A data updating system comprising means. The processor module further includes shared memory management means for updating the shared memory based on the updated definition information and notifying the update to the main memory management means,
The data update system according to claim 1 , wherein the main memory management means receives the update notification from the shared memory management means or main memory management means of another processor module . The processor module further includes:
  When the ID of the failed processor module is registered in the shared memory as standby, and the contents of the shared memory are copied to the main memory, and then it is determined whether the failed processor module is active or standby. Is a standby processing means for notifying the other processor module of the update, taking over the business of the processor module in which the failure has occurred, and only taking over the business without determining the update notification when it is determined as standby.
The data update system according to claim 1 or 2, characterized by comprising:

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