JP3722816B2 - Image processing device - Google Patents

Description

  The present invention relates to an image processing apparatus having a digital image processing function, for example, an image processing apparatus applied to a digital copying machine, a facsimile apparatus, a printer, and the like, and more particularly to an image processing apparatus capable of arbitrarily setting an image path.

  In a conventional digital image processing apparatus, one image processing function is generally realized by a single image path. That is, the order of image processing is predetermined, and processing is performed according to this order.

On the other hand, Patent Document 1 discloses an image processing apparatus configured to perform image processing by switching the order of filter processing and scaling processing. As for the order of the filter processing and the scaling processing, when scaling after processing by the filter, the efficiency (matrix size) of the filter can be used effectively when enlarging, but in the case of reduction, a large matrix is used. The size filter cannot be used effectively. Further, when processing with a filter after scaling processing, the efficiency of the filter can be effectively used in the case of reduction, but a filter having a large matrix size cannot be effectively used in the case of enlargement. Therefore, the technique described in Patent Document 1 includes a control unit that switches the order of processing by the filter processing unit and processing by the scaling processing unit according to the magnification.
Japanese Patent Laid-Open No. 5-207272

  As described above, in the above-described conventional example, the filter process is configured to be able to replace the scaling process according to the magnification. However, the image processing apparatus includes each processing unit for image processing. Examples of the image processing unit include a scanner unit, a shading unit, a filter unit, a scaling unit, a γ conversion unit, a gradation processing unit, an editing unit, a storage unit, an external interface unit, a printing unit, and a plotting unit. There is an optimal processing order according to the processing content. In general, this processing order is fixed, and the order of the filtering process and the scaling process is partially exchanged as described above. However, the processing order of the processing unit and the number of processes can be arbitrarily set. There wasn't.

  Further, as long as the processing order is fixed, no consideration has been given to the parallel processing of each unit, specifically, for example, the parallel processing of the storage unit and the external interface independently.

  The present invention has been made in view of the actual situation of the prior art, and its purpose is to perform access to a storage unit and input / output control to an external interface unit independently of various image processing functions. It is an object of the present invention to provide an image processing apparatus that can easily interface with the image processing apparatus and can effectively use the resources of each image processing apparatus.

In order to achieve the object, the first means includes an input unit in an image processing apparatus that performs individual image processing set in the processing unit by a plurality of processing units that perform predetermined processing on the digital image signal. And a first video bus that integrates various internal processing blocks including an internal image processing unit that performs various types of image processing on an image signal input from the input unit, and an external device connected to the first video bus. A second control unit that is controlled independently of the first video bus and that can integrate external processing blocks including a storage unit, an external interface unit, and an output unit, and can arbitrarily select an image path between the external processing blocks. characterized in that it comprises a video bus.

  The second means selects the external processing block of the second video bus in the first means based on the image path selecting means for selecting the image path and the select signal input to the image path selecting means. The signal is selected by an image signal, various control signals, and a signal selection means for selecting a system clock in the path selection means.

  According to a third means, in the first means, at least two external units are connected to the external interface unit, and the external unit is controlled in input / output by the unit selection means.

  According to the present invention, it is possible to arbitrarily select an image path to the external storage unit, the external interface unit, and the output unit, thereby effectively utilizing the reading and writing resources of the image processing apparatus.

  Further, according to the present invention, it is possible to select image data, a control signal, and a clock necessary for an interface with another image processing apparatus as a group, thereby facilitating parallel operation with another image processing apparatus. It can be done.

  Furthermore, according to the present invention, the external unit for input and the external unit for output can be connected independently, and data transfer between the two external units is controlled independently of the processing function inside the image processing apparatus. can do.

  Embodiments of the present invention will be described below with reference to the drawings.

[First embodiment]
First, the digital copying machine according to the first embodiment comprises an image processing unit 1, a scanner unit 2, a plot unit 3, a selector control unit 4 and a main control unit 5, as shown in FIG. The unit 1 includes a shading unit 6, a filter unit 7, a scaling unit 8, a γ conversion unit 9, a gradation processing unit 10, an editing unit 11, a storage unit 12, an external interface unit 13, and a printing unit 14. Predetermined processing is executed for each copy.

<Shading part>
The shading (correction) unit 6 is a white reference with a uniform density in order to prevent the output from varying even though an original with a uniform density is read due to uneven illumination, uneven sensitivity of each pixel of the CCD, and the like. Is read before document scanning, and this data is stored in the memory for each pixel, and the output value is corrected for each pixel based on the stored data during document scanning. <filter>
The filter (processing) unit 7 shown in FIG. 2 performs enhancement correction, smoothing correction, and region separation, and the input image data to the filter unit 7 is 8 bits as shown in FIG. This image data enters both the filter block 15 and the region separation block 16. The filter block 15 is subjected to enhancement correction and smoothing correction by the enhancement correction unit 17 and the smoothing correction unit 18, respectively. That is, the enhancement correction unit 17 uses a filter that emphasizes the target pixel, and the smoothing correction unit 18 uses a filter having flat characteristics. In the region separation block 16, the region requiring enhancement and the region requiring smoothing are separated from the image data, and the result is output to the pixel selection unit 19. The pixel selection unit 19 selects a filter for each pixel according to the information input from the region separation block 16 and outputs image data.

  Here, FIG. 3 shows the processing contents in the filter unit 7. First, the image data CKD [7: 0] from the shading unit 1 shown in FIG. 1 is corrected by the scanner γ to become image data CKG [7: 0], and this image data CKG [7: 0] is further moved in the sub-scanning direction. Image data F1 and F2 and F2D to F6D are generated with a delay of 1 to 6 lines and input to the filter unit 7 shown in FIG.

  When the signals F2D to F6D obtained by delaying the image data CKG [7: 0] by 2 to 6 lines in the sub-scanning direction and 55 pixels in the main scanning direction are input to the 5 × 5 matrix data generation unit 70, 5 × 5 Matrix data is generated and output to the filter block 71. Note that the 5 × 5 matrix data is actually 3 × 5 as shown in FIG. 4 in consideration of the filter coefficients being symmetrical.

  As shown in FIG. 5, the flare correction amount calculation unit 711 in the filter block 71 integrates pixel levels having values less than the value T in the region of 5 × 5 pixels, averages the pixel levels, and calculates the value. Is defined as the flare correction amount RDG [7: 0] at the target pixel G. The MTF correction unit 712 divides the filter coefficient into an MTF correction term and an original term, and the MGC [1 for the MTF correction term as shown in FIG. : 0], and the multiplication result and the original term are added (= MDG [7: 0]). This MTF correction filter coefficient is configured, for example, as shown in FIG.

The flare removing unit 713
EDG [7: 0] = MDG [7: 0] -RDG [7: 0]
In the character mode, flare removal is performed by subtracting the flare correction amount RDG from the MTF correction value MDG, and in the pencil mode, as shown in FIG.
EDG [7: 0] = MDG [7: 0]
As shown in Fig. 4, flare removal is not performed.

  The smoothing processing unit 714 performs smoothing processing using a filter having weak enhancement as shown in FIG. 8 and a flat characteristic in a specific frequency region, for example. The smoothing processing result SDG and the output EDG of the flare removal unit 713 are selected by the pixel selection unit 72 and output as a filtered signal SKD [7: 0].

  The 3 × 3 Laplacian processing unit 73 performs scanner γ-corrected image data CKG [7: 0] and data F1 [7: 0], F2 obtained by delaying the CKG [7: 0] by 1 and 2 lines in the sub-scanning direction. With [7: 0] as an input, signed 11-bit data is output by a Laplacian filter of coefficients as shown in FIG.

  The edge separation block 74 binarizes the absolute value of the signed output of the 3 × 3 Laplacian processing unit 73, extracts edge candidates, and then performs edge pixel ED by 2 × 2 expansion processing as shown in FIG. Is determined and output to the region determination unit 75. Note that the result determined by expansion is not used as expansion data for the next edge separation, and the target pixel in the expansion processing is at the lower right in FIG. In the binarization process, a value equal to or greater than the threshold value TFE [7: 0] is set as an edge candidate.

  Prior to binarization, the white background separation block 76 first adds the output of the Laplacian processing unit 73 to the original data to perform MTF correction. The outline of the white background separation algorithm will be described below.

  First, the MTF correction unit 761 performs MTF correction of original data. In this case, the intensity magnification of the correction term is made variable, the Laplacian output is multiplied by SLAP [2: 0], and then added to the original data. The binarization unit 762 detects a pixel whose correction output is on the white side (smaller than TFW) from the threshold value TFW [7: 0] as a white pixel. The white background candidate detection unit 763 performs 5 × 5 pattern matching as shown in FIG. 11 and detects a pattern in which all 2 × 5 or 5 × 2 regions are white pixels. As shown in FIG. 12, the block forming unit 764 and the dilating unit 765 perform blocking in units of 4 × 1 pixels, and when one or more white pixels exist in the block, the target block is set as a white background block, Expand one block at a time up and down in the scanning direction. In the block correction unit 766, as shown in FIG. 13, with respect to a 21 × 1 block (one block is 4 × 1 pixels), when at least one or more white blocks are present, a central block of interest is determined as a white block. (= MD). As shown in FIG. 14, the region determination unit 75 separates the character region and the design region based on the edge separation result ED and the white background separation result. The pixel selection unit 72 selects the MTF correction signal EDG or the smoothing processing signal SDG from the filter block 71 based on the pencil mode, the automatic mode, the photographic mode, and the determination signal RMS of the region determination unit 75 as shown in FIG. .

<Variable part>
The scaling unit 8 performs main scanning scaling of 25% to 512% (in increments of 1%) by interpolation using a cubic function convolution method. The enlargement / reduction is selected by the signal kakdi, and the actual scaling operation is controlled by the scaling control data written in the 512 × 4 bit internal RAM. In addition to the zooming operation, the image can be shifted in the main scanning direction.

  FIG. 16 is a block diagram of the zoom unit 8. The scaling unit 8 includes four flip-flops (FF) 42a, 42b, 42c, and 42d, three selectors (SEL) 43a, 43b, and 43c, and an interpolation calculation unit 44. The input image data is 8 bits, and the output image data is 8 bits. BOUT <7: 0> output from the Q terminal of the FF2 (42b) is output data to the FIFO, BIN <7: 0> input to the D terminal of the FF3 (42c) is input data from the FIFO, and SMPL < 2: 0> represents re-sampling position data from the internal RAM. FF1 (42a) and FF4 (42d) have an en terminal, and FF2 (42b) and FF3 (42c) are ordinary 8-bit flip-flops.

  SEL1 to SEL3 (43a, 43b, 43c) are 8-bit selectors. The interpolation calculation unit 44 represents an interpolation calculation circuit for 8-bit multi-value data. As shown in FIG. 17, BOUT and BIN have two 5k × 8-bit built-in line memories 42 and 43 arranged in parallel, and toggle operation is performed for each line. As shown in FIG. 18, ren and wen are H / L controlled by the scaling control data in the RAM 45 a inside the scaling control block 45.

  Next, the operation will be described for each case of equal magnification, reduction, and enlargement.

  As shown in FIG. 19, at the same magnification, kakdi = L, and the input image data is taken in by FF1 (42a), passes through the interpolation calculation unit 44, and is written from BOUT to the FIFO. This data is read out on the next line and output as output image data from BIN through FF3 and FF4. At this time, wen and ren are at L as shown in the following figure, so that the speed conversion is not performed and the unit is operated at the same magnification.

  As shown in FIG. 20, since kakdi = L at the time of reduction, the input image data is taken in by FF1 (42a), sent to the interpolation calculation unit 44, and interpolation calculation is performed by a cubic function convolution method. The sampling position for performing the interpolation is obtained by reading the scaling control data written in advance in the RAM 45a. The interpolated data is thinned out by the control of wen in FF2 (42b) and written from the BOUT <7: 0> to the FIFO. The written data is read from BIN <7: 0> at a constant speed of REN = L, and is output as output image data through FF3 (42c) and FF4 (42d).

  As shown in FIG. 21, since kakdi = H at the time of enlargement, the input image data is taken in by FF1 (42a), and since wen = L, it passes through FF2 (42b) at a constant speed and is written from the BOUT <7: 0> to the FIFO. Then, data is read from BIN <7: 0> on the next line. At this time, reading is controlled by controlling the ren signal, and speed conversion is performed. BOUT <7: 0> is sent to the interpolation calculation unit 44 where interpolation calculation is performed by a cubic function convolution method. Sampling position data for performing interpolation is obtained by reading the RAM 45a. The enlargement process is performed by changing the sampling position and interpolating a plurality of times with respect to the data whose reading has been stopped. The interpolated data is output through FF4 (42d).

<Γ conversion part>
The gamma conversion unit 9 determines what density characteristic copy output is to be obtained with respect to the original density, corresponding to the density key (1 to 7) on the operation panel, and functions the data to realize it. Convert. The γ conversion unit 9 has a function of matching the input characteristics of the image scanner and the output characteristics of the printer unit, and a function of changing the image density according to the density key.

  In this case, with respect to the character document, since portions other than the characters are white, it is important to emphasize the character portions uniformly. For photographic manuscripts, it is important to reproduce the photos in a rich gradation. Therefore, considering the characteristics of the characters and the photographs, the density of the original and the copy has a relationship as shown by a curve shown in FIG. FIG. 23 is a block diagram of the γ converter 9. The γ conversion unit 9 is divided into four modes, ie, a character mode, a photo mode, a character / photo mode, and a pencil mode, corresponding to the type of document, and each corresponding to the notch setting value (1 to 7). Original / copy data is created and stored in ROM. When copying, depending on the mode and notch setting values, data is downloaded in advance to addresses 0 to 255 of the internal RAM (288 bytes) 50 through the multiplexer 49, and the input image is used as the address of the RAM 50 during normal operation. The data output for is taken out as data after γ conversion.

<Gradation processing section>
The configuration of the gradation processing unit 10 is as shown in the block diagram of FIG. That is, the gradation processing unit 10 includes a multi-level processing unit 20, an error diffusion processing unit 21, a multi-level dither processing unit 22, and a binarization processing unit 23, and the selector 24 selects these processes. The multi-value processing unit 20 does not process the image data itself, and determines the phase of the processing target pixel according to the size relationship of neighboring pixels. In that case, the density levels of the left adjacent pixel and the right adjacent pixel are compared, and if the level is the same, the phase of the target pixel is set as the center phase, and if there is a level difference, the phase is shifted to the black side.

  The error diffusion process performed in the error diffusion process 21 is a process aimed at removing moire, and distributes the quantization error to surrounding pixels to minimize the error as a whole. The quantization level in this embodiment is such that the signal once quantized to 8 bits (256 values) is requantized to 9 values or 2 values by the error diffusion unit, and the quantization error at that time is as shown in FIG. Distribute with a distribution ratio.

  The process performed by the multi-value dither processing unit 22 is a process for expressing a halftone, and is a method of expressing a halftone level by an area ratio of black pixels in a plurality of pixels as a unit. In this case, when there are a plurality of gradation levels of a printer of one pixel, combining them, the gradation expression unit can be reduced, and many gradation expressions can be achieved while maintaining the resolution. That is, if the number of gradations of the printer for one pixel is 16, the 256 gradations can be expressed with 4 × 4 pixels. In the multi-level dither processing, the requantization method changes depending on the position within 4 × 4, but the phase also depends on the position.

  The binarization processing unit 23 is provided because binarization processing is necessary because an image signal may be handled as binary / 1 pixel by FAX or the like.

  The selector unit 24 is designated on the operation panel among the 8-bit image signal and the 2-bit phase signal output from the multilevel processing unit 20, the error diffusion processing unit 21, the multilevel dither processing unit 22, and the binarization processing unit 23. The output is selected in accordance with the image mode such as the text mode, sentence / copy mode, photo mode, or FAX transmission mode.

  This is for example as follows.

Character mode-Multi-value processing Text / Copy mode-Error diffusion processing Photo mode-Multi-value dither processing FAX mode-Bi-level processing <Editor>
The editing unit 11 performs the following operation. That is, as shown in FIG. 26, the input image signal to the editing unit 11 is 10 bits, of which 8 bits can represent 256 gradations by gradation data. The remaining 2 bits are phase data.

  In the editing unit 11, first, the mirroring processing unit 25 converts the image into a mirror image. As an actual operation, when writing and reading an image signal for each line in the line memory, by controlling the write address and read address to the line memory, the order of the addresses in which the image data is written in the line memory is reversed. This is realized by reading in the order. Since this operation is well-known in publications such as “Image Data Conversion Method and Apparatus” of Japanese Patent Laid-Open No. 5-268458, detailed description thereof will be omitted.

Since the mirroring operation is performed not only on the gradation data but also on the phase data, the capacity of the line memory is as follows:
(Number of pixels in one line) x (10 bits)
Things are needed.

  However, regarding the phase data, it is necessary to convert not only the mirroring but also the phase itself. Since the left and right sides of the image are reversed by mirroring, the left phase is changed to the right phase, and the right phase is changed to the left phase. Medium phase does not need to be converted. FIG. 27 shows an execution example of this mirroring process. The document image shown in FIG. 27A is mirrored as shown in FIG.

  The selection of the mirroring process is performed by the switch 26 for signal selection, and a mirroring image performed by the mirroring processing unit 25 according to an instruction from the control unit and an image that is not mirrored without passing through this part are selected. Output to the subsequent stage. Selection by the switch 26 is performed by a mirroring ON / OFF signal. That is, when the “mirroring ON / OFF signal” is ON, the switch selects the mirroring image by falling toward the position P1, and when it is OFF, the switch selects the non-mirroring image by falling toward the position P2.

  An italic processing unit 27 is provided in the subsequent stage of the switch 26 so that the image can be italicized (deformed). As an actual operation, when an image signal is written to and read from the line memory for each line, by controlling the write address and the read address to the line memory, an address different from the address at which the image data is written to the line memory is controlled. Realized by reading. Since this operation is known in Japanese Laid-Open Patent Publication No. 63-199568, such as “Image Processing Apparatus”, a detailed description thereof will be omitted.

Since the italic operation is performed not only for gradation data but also for phase data, the capacity of the line memory is as follows:
(Number of pixels in one line) x (10 bits)
Things are needed. Depending on the memory used, two may be required as in the embodiments in the above-mentioned known materials. FIG. 28 shows an execution example of italic processing, in which the document image shown in (a) is italicized as shown in (b). This italicization angle is set by an italic angle signal from the control unit, and the italic processing unit 27 executes an italic operation based on this italic angle signal.

<Storage unit>
The storage unit 12 includes a large-capacity page memory and stores functions such as an electronic sorter, retention (multiple copies per scan), and image rotation by storing image data in the memory. The image compression method, the internal configuration of the storage unit, and main application functions will be described below.

  The storage unit 12 performs image compression. As the image compression method, a GBTC fixed length coding method is used. In the GBTC fixed length coding method, as shown in FIG. 29, an image is decomposed for each block, and a 1-byte density value Lij in the block is averaged with an algorithm shown in FIG. The amount of data is compressed to Ld (1 byte) and code φij (2 bits × 16) for each pixel. With this encoding method, as shown in FIG. 31, the data amount of 16 bytes of a 4 × 4 pixel block of 1 byte of pixels can be compressed to 3/8 data amount by 6 bytes. In addition to the image data, there is phase information (2 bits), which is sent to the memory 48 without being compressed, as shown in FIG.

If you show this clearly,
1 byte x 16 = 16 bytes (before encoding)
→ φij (2 bits x 16) + La (1 byte) + Ld (1 byte)
= 6 bytes (after encoding)
It becomes.

  The internal configuration of the storage unit 12 is as shown in the block diagram of FIG. The image data processed by each processing unit is input to the memory 48. This image data is 8 bits before gradation processing and 10 bits after gradation processing. The image data is stored for 4 lines in the 4-line FIFO memory (28). The storage unit 12 compresses image data by the compression unit 29 in order to realize the function with a small amount of memory. The compression method is performed by the above-mentioned GBTC fixed length encoding method. The compressed data is held in the memory 48, and an address is given from the address control unit 31 by an instruction from the control unit 30, and editing such as rotation is performed. After editing, the compressed data is decoded by the decompression unit 32 and output as 8-bit image data.

  The image data after gradation processing is 8 bits + 2 bits of phase information, but the 2 bits of the phase information are stored in the 2-bit 4-line FIFO memory 33 in the same manner as the image data, and pass through the compression unit 29 and the expansion unit 32. The data is directly input / output to / from the memory 48.

  The storage unit 12 has functions of retention, image rotation, INTO 1 function, image repeat, binarized simple sorting, and image composition. Here, retention refers to a function of storing images in the memory 48 in one scan and outputting a plurality of images without scanning the original by repeatedly reading the images. The image rotation is to rotate and output an image, and the rotation angle is selected from 0 °, 90 °, 180 °, and 270 °. The INTO 1 function is a function that scans a plurality of originals, reduces them at a predetermined reduction ratio, and outputs them together as one copy. Image repeat is a function of reading a designated area of image data stored in the memory 48 a plurality of times and outputting it to a single copy. The binarized simple sort is a method in which multi-value image data read by the scanner unit 2 is converted into binary data, and up to 8 images are stored as they are without compression, and then the images are sorted and stacked. Finally, image composition refers to a function of combining and outputting image data stored in the memory 48 and data newly read from the scanner unit 2.

<External interface>
The external interface unit 13 is an interface with the outside of the digital copying machine according to this embodiment, and functions as an interface of the FAX transmission / reception unit 34 as shown in FIG. 33, for example. The FAX transmission / reception unit 34 converts the image data into a communication format and transmits it to the external line, and returns the data from the outside to the image data and sends it to the main body for recording and output. Also in this case, the image data is 8 bits and the phase data of the recording output is 2 bits. The overall structure is as shown in FIG. The FAX transmission / reception unit 34 includes a FAX image processing unit 35, an image memory 36, a memory control unit 37, a facsimile control unit 38, an image compression / decompression unit 39, a modem 40, and a network control device 41, and includes shading correction, γ correction, and MTF correction. The data subjected to the correction processing such as the above is subjected to image compression by the image processing unit 35 by the most efficient method, and image data corresponding to the compressed image information is stored in the image memory 36. The image memory 36 has a storage capacity capable of storing image information of a standard original document in a compressed state on the order of several tens (for example, about 20 to 60), and the memory control unit 38 writes the information. The read operation is controlled. The image data read from the image memory 36 can be restored to the original image signal by the image processing unit 35.

  The facsimile control unit 38 executes a transmission control procedure for facsimile transmission, and controls the image compression / decompression unit 39, the modem 40, and the network control device 41 to execute transmission / reception of image information. The facsimile control unit 38 exchanges control information with the memory control unit 37.

  The image compression / decompression unit 39 compresses an image to be transmitted by a code compression method at the time of facsimile transmission, and decompresses the received image to the original image signal, and executes compression / decompression processing by a plurality of code compression methods. it can.

  The modem 40 modulates digital data into a waveform that can be transmitted via an analog line, demodulates a received signal, and demodulates the original digital data, and can execute modulation / demodulation processing of a plurality of modulation methods. . For example, it is composed of units for realizing the modulation / demodulation processing of each of the G1, G2, and G3 facsimile modes.

  The network control device 41 is for connecting the facsimile apparatus to a transmission line (in this case, a public telephone line network) and has an automatic outgoing / incoming function.

  In the fax transmission / reception unit 34 configured in this way, when transmission of image information is started, the facsimile control unit 38 instructs the memory control unit 37 to sequentially read out the stored image information from the image memory 36. Let The read image information is restored to the original image signal by the FAX image processing unit 35, density conversion processing and scaling processing are performed, and added to the facsimile control unit 38. The image signal applied to the facsimile control unit 38 is code-compressed by the image compression / decompression unit 39, modulated by the modem 40, and then sent to the destination via the network control device 41. Then, the image information for which transmission has been completed is deleted from the image memory 36.

  At the time of reception, the received image is temporarily stored in the image memory 36. If the received image can be recorded and output at that time, the received image is recorded and output when reception of one image is completed. Further, when a call is started during the copying operation and reception is started, the received image is accumulated in the image memory 36 until the usage rate of the image memory 36 reaches a predetermined value, for example, 80%, and the usage rate of the image memory 36 is 80%. When% is reached, the copying operation being executed at that time is forcibly interrupted, and the received image is read from the image memory 36 and recorded and output. At this time, the received image read from the image memory 36 is deleted from the image memory 36, and the copying operation that was interrupted when the usage rate of the image memory 36 has decreased to a predetermined value, for example, 10%, is resumed. When all of the above are completed, the remaining received images are recorded and output. In addition, various parameters for the copying operation at the time of interruption, such as recording paper size, number of copies, number of copies, density, etc., are internally saved so that the copying operation can be resumed after interruption. Various parameters are restored internally.

<Print section>
FIG. 34 is a block diagram showing the configuration of the printing unit (character combining unit) 14. The input image data input to the printing unit 14 is 8 bits, and the 2-bit phase data is not a target and passes as it is. As a result, the phase “center” is added as phase data to the synthesized character image.

  The sub scanning address counter C1 counts the number of lines (main scanning effective period signal Lsync) during which the sub scanning effective period signal (Fgate) is asserted, and outputs an upper address and a lower address in the sub scanning direction. C2 counts the number of pixels (pixel clock) during the assertion period of the main scanning effective period signal Lsync, and outputs an upper address and a lower address in the main scanning direction.

  The memory control unit C3 controls the operation of the text RAM (C4), and the text RAM (C4) has an area corresponding to the position on the document on a one-to-one basis. The character generator ROM (C5) stores a bitmap image of characters at each address in ASCII code order in advance.

  For example, when combining the character of page number (-1-) as shown in FIG. 35 (b) with the original image as shown in FIG. 35 (a), the CPU in advance via the memory control unit C3. For the text RAM (C4), character codes to be synthesized with the document image data, for example, “2Dh”, “31h”, “2Dh” (“h” represents a hexadecimal number, and each code is “−”, “ 1 "and"-"indicated by the ASCII code) are stored at addresses corresponding to the synthesis positions as shown in FIGS. Further, the space code “20h” is stored in another address.

  When the copying operation starts in this state, the memory control unit C3 controls to read out the character code data corresponding to the position of the original image from the text RAM (C4) according to the upper addresses of the main / sub scanning address counters C1 and C2. . The bitmap image is read from the character generator ROM (C5) with the character code data read from the text RAM (C4) as the upper address and the lower addresses of the main / sub scanning address counters C1 and C2 as the lower addresses. And is synthesized with the original image by the synthesis unit C6.

  For example, as shown in FIG. 37, the synthesis unit C6 can be configured by an 8-bit OR gate 51. By using an exclusive OR instead of the OR gate 51, a high-density original image and a character image are superimposed. In the case of combining them, they can be combined so as to be identifiable on the recording paper.

<Plot part>
The plot unit 3 prints an image on paper based on the input 8-bit image data and 2-bit phase data.

<Operation unit>
The operation unit arbitrarily sets the processing order and the number of processes of each processing unit described above according to the user's designation, and inputs the setting data to the MAIN control unit, thereby controlling the SELECTOR control unit.

[Overall configuration and operation]
The overall configuration and operation of the present invention in which each part is configured as described above will be described in detail below. In the overall configuration shown in FIG. 1, each processing unit has an in-selector (IN SELECTOR) 46a and an out-selector (OUT SELECTOR) 46b capable of inputting and outputting 10-bit image signals of 8 bits of image data and 2 bits of phase information. As shown in FIG. 38, both selectors 46a and 46b are connected to image buses (IMAGE BUS) 47 prepared for the number of processing units, and image signals are transferred to all buses. It is possible.
The 10 bits of the image signal read from the scanner unit 2 enters the shading unit 6 and is corrected by the white reference, and then enters 10 image buses 47. The image signal passes through the image bus 47 in the order of (1) to (10) and is sent to the processing units 6 to 14, and finally enters the plot unit 3 and is printed.

  All in-selectors 46a and out-selectors 46b are moved under the control of the selector control unit 4, respectively. The selector control unit 4 receives the processing order information set by the main control unit 5 and causes the in-selector 46a and the out-selector 46b of each processing unit to select the image bus 47 used for input / output. A selector control signal 48 is sent.

  Upon receiving the selector control signal 48, the in-selector 46a selects one bus from (1) to (10) of the image bus 47 and receives an image signal from that bus. In other words, the order of the image signal received by each processing unit is determined by the control of the selector control unit 4. The image signal input to each processing unit is processed and then output to one of (1) to (10) of the image bus 47 selected by the out selector 46b and is passed to the next processing unit.

  For example, when the processing in the editing unit 11 is performed third, a control signal is sent from the selector control unit 4 to the selector of the editing unit 11 to select (3) of the image bus 47 for input and (4) for output. It is possible to control the order of processing sent. By performing such an operation, the order of the processing units in the image processing unit 1 can be freely changed, and many processing effects can be realized by rearranging the processing.

In this embodiment, if the connected processing units include the scanner unit 2 and the plot unit 3, there are 11 processing units, so there are 10 image buses 47, but there may be 11 (10 bits → 1). Book). That is, in the present invention,
It is essential that (number of connection processing units −1) ≦ number of image buses. When the same processing unit is specified twice, the number of bus use times may exceed the number of image buses, so the storage unit is automatically set in the order before the processing unit selected twice, After that, it will be executed. The same applies when the same processing unit is specified three times or more.

  The operation unit will be described with reference to FIGS. 39 (a) and 39 (b). The operation unit 200 includes a start key 201, a numeric keypad 202, a mode key 203, and an instruction display unit (LCT or the like) 204. When the mode key 203 is off, the image signal is transferred in the order of the scanner unit 2, the shading unit 6, the filter unit 7, the scaling unit 8, the γ conversion unit 9, the gradation processing unit 10, and the plot unit 3. (Initial setting). When the mode key 203 is turned on, the scanner unit 204a, shading unit 204b, filter unit 204c, scaling unit 204d, γ conversion unit 204e, gradation processing unit 204f, editing unit 204g, storage unit 204h, external interface unit 204i, printing unit 204j and the plot unit 204k are displayed on the instruction display unit 204. When the user touches the displayed processing unit, a number is displayed beside the display of the processing unit as shown in FIG. This number means the order in which the user touches the processing unit. When a certain processing unit is touched twice or more, numbers corresponding to the number of times the processing unit is touched are displayed on the side of the processing unit as shown in FIG. When all the settings are completed, by turning on the start key 201, the processing order and the processing count set by the user are set as the processing order and the processing count of the processing unit, and the processing operation is started.

  In addition, in this configuration, the operation and configuration of an image processing apparatus that can perform processing multiple times in each processing unit by using the memory in the storage unit 12 will be described.

  As described with reference to FIG. 32, the storage unit 12 has the memory 48 that compresses the image signal of the original image and stores the data for one original image, so that all the image signals are temporarily stored in the memory 48. Is done. Therefore, the ten image buses 47 are temporarily empty. Therefore, the image signal output from the storage unit 12 can be arbitrarily selected from the output destination image buses 47 (1) to (10). That is, an image signal output from a certain processing unit can be returned to the same processing unit through the storage unit 12 and processed again.

  This operation will be described with reference to FIGS. 40, 41 and 42. FIG. First, as shown in FIG. 40, the image signal processed by the editing unit 11 is input to the storage unit 12 and temporarily stored in the memory 48 of the storage unit 12. As shown in FIG. 41, the image signal is temporarily stored in the memory 48 of the storage unit 12, and the image signal is empty on the image bus 47 while processing such as rotation is performed. The image signal output from the storage unit 12 is input to the editing unit 11 again as shown in FIG. 42, edited by the editing unit 11, and passed to the next processing unit.

  As described above, if the processing order of the processing units is changed according to the intended image processing using the memory 48 of the storage unit 12, various processing effects can be obtained. This is shown below.

(1) Image path: Scaling unit → Storage unit → Scaling unit After the scaling unit 4 performs scaling processing in the main scanning direction, the storage unit 12 performs 90-degree rotation processing on the image and performs scaling for the second time. By performing the above, two-dimensional scaling can be performed. Up to now, the scaling unit 4 can perform scaling only in the main scanning direction, and the scaling in the sub-scanning direction depends on the reading speed of the scanner. However, once the contents processed in the previous step, that is, the scaled image signal are stored in the memory 48 of the storage unit 12 in this way, scaling in the sub-scanning direction is also possible.

(2) Image path: printing unit → storage unit → printing unit After the processing in the printing unit 14 is performed, the image rotated in the storage unit 12 is printed again to perform printing in different directions at different locations. It becomes possible to print.

(3) Image path: Filter unit → Storage unit → Filter unit The image subjected to the filter processing in the filter unit 7 is rotated in the storage unit 12 and returned to the filter unit 7 again to perform the filter processing, so that a maximum of 4 can be obtained with one filter. It can have filter characteristics of kinds (0 °, 90 °, 180 °, 270 °).

(4) Image path: Scaling unit → Storage unit → Scaling unit By performing scaling twice, it is possible to increase the limit of scaling ratio. For example, if the scaling unit 8 performs 400% scaling, stores this in the storage unit 12, and returns to the scaling unit 3 to perform 400% scaling, scaling (400%) × scaling Super variable magnification such as (400%) = 1600% can be realized.

(5) Image path: Editing unit → Storage unit → Editing unit The editing unit 11 can edit italics, mirrors, and movements. This makes it possible to perform various editing operations that exceed the set processing.

(6) Image path: editing part (italic) → gradation processing part → storage part → editing part (italic)
By performing this operation, the screen angle can be changed. That is, in the multi-value dither processing in the gradation processing unit 10, each pixel is quantized as compared with an N × N threshold matrix. The threshold matrix can concentrate the arrangement of dots in a direction at an angle with respect to the main scanning direction. This angle is called the screen angle. Changing the screen angle improves resolution and gradation, so it is effective to use different types depending on the type of original image.

  The processing in the upper order is shown in FIG. In this process, first, the editing unit 11 inclines it by α with respect to the main scanning direction. Then, dither processing is performed on the italicized image, and a certain screen angle β is given to the sub-scanning direction. The image is made italic again by inclining by −α with respect to the main scanning direction, and the image is returned to the original state. As a result, the screen angle changes to δ with respect to the sub-scanning direction. In other words, it is possible to create different screen angles by changing the angle of the italics. If the screen angle can be changed, an effect of having a plurality of screen angles with one threshold value matrix is produced.

(7) Image path: Editing part (italic) → Scaling part → Storage part → Scaling part → Editing part (italic)
By performing this operation, the image can be rotated at an arbitrary angle. The procedure will be described below.

When an arbitrary angle is rotated by θ with respect to an image (x, y) separated by x pixels in the main scanning direction and y pixels in the sub-scanning direction from the reference of the processing target image,
(A) x ′ = x cos θ + ysin θ, y ′ = y
And That is, in the main scanning direction, the italic process of the editing unit 11 shifts by y sin θ, and the scaling unit 8 performs scaling by x cos θ times.

(B) x ″ = − y ′, y ″ = x ′
And That is, the storage unit 12 rotates 90 degrees.

(C) x ″ = x ″ 2 sin θ + y ″, y ″ = y ″
The same processing as (a) is performed.

  By performing the processes (a), (b), and (c), the image can be arbitrarily rotated.

(8) Image path: shading unit → filter unit → magnification processing unit → γ conversion unit → editing unit → printing unit → storage unit → gradation processing unit → external interface unit → plotting unit 8-bit image data from the shading unit 6 First, γ conversion is performed by the γ conversion unit 9. The data after the γ conversion is edited by the editing unit 11. Next, necessary characters are generated by the printing unit 14. The image data is compressed and temporarily stored in the storage unit 12 and then input to the gradation processing unit 10. Then, 2-bit phase data is added to 8-bit image data by the gradation processing unit 10 and output to the outside via the external interface unit 13 or output from the plot unit 3.

  When image formation is performed in this way, the image data after editing processing and character composition processing is temporarily stored in the storage unit and then subjected to gradation processing, so that the image data and phase data after memory compression are not corrupted. Does not occur.

(9) Image path: shading part → filter part → magnification processing part → γ conversion part → storage part → gradation processing part → editing part → printing part → external interface part → plot part 8-bit image data from the shading part 6 First, γ conversion is performed by the γ conversion unit 9. The data after the γ conversion is compressed by the storage unit 12 and temporarily stored, and then the gradation processing unit 10 adds the 2-bit phase data to the 8-bit image data. Next, editing processing is performed by the editing unit 11. Further, necessary characters are generated by the printing unit 14 and output to the external interface 13 unit or the plot unit 3.

  When the image is formed in this way, the data after γ conversion is temporarily stored in the storage unit and then subjected to gradation processing, so that the image data and the phase data after compression of the memory are not corrupted.

(10) Image path: shading unit → filter unit → magnification processing unit → γ conversion unit → editing unit → printing unit → storage unit → external interface unit → gradation processing unit → plotting unit 8-bit image data from an external device is The gradation processing unit 10 processes the image data and the phase data through the external interface unit 13 in the same manner as the image data from the shading unit 6, and then outputs from the plot unit 3.

  When processing is performed in this manner, the image data from the external device is output via the gradation processing unit using the external interface, so that the gradation processing function of the external device can be accessed. .

(11) Image path: Shading unit → external interface unit → filter unit → magnification processing unit → γ conversion unit → editing unit → printing unit → storage unit → gradation processing unit → plotting unit 8-bit image data from an external device is In the same manner as the image data from the shading unit 6, the filter unit 7, the scaling processing unit 10, the γ conversion unit 9, the editing unit 11, the printing unit, the storage unit 12, and the gradation processing unit 10 through the external interface unit 13. Is output from the plot unit 3 via.

  When processing is performed in this manner, the image data from the external device is converted into the filter unit 7, the scaling unit 8, the γ conversion unit 9, the editing unit 11, the printing unit 14, the storage unit 12, the gradation using the external interface. Since the data is output via the processing unit 10, it is possible to access the filter unit 7, scaling unit 8, γ conversion unit 9, editing unit 11, printing unit 14, storage unit 12, and gradation processing unit 10 of the external device. It becomes.

(12) Image path: shading unit → filter unit → magnification processing unit → γ conversion unit → tone processing unit → printing unit → editing unit → storage unit → external interface unit → plotting unit 8-bit image data from the shading unit 6 Passes through the γ conversion unit 9 and the gradation processing unit 10, and then the printing unit 14 generates a designated character. The image data is edited by the editing unit 11 and temporarily stored in the storage unit 12. Then, the data is output to the external interface unit 13 or the plot unit 3.

(13) Image path: shading unit → filter unit → magnification processing unit → γ conversion unit → gradation processing unit → editing unit → printing unit → external interface unit → storage unit → plotting unit 8-bit image data from an external device is Through the external interface unit 13, like the image data of the shading unit 6, it is temporarily stored in the storage unit 12 and output from the plot unit.

[Second Embodiment]
Next, an image path of the image processing apparatus according to the second embodiment will be described with reference to FIG. Also in this embodiment, the same reference numerals are given to the respective parts that can be regarded as equivalent to those of the first embodiment, and the overlapping description is omitted. In the image path shown in FIG. 44A, the image data from the shading correction unit 6 is first applied to the γ conversion unit 9 via the filter processing unit 7 and the scaling processing unit 8. The data for which γ conversion has been completed is subjected to gradation processing by the gradation processing unit 10 and binarized by this gradation processing.

  Next, this data is directly output to the plotter 3 via the multiplexer 51, the OR gate 52, and the multiplexers 53 and 54, or is subjected to editing processing such as hollowing out by the editing unit 11 according to the setting of the operation unit 200. (Multiplexer 51), characters are combined by the printing unit 14 (OR gate 52), stored in the storage unit 12 (multiplexer 53), output to the plotter 3, or external equipment via the external interface unit 13 Is output.

  Similarly, in the image path in the modified example shown in FIG. 44B, the image data from the shading correction unit 6 is first applied to the γ conversion unit 9 via the filter processing unit 7 and the scaling processing unit 8. The data for which the γ conversion has been completed is subjected to editing processing such as hollowing out by the editing unit 11 according to the setting of the operation unit 200 (multiplexer 51), and then gradation processing is performed by the gradation processing unit 10. Similarly, this data is directly output to the plotter 3, or the characters are synthesized by the printing unit 14, stored in the storage unit 12, and then output to the plotter 3, or externally via the external interface unit 13. Output to the device.

  Similarly, in the image path in another modified example shown in FIG. 44C, the image data from the shading correction unit 6 is first applied to the γ conversion unit 9 via the filter processing unit 7 and the scaling processing unit 8. The The data for which the γ conversion has been completed proceeds directly to the gradation processing unit 10 via the multiplexer 55 or proceeds to the gradation processing unit 10 via the multiplexer 56 and the editing unit 11 according to the setting state of the editing process. For example, when processing with binarized data such as setting of editing processing is omitted, processing (binarization processing) is first performed by the gradation processing unit 10, then editing processing is performed, When the edit process is an 8-bit process such as full-face italic process or mirror process, the edit process is performed first and then the gradation process is performed.

  Similarly, the data from the gradation processing unit 10 or the editing unit 11 is directly output to the plotter 3, or the editing unit 11 performs an editing process such as a hollow according to the setting of the operation unit 200. Characters are synthesized by the printing unit 14, stored in the storage unit 12, and then output to the plotter 3 or output to an external device via the external interface unit 13.

[Third embodiment]
The third embodiment will be described with reference to the drawings. In the following description, the same parts as those in the first embodiment described above are denoted by the same reference numerals, and repeated descriptions are omitted as appropriate.

FIG. 45 is a block diagram showing the configuration of the image processing apparatus according to this embodiment. In FIG. 1, an image processing apparatus according to an embodiment includes a scanner unit (input unit) 2 that reads an image, and an internal image processing unit 100 that performs various corrections on the input image (hereinafter simply referred to as “image processing unit”). Called)
A first video bus 101 (indicated as “video bus 1” in the figure) that integrates the editing unit 11 for processing and editing image data, a scanner unit, and the editing unit 11 and the image processing unit 100. An external storage unit 12 for the image processing unit 100, an external interface unit 13 for transmitting / receiving data to / from other image processing units, a plotter unit (output unit) 3 for printing image data on paper, and a video bus 1 The output data, the storage unit 12, the external interface unit 13, and the plotter unit 3 are integrated into a second video bus 102 (indicated by “video bus 2” in the figure).

  The image processing unit 100 includes a shading correction unit 6 that corrects unevenness in the illumination system, a filter unit 7 that converts the frequency characteristics of the image signal, a scaling unit 7 that changes the image signal size in the main scanning direction, multi-value processing, and an error. The gradation processing unit 10 performs at least one of diffusion processing, multilevel dither processing, and binarization processing.

  The flow of image signals on the first video bus 101 is not necessarily sequential, and the processing order of the function processing units can be changed as appropriate. In general image processing, a shading correction unit 6 performs shading correction for an illumination system on an image signal optically read by the scanner unit 2, and when the filter unit 7 is in the “character” mode, Enhancement processing is performed to correct MTF degradation of the optical system, and smoothing processing is performed to remove moire in the “photo” mode. When enlargement processing is designated for any one of these filtered image signals, the scaling unit 8 performs enlargement processing in the main scanning direction by interpolation interpolation. In the case of reduction, similarly, thinning processing in the main scanning direction by resampling in the zoom unit 8 is performed. Thereafter, the gradation processing unit 10 performs multi-value processing for “character” and multi-value dither processing for “photo” in accordance with the image quality mode. These are the same as in the first embodiment.

  On the other hand, as a process for changing the processing order of the function processing unit, the processing order of the filter unit 7 and the scaling unit 8 is exchanged in the “reduction” mode. When enhancement processing is performed on the image signal that has been reduced in advance by the filter unit 7, the same effect can be obtained even with a filter coefficient that is weaker than usual, and conversely, moire is suppressed, so that a high-quality image is reproduced. it can. The image signal processed by the internal image processing is transmitted from the first video bus 101 to the second video bus 102.

FIG. 46 shows the configuration of the second video bus 102 shown in FIG. The image processing unit 100 shown here is an output end of the first video bus 101 in FIG. The image input to the second video bus 102 is each signal from the image processing unit 100, the storage unit 12, and the external interface unit 13, and the image output from the second video bus 102 is the plotter unit 3 ; The first and third selectors 103, 104, and 105 are individually provided for switching the image signal to each input / output terminal. A third selector (indicated by “selector 3” in the figure) 105 for selecting an output to the plotter unit 3 selects input signals from the image processing unit 100, the storage unit 12, and the external interface unit 13. A first selector 103 (indicated by “selector 1” in the figure) that selects output to the storage unit 12 selects input signals from the image processing unit 100 and the external interface unit 13. The sequence of image signals on the second video bus 102 is controlled completely independently of the sequence on the first video bus 101.

  FIG. 47 shows the configuration of each selector in FIG. This configuration is an example of the first selector 103 that selects image output to the storage unit 12. In this figure, an input signal group from the image processing unit 100 is indicated by a suffix 1, and an input signal group from the external interface unit 13 is indicated by a suffix 2. Each signal group includes a pixel clock CK1 or CK2, an image signal IMG1 or IMG2, and a control signal CNT1 or CNT2 that defines an image area. The output signal group, the pixel clock CLK, the image signal IMAGE, and the control signal CONTROL to the storage unit 12 are switched by the select signal SEL output from the selector control unit 4 according to the instruction output from the memory control unit 5. An input signal from the scanner 2 operates with a pixel clock CLK1 and a control signal CNT1 related to the image area. On the other hand, in the second video bus 102, completely different pixel clocks and area control signals can be selected, and an image input system independent of the input system from the scanner 2 is configured. The output system controlled by the second video bus 102 includes an output system to the plotter 3. In one image processing apparatus, the image input system and the image output system are respectively controlled by independent pixel clocks and image area signals. Can be controlled.

  FIG. 48 shows an example of the storage unit. The storage unit 12 includes a large-capacity page memory, and realizes functions such as electronic sorting, retention, and image rotation by storing image data in the memory 12d. Retention is a copy of many sheets per scan. Hereinafter, the internal structure of the storage unit 12 will be described.

  The image signal output from the second video bus 102 in the storage unit interface 12a is taken into the storage unit together with the pixel clock and the image area control signal. The input image signal is temporarily buffered by the input buffer 12b, and is compressed by the compression unit 12c. The compressed image data is held in the memory 12d, and an address is given from the address control unit 12f by an instruction from the control unit 12e, and editing such as rotation is performed. After editing, the compressed image data is decoded by the decompression unit 12g, buffered by the output buffer 12h, and then sent to the second video bus 102 via the storage unit interface 12a together with the pixel clock and the image area control signal. Sent out.

  With the configuration as described above, the storage unit 12 has functions of retention, image rotation, (INTO 1) function, electronic sorting, and image composition. Here, the retention is described above, but more specifically, it is a function of storing data in a memory by one image input and repeatedly reading the image. Image rotation refers to the function of rotating and outputting an image. The (INTO 1) function is a function for reducing a plurality of document images at a preset reduction ratio and outputting them in one copy. Electronic sort is a function that sorts and stacks images after accumulating image data for a plurality of documents in a memory. Image composition is a function of combining image data stored in a memory with newly input image data and outputting the synthesized image data. Note that the input image here does not necessarily indicate only scanned data, but indicates image data that is input to the storage unit via the second video bus 102.

  As shown in FIG. 1, the external interface unit 13 is an interface between the digital copying machine according to this embodiment and the outside. The external interface unit 13 is connected to a personal computer, a printer, a facsimile, and the like, and is connected from the main control unit 5 by the selector control unit 4. The external unit to be connected is selected according to the instruction. FIG. 48 shows a configuration in the case of functioning as an interface of a facsimile (FAX) transmission / reception unit.

  The FAX transmission / reception unit 110 converts the image data into a communication format and transmits it to the external line. Also, the FAX transmission / reception unit 110 converts the external data back to the image data and the plotter unit 3 via the external interface unit and the second video bus 102. Output an image. The fax transmission / reception unit 110 includes a fax image processing unit 111, an image memory 112, a memory control unit 113, a facsimile control unit 114, an image compression / decompression unit 115, a modem 116, and a network control device 117. In the fax transmission / reception unit 110 configured as described above, when the transmission of image information is started, the facsimile control unit 114 instructs the memory control unit 113 to sequentially read out the image information accumulated from the image memory 112. Let it come out. The read image information is code-compressed by the FAX image processing unit 111, modulated by the modem 116, and then sent to the destination via the network control device 117. Then, the image information for which transmission has been completed is deleted from the image memory 112.

  At the time of reception, the received image is temporarily stored in the image memory 112. If the received image can be recorded and output at that time, the received image is recorded and output when reception of one image is completed. Further, when a call is started during the copying operation and reception is started, the image memory 112 is accumulated in the image memory 112 until the usage rate reaches a predetermined value, for example, 80%, and the usage rate of the image memory 112 is 80%. Is reached, the copying operation being executed at that time is forcibly interrupted, and the received image is read from the image memory 112 and recorded and output. At this time, the received image read from the image memory 112 is deleted from the image memory 112, and the copying operation that has been interrupted when the usage rate of the image memory 112 decreases to a predetermined value, for example, 10%, is resumed. When all of the above are completed, the remaining received images are recorded and output. Also, various parameters for the copying operation at the time of interruption such as recording paper size, number of copies, number of copies, density, etc. are internally saved so that the operation can be resumed after interruption of the copying operation. Is restored to the inside.

  The outline of the image input control in the configuration of the second video bus 102 in FIG. 46 is shown in FIGS. FIG. 50 is an explanatory diagram showing how to use sequential various resources that have been conventionally used. After the image data input from the scanner 2 is subjected to processing corresponding to various modes by the image processing unit 100, the external interface unit 13 for example to a facsimile. In the facsimile function, the image data of the read image is transmitted to another facsimile machine. On the other hand, in the reception function, image data transmitted from others is received, taken into the image reading device from the external interface unit 13, and transferred to the storage unit 12. In the storage unit 12, for example, electronic sorting is performed, and image data is output to the plotter unit 3. At this time, the pixel clock from the image processing unit 100 to the external interface unit 13, the pixel clock from the external interface unit 13 to the storage unit 12, and the pixel clock from the storage unit 12 to the plotter unit 3 can take different pixel clocks.

  FIG. 51 shows an example in which the reading unit and the writing unit are operated in parallel. The image data input by the scanner is stored in the storage unit 12 after various image processing. For example, when a large amount of documents are read by the (INTO 1) function in the storage unit 12, only the reading system is used as the entire image processing apparatus, and the writing system is basically in a standby state. In the conventional image processing apparatus, the resources of the apparatus have not been effectively utilized. In this embodiment, however, the plotter unit 3 is opened to other image processing devices via the external interface unit 13 at this time. For example, a print output from a personal computer can be received, and simultaneous reading and writing operations can be performed simultaneously.

  FIG. 52 shows another example of the parallel operation of the reading unit and the writing unit. In this example, with respect to image data that has been scanned and temporarily stored in the storage unit 12, for example, when using the retention function in the storage unit 12, the reading unit is in a standby state when a large amount of image output is performed. is there. In this example, the scanner unit 2 is opened to other image processing devices via the external interface unit 13 in order to effectively use the resources of the reading unit in such a standby state. For example, a document is read for image transmission to a facsimile. By doing so, the reading system and the writing system can be operated simultaneously in parallel.

  FIG. 53 shows an example in which the external interface unit 13 is used as a relay function for a plurality of external image processing devices. For example, a personal computer is connected as an input device to the external interface unit 13, and an image processing apparatus 100 according to the embodiment is connected as another output device from the external interface unit 13, for example. When the reading system (scanner 2), writing system (plotter 3), and storage unit 12 are all used in a normal copying function, when the external interface unit 13 receives a printout from a personal computer, a conventional image In the case of a reproducing apparatus, means for waiting for output from the personal computer or forcibly interrupting the normal copying operation and interrupting the output from the personal computer is provided. However, in the configuration of FIG. 53, there is no standby or interruption, and the output from the personal computer can be bypassed and output to another image processing apparatus without changing the normal copying operation.

1 is a block diagram illustrating an overall configuration of an image processing apparatus according to a first embodiment of the present invention. It is a block diagram which shows the structure of the filter part of the image processing apparatus of FIG. It is explanatory drawing which shows the processing content of the filter part of FIG. It is a block diagram which shows the 5 * 5 matrix data generation part of FIG. 3 in detail. It is explanatory drawing which shows the flare correction amount calculation part of FIG. 3 in detail. It is explanatory drawing which shows the MTF correction | amendment part of FIG. 3 in detail. It is explanatory drawing which shows the filter coefficient of the MTF correction | amendment part of FIG. It is explanatory drawing which shows the filter coefficient of the smoothing process part of FIG. It is explanatory drawing which shows the filter coefficient of the Laplacian process part of FIG. It is explanatory drawing which shows the process of the process of the edge separation process part of FIG. It is explanatory drawing which shows the pattern for a detection of the white background candidate detection part of FIG. It is explanatory drawing which shows the process of the blocking part of FIG. 3, and an expansion part. It is explanatory drawing which shows the process of the block correction part of FIG. It is explanatory drawing which shows the process of the area | region determination part of FIG. It is explanatory drawing which shows the process of the pixel selection part of FIG. FIG. 2 is a block diagram illustrating in detail a scaling unit of the image processing apparatus in FIG. 1. FIG. 17 is a block diagram illustrating a line memory of a scaling unit in FIG. 16. FIG. 17 is a block diagram illustrating a scaling control processing unit of the scaling unit of FIG. 16. It is a timing chart which shows the main signal at the time of equal magnification. It is a timing chart which shows the main signal at the time of reduction. It is a timing chart which shows the main signal at the time of expansion. FIG. 6 is an explanatory diagram showing a conversion curve of a γ conversion table for a document / copy of the γ conversion unit of FIG. 1. It is a block diagram which shows the principal part of the gamma conversion part of FIG. It is a block diagram which shows the gradation process part of FIG. 1 in detail. It is explanatory drawing which shows the error diffusion process in FIG. It is a block diagram which shows the edit part of FIG. 1 in detail. It is explanatory drawing which shows the mirroring process in the edit part of FIG. It is explanatory drawing which shows the italic process in the edit part of FIG. It is explanatory drawing which shows the image compression system for memorize | storing in the memory | storage part of FIG. It is explanatory drawing which shows the algorithm of a GBTC fixed length encoding system. It is explanatory drawing which shows the data amount before and behind image compression. It is a block diagram which shows the memory | storage part of FIG. 1 in detail. FIG. 2 is a block diagram illustrating details of an external interface unit and a FAX transmission / reception unit in FIG. 1. It is a block diagram which shows the printing (character synthesis | combination) part of FIG. 1 in detail. It is explanatory drawing which shows the synthetic | combination process in the synthetic | combination part of FIG. It is explanatory drawing which shows the character data stored in the text RAM of FIG. It is a block diagram which shows the synthetic | combination part of FIG. 34 in detail. It is a block diagram which shows the detail of the selector connected to each process part in FIG. It is a front view which shows the operation part in FIG. It is explanatory drawing which shows operation | movement of the selector in FIG. It is explanatory drawing which shows operation | movement of the selector in FIG. It is explanatory drawing which shows operation | movement of the selector in FIG. It is explanatory drawing of the image process which provides a screen angle with respect to the image made italic. It is a block diagram which shows the specific example of the image path | pass of the image processing apparatus which concerns on 2nd Example of this invention. It is a block diagram which shows the whole structure of the image processing apparatus which concerns on the 3rd Example of this invention. It is a block diagram which shows the structure of the video bus 2 of FIG. FIG. 47 is a block diagram showing a configuration of the selector of FIG. 46. It is a figure which shows the memory | storage part of FIG. 45 in detail. It is a block diagram which shows the detail of the external interface part and FAX transmission / reception part of FIG. It is explanatory drawing which shows the data flow of a video bus. It is explanatory drawing which shows the data flow at the time of the parallel operation | movement of a video bus. It is explanatory drawing which shows the data flow at the time of the parallel operation | movement of a video bus. It is explanatory drawing which shows the data flow at the time of the relay operation | movement of a video bus.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Image processing part 2 Scanner part 3 Plotting part 4 Selector control part 5 Main control part 6 Shading part 7 Filter part 8 Scaling part 9 γ conversion part 10 Gradation processing part 11 Editing part 12 Storage part 12a Storage part interface part 12b Input Buffer 12c Compression unit 12d Memory 12e Control unit 12f Address control unit 12g Expansion unit 12h Input buffer 13 External interface unit 14 Printing unit 15 Filter processing block 16 Region separation processing block 17 Enhancement correction unit 18 Smoothing correction unit 19 Pixel selection unit 20 Multi Value processing unit 21 Error diffusion processing unit 22 Multi-value dither processing unit 23 Binary processing unit 24 Selector 25 Mirroring processing unit 26 Switch 27 Italic processing unit 28 1-line FIFO memory 29 Compression unit 30 Control unit 31 Address control unit 32 Expansion unit 33 4-line FIFO memory 34 FAX transmission / reception unit 35 FAX image processing unit 36 Image memory 37 Memory control unit 38 Facsimile control unit 39 Image compression / decompression unit 40 Modem 41 Network control device 42, 43 Line memory 44 Interpolation calculation unit 45 Scaling control block 46a In selector 46b Out selector 47 Image bus 48 Memory 49, 61, 62, 63, 64, 65, 66 Multiplexer 50 RAM
51 OR gate 100 Internal image processing unit 101 Video bus 1
102 Video bus 2
DESCRIPTION OF SYMBOLS 103,104,105 Selector 110 FAX transmission / reception part 111 FAX image processing part 112 Image memory 113 Memory control part 114 Facsimile control part 115 Image compression / decompression part 116 Modem 117 Network control apparatus 200 Operation part

Claims (3)

In an image processing apparatus that performs individual image processing set in a processing unit by a plurality of processing units that perform predetermined processing on a digital image signal,
A first video bus that integrates various internal processing blocks including an input unit and an internal image processing unit that performs various types of image processing on an image signal input from the input unit;
This is connected to the first video bus, an external storage unit, to integrate external processing block including an external interface unit, and an output unit, arbitrarily selectable the external processing block mutual image path, the first video bus And a second video bus controlled independently of the image processing apparatus. Selection of the external processing block of the second video bus includes image path selection means for selecting an image path, and image signals and various controls in the image path selection means based on a select signal input to the image path selection means. 2. The image processing apparatus according to claim 1, wherein the image processing apparatus is performed by signal selection means for selecting a signal and a clock of the system. 2. The external interface unit is connected to at least two external units, and the external units are controlled for input / output by unit selection means.
The image processing apparatus described.

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