JP3723364B2 - Manufacturing method of semiconductor device - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor device and a manufacturing method thereof, and more particularly to a chip size package and a manufacturing method thereof. A chip size package (Chip Size Package) is also called a CSP, and is a generic name of packages that are equal to or slightly larger than the chip size, and is a package intended for high-density mounting. The present invention relates to exposure of a metal post head employed in a CSP.
[0002]
[Prior art]
Conventionally, in this field, generally called BGA (Ball Grid Array), a structure having a plurality of solder balls arranged in a plane, called fine pitch BGA, the outer shape of the BGA ball pitch is made narrower. A structure close to the chip size is known.
[0003]
Recently, there is a wafer CSP described in “Nikkei Microdevice”, August 1998, pages 44-71. This wafer CSP is basically a CSP in which wiring and array-like pads are formed by a wafer process (pre-process) before dicing a chip. With this technology, it is expected that the wafer process and the package process (post-process) are integrated, and the package cost can be greatly reduced.
[0004]
The types of wafer CSP include a sealing resin type and a rewiring type. The sealing resin mold has a structure in which the surface is covered with a sealing resin as in a conventional package, and a metal post is formed on the wiring layer on the chip surface and the periphery thereof is solidified with the sealing resin.
[0005]
In general, when a package is mounted on a printed circuit board, it is said that the stress generated by the difference in thermal expansion from the printed circuit board is concentrated on the metal post. However, in the resin-encapsulated type, the metal post becomes longer and the stress is dispersed. It is believed that.
[0006]
On the other hand, the rewiring type has a structure in which rewiring is formed without using sealing resin, as shown in FIG. That is, the Al electrode 52, the wiring layer 53, and the insulating layer 54 are laminated on the surface of the chip 51, the metal post 55 is formed on the wiring layer 53, and the solder ball 56 is formed thereon. The wiring layer 53 is used as rewiring for arranging the solder balls 56 in a predetermined array on the chip.
[0007]
In the sealing resin mold, the metal post is made as long as about 100 μm and is reinforced with the sealing resin, whereby high reliability can be obtained. However, the process of forming the sealing resin needs to be performed using a mold in a subsequent process, and the process becomes complicated.
[0008]
On the other hand, in the rewiring type, the process is relatively simple, and there is an advantage that most processes can be performed by a wafer process. However, it is necessary to relieve stress and improve reliability by some method.
[0009]
11 omits the wiring layer 53 of FIG. 10 and forms an opening through which the Al electrode 52 is exposed, and a barrier metal 58 is formed between the metal post 55 and the aluminum electrode 52 in the opening. At least one layer is formed, and a solder ball 56 is formed on the metal post 55.
[0010]
[Problems to be solved by the invention]
However, in FIG. 10, a polyimide resin is applied so as to completely cover the metal post 55, and after curing, the upper surface is polished to expose the head of the metal post. However, this polishing process is very difficult to control, and there is a problem that the solderability of the solder balls 56 and the uniformity of the height of the solder balls deteriorate.
[0011]
The present invention solves the above problems.
[0012]
[Means for Solving the Problems]
The present invention has been made in view of the above problems, and firstly, the chip surface including the wiring layer is covered, and the main surface around the metal post has a lower end lower than the head of the metal post by heat shrinkage generated by thermosetting. The problem is solved by having an insulating layer made of a thermosetting resin located in the area.
[0013]
In general, a thermosetting resin shrinks when cured, but the shrinkage rate of the resin employed in the present invention is significantly large, and the film thickness decreases. Therefore, by baking for hardening, as shown in FIG. 8, the surface can be located at the lower end of the metal post. Therefore, all the metal posts can be exposed, and all the solder balls can be fixed.
[0014]
Secondly, as a material having a large shrinkage rate, the problem is solved by applying and shrinking a resin mainly composed of amic acid.
[0015]
Third, an insulating layer made of a resin that undergoes thermal shrinkage due to thermosetting is coated on the chip surface including the first insulating layer, the wiring layer, and the metal post,
The insulating layer is heat treated to shrink, the main surface around the metal post is lowered from the head of the metal post,
This is solved by forming solder balls on the metal posts.
[0016]
Fourth, the problem is solved by adopting a resin made of amic acid in a coating type or a film type.
[0017]
Fifth, a sheet having a material different from that of the insulating layer is provided on the surface of the film, and the problem is solved by exposing the metal post by peeling the sheet.
[0018]
DETAILED DESCRIPTION OF THE INVENTION
Next, an embodiment of the present invention will be described.
[0019]
In FIG. 9, reference numeral 1 is the uppermost metal (portion that also functions as a bonding pad) portion of a normal wire bonding type IC chip. An interlayer insulating film to be formed is indicated by reference numeral 2.
[0020]
In the lower layer of the contact hole C, a plurality of metals are formed, and are in contact with, for example, a transistor (a MOS type transistor or a BIP type transistor), a diffusion region, a poly-Si gate, or poly-Si.
[0021]
Here, although the present embodiment has been described in the MOS type, it goes without saying that the present embodiment can also be implemented by BIP.
[0022]
This structure is an IC generally called single layer metal, double layer metal,.
[0023]
Further, the passivation film is indicated by reference numeral 3. Here, the passivation film 3 is made of Si nitride film, epoxy resin, polyimide resin, or the like, and further, an insulating resin layer r is coated thereon. As will be described later, the insulating resin layer r realizes flatness and keeps the height of the solder balls constant. In particular, when shrink resin with a sheet is used, when the film before curing is pressed with a plate-shaped pressurizing device, all the heads of the metal posts 8 can come into contact with the pressurizing unit, so that a highly accurate metal Exposure is possible. Details will be explained in the process.
A Ti nitride film 5 is formed on the Al electrode 1.
[0024]
In the passivation film 3 and the insulating resin layer r, an opening K exposing the Ti nitride film 5 is formed, and a Cu thin film layer 6 is formed here as a plating electrode (seed layer) of the wiring layer. On this, a wiring layer 7 formed by Cu plating is formed.
[0025]
A resin layer R made of resin is formed on the entire surface of the chip including the wiring layer 7. However, although omitted in the drawing, a Si 3 N 4 film may be provided at the interface between the resin layer R and the wiring layer 7 and between the resin layer R and the metal post 8.
[0026]
The resin layer R can be implemented as long as it is a thermosetting or thermoplastic resin, and an amic acid film, a polyimide, or an epoxy resin is particularly preferable as the thermosetting resin. Moreover, if it is a thermoplastic resin, a thermoplastic polymer (Hitachi Chemical: Hymal) etc. are preferable. The amic acid film has a shrinkage rate of 30 to 50%.
Here, the resin R is prepared with a liquid amic acid as a main material, and is spun on the entire surface of the wafer to be formed with a thickness of about 20 to 60 μm. Thereafter, the resin R is polymerized by a thermosetting reaction. The temperature is 300 ° C or higher. However, a resin composed of an amic acid before thermosetting becomes very active under the above temperature, and has a problem of reacting with Cu and deteriorating its interface. However, the reaction with Cu can be prevented by coating the surface of the wiring layer with a Si3N4 film. Here, the film thickness of the Si3N4 film is about 1000 to 3000 mm.
[0027]
The Si3N4 film may be an insulating film having excellent barrier properties, but the SiO2 film is inferior in barrier properties. However, when the SiO2 film is used, it is necessary to make the film thickness thicker than the Si3N4 film. Further, since the Si3N4 film can be formed by the plasma CVD method, its step coverage is excellent and preferable. Further, since the resin layer R is coated after the metal post 8 is formed, the formation of the Si3N4 film not only prevents the reaction between the wiring layer 7 made of Cu and the resin layer mainly composed of amic acid, but also Cu The reaction between the metal post 8 made of the resin layer R and the resin layer R mainly composed of amic acid can also be prevented.
[0028]
The resin layer R is a film that characterizes the present invention. When the resin layer R in the state of FIG. 7 is cured, the resin R shrinks during the curing, and its film thickness is greatly reduced as shown in FIG. Therefore, the surface of the resin layer R is located at the lower end of the head of the metal post 8 and the metal post 8 is exposed. Therefore, it is not necessary to scrape the resin layer R and expose the head. Further, evenly exposing the head in this polishing step requires very difficult control, but it can be easily exposed by contraction of the resin.
[0029]
Therefore, the head of the metal post 8 is exposed at the end of the wiring layer 7, and Ni 10 and Au 11 on the head of the metal post 8 are exposed.
[0030]
When a solder ball is formed directly on the metal post 8 made of Cu, the connection strength with the solder ball deteriorates due to oxidized Cu. Further, when Au is formed directly to prevent oxidation, Au is diffused, so Ni is inserted therebetween. Ni prevents oxidation of Cu, and Au prevents oxidation of Ni. Therefore, deterioration of the solder ball and strength are suppressed.
[0031]
Here, Ni and Au are formed by electrolytic plating, but may be electroless plating.
[0032]
Finally, solder balls 12 are formed on the heads of the metal posts 8.
[0033]
Here, the difference between the solder ball and the solder bump will be described. As the solder balls, ball-shaped solder is prepared separately and fixed to the metal posts 8. The solder bumps are formed by electrolytic plating through the wiring layers 7 and the metal posts 8. The solder bump is initially formed as a film having a thickness, and is formed into a spherical shape by post heat treatment.
[0034]
Here, since the seed layer is removed in FIG. 7, it cannot be formed by electrolytic plating, and actually a solder ball is prepared.
[0035]
Next, the manufacturing method of the structure of FIG. 9 will be described more simply than FIG.
[0036]
First, a semiconductor substrate (wafer) on which an LSI having an Al electrode 1 is formed is prepared. Here, as described above, in the IC of the first layer metal, the second layer metal,..., For example, the source electrode and drain electrode of the transistor are formed as the first layer metal, and the Al electrode 1 in contact with the drain electrode is the second layer metal. It is formed as metal.
[0037]
Here, after forming the opening C of the interlayer insulating film 2 from which the drain electrode is exposed, an electrode material mainly made of Al and a Ti nitride film 5 are formed on the entire surface of the wafer, and the Al electrode 1 and the nitride are formed using a photoresist as a mask. The Ti film 5 is dry etched into a predetermined shape.
[0038]
Here, unlike the case where the passivation film 3 is formed and then the barrier metal is formed in the opening C that has been opened thereafter, it can be formed at once with the photoresist including the Ti nitride film as the barrier metal, and the number of processes can be simplified. It becomes.
[0039]
The Ti nitride film 5 functions as a barrier metal for a Cu thin film layer 6 to be formed later. Moreover, attention is paid to the fact that the Ti nitride film is effective as an antireflection film. That is, it is also effective for preventing halation of a resist used in patterning. In order to prevent halation, a minimum of about 1200 to 1300 mm is required, and in order to combine this with the function of a barrier metal, about 2000 to 3000 mm is preferable. If it is formed thicker than this, stress generated due to the Ti nitride film will occur.
[0040]
Further, after the Al electrode 1 and the Ti nitride film 5 are patterned, the entire surface is covered with the passivation film 3. Here, a Si3N4 film is employed as the passivation film, but a polyimide resin or the like is also possible. (See Figure 1 above)
Subsequently, the surface of the passivation film 3 is covered with an insulating resin layer r. Here, a positive type photosensitive polyimide film is employed as the insulating resin layer, and the insulating resin layer is covered with about 3 to 5 μm. Then, an opening K is formed.
By adopting this photosensitive polyimide film, it is not necessary to form a photoresist by separately forming a photoresist in the patterning of the opening K in FIG. 2, and the use of a metal mask simplifies the process. it can. Of course, photoresist is also possible. Moreover, this polyimide film is also used for the purpose of planarization. That is, in order for the height of the solder ball 12 to be uniform in all regions, the height of the metal post 8 needs to be uniform in all regions, and the wiring layer 7 also needs to be formed flat and with high accuracy. . For this purpose, a polyimide resin is applied, and since the resin has fluidity with a certain viscosity, the surface can be made flat.
[0041]
Here, the Al electrode 1 also serves as an external connection pad of the LSI, and is a portion that functions as a wire bonding pad when not formed as a chip size package composed of solder balls (solder bumps). (See Figure 2 above)
Subsequently, a Cu thin film layer 6 is formed on the entire surface. The Cu thin film layer 6 later becomes a plating electrode for the wiring layer 7 and is formed to a thickness of about 1000 to 2000 mm by sputtering, for example.
[0042]
Subsequently, for example, a photoresist layer PR1 is applied to the entire surface, and the photoresist PR1 corresponding to the wiring layer 7 is removed. (See Figure 3 above)
Subsequently, a wiring layer 7 is formed using the Cu thin film layer 6 exposed in the opening of the photoresist PR1 as a plating electrode. The wiring layer 7 needs to be formed as thick as about 2 to 5 μm in order to ensure mechanical strength. Although the plating method is used here, it may be formed by vapor deposition or sputtering.
[0043]
Thereafter, the photoresist layer PR2 is removed. (See Figure 4 above)
Subsequently, a photoresist PR2 exposing a region where the metal post 8 is to be formed is formed, and a Cu metal post 8 is formed on the exposed portion by electrolytic plating. This also uses the Cu thin film layer 6 as a plating electrode.
[0044]
This metal post is formed to a height of about 30 to 100 μm, and Ni10 is formed by electrolytic plating at about 1 μm, and Au11 is formed by electrolytic plating at about 5000 mm.
[0045]
Since Cu8, Ni10, and Au11 are formed continuously, they are not left for a long time, and therefore, Cu oxidation prevention and Ni oxidation prevention can be realized. Here, Pt and Pd may be used instead of Au. (See Figure 5 above)
Subsequently, the photoresist PR2 is removed, and the Cu thin film layer 6 is removed using the wiring layer 7 as a mask.
[0046]
Although the following steps are omitted in the drawing, the Si 3 N 4 film SN may be deposited on the entire surface including the wiring layer 7 and the metal post 8 by plasma CVD.
[0047]
This is because the uncured resin R and Cu formed in a later process react with heat. Therefore, there is a problem that this interface deteriorates. Therefore, it is necessary to cover the wiring layer 7 and the metal post 8 with this Si3N4 film SN. Of course, the Si3N4 film can be omitted if the interface does not deteriorate.
[0048]
If the Si 3 N 4 film is formed after forming the metal post 8 including Ni 10 and Au 11, the wiring layer 7 and the metal post 8 can be covered. Further, it is necessary to protect the side surface M exposed by patterning together, but here, since the Si3 N4 film is coated after patterning both, the side surface M is also protected together.
[0049]
Subsequently, the resin layer R is applied to the entire surface. (See Figure 7 above)
This resin is also a photosensitive resin and is cured by a thermosetting reaction.
[0050]
Since this photosensitive resin has fluidity, flatness is realized, and since it is photosensitive, an opening can be realized with a metal mask without employing a separate photoresist, and the process can be simplified.
[0051]
Further, the insulating resin layers R and r have the following merits.
In general, when a viscous resin is applied with a dispenser, there is a problem that bubbles are taken in even if defoaming occurs. If sintering is performed with air bubbles taken in, there is a problem that the air bubbles burst due to a future process or use of a high temperature atmosphere on the user side.
[0052]
In this step, application is performed by spin-on, and adjustment is performed so that the film can be formed to a thickness of about 20 to 30 μm by one spin. As a result, bubbles larger than this film thickness bounce off and disappear because the film thickness is thin. Bubbles smaller than this film thickness are blown out together with the resin blown to the outside by the spin-on centrifugal force, and a film without bubbles can be formed.
[0053]
Further, the insulating resin layer R needs to have a film thickness of about 100 μm. In this case, the above-described principle is adopted, and the insulating resin layer R can be formed while being applied in a plurality of times by spin-on and removing bubbles.
[0054]
Of course, you may apply | coat with a dispenser, without employ | adopting spin-on.
[0055]
Furthermore, the present insulating resin layer R has a feature that should be a feature of the present invention. That is, it shrinks during curing. Generally, the resin shrinks to some extent after being cured. However, as shown by the arrows, the present insulating resin layer R contracts significantly after baking, and the surface of the insulating resin layer R is positioned at the lower end than the head of the metal post 8. Therefore, since the head of the metal post 8 is exposed, the solder ball can be fixed.
[0056]
Further, in order to increase the strength of the solder ball, it is necessary to increase the exposure rate including the side surface of the metal post 8, but this can also be controlled by controlling the coating amount of the insulating resin layer R. it can.
[0057]
In addition, after curing, an extremely thin film may remain on the head of the metal post 8, but in this case, the surface may be simply polished. In particular, since the height of the metal posts is uniform as described above, all the heads can be cleaned by using a flat polishing plate.
[0058]
Alternatively, after the insulating resin layer R is coated, it may be semi-cured to such an extent that it can be polished, polished to the vicinity of the head of the metal post 8, and then completely cured. In this case, since only an extremely thin film remains on the head of the metal post 8, even if the shrinkage rate of the insulating resin layer R is small, the metal post can be exposed by the shrinkage of the insulating resin layer. In other words, since the film thickness that can be disposed on the metal post 8 is determined by the shrinkage rate of the resin, it is possible to expose the metal post by deciding whether or not to polish according to the film thickness and how much to polish. That's fine. (See Figure 7 above)
When the Si3N4 film is formed, the Si3N4 film is formed on the head of the metal post. In this case, the Si3N4 film is removed by wet etching, dry etching or polishing.
[0059]
Finally, the prepared solder balls 12 are aligned and mounted and reflowed. Then, the semiconductor substrate is divided into chips along a scribe line by a dicing process to complete a chip size package.
[0060]
Here, the timing for melting the solder is before dicing.
[0061]
After the insulating resin layer R is cured, a protective sheet is attached to the entire surface of the wafer, and back grinding is performed while protecting the surface.
[0062]
This is because if the protective sheet is pasted after the solder balls are formed, there is a problem that water flowing during back grinding enters a gap formed by the solder balls and the protective sheet and the protective seal is peeled off. When exposed to a high temperature atmosphere, there is a risk of cracking through scratches due to thermal distortion during back grinding. Therefore, after the heat treatment of the later step, here, the curing treatment is finished, the protective sheet is pasted and back-ground. Therefore, water can be prevented from entering, and cracks due to thermal distortion can be prevented.
[0063]
As described above, the present invention has been described with the rewiring type, but it goes without saying that the present invention can also be implemented with a resin sealing type.
[0064]
In the present application, the film F with the sheet 30 may be adopted as the insulating resin layer R.
[0065]
This will be briefly described below. FIG. 12 shows a state in which the metal post 8 is on the entire wafer, and schematically shows the configuration of FIG. As an upper layer, for example, an insulating resin layer 31 made of amic acid is applied to a Teflon sheet 30 to form a film F. In FIG. 12, the thick line is the sheet 30.
When the film F is arranged on the entire surface of the wafer and pressed against a flat press plate from above, since the insulating resin layer 31 is soft since it is not cured, all the metal posts can be covered with the insulating resin layer 31. . (See Fig. 13 above)
Further, when the film F is pressed by the press plate and the sheet 30 comes into contact with the metal post 8, the pressing is stopped. In this state, the insulating resin layer 31 is pushed between the head of the metal post and the sheet 30.
[0066]
Then, as in the previous example, heat is applied to cure. By this curing, the insulating resin layer 31 contracts, and the surface thereof is positioned at the lower end than the head of the metal post 8. In this state, the sheet 30 is attached to the state shown in FIG. (See Figure 14 above)
And if the sheet | seat 30 is peeled like FIG. 15, the structure of FIG. 8 is realizable.
[0067]
There are two points here. One is to evacuate in the state of FIG. That is, since the film is bonded, air bubbles are mixed. Second, since the pressing is performed by the press plate, the insulating resin layer 31 between the sheet 30 and the metal post 8 can be eliminated. Therefore, if the sheet 30 is peeled off after curing, the head of the metal post 8 can be exposed.
[0068]
Even in this case, there is a possibility that the insulating resin layer 31 remains thinly on the head of the metal post 8, but since the amount thereof is very small, it can be completely removed by simple polishing. In addition, since the insulating resin layers r and R are employed, the entire wafer is flat, and the height of the head of the metal post 8 is uniform, the head of the metal post 8 existing over the entire wafer can be cleaned by the polishing.
[0069]
【The invention's effect】
According to the present invention, when an insulating resin whose film thickness is greatly reduced is employed,
The main surface around the metal post can be positioned at the lower end from the head of the metal post. Therefore, the head of the metal post can be exposed, and cueing by substantially polishing the insulating resin layer becomes unnecessary.
[0070]
In general, a thermosetting resin shrinks when cured, but the shrinkage rate of the resin employed in the present invention is significantly large and the film thickness is greatly reduced. Therefore, by baking for curing, the surface can be positioned at the lower end of the metal post as shown in FIGS. Therefore, all metal posts can be exposed.
[0071]
Further, a sheet made of a material different from that of the insulating layer is provided on the surface of the film. If the sheet is peeled off after curing, the head portion of the metal post can be exposed, and a high-precision polishing operation becomes unnecessary.
[0072]
Further, since the Si3N4 film is provided at the interface between the wiring layer and the polyimide resin layer R, the reaction between the imide resin before curing and Cu can be prevented. Further, the side surfaces of the metal post and the Cu thin film layer are also covered with the Si3N4 film, thereby preventing the reaction.
[0073]
Accordingly, the interface between the Cu wiring layer, the Cu thin film layer, and the polyimide resin is formed in a stable state without reaction, so that moisture resistance, swelling, and the like can be prevented, and an improvement in yield can be realized.
[Brief description of the drawings]
FIG. 1 is a diagram illustrating a method for manufacturing a semiconductor device according to an embodiment of the present invention.
FIG. 2 is a diagram illustrating a method for manufacturing a semiconductor device according to an embodiment of the present invention.
FIG. 3 is a diagram illustrating a method for manufacturing a semiconductor device according to an embodiment of the present invention.
FIG. 4 is a diagram illustrating a method for manufacturing a semiconductor device according to an embodiment of the present invention.
FIG. 5 is a diagram illustrating a method for manufacturing a semiconductor device according to an embodiment of the present invention.
FIG. 6 is a diagram illustrating a method for manufacturing a semiconductor device according to an embodiment of the present invention.
FIG. 7 is a diagram illustrating a method for manufacturing a semiconductor device according to an embodiment of the present invention.
FIG. 8 is a diagram illustrating a method for manufacturing a semiconductor device according to an embodiment of the present invention.
FIG. 9 is a diagram illustrating a method for manufacturing a semiconductor device according to an embodiment of the present invention.
FIG. 10 is a diagram illustrating a conventional chip size package.
FIG. 11 is a diagram illustrating a conventional chip size package.
FIG. 12 is a diagram for explaining a production method employing an insulating resin layer film with a sheet.
FIG. 13 is a diagram for explaining a production method employing an insulating resin layer film with a sheet.
FIG. 14 is a diagram for explaining a production method employing an insulating resin layer film with a sheet.
FIG. 15 is a diagram for explaining a production method employing an insulating resin layer film with a sheet.

Claims (1)

Forming a first insulating layer having a first opening exposing a part of a metal electrode pad made of a metal material;
  A wiring layer made of Cu connected to the metal electrode pad exposed from the first opening and extending to the chip surface;
  Forming a metal post made of Cu on the wiring layer;
  The chip surface including the first insulating layer, the wiring layer, and the metal post is covered with a film provided with a resin layer made of amic acid that undergoes thermal shrinkage by thermosetting on a sheet made of a material different from the resin layer. And
  The resin layer is heat treated to shrink to form an insulating layer, the main surface around the metal post is lowered from the head of the metal post,
Exposing the metal post by peeling the sheet,
  A method of manufacturing a semiconductor device, wherein a solder ball is formed on the metal post.

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