JP3731405B2 - Manufacturing method of electro-optical device - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a method for manufacturing an electro-optical device, and more particularly to a technique for preventing a failure caused by static electricity during a manufacturing process.
[0002]
[Prior art]
In general, in an electro-optical device such as a liquid crystal device having a liquid crystal display panel, an electrode pattern for applying a predetermined electric field to the electro-optical material is provided on the surface of the substrate. For example, in a liquid crystal device, a predetermined electrode pattern is formed on the surfaces of two transparent substrates constituting a liquid crystal cell, and a protective film and an alignment film are laminated on the electrode pattern. Moreover, a color filter etc. may be formed as needed.
[0003]
FIG. 5 is a schematic plan view schematically showing an electrode pattern 10 on one transparent substrate constituting a conventional passive matrix liquid crystal device. This electrode pattern 10 is formed in a planned panel area 10A on a mother substrate larger than the panel substrate constituting the liquid crystal cell. The electrode pattern 10 is formed in a stripe shape and includes a plurality of electrode portions 11 arranged in parallel to each other and a wiring portion 12 drawn from one end portion of each electrode portion 11. Further, a static elimination pattern 20 (electrostatic protection pattern) having a plurality of static elimination branching portions 21 facing the front end portion 12a of each of the plurality of wiring portions 12 with a slight gap outside the planned panel area 10A. ) Is formed. The leading end 12a of the wiring part 12 is disposed outside the planned panel area 10A. As a result, the facing part between the wiring part 12 and the static elimination branching part 21 is also set outside the planned panel area 10A.
[0004]
The neutralization pattern 20 is formed between the leading end portion 12a of the wiring portion 12 and the neutralization branch portion 21 before the electrode pattern 10 is charged and the amount of charge increases so as to cause a discharge (spark) in the electrode pattern 10. By generating a discharge, sparks are generated between the electrodes and between the wirings due to static electricity during the manufacturing process, and are provided to prevent damage.
[0005]
The mother substrate on which the electrode pattern 10 and the charge removal pattern 20 are formed as described above is bonded to the other mother substrate via a sealing material (not shown), and liquid crystal is injected inside the sealing material. . In this manufacturing process, the mother board shown in the drawing is separated along the planned panel region 10A shown in FIG. Therefore, finally, the static elimination pattern 20 is removed together with the tip portion 12 a of the wiring portion 12.
[0006]
[Problems to be solved by the invention]
By the way, the liquid crystal device may adopt a COG (Chip On Glass) structure in which an integrated circuit chip such as a driver IC in which a drive driver circuit is built in is mounted on the liquid crystal panel itself. In particular, with the recent miniaturization of portable devices, there has been a demand for miniaturization of liquid crystal devices including drive circuits, and the opportunity to adopt a COG structure is increasing. However, when manufacturing a liquid crystal device having this COG structure, the connection terminals provided at the tips of the wiring portions of the electrode pattern must be arranged in accordance with the narrow pitch terminal arrangement of the integrated circuit chip. It is structurally difficult to form the static elimination pattern as described above at the tip of the part, and it is electrically problematic to form the conductor pattern under the chip mounting part.
[0007]
Therefore, the present invention solves the above-mentioned problems, and the problem is to provide a manufacturing method with a countermeasure against static electricity that can obtain a sufficient static elimination effect even for a liquid crystal device having a COG structure. is there.
[0008]
[Means for Solving the Problems]
In order to solve the above-described problem, an electro-optical device manufacturing method according to the present invention includes a plurality of first electrodes having an electrode portion for applying an electric field to an electro-optical material and a wiring portion drawn from one end portion of the electrode portion. And a first portion of the plurality of first conductor patterns that is connected to the first conductor pattern and the first conductor pattern. Forming a second conductor pattern for static elimination having alternating portions with the conductor pattern and being opposed to each other by a predetermined distance, and applying a probe to the first conductor pattern to apply the plurality of potentials to the potential of the second conductor pattern The pattern inspection of the plurality of first conductor patterns is performed by sequentially measuring the potential of the first conductor pattern.
[0009]
According to this invention, the second conductor pattern for static elimination is formed at a position separated from the conductor pattern by a predetermined distance so as to be connected to the conductor pattern at a portion other than the one end of the front conductor pattern. Thus, a pattern for static elimination can be formed without hindering the pattern structure of the wiring part and the mounting part, and the degree of freedom in designing the electrode pattern can be increased. In particular, in the case of an electro-optical device having a COG structure in which a semiconductor chip is directly mounted on a substrate, it is not possible to provide a pattern for static elimination on the semiconductor chip mounting portion. It becomes possible to take sufficient measures against static electricity.
[0010]
In the present invention, it is preferable that a connection terminal portion connected to a semiconductor chip mounted on the substrate is formed at the tip of the wiring portion.
[0011]
In the present invention, the first conductor pattern and the second conductor pattern are formed so as to oppose each other, and at least one of the first conductor pattern or the second conductor pattern is formed in the opposing portion. A taper is preferred.
[0012]
According to the present invention, when the first conductor pattern and the second conductor pattern for static elimination are arranged to face each other at a predetermined interval, at least one of the opposing end portions is tapered. As a result, the discharge site is limited in the facing portion, and the discharge is easily generated. Therefore, it is possible to prevent the discharge from occurring in the other site of the electrode pattern. In particular, in the case of the present invention, the second conductor pattern for static elimination is provided facing the outer edge portion of the outer edge portion of the first conductor pattern other than the one end portion from which the wiring portion is drawn. Since the pattern shape of the 1st and 2nd conductor pattern in a part can be designed more freely, the above-mentioned taper shape can also be formed easily.
[0013]
In the present invention, it is preferable that the first conductor pattern is formed so that a pattern width in the facing portion is narrower than that of the electrode portion.
[0014]
According to the present invention, the pattern width of the portion facing the second conductor pattern for static elimination in the first conductor pattern is determined by the structure of the electrode pattern, but the portion facing the second conductor pattern for static elimination is the electrode. By forming it narrower than the portion, it is possible to easily generate a discharge without being affected by the pattern shape of the first conductor pattern. In particular, in the case of the present invention, the second conductor pattern for static elimination is provided on the outer edge portion of the outer edge portion of the first conductor pattern other than the one end portion from which the wiring portion is drawn out. It is possible to more freely design the pattern shape in the facing portion of the second conductor pattern for pattern neutralization. Therefore, the above-described narrow shape can be easily formed.
[0015]
In this invention, it has the process of cut | disconnecting a said 2nd conductor pattern, It is characterized by the above-mentioned.
[0016]
According to the present invention, since the second conductor pattern has a step of separating, the second conductor pattern for static elimination does not remain in the electro-optical device, thereby avoiding electrical influence due to the residual static elimination pattern. In addition, the static elimination pattern can be configured more freely and in an effective pattern shape.
[0017]
In each of the above inventions, a plurality of striped electrode portions are formed in parallel in the first conductor pattern, and the wiring portion is drawn from one end portion of the electrode portions. It is desirable that the second conductor pattern is configured to be conductively connected to the other end portion of the electrode portion opposite to the one end portion, or to be opposed to the second conductor pattern. According to this means, the wiring portion is drawn out at one end of the stripe-shaped electrode portion, and the static elimination pattern is arranged at the other end, so that the conductive pattern for static elimination can be obtained without greatly changing the electrode pattern. Can be made to function.
[0018]
DETAILED DESCRIPTION OF THE INVENTION
Next, embodiments of the electro-optical device according to the invention will be described in detail with reference to the accompanying drawings. Each of the embodiments described below relates to a liquid crystal device having a passive matrix type liquid crystal panel. However, the present invention can be applied to other various types of liquid crystal devices, and a plasma display or an electroluminescence device. The present invention can also be applied to various electro-optical devices such as a display device.
[0019]
FIG. 1 is a schematic plan view showing an electrode pattern on a mother substrate in the liquid crystal device of this embodiment. FIG. 2 is a plan view showing an example of the overall planar structure of the mother board 100 including a plurality of planned panel regions. The mother board 100 is usually one in which three or more scheduled panel areas 30A are arranged vertically and horizontally. In FIG. 2, for convenience of illustration, the mother board 100 is drawn as a mother board including four scheduled panel areas 30A. Further, the mother board may have only a single planned panel area, and may have a slight surrounding area outside the planned panel area.
[0020]
In each panel planned region 30A, a conductor pattern 30 having a plurality of electrode portions 31 formed in parallel in a stripe shape and a plurality of wiring portions 32 drawn from each of these electrode portions 31 is formed. In the conductor pattern 30, the tip end portion of the wiring portion 32 serves as a connection terminal 32a, and is formed in a predetermined arrangement manner in the external connection portion 33 indicated by a dashed line in the figure set at the end portion of the planned panel area 30A. Yes. An integrated circuit chip such as a drive driver IC is mounted on the plurality of connection terminals 32 a arranged in the external connection portion 33 via a known anisotropic conductive film (ACF). An external terminal 34 that is not conductively connected to the wiring portion 32 is also formed in the external connection portion 33. The external terminal 34 is for electrically connecting the integrated circuit chip and a wiring member such as a flexible wiring board connected to the end of the panel.
[0021]
As described above, the conductor pattern 30 of the present embodiment is generally configured by the electrode part 31, the wiring part 32, and the external connection part 33. Here, the electrode part 31 is formed with an extended pattern part 31b extending from the end part 31a opposite to the wiring part 32 and the external connection part 33 to the outside of the planned panel area 30A. The extended pattern portion 31b is formed so as to face the static elimination branching portion 41 of the static elimination pattern 40 outside the planned panel area 30A. The static elimination pattern 40 is formed of the same material at the same time as the conductor pattern 30 on the surface of the mother board 100 as in the conventional example.
[0022]
The conductor pattern 30 and the charge removal pattern 40 are made of a transparent conductor such as ITO (indium tin oxide), a metal thin film such as aluminum, and the like. In this embodiment, since it is a mother substrate for a liquid crystal panel that constitutes a passive matrix type liquid crystal device, the striped electrode portion 31 is formed, but it may have a conductor pattern different from that of this embodiment. Yes, for example, pixel electrodes arranged in a matrix according to the form of a liquid crystal panel, wiring lines such as scanning lines and data lines connected to the pixel electrodes, and active elements (TFTs) conductively connected to the pixel electrodes and wiring lines , TFD, etc.) may be configured.
[0023]
In the present embodiment, the conductive pattern 30 formed in each panel planned region 30A has a static elimination pattern 40 facing the end portion 31a of the electrode portion 31 on the opposite side of the wiring portion 32 and the external connection portion 33, and As shown in FIG. 2, the static elimination pattern 40 is configured such that portions facing the conductor pattern 30 in the plurality of planned panel areas 30 </ b> A are integrally connected to each other. The static elimination pattern 40 is usually supplied with a constant potential such as a ground potential during the manufacturing process.
[0024]
In this embodiment, when each electrode part 31 of the conductor pattern 30 is charged for some reason, before discharge occurs in other parts (for example, between the electrode parts 31, between the wiring parts 32, or between the connection terminals 32 a). In addition, a discharge occurs at a portion where the tip of the extended pattern portion 31b extending from the end portion 31a of each electrode portion 31 and the static elimination branching portion 41 of the static elimination conductor pattern static elimination pattern 40, and the static electricity is removed from the conductive pattern 40 Designed to escape. Therefore, even if the electrode part 31 and the wiring part 32 are charged, a discharge occurs between the electrode parts 31, between the wiring parts 32, or between the connection terminals 32 a, thereby preventing damage to the electrodes, wirings, terminals, and the like. In this case, the distance between the extension pattern portion 31b and the static elimination branching portion 41 is such that the distance between the electrode portions 31 or between the wiring portions 32 formed at a narrow pitch or between the connection terminals 32a in order to achieve the above-mentioned purpose. It is desirable that the gap be formed to be narrower than the distance between.
[0025]
In the present embodiment, the extended pattern portion 31 b is formed to be narrower than the electrode portion 31. This is because the charge is concentrated in a narrow region of the facing portion so as to be easily discharged by facing the static elimination branching portion 41 formed in the same narrow width.
[0026]
FIG. 3 shows a modification of the above embodiment. In this modified example, the extension pattern portion 31b extends from the end portion 31a and faces the neutralization branching portion 41 of the static elimination conductor pattern 40, and the end portion 31a passes through the conduction pattern portion 42 for static elimination. The electrode portions 31 that are conductively connected to the conductor pattern 40 are alternately formed. In this case, the electrode 31 that is conductively connected to the static elimination conductor pattern 40 through the conductive pattern 42 does not discharge, and static electricity escapes through the static elimination conductor pattern 40, but the extension pattern portion 31b In the electrode part 31 facing the static elimination branch part 41, static electricity escapes to the conductive pattern 40 for static elimination by the discharge to the static elimination branch part 41 as described above.
[0027]
In this modification, for example, when a probe or the like (for example, a roll-shaped measurement electrode) is applied to the electrode unit 31 and the potentials of the plurality of electrode units 31 are continuously measured from the left side to the right side in the drawing, the upper part of FIG. As described above, the potential of the electrode part 31 that is conductively connected to the static elimination conductor pattern 40 by the conductive pattern part 42 becomes 0 (the same as the potential of the static elimination conductor pattern 40), and the potential of the electrode part 31 adjacent thereto Becomes V (potential lower than the discharge generation voltage between the extension pattern portion 31b and the static elimination branching portion 41). By measuring the potential distribution of the electrode part 31 in this way, the pattern inspection of the conductor pattern 30 and the conductor pattern 40 for charge removal can be performed.
[0028]
FIG. 4 is an enlarged partial plan view showing a detailed structure of a portion where the conductive pattern 30 and the conductive pattern 40 face each other in the embodiment or the modification. FIG. 4A shows a structure suitable as a planar pattern of the facing portions of the conductor pattern 30 and the charge removal conductor pattern 40 in the above embodiment. In this pattern, the electrode portion 31 extends as it is outside the planned panel region 30A, and the tip portion 31c has a tapered shape. On the other hand, the front end portion 41a of the static elimination branching portion 41 of the conductive pattern 40 for static elimination also has a tapered shape and faces the above-described front end portion 31c. By forming in this way, discharge easily occurs between the tip portion 31c and the tip portion 41a, so that damage to the electrode portion 31 and the wiring portion 32 can be prevented.
[0029]
FIG. 4B shows a structure suitable as a planar pattern of the opposing portion of the conductor pattern 30 and the static elimination conductor pattern 40 in the above modification. In this pattern, a narrow extension pattern portion 31b extends from the wide electrode portion 31 to the outside of the planned panel region 30A, and a tip portion 31d of the extension pattern portion 31b has a tapered shape. On the other hand, the static elimination branch portion 41 of the conductive pattern 40 for static elimination is initially formed with a relatively wide width, but becomes a narrow protruding portion 41b from the middle, and the tip end portion 41c of the protruding portion 41b has a tapered shape. . According to this pattern structure, the extended pattern portion 31b and the protruding portion 41b are both formed with a narrow width, and the tip portion 31d and the tip portion 41c that face each other are both tapered, so that Since it is easy to generate a discharge at the opposite portion, pattern destruction due to the occurrence of discharge at other portions can be prevented.
[0030]
In the above embodiment, the end of the conductor pattern opposite to the end from which the wiring portion is drawn out is conductively connected to the conductor pattern for static elimination or is disposed oppositely. As long as it is possible to construct, instead of the above-described opposite side, that is, the upper outer edge portion in FIG. 1, the outer edge portion is different from the side from which the wiring portion is pulled out. The outer edge portion may be conductively connected to the conductive pattern for static elimination or may be disposed oppositely. Such a structure is sufficiently possible when pixel electrodes are arranged for each pixel and a wiring such as a scanning line or a data line is formed between the pixel electrodes. However, as described above, in the passive matrix type panel, the end portion 31a of the electrode portion 31 opposite to the one end portion of the electrode portion 31 from which the wiring portion 32 is drawn out is electrically connected to the conductive pattern 40 for static elimination. It is preferable that they can be arranged or opposed to each other because a simple pattern configuration can be maintained.
[0031]
Note that the method of manufacturing the electro-optical device of the present invention is not limited to the illustrated example described above, and various modifications can be made without departing from the scope of the present invention. For example, in an active matrix type liquid crystal device, in addition to protecting electrodes and wiring, there are cases where a conductive pattern for static elimination for protection is provided in order to prevent electrostatic breakdown of active elements. However, when the COG structure is adopted, the wiring is drawn out from the opposite side of the external connection portion for performing COG mounting as in the above embodiment, and is electrically connected to the conductive pattern for static elimination, or the conductive pattern for static elimination It is possible to take an effective countermeasure against static electricity by facing the surface with a predetermined gap.
[0032]
【The invention's effect】
As described above, according to the present invention, the conductive pattern is conductively connected to or opposed to the outer edge portion of the conductor pattern other than one end portion of the electrode portion from which the wiring portion is drawn out at a predetermined interval. By forming a conductive pattern for static elimination that is configured to do so, a conductive pattern for static elimination can be formed without hindering the pattern structure of the wiring part and the mounting part, thus increasing the degree of freedom in designing the conductor pattern be able to. In particular, in the case of an electro-optical device having a COG structure for mounting an integrated circuit chip or the like, it is not possible to provide a conductive pattern for charge removal on the chip mounting portion. A conductor pattern can be formed and sufficient countermeasures against static electricity can be taken.
[Brief description of the drawings]
FIG. 1 is a plan view schematically showing a pattern structure corresponding to one panel region showing an embodiment of a method of manufacturing an electro-optical device according to the invention.
FIG. 2 is an overall plan view schematically showing a planar structure of a mother substrate used in the embodiment.
FIG. 3 is a plan view showing a modification of the embodiment.
FIG. 4 is an enlarged partial plan view (a) showing a preferred pattern structure of a facing portion between a conductor pattern and a discharging conductor pattern in the same embodiment, and the facing of the conductor pattern and the discharging conductor pattern in the modified example. It is an enlarged partial top view (b) which shows the suitable pattern structure of a part.
FIG. 5 is a plan view schematically showing a conventional conductor pattern and a conductor pattern for charge removal.
[Explanation of symbols]
30 Conductor Pattern 30A Planned Panel Area 31 Electrode Part 31a End Part 31b Extension Pattern Part 32 Wiring Part 32a Connection Terminal 33 External Connection Part 40 Conductive Pattern 41 for Neutralization Neutralization Branch

Claims (6)

An electro-optical device manufacturing method for forming, on a substrate, a plurality of first conductor patterns having an electrode part for applying an electric field to an electro-optical material, and a wiring part drawn from one end of the electrode part,
In the parts other than the one end part of the plurality of first conductor patterns, the part for connecting to the first conductor pattern and the part opposing the first conductor pattern with a predetermined distance therebetween are alternately provided for static elimination. Forming a second conductor pattern;
A pattern inspection of the plurality of first conductor patterns is performed by applying a probe to the first conductor pattern and sequentially measuring the potentials of the plurality of first conductor patterns with respect to the potential of the second conductor pattern. A method of manufacturing an electro-optical device.   2. The method of manufacturing an electro-optical device according to claim 1, wherein a connection terminal portion connected to a semiconductor chip mounted on the substrate is formed at a tip of the wiring portion.   3. The first conductor pattern and the second conductor pattern according to claim 1 or 2, wherein the first conductor pattern and the second conductor pattern are formed to face each other, and the first conductor pattern or the second conductor is formed in the facing portion. An electro-optical device manufacturing method, wherein at least one of the patterns is tapered.   4. The method of manufacturing an electro-optical device according to claim 3, wherein the first conductor pattern has a pattern width at the facing portion that is narrower than the electrode portion.   5. The method of manufacturing an electro-optical device according to claim 1, further comprising a step of separating the second conductor pattern. 2. The pattern inspection according to claim 1, wherein the potential of the first conductor pattern connected to the second conductor pattern among the plurality of first conductor patterns is the same as the potential of the second conductor pattern. ,
Whether the potential of the first conductor pattern adjacent to the first conductor pattern having the same potential as that of the second conductor pattern among the plurality of first conductor patterns is different from the potential of the second conductor pattern. A method of manufacturing the electro-optical device.

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