JP3767320B2 - Flicker reduction method, electro-optical device, image processing circuit thereof, driving method of electro-optical device, and electronic apparatus - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to an electro-optical device suitable for displaying an image with very little flicker, an image processing circuit thereof, an image data correction method, and an electronic apparatus.
[0002]
[Prior art]
A conventional electro-optical device, for example, an active matrix liquid crystal display device, includes a liquid crystal panel, an image signal processing circuit, and a timing generation circuit. Among these, the liquid crystal panel is configured by sandwiching liquid crystal between an element substrate and a counter substrate. A plurality of data lines and a plurality of scanning lines are formed on the element substrate, and a thin film transistor (Thin Film Transistor: hereinafter referred to as TFT) functioning as a switching element corresponding to the intersection between them and a pixel electrode are pixels. It is provided for each. On the other hand, a counter electrode is provided on the entire surface of the counter substrate.
In such a configuration, when on / off of each TFT is controlled by the scanning line voltage, the data line voltage is applied to the pixel electrode via the TFT. As a result, a voltage corresponding to the potential difference between the pixel electrode and the counter electrode is applied to the liquid crystal.
In general, when a voltage including a direct current component is applied to the liquid crystal, problems such as flicker and display burn-in occur. Therefore, alternating current driving is performed in which the voltage polarity of the pixel electrode is inverted at a constant cycle with the counter electrode voltage as the center. Specifically, in the image processing circuit, the image signal is inverted around the counter electrode voltage and supplied to the liquid crystal panel, while the counter electrode voltage is supplied to the counter electrode.
[0003]
[Problems to be solved by the invention]
By the way, in the actual liquid crystal display device, since the liquid crystal panel and the image processing circuit have variations, the counter electrode voltage is finely adjusted so as not to generate flicker or the like.
However, in an actual liquid crystal display device, even if the counter electrode voltage is adjusted, flicker occurs in a part of the display screen, and flicker on the entire screen cannot be eliminated. This is considered to be due to the following reasons.
First, the counter electrode voltage is not uniform across the entire surface of the counter electrode. The counter electrode is formed on the entire surface of the lower counter substrate facing the element substrate, and is electrically connected to the element substrate at its four corners. And a counter electrode voltage is applied through these conduction | electrical_connection parts. However, since the counter electrode is capacitively coupled to the source line and the data line and itself has partial distribution resistance, even if the counter electrode voltage is supplied from the four corners of the counter electrode, the voltage of the counter electrode is spread over the entire surface. It is difficult to make it uniform. Therefore, even if the counter electrode voltage is adjusted, even if the applied voltage of the liquid crystal is balanced between the positive polarity and the negative polarity so that flicker does not occur in a certain part, the voltage may vary depending on the position in the actual counter electrode. Due to the difference, the applied voltage of the liquid crystal cannot be balanced between the positive polarity and the negative polarity in other portions. As a result, even if the counter electrode voltage is adjusted, flicker cannot be completely suppressed over the entire display screen.
[0004]
Second, the liquid crystal capacitance value changes depending on the applied voltage. When the liquid crystal capacitance value is CL, the holding capacitance value connected in parallel to this is Cstg, the capacitance value between the gate and drain of the TFT is Cgd, and the gate voltage value is Vg, the flicker component ΔVgd is expressed by the following equation (1): Given in.
ΔVgd = Vg × Cgd / (Cgd + Cstg + CL) (1)
Although it is clear from the equation (1) that the flicker component depends on the liquid crystal capacitance value CL, the liquid crystal capacitance value CL increases as the applied voltage increases. Therefore, although it is possible to adjust the counter electrode voltage so that flicker does not occur at a certain gradation value, it is not possible to prevent flicker from occurring at all gradation values. On the other hand, in order to reduce the flicker component ΔVgd, it can be seen from the equation (1) that the retention capacitance value Cstg should be increased. However, this requires a large storage capacity, and there is a problem that the aperture ratio decreases.
Third, the amount of light incident on the liquid crystal panel varies depending on the screen position. The liquid crystal display device may be used for a video projector or the like. In this case, light with high illuminance enters the liquid crystal panel. When such intense light is incident on the liquid crystal panel, a channel is formed between the gate and the drain in the TFT that is originally in an OFF state, and a leak current called light leak flows. In this case, the magnitude of the leakage current increases as the illuminance of incident light increases. On the other hand, the incident light amount of the liquid crystal panel is not uniform over the entire surface, and the light amount is often larger in the central portion than in the peripheral portion. Therefore, the applied voltage drop of the liquid crystal due to the leak current is not uniform over the entire surface of the liquid crystal panel, and cannot be suppressed even if the counter electrode voltage is adjusted.
SUMMARY An advantage of some aspects of the invention is that it provides an electro-optical device, an image processing circuit, an image data correction method, and an electronic apparatus that can significantly reduce flicker. It is in.
[0005]
[Means for Solving the Problems]
In order to achieve the above object, in the flicker reduction method of the present invention, a first substrate on which a plurality of pixel electrodes are formed and one counter electrode is formed so as to face the plurality of pixel electrodes. A polarity in which an electro-optical material is sandwiched between a second substrate and a counter electrode voltage is applied to the counter electrode, while a voltage corresponding to a gradation value of an image signal to be displayed is inverted in polarity at a constant period Assuming that it is used in an electro-optical device that applies an inverted image signal to each pixel electrode, the flicker components at a plurality of reference coordinates in the image display area are measured while changing the counter electrode voltage, and the measurement result is Based on this, when the polarity of the image signal is inverted, the amplitude center voltage that becomes the amplitude center is obtained so that the flicker component is minimized, and the difference voltage between the amplitude center voltage and the counter electrode voltage is determined for each reference coordinate. The difference voltage is obtained and stored in advance as reference correction data in association with each reference coordinate, and a plurality of reference correction data stored in accordance with the display position of the image signal is read out, and a plurality of read out reference corrections Data is subjected to interpolation processing to generate correction data, an amplitude center voltage is generated based on the correction data and the counter electrode voltage, and the polarity of the image signal is inverted at a constant cycle using the amplitude center voltage as a reference voltage. The polarity-reversed image signal is generated and applied to each pixel electrode.
According to the present invention, reference correction data is stored for a plurality of reference coordinates on the image display area, and correction data at each coordinate is calculated by performing interpolation processing on the reference correction data. Therefore, it is possible to significantly reduce in-plane flicker due to the difference in counter electrode voltage or the difference in the amount of incident light depending on the position of the image display area. In addition, since only the reference correction data corresponding to the reference coordinates need be stored, the storage capacity can be reduced.
[0006]
In the flicker reduction method of the present invention, a first substrate on which a plurality of pixel electrodes are formed, and a second substrate on which one counter electrode is formed so as to face the plurality of pixel electrodes, A polarity-reversed image signal obtained by sandwiching an electro-optic material between the electrodes and applying a counter-electrode voltage to the counter-electrode while reversing the polarity of a voltage corresponding to the gradation value of the image signal to be displayed at a constant period. Assuming that the pixel electrode is used in an electro-optical device, the flicker components at a plurality of reference coordinates in the image display region are measured for a plurality of gradation values while changing the counter electrode voltage, and the measurement result The amplitude center voltage that becomes the amplitude center when the polarity of the image signal is inverted is determined for each of the plurality of reference coordinates and the plurality of gradation values so that the flicker component is minimized, and the amplitude center voltage A difference voltage with respect to the counter electrode voltage is obtained for each of the plurality of reference coordinates and the plurality of gradation values, and the difference voltage is associated with the plurality of reference coordinates and the plurality of gradation values as reference correction data in advance. By storing and performing interpolation processing in the gradation value direction on the reference correction data, each first correction data corresponding to each gradation value that can be taken by the image signal is generated and stored for each reference coordinate. Based on the gradation value of the image signal and the coordinates on the image display area, the first correction corresponding to the plurality of reference coordinates in the vicinity of the coordinate and corresponding to the gradation value is selected from the one correction data. By selecting data and performing interpolation processing in the coordinate direction on the selected first correction data, second correction data corresponding to the image signal is generated, and based on the second correction data and the counter electrode voltage The amplitude center voltage Form, wherein the amplitude center voltage as the reference voltage image signal polarity inversion at a constant cycle to generate the polarity reversal image signal, and applying it to the respective pixel electrodes.
According to the present invention, the data stored in advance is the reference correction corresponding to the plurality of gradation values selected from the gradation values that the image signal can take for the plurality of reference coordinates on the image display area. Only data. Therefore, the memory capacity can be reduced. Further, since interpolation processing in the gradation direction is performed, it is possible to perform fine correction corresponding to each gradation value of the image signal. For example, when the electro-optical material is a liquid crystal, the value of the liquid crystal capacitance varies depending on the applied voltage, but according to the present invention, correction according to the gradation value of the image signal can be performed. Flicker can be greatly suppressed for all gradations. In addition, since interpolation processing in the coordinate direction is performed on a pixel basis, flicker can be suppressed using different correction data for each coordinate at which an image signal is to be displayed. As a result, almost no flicker in the image display area can be eliminated, and high-quality image display is possible.
Next, in the image processing circuit according to the present invention, a first substrate on which a plurality of pixel electrodes are formed, and a second substrate on which one counter electrode is formed so as to face the plurality of pixel electrodes. A polarity-inverted image signal in which an electro-optic material is sandwiched between a substrate and a counter electrode voltage is applied to the counter electrode, while a voltage corresponding to a gradation value of an image signal to be displayed is inverted in polarity at a constant period Assuming that it is used in an electro-optical device that applies to each pixel electrode, each reference correction data corresponding to a plurality of gradation values selected from input gradation values can be displayed as an image. A first storage unit that stores in advance a plurality of reference coordinates on the area, and each reference floor that can be taken by the input image data by performing interpolation processing in the gradation value direction on the reference correction data read from the first storage unit Corresponding to the key value First interpolation processing means for generating first correction data for each reference coordinate, second storage means for storing each first correction data in association with each reference coordinate and gradation value, and each stored first Based on the gradation value of the input image data and the coordinates on the image display area, the first correction data corresponding to a plurality of reference coordinates in the vicinity of the coordinates and corresponding to the gradation value is selected from the one correction data. Selecting means for selecting correction data; second interpolation processing means for generating second correction data corresponding to the input image data by subjecting the selected first correction data to interpolation processing in the coordinate direction; 2 A polarity inversion signal for generating an amplitude center voltage based on the correction data and the counter electrode voltage, and generating the polarity inversion image signal by inverting the polarity of the image signal at a constant period using the amplitude center voltage as a reference voltage Characterized in that it comprises a forming unit.
According to this invention, the data stored in advance in the first storage means is a plurality of gradation values selected from the gradation values that can be taken by the input image data for a plurality of reference coordinates on the image display area. Only the reference correction data corresponding to. Further, correction data obtained by interpolating each reference correction data in the gradation direction is stored for each reference coordinate in the second storage means. Therefore, it is not necessary to store correction data for each gradation value that can be taken by the input image data for every coordinate as the first storage means and the second storage means, so that the memory capacity can be reduced. Further, since interpolation processing in the gradation direction is performed, it is possible to perform fine correction corresponding to each gradation value of the input image data. In addition, since the interpolation process in the coordinate direction is performed in units of pixels, the input image data can be corrected using different correction data for each coordinate to be displayed. As a result, even if the counter electrode voltage of the image display region differs depending on the position, or the amplitude center voltage of the polarity-reversed image signal that minimizes the flicker component varies depending on the gradation value of the input image data, Flicker can be greatly reduced. As a result, image flicker can be almost eliminated when a plurality of horizontal lines are displayed at fine intervals, and high-definition image quality can be improved.
Here, the first substrate of the image display area corresponds to a plurality of data lines extending in the Y direction, a plurality of scanning lines extending in the X direction, and the intersection of each data line and each scanning line. If the switching element and the pixel electrode are formed and the polarity inversion signals of a plurality of systems are supplied to a plurality of the data lines, the polarity inversion signal generating means The second correction in synchronism with the image signal phase expansion means, which divides the input image data into a plurality of systems and extends the time axis to generate a plurality of systems of phase expansion image signals; A correction signal phase expansion unit that divides data into a plurality of systems and generates a correction signal of a plurality of systems by extending the time axis, and generates each amplitude center voltage for each system based on each correction signal and the counter electrode voltage And each It is desirable to provide a polarity inversion section width center voltage and polarity inverting the phase expanded image signal in a constant cycle as a reference voltage to generate the polarity reversal image signal of the plurality of systems.
Since the data line drive frequency corresponds to the dot clock frequency, the frequency increases. In order to reduce this, a plurality of data lines are collectively driven simultaneously. Specifically, the data line is driven based on the phase development image signal that extends the time axis and is divided into a plurality of systems. According to the above-described invention, since the correction signal is phase-expanded in synchronization with the phase expansion of the image signal, the correction signal can be divided into a plurality of systems and the time axis can be extended. Thereby, even when the image signal is phase-expanded, each amplitude center voltage corrected for each system can be generated, and flicker can be reduced.
In the image processing circuit of the present invention, the first substrate of the image display area includes a plurality of data lines extending in the Y direction, a plurality of scanning lines extending in the X direction, and each data line. If the switching element and the pixel electrode are formed corresponding to the intersection of each scanning line, the selection unit counts a first clock signal that is a time reference for scanning in the X direction of the image display region, An X counter that generates X coordinate data that indicates the X coordinate to display the input image data on the image display area, and a second clock signal that is a time reference for scanning in the Y direction of the image display area are counted. A Y counter that generates Y coordinate data that indicates the Y coordinate to display the input image data on the image display area; and the vicinity of the coordinates of the input image data based on the X coordinate data and the Y coordinate data. of A plurality of reference coordinates, and a reading means for reading out a plurality of corresponding correction data from the second storage means based on the gradation values of the input image data and the plurality of specified reference coordinates, The second interpolation processing unit calculates from each reference coordinate based on the coordinates of the input image data specified by the X coordinate data and the Y coordinate data and each reference coordinate of the plurality of first correction data read by the reading unit. It is preferable that each distance to the coordinates of the input image data is specified, and interpolation processing is performed based on each specified distance.
In this case, for the input image data at a certain timing, the coordinates on the image display area where the image corresponding to the gradation value of the input image data is to be displayed are specified based on the X and Y coordinate data. And since the correction data of the said coordinate is produced | generated by an interpolation process based on the correction data corresponding to the reference coordinate of the vicinity of the said coordinate, flicker is used for each coordinate which should display input image data using different correction data. Can be suppressed.
In the image processing circuit of the present invention, if the image display area of the electro-optical device uses liquid crystal as an electro-optical material, a plurality of reference coordinates of the image display area are stored in the first storage unit. The reference correction data includes first and second gradation values corresponding to first and second change points at which a display characteristic curve indicating a transmittance with respect to an applied voltage of liquid crystal changes steeply, and first and second floors, respectively. It is desirable to correspond to one or more gradation values between tone values.
Further, the first interpolation processing means generates the first correction data by performing interpolation processing based on the reference correction data for each gradation value from the first gradation value to the second gradation value, Each gradation value less than the first gradation value corresponds to the reference correction data corresponding to the first gradation value, and the reference correction data exceeding the second gradation value corresponds to the second gradation value. The reference correction data is output as the first correction data, and the second storage means stores the first correction data for each gradation value from the first gradation value to the second gradation value, and When the gradation value of the input image data is less than the first gradation value, the selection unit selects the first correction data corresponding to the first gradation value, and the gradation value of the input image data Is in the range from the first gradation value to the second gradation value. The first correction data corresponding to each gradation value is selected, and when the gradation value of the input image data exceeds the second gradation value, the first correction data corresponding to the second gradation value is selected. It is desirable to select correction data.
The display characteristic of the transmittance with respect to the applied voltage of the liquid crystal has two changing points where the characteristic changes sharply, and the transmittance with respect to the applied voltage changes greatly between the changing points. The change in transmittance with respect to voltage is small. Therefore, if the gradation value of the input image data is less than the first gradation value, the correction data corresponding to the first gradation value is selected.
When the gradation value of the input image data exceeds the second gradation value, it is possible to reduce the storage capacity of the second storage means by selecting correction data corresponding to the second gradation value.
If the input image data is composed of data corresponding to each color of RGB, the reference correction data is composed of data corresponding to each color of RGB, and the first interpolation processing means is provided for each color of RGB. Preferably, the first correction data is generated, and the second storage unit, the second interpolation processing unit, and the correction unit are provided for each color of RGB. In this case, flicker can be suppressed for each color of RGB, and as a result, flicker on the entire display screen can be greatly reduced.
Here, it is preferable that the data amount of the reference correction data for the G color is larger than the data amount of the reference correction data for the R color or the B color. In human vision, the sensitivity of G color is higher than that of R color and B color. Therefore, flicker correction with higher accuracy can be performed by increasing the data amount of G color.
Furthermore, it is preferable that the reference correction data for the R color or the B color corresponds to coordinates obtained by extracting a plurality of reference coordinates corresponding to the reference correction data for the G color according to a certain rule.
[0007]
In addition, if the input image data is composed of data corresponding to each color of RGB, and the reference correction data is composed of data corresponding to each color of RGB, the first storage means, the first interpolation processing means It is desirable that the X counter and the Y counter are used for each color of RGB, and the second storage means, the second interpolation processing means, the reading means and the correction means are provided for each color of RGB. In this case, since the first storage means, the first interpolation processing means, the X counter, and the Y counter can be used together, the configuration can be simplified. Next, the electro-optical device according to the present invention includes the above-described image processing circuit, a plurality of scanning lines, a plurality of data lines, and a pixel corresponding to the intersection of each scanning line and each data line. An image display unit and a drive circuit that displays an image on the image display unit based on a polarity-reversed image signal generated by the image processing circuit are provided. According to the present invention, it is possible to provide an electro-optical device capable of displaying a high-quality image with almost no flicker over the entire screen in all gradations.
[0008]
Next, the electro-optical device driving method according to the present invention includes a plurality of scanning lines, a plurality of data lines, and an image display unit including pixels corresponding to the intersections of the scanning lines and the data lines. In the driving method of the electro-optical device, the flicker reduction method according to claim 1 or 2 is used when an image is displayed on the image display unit.
Next, an electronic apparatus according to the present invention includes the above-described electro-optical device. Examples of the electronic device include a projector, a mobile computer, a mobile phone, a portable video camera using a liquid crystal finder, and the like.
[0009]
DETAILED DESCRIPTION OF THE INVENTION
Embodiments of the present invention will be described below with reference to the drawings. In this embodiment, a projector using an active matrix type liquid crystal panel will be described as an example of an electro-optical device.
[0010]
<1. First Embodiment>
<1-1: Electrical configuration of projector>
FIG. 1 is a block diagram showing an electrical configuration of the projector. As shown in this figure, the projector 1100 includes three liquid crystal display panels 100R, 100G, and 100B, a timing circuit 200, and an image signal processing circuit 300.
First, the liquid crystal display panels 100R, 100G, and 100B correspond to the three primary colors R (red), G (green), and B (blue), respectively. Each panel has a liquid crystal sandwiched between an element substrate and a counter substrate. In addition to the display area 103, a data line driving circuit 101 and a scanning line driving circuit 102 are formed in the peripheral portion of the element substrate.
The element substrate in the display region 103 is formed with a plurality of data lines extending in the horizontal direction (X direction) and scanning lines extending in the vertical direction (Y direction). A TFT functioning as a switching element is provided corresponding to the intersection with the scanning line. The gate electrode of the TFT is connected to the scanning line, the source electrode is connected to the data line, and the drain electrode is connected to the pixel electrode. One pixel is formed by the TFT, the pixel electrode, and the counter electrode provided on the counter substrate. The counter electrode is formed on the entire surface of the counter substrate facing the element substrate, and the counter substrate voltage Vcom is supplied through conduction portions formed at the four corners with the element substrate. It has become.
The data line driving circuit 101 and the scanning line driving circuit 102 are configured to drive a plurality of data lines and a plurality of scanning lines formed in the display region 103. In the present invention, the display area 103 may have any number of dots, but in this example, it is assumed that the display area 103 is configured in the XGA format (horizontal 1024 dots × vertical 768 dots).
Next, the timing circuit 200 supplies various timing signals to the data line driving circuit 101, the scanning line driving circuit 102, or the image signal processing circuit 300.
Next, the image signal processing circuit 300 includes a gamma correction circuit 301, a flicker correction circuit 302, phase expansion circuits 303R, 303G, and 303B, and amplification / inversion circuits 304R, 304G, and 304B. The gamma correction circuit 301 performs gamma correction corresponding to the display characteristics of the liquid crystal panels 100R, 100G, and 100B on the input image data DR, DG, and DB to generate image data DR ′, DG ′, and DB ′. It is configured as follows.
The flicker correction circuit 302 also uses correction data Dhr, Dhg, Dhb used for performing flicker correction, which will be described later, based on the data values (tone values) of the image data DR ′, DG ′, DB ′ and their display positions. Are generated and D / A converted to generate correction signals Vhr, Vhg, Vhb. Further, the flicker correction circuit 302 is configured to DA-convert the image data DR ′, DG ′, DB ′ and output image signals VIDR, VIDG, VIDB.
The phase expansion circuits 303R, 303G, and 303B are supplied with RGB three-system image signals VIDR, VIDG, and VIDB, which are expanded into N-phase (N = 6 in the figure) image signals and phase-expanded images. The signals are output as signals vid1 to vid6. Here, the reason for developing the image signal in the N phase is to increase the application time of the image signal supplied to the TFT in the display area 103 in the sampling circuit of the liquid crystal display panel (built in the data line driving circuit 101), This is to ensure sufficient sampling time and charging / discharging time of the data signal. Furthermore, each of the phase expansion circuits 303R, 303G, and 303B generates phase expansion correction signals vh1 to vh6 by performing phase expansion of the correction signals Vhr, Vhg, and Vhb in synchronization with the phase expansion of the image signals VIDR, VIDG, and VIDB. It is configured as follows.
Each of the amplifying / inverting circuits 304R, 304G, and 304B amplifies the phase expanded image signals vid1 to vid6, inverts the voltage polarity at a constant period, adds them to the amplitude center voltage VC, and adds the polarity inverted image signals VID1 to VID1 to VID6 is generated. The amplitude center voltage VC is generated based on the counter electrode voltage Vcom and the phase expansion correction signals vh1 to vh6. In the following description, reversing the voltage polarity of the image signal with a constant period centering on the amplitude center voltage VC will be referred to as polarity reversal.
The polarity inversion period is whether the data signal application method is (1) polarity inversion in units of scanning lines, (2) polarity inversion in units of data lines, or (3) polarity inversion in units of pixels. Specifically, it is set to one horizontal scanning period or a dot clock cycle. In this example, it is assumed that polarity inversion is performed every horizontal scanning period based on the polarity inversion signal Sinv of two horizontal scanning periods.
[0011]
<1-2: Mechanical configuration of projector>
Next, the mechanical configuration of the projector will be described. FIG. 2 is a plan view showing a configuration example of the projector.
[0012]
As shown in the figure, a projector 1100 includes a lamp unit 1102 made of a white light source such as a halogen lamp. The projection light emitted from the lamp unit 1102 is separated into three primary colors of RGB by four mirrors 1106 and two dichroic mirrors 1108 arranged in the light guide 1104, and serves as a light valve corresponding to each primary color. The light enters the liquid crystal panels 100R, 100B, and 100G.
[0013]
The liquid crystal panels 100R, 100B, and 100G are respectively driven by R, G, and B image signals supplied from an image signal processing circuit 300 (not shown). Now, the light modulated by these liquid crystal panels is incident on the dichroic prism 1112 from three directions. In this dichroic prism 1112, R and B light is refracted at 90 degrees, while G light travels straight. Accordingly, as a result of the synthesis of the images of the respective colors, a color image is projected onto the screen or the like via the projection lens 1114.
Since light corresponding to the primary colors R, G, and B is incident on the liquid crystal panels 100R, 100B, and 100G by the dichroic mirror 1108, it is not necessary to provide a color filter on the counter substrate.
[0014]
<1-3: Configuration of Flicker Correction Circuit>
Next, a detailed configuration of the flicker correction circuit 302 will be described. FIG. 3 is a block diagram of the flicker correction circuit. As shown in this figure, the flicker correction circuit 302 includes an X counter 10, a Y counter 11, a ROM 12, an interpolation processing unit 13, correction units UR, UG, UB, and D / A converters 14-16.
First, the D / A converters 14 to 16 convert the image data DR ′, DG ′, and DB ′ from digital signals to analog signals to generate image signals VIDR, VIDG, and VIDB.
Next, the X counter 10 counts the dot clock signal DCLK having a dot period, and outputs X coordinate data Dx indicating the X coordinate of the image data. On the other hand, the Y counter 11 counts the horizontal clock signal HCLK in the horizontal scanning cycle, and outputs Y coordinate data Dy indicating the Y coordinate of the image data. Therefore, by referring to the X coordinate data Dx and the Y coordinate data Dy, the position where the image data should be displayed on the liquid crystal display panel can be known.
Next, the ROM 12 is a non-volatile memory that stores the reference correction data Dref, and outputs the reference correction data Dref when the projector 1100 is powered on. The reference correction data Dref is data used for correcting flicker of the image data DR ′, DG ′, and DB ′ at predetermined X and Y coordinates. This point will be described with reference to FIG. FIG. 4 is a conceptual diagram showing coordinates corresponding to the reference correction data in the display area. As described above, the display area 103 is composed of horizontal 1024 dots × vertical 768 dots. This display area is divided into 8 × 6, and reference correction data Dref is prepared for each of R, G, and B for each point indicated by a black circle in the figure. In the following description, 63 coordinates corresponding to black circle points are referred to as reference coordinates.
By the way, since the liquid crystal capacitance has a characteristic that changes in accordance with the applied voltage, the correction data value corresponding to all image data values is represented by the correction data value corresponding to a certain image data value (gradation value). Then, accurate correction cannot be performed. For example, if all image data values are corrected using correction data corresponding to the center level, accurate correction cannot be performed at the black level or the white level, and flicker can be suppressed at such a level. Can not. On the other hand, if correction data corresponding to all levels is stored in the ROM 12, there is a problem that the storage capacity of the ROM 12 increases.
Therefore, in the present embodiment, reference correction data Dref is stored for three levels, and correction data DH corresponding to each level is generated using interpolation processing or the like. FIG. 5 shows the relationship between the display characteristics of the liquid crystal and the three voltage levels corresponding to the reference correction data. Note that the liquid crystal display panel of this example operates in a normally white mode.
In the figure, the display characteristic curve W shows that when the applied voltage of the liquid crystal gradually increases from 0 V, the transmittance gradually decreases, when the applied voltage V1 is exceeded, the transmittance sharply decreases, and when the applied voltage V3 is exceeded. It shows the characteristic that the transmittance gradually decreases. Here, V0 is a voltage applied to the liquid crystal when the image data takes the minimum value, and V4 is a voltage applied to the liquid crystal when the image data takes the maximum value. In this display characteristic, three voltage levels corresponding to the reference correction data Dref are set to V1, V2 and V3 indicated by black circles. V1 and V3 correspond to two changing points where the display characteristic curve W changes sharply, and V2 corresponds to a point where the transmittance is approximately 50%.
The above three voltage levels were selected for the following reason. First, since the change in the transmittance with respect to the applied voltage is small in the region below V1 and the region above V3, the correction amount hardly changes even if the applied voltage changes in such a region. This is because it is sufficient to correct using the reference correction data Dref corresponding to V3. Second, if the correction data from V0 to V4 is calculated by interpolation processing based on the reference correction data Dref corresponding to V0 and V4 instead of V1 and V3, the change rate of the display characteristic curve W is V1 and V3. This is because accurate correction data cannot be calculated. Third, the accuracy of the interpolation process can be increased by using V2 having a transmittance of approximately 50%. In the following description, the voltage V1 is referred to as a white reference level, the voltage V2 is referred to as a center reference level, and the voltage V3 is referred to as a black reference level. In this example, reference correction data corresponding to V2 is prepared in advance in the range from V1 to V3. However, a plurality of reference correction data may be prepared within this range.
Next, the contents stored in the ROM 12 will be described. FIG. 6 is a diagram showing the contents stored in the ROM 12. As shown in this figure, the ROM 12 stores a set of nine correction data DH for each coordinate in association with 63 coordinates. The nine correction data DH are composed of three sets of correction data DH corresponding to each color of RGB, and the correction data DH corresponding to each color is three corresponding to the white reference level, the center reference level, and the black reference level. Correction data DH. In the figure, the first subscripts “R”, “G”, and “B” following “D” indicate which color corresponds to the correction data DH. Further, the second subscripts “w”, “c”, and “b” following “D” indicate whether the correction data DH correspond to the white reference level, the center reference level, and the black reference level, respectively. . In addition, the third and fourth subscripts “i, j” following “D” indicate the corresponding reference coordinates. In the following description, the reference correction data Dref corresponding to each RGB color is described as Drefr, Drefg, Drefb, and in particular, the reference correction data not limited to each RGB color is described as Dref.
Next, a method for generating the reference correction data Dref will be described. FIG. 7 is a diagram showing a system configuration for generating reference correction data. As shown in this figure, the correction data generation system 1000 includes a projector 1100, an FFT analyzer 500, a personal computer 600, an image data generator 700, a screen S, and an illuminometer 800. In this example, it is assumed that the liquid crystal panels 100R, 100G, and 100B are driven at a field frequency of 60 Hz.
First, the projector 1100 is configured so that the operation of the flicker correction circuit 302 can be stopped. In addition, the illuminance meter 800 is embedded on the screen S on 63 reference coordinates. These output signals are supplied to the FFT analyzer 500 via a signal switch (not shown). Further, the signal switch controls 63 input signals under the control of the personal computer 600. One of them is selected and output to the FFT analyzer 500.
Next, the FFT analyzer 500 is configured to frequency-analyze the output signal of the illuminometer 800 and output the result as analysis data to a personal computer.
Next, the personal computer 600 controls the entire correction data system 1000 and generates reference correction data Dref that minimizes flicker based on the analysis data.
In the correction data generation system 1000 described above, the image data DR corresponding to the voltage V1 is supplied from the image data generator 700 to the projector 1100. Then, an R-color image is displayed on the screen S, and the illuminance at each reference coordinate is measured by the illuminometer 800. In this state, the personal computer 600 controls the projector 1100 so as to shift the counter electrode voltage Vcom from the reference voltage Vref by a predetermined step. In each step, the FFT analyzer 500 outputs an analysis result as shown in FIG. 8 as analysis data. As shown in this figure, the analysis result has a peak at 60 Hz. This frequency component becomes a flicker component. The personal computer 600 obtains the counter electrode voltage Vcom that minimizes the flicker component based on the analysis data of each step. For example, when the flicker component characteristic with respect to the counter electrode voltage as shown in FIG. 9 is obtained from the analysis data of each step, the minimum counter electrode voltage VcomX is Vref + ΔV. In this case, a data value corresponding to ΔV is generated as reference correction data Dref. This is also executed for the voltages V2 and V3 to generate all the reference correction data Drefr corresponding to the R color. Further, by executing the same processing for the G and B colors, reference correction data Drefr, Drefg, and Drefb corresponding to the R, G, and B colors are generated. Next, the interpolation processing unit 13 illustrated in FIG. 3 calculates correction data DH at each reference coordinate for each color based on the above-described reference correction data Dref. Specifically, based on the reference correction data Dref corresponding to the voltage V1 and the reference correction data Dref corresponding to the voltage V2, the correction data DH corresponding to each level from the voltage V1 to the voltage V2 is calculated, and the voltage V2 is obtained. Based on the corresponding reference correction data and the reference correction data Dref corresponding to the voltage V3, correction data DH corresponding to each level from the voltage V2 to the voltage V3 is calculated. In this example, the correction data DH is calculated by linear interpolation.
For example, correction data DH corresponding to voltage Va (where V1 <Va <V2), coordinates (i, j), and R is given by the following equation.
DH = DRwi, j ・ (Va-V1) / (V2-V1) + DRci, j ・ (V2-Va) / (V2-V1)
That is, the interpolation processing unit 13 calculates correction data DH corresponding to each level from the voltage V1 to the voltage V3 at each reference coordinate. In the following description, correction data DH corresponding to each color of RGB will be referred to as DHr, DHg, and DHb.
Next, the correction units UR, UG, UB perform predetermined processing on the correction data DHr, DHg, DHb generated by the interpolation processing unit 13 to generate correction signals Vhr, Vhg, Vhb. Yes. Since each correction unit UR, UG, UB is configured similarly, the correction unit UR will be described here.
The correction unit UR includes a correction table 14R, a calculation unit 15R, an address generation unit 16R, and a DA converter 17R. The correction table 14R stores the correction data DHr in association with the X and Y coordinates in a predetermined storage area according to the write address supplied by the address generating unit 16R, and four data from the predetermined storage area in accordance with the read address. The correction data DHr1 to DHr4 are configured to be read out.
FIG. 10 is a diagram showing the stored contents of the correction table 14R. In this figure, “m” is an image data value corresponding to the voltage V1, and “n” is an image data value corresponding to the voltage V3. As shown in the figure, the correction table 14R stores correction data DHr in association with each reference coordinate. Here, the first and second subscripts “i, j” of DHr indicate reference coordinate values, and the third subscript “(X)” indicates the corresponding image data value. Yes. For example, DHr1,128 (m + 2) is correction data corresponding to the reference coordinate (1,128) and the image data value m + 2.
Next, the address generator 16R sequentially generates four read addresses according to the following procedure based on the X and Y coordinate data Dx and Dy and the image data DR ′. The readout address is composed of a row address corresponding to the coordinates and a column address corresponding to the gradation value.
First, the address generation unit 16R specifies four reference coordinates close to the X and Y coordinate data Dx and Dy. For example, if the coordinates specified by the X and Y coordinate data Dx and Dy are (64, 64) (see FIG. 4), the reference coordinates are (1, 1), (128, 1), (1, 128). ), (128, 128). As a result, four row addresses indicating the first row, the second row, the tenth row, and the eleventh row are generated.
Secondly, the address generator 16R generates a column address corresponding to the gradation value of the image data DR ′. For example, if the value of the image data DR ′ is “m + 1”, a column address indicating the second column is generated. However, when the value of the image data DR ′ is less than “m”, a column address indicating the first column is generated, and when the value of the image data DR ′ exceeds “n”, it corresponds to “n”. Generate column addresses.
Thirdly, the address generating unit 16R generates four read addresses by combining four row addresses and one column address.
The address generator 16R selects four correction data DHr1 to DHr4 from the correction data DHr stored in the correction table 14R. For example, if the value of the image data DR ′ is “m + 1” and the coordinates specified by the X and Y coordinate data Dx and Dy are (64, 64), DHr1,1 (m + 1) shown in FIG. DHr128,1 (m + 1), DHr1,128 (m + 1), and DHr128,128 (m + 1) are read from the correction table 14R as correction data DHr1 to DHr4.
Next, the calculation unit 15R shown in FIG. 3 is based on the X, Y coordinate data Dx, Dy indicating the coordinates of the image data DR ′ and the four correction data DHr1 to DHr4 read from the correction table 14R. An interpolation process is executed to generate correction data Dhr. This interpolation processing is performed by linear interpolation proportional to each distance from the coordinates of the image data DR ′ to the reference coordinates of the four correction data DHr1 to DHr4. The correction data Dhr is output as a correction signal vhr via the D / A converter 17R.
[0015]
<1-4: Operation of Flicker Correction Circuit>
Next, the operation of the flicker correction circuit 302 will be described. FIG. 11 is a flowchart showing the operation of the flicker correction circuit. Although the operation of the flicker correction circuit 302 corresponding to the R color will be described here, the same applies to the B color and the G color.
First, when the power is turned on (step S1), the reference correction data Dref corresponding to each reference coordinate is read from the ROM 12 (step S2).
Next, the interpolation processing unit 13 executes the interpolation process in the gradation direction based on the reference correction data Dref, and generates correction data DHr, DHg, and DHb (step S3). The reference correction data Dref is composed of correction data DH corresponding to three voltages V1, V2, and V3, such as a white reference level, a center reference level, and a black reference level, for each reference coordinate. For the range up to V3), correction data DH is generated by interpolation processing.
Next, when a fixed time has elapsed since the power was turned on and correction data DHr, DHg, and DHb are stored in the correction tables of the correction units UR, UG, and UB, the dot clock signal DCLK and the horizontal clock signal HCLK are It is supplied to the X counter 10 and the Y counter 11 (step S4). Then, the X counter 10 and the Y counter 11 count the dot clock signal DCLK and the horizontal clock signal HCLK, and indicate the coordinates at which the image data DR ′, DG ′, DB ′ should be displayed on the image display area at a certain timing. X coordinate data Dx and Y coordinate data Dy to be generated are generated.
Next, based on the X-coordinate data Dx and Y-coordinate data Dy and the data value of the image data DR ′, four correction data DHr1 to DHr4 that are the basis of the interpolation processing in the coordinate direction are read out from the correction table 14R (step). S6).
Thereafter, the calculation unit 15R performs interpolation processing on the correction data DHr1 to DHr4 based on the X and Y coordinate correction data Dx and Dy to generate correction data Dhr (step S7). The correction data Dhr is D / A converted to generate a correction signal vhr.
As described above, the flicker correction circuit 302 according to the first embodiment stores the reference correction data Dref corresponding to the three voltages V1, V2, and V3 for each reference coordinate in the ROM 12, and based on the reference correction data Dref. Then, the correction data DH at each reference coordinate is generated, and the correction data Dhr is generated by performing interpolation processing on the four correction data DHr1 to DHr4 based on the X, Y coordinate data Dx, Dy.
Therefore, fine correction can be performed according to each data value such as the image data DR ′.
Furthermore, since the two-step interpolation processing such as the interpolation processing corresponding to the data value and the interpolation processing corresponding to the coordinates is performed, the memory capacity of the ROM 12 and the correction tables 14R, 14G, and 14B can be reduced.
In addition, since the X counter 10, the Y counter 11, the ROM 12, and the interpolation processing unit 13 are shared by the correction units UR, UG, and UB, the configuration can be simplified and the cost can be reduced.
[0016]
<1-5: Phase expansion circuit>
Next, since the phase expansion circuits 303R, 303G, and 303B are all configured in the same manner, the phase expansion circuit 303R will be described here.
FIG. 12 is a block diagram showing the main configuration of the phase expansion circuit 303R, and FIG. 13 is a timing chart showing various signal waveforms of the phase expansion circuit 303R. As shown in FIG. 12, the phase expansion circuit 303R includes an image signal expansion circuit 3031 and a correction signal expansion circuit 3032.
Each of the image signal development circuit 3031 and the correction signal development circuit 3032 has six sample and hold circuits SHa1 to SHa6 and SHb1 to SHb6, and there are six phase shift pulses SP1 to SP6 shown in FIG. And a sample pulse SS are supplied. Further, each sample and hold circuit has a two-stage configuration, and the first circuit performs sample and hold with shift pulses SP1 to SP6, and the second circuit with sample pulse SS.
In the above configuration, when the image signal VIDR shown in FIG. 13 is supplied to the image signal development circuit 3031, the first circuits of the sample hold circuits SHa1 to SHa6 synchronize with the shift pulses SP1 to SP6 and the image signal VIDR. Is expanded to 6 times and divided into 6 systems, and the second circuit aligns the phases of the 6 systems signals using the sample pulse SS to generate phase expanded image signals vid1 to vid6. On the other hand, the correction signal development circuit 3032 also generates the phase development correction signals vh1 to vh6 by extending the time axis of the correction signal by six times and aligning the phases of the six signals in the same manner as the image signal development circuit 3031.
Here, since the image signal development circuit 3031 and the correction signal development circuit 3032 are generated using the same shift pulses SP1 to SP6 and the same sample pulse SS, the phase development correction signals vh1 to vh6 are used as the phase development image signal. Can be generated in synchronization with vid1 to vid6.
[0017]
For example, in the period T1 shown in FIG. 13, the image signal VIDR is “R2”, and the corresponding correction signal vhr is “r2”. The signals “R2” and “r2” are both sampled and held by the shift pulse SP2, and then sampled and held again by the sample pulse SS. As a result, the time axis is expanded by 6 times, and are output as the phase development image signal vid2 and the phase development correction signal vh2 in the period T2.
[0018]
<1-6: Amplification / Inversion Circuit>
Next, since the amplification / inversion circuits 304R, 304G, and 304B are all configured in the same manner, the amplification / inversion circuit 304R will be described here.
FIG. 14 is a block diagram showing the main configuration of the amplification / inversion circuit 304R. As shown in FIG. 14, the amplifying / inverting circuit 304R includes six amplifying / inverting units U1 to U6. Each of the amplification / inversion units U1 to U6 is configured in the same manner, and generates the polarity inversion image signals VID1 to VID6 based on the phase development image signals vid1 to vid6 and the phase development correction signals vh1 to vh6, respectively. Yes.
The amplifying / inverting unit U1 includes an amplifying circuit 3041, an inverting circuit 3042, and an adding circuit 3043 as shown in the figure. First, in order to apply a voltage having a predetermined amplitude to the liquid crystal in the liquid crystal panel 100R, the amplifier circuit 3041 amplifies the phase expanded image signal vid1 with a predetermined amplification factor, and outputs this as an amplified image signal vid1 ′. .
Next, the inverting circuit 3042 inverts the amplified image signal vid1 ′ based on the polarity inversion signal Sinv, and outputs this as an inverted image signal vid1x. In this example, as described above, since one cycle of the polarity inversion signal Sinv is two horizontal scanning periods, the inversion circuit 3042 generates the inverted image signal vid1x by inverting the amplified image signal vid1 ′ every one horizontal scanning period. To do.
Next, the addition circuit 3043 adds the inverted image signal vid1x, the counter electrode voltage Vcom, and the phase expansion correction signal vh1, and outputs the addition result as the polarity inverted image signal VID1.
Here, the adder circuit 3043 is AC-coupled with the inverting circuit 3042. Therefore, if the voltage obtained by adding the counter electrode voltage Vcom and the phase expansion correction signal vh1 in a DC manner is the amplitude center voltage VC, the polarity inversion image signal VID1 is obtained by superimposing the inversion image signal vid1x on the amplitude center voltage VC. Become.
Next, the operation of the amplifying / inverting unit U1 will be specifically described. FIG. 15 is a timing chart showing various signal waveforms of the amplification / inversion unit U1. In this figure, the amplified image signal vid1 ′ and the like are phase-expanded and thus actually change stepwise. In this example, the waveform change is linearly represented for the sake of drawing.
The amplified image signal vid1 ′ shown in FIG. 15 is at a black level for a predetermined period from the start of each horizontal scanning period, and thereafter, the signal level gradually decreases and becomes a white level at the central time. Increasing gradually. For this reason, the horizontal line is brightest in the central portion of the screen, but darker in the peripheral portion.
When this amplified image signal vid1 ′ is supplied to the inversion circuit 3042, in synchronization with the polarity inversion signal Sinv, the voltage polarity is inverted in one horizontal scanning period around 0V as shown in the figure, and the inversion image signal vid1x Is generated.
On the other hand, in the addition circuit 3043, an amplitude center voltage VC obtained by adding the phase expansion correction signal vh1 to the common electrode voltage Vcom is obtained. Here, the level of the phase development correction signal vh1 changes during one horizontal scanning period. This is because the center voltage that minimizes the flicker component varies depending on the change in the liquid crystal capacitance value accompanying the level change of the phase development image signal vid1 and the amount of light depending on the display position. In other words, the phase development correction signal vh1 is determined so that the flicker component can be minimized. As shown in the figure, the inverted polarity image signal VID1 is obtained by superimposing the inverted image signal vid1x on the amplitude center voltage VC.
The other amplifying / inverting units U2 to U6 are configured in the same manner as the amplifying / inverting unit U1, and their operations are the same as those described above.
As described above, in the present embodiment, images are actually displayed for a plurality of gradations, flicker components are measured for a plurality of positions in the screen, and reference correction data Dref is generated so as to minimize this, Since the amplitude center voltage VC of the polarity-reversed image signals VID1 to VID6 is determined using the correction data Dref, flicker generated at a part of the screen or at a certain gradation value can be significantly suppressed. As a result, the quality of the display image can be improved, and in particular, flickering of horizontal lines displayed at a narrow interval can be prevented, or fine characters such as kanji can be clearly displayed.
[0019]
<2. Second Embodiment>
Next, a projector using an active matrix type liquid crystal panel according to a second embodiment will be described. The mechanical configuration of the projector is the same as that of the first embodiment shown in FIG. Further, the electrical configuration is the same as that of the first embodiment shown in FIGS. 1 and 3 except that a flicker correction circuit 302 ′ having a reduced circuit scale is used instead of the flicker correction circuit 302. It is.
[0020]
<2-1: Configuration of Flicker Correction Circuit>
FIG. 16 is a block diagram showing the main configuration of the flicker correction circuit 302 ′ of the second embodiment. The flicker correction circuit 302 ′ stores reference correction data Dref in advance, and performs interpolation in the gradation direction by the interpolation processing unit 13 to generate correction data DHr, DHg, and DHb. The basic mechanism for generating the signals vhr, vhg, and vhb is the same as that of the flicker correction circuit 302 of the first embodiment. However, the flicker correction circuit 302 ′ is a first embodiment in that a ROM 12 ′ having a small storage capacity is used instead of the ROM 12, and correction tables 14R ′ and 14B ′ having a small storage capacity are used instead of the correction tables 14R and 14B. This is different from the flicker correction circuit 302 of the embodiment.
Human vision has a characteristic that the sensitivity of G color is higher than that of R color and B color. Therefore, since the G color has the highest sensitivity to flicker, even the flicker that cannot be detected by humans in the R and B colors is detected in the G color. In other words, it is possible to improve the quality of the screen display in which the RGB colors are mixed by making the flicker correction accuracy for the G color higher than that of the R and B colors.
By the way, as described above, flicker is corrected based on the reference correction data Drefr, Drefg, Drefb. Therefore, the correction accuracy can be improved as the amount of these data increases. On the other hand, the storage capacity of the ROM 12 ′ for storing these data has a certain limit, and the cost increases as the storage capacity increases. Therefore, the storage capacity of the ROM 12 ′ is determined by the balance between cost and correction accuracy.
The present embodiment has been made in view of this point. By determining the ratio of each data amount of the reference correction data Drefr, Drefg, and Drefb according to the visual characteristics of a person, the ROM 12 ′ having a certain storage capacity is stored. It is used to obtain the maximum visual effect. Hereinafter, the ROM 12 ′ and the correction tables 14R ′ and 14B ′ used for the flicker correction circuit 302 ′ will be described.
FIG. 17 is a conceptual diagram showing coordinates corresponding to the reference correction data in the display area of the liquid crystal display panel used in the projector of the second embodiment. The display area 103 is composed of horizontal 1024 dots × vertical 768 dots as in the first embodiment. The display area 103 is divided into horizontal 8 × vertical 6 and reference correction data Drefg corresponding to G color is prepared for each point (reference coordinate) indicated by a black circle and a double circle in the drawing. On the other hand, the reference correction data Drefr and Drefb corresponding to the R color and the B color are prepared only for each point indicated by a double circle. That is, the reference correction data Drefr and Drefb correspond to coordinates extracted from a plurality of reference coordinates according to a certain rule. In this example, reference correction data Drefr and Drefb are stored for 20 coordinates out of 63 reference coordinates. Therefore, with respect to the reference correction data Drefr and Drefb, the data amount is compressed to about 1/3.
Next, FIG. 18 is a conceptual diagram showing the storage contents of the ROM 12 ′ used in the second embodiment. As shown in this figure, regarding the reference correction data Drefg corresponding to the G color, the ROM 12 'correlates with 63 coordinates, and three correction data DGwi, j, DGci, j, A set of DGbi, j is stored. On the other hand, regarding the reference correction data Drefr corresponding to the R color, the ROM 12 'associates 20 coordinates with a set of three correction data DGwi, j, DGci, j, DGbi, j for each coordinate. Storing. The reference correction data Drefb corresponding to the B color stores a set of three correction data DGwi, j, DGci, j, and DGbi, j for each coordinate in association with the 20 coordinates in the same manner as the R color. is doing.
For example, the reference correction data Drefr and Drefb are (1,1), (256, of the reference coordinates (1,1), (128,1),..., (1024,1) in the first row shown in FIG. 1), (512,1), (768,1), (1024,1) are stored, and the second row is not stored. Further, the reference coordinates are thinned out for the third and subsequent rows as in the first and second rows. Therefore, the storage capacity of the ROM 12 ′ is about 4/9 compared with the case where all the reference coordinates are stored (ROM 12 of the first embodiment). As a result, the storage capacity of the ROM 12 ′ can be greatly reduced.
Next, FIG. 19 is a conceptual diagram showing the stored contents of the correction table 14R ′. As shown in this figure, correction data HDr for each gradation is stored in the correction table 14R ′ in association with 20 reference coordinates. In the first embodiment, reference correction data Drefr and Drefb are stored for 63 reference coordinates for R and B colors, and gradation data is subjected to interpolation processing to generate correction data DHr and DHb. Was. On the other hand, in the second embodiment, the reference correction data Drefr and Drefb are stored for the 20 reference coordinates, and the correction data DHr and DHb are generated by performing interpolation processing in the gradation direction. The data amount of the data DHr and DHb is reduced to about ３ as compared with the first embodiment. Accordingly, the storage capacity of the correction tables 14R ′ and 14B ′ for storing them can be reduced to about ３.
[0021]
<2-1: Operation of Flicker Correction Circuit>
Next, the operation of the flicker correction circuit 302 ′ will be specifically described. In this example, correction data corresponding to the image data displayed at the position of the coordinates (64, 64) shown in FIG. 17 is generated.
First, when the power is turned on, the reference correction data Drefg corresponding to 63 reference coordinates is read for the G color from the ROM 12 ', and the reference correction data corresponding to 20 reference coordinates for the R and B colors. Drefr and Drefb are read out. Next, the interpolation processing unit 13 subjects the reference correction data Drefg, Drefr, and Drefb to interpolation processing in the gradation direction to generate correction data DHr, DHg, and DHb, which are corrected tables 14R ′, 14G, and 14B. Forward to '.
Thereafter, the X counter 10 and the Y counter 11 count the dot clock signal DCLK and the horizontal clock signal HCLK, and determine the coordinates for displaying the image data DR ′, DG ′, DB ′ on the image display area at a certain timing. Instructed X coordinate data Dx and Y coordinate data Dy are generated. In this example, Dx = 64 and Dy = 64.
Next, based on the X coordinate data Dx and Y coordinate data Dy and the data value of the image data, four correction data that are the basis of the interpolation processing in the coordinate direction are read out from the correction tables 14R ′, 14G, and 14B ′. . Here, for the G color, correction data corresponding to the reference coordinates (1, 1), (128, 1), (1, 128), and (128, 128) are read out, while the R color and the B color are read out. For, correction data corresponding to the reference coordinates (1, 1), (256, 1), (1, 256), and (256, 256) are read out.
Thereafter, the calculation units 15R, 15G, and 15B perform interpolation processing on the read four correction data based on the X and Y coordinate correction data Dx and Dy. The interpolation process is performed using linear interpolation. Therefore, the accuracy is determined according to the distance between the coordinates of the image data to be displayed and the original correction data, and the accuracy is improved as the distance is shorter. Therefore, the accuracy of the correction data Dh generated by the interpolation process is high for G color. As described above, the human visual characteristic is higher in sensitivity of the G color than the R and B colors. Therefore, the quality of the display image can be improved by relatively increasing the correction accuracy of the G color.
In the second embodiment, since the ratios of the respective data amounts of the reference correction data Drefr, Drefg, Drefb are made different according to the human visual characteristics, the reference correction data Drefr, Drefg for all the reference coordinates. , Drefb, 10 bits for Drefg, and 5 bits for Drefr and Drefb, the number of bits of each data may be determined according to visual characteristics.
[0022]
<3. Electronic equipment>
Next, some examples in which the above-described image processing circuit 300 is used in an electronic device will be described.
[0023]
<3-1: Mobile computer>
First, an example in which the image processing circuit 300 is applied to a mobile computer will be described. FIG. 20 is a front view showing the configuration of the computer. In the figure, a computer 1200 includes a main body 1204 provided with a keyboard 1202 and a liquid crystal display 1206. The projector 1100 described above is configured using the liquid crystal display panels 100R, 100G, and 100B corresponding to the RGB colors. The liquid crystal display 1206 is a liquid crystal display panel that can display the RGB colors. Also in this case, in-plane flicker can be almost eliminated by performing gradation direction interpolation processing and coordinate direction interpolation processing in the same manner as the flicker correction circuit 302 described above.
[0024]
<3-2: Mobile phone>
Further, an example in which the image processing circuit 300 is applied to a mobile phone will be described. FIG. 21 is a perspective view showing the configuration of this mobile phone. In the figure, a cellular phone 1300 includes a reflective liquid crystal panel 1005 together with a plurality of operation buttons 1302. In the reflective liquid crystal panel 1005, a front light is provided on the front surface thereof as necessary. If the liquid crystal panel 1005 corresponds to, for example, G color, the correction units UR and UB may be deleted from the flicker correction circuit 302 described above.
In addition to the electronic devices described with reference to FIGS. 20 and 21, a liquid crystal television, a viewfinder type, a monitor direct view type video tape recorder, a car navigation device, a pager, an electronic notebook, a calculator, a word processor, a work Stations, videophones, POS terminals, devices with touch panels, etc. Needless to say, the present invention can be applied to these various electronic devices.
[0025]
<4. Modification>
The present invention is not limited to the electronic devices that are the above-described embodiments and application examples thereof. For example, various modifications described below are possible.
[0026]
First, in each of the above-described embodiments, in order to lower the driving frequency of the data line driving circuit 101, the image signals VIDR, VIDG, and VIDB are phase-expanded to generate the phase-expanded image signals vid1 to vid6, while the correction signal Although phase development correction signals vh1 to vh6 are generated by phase-expanding Vhr, Vhg, and Vhb, the present invention is not limited to this, and can of course be applied to the case where phase expansion is not performed. In this case, for example, for the R color, the image signal VIDR is amplified and inverted based on the polarity inversion signal Sinv, and the counter electrode voltage Vcom and the correction signal Vhr are added to generate the amplitude center voltage VC. The inverted signal may be generated by superimposing the inverted signal on the amplitude center voltage VC.
Second, in each of the above-described embodiments, the reference correction data Dref is stored for each reference coordinate for a plurality of gradation values. However, the present invention is not limited to this, and for a certain gradation value. The reference correction data Dref may be stored for each reference coordinate. In this case, flicker caused by the liquid crystal capacitance value that varies with the change in the gradation value cannot be suppressed, but the variation in the counter electrode voltage Vcom in the counter electrode or the variation in the amount of light obtained in the display area 103 can be suppressed. The flicker by can be suppressed.
Thirdly, in each of the above-described embodiments, the description has been made on the assumption that color display is performed by each color of RGB. However, the present invention is not limited to this, and a monochrome image may be displayed. In this case, the configuration provided for each RBG color may be reduced to one color.
[0027]
【The invention's effect】
As described above, according to the present invention, the reference correction data corresponding to the gradation value of the input image data is stored in advance for a plurality of reference coordinates on the image display area, and the correction signal generated based on the reference correction data is used. In this way, since the amplitude center voltage of the image signal is controlled, the in-plane flicker component can be significantly suppressed.
[Brief description of the drawings]
FIG. 1 is a block diagram showing an electrical configuration of a projector according to a first embodiment of the invention.
FIG. 2 is a plan view showing a configuration example of the projector.
FIG. 3 is a block diagram of a flicker correction circuit used in the projector.
FIG. 4 is a conceptual diagram showing coordinates corresponding to reference correction data in a display area of a liquid crystal display panel used in the projector.
FIG. 5 is a diagram showing a relationship between display characteristics of the liquid crystal display panel and three voltage levels corresponding to reference correction data.
FIG. 6 is a diagram showing storage contents of a ROM 12 of a flicker correction circuit 302 used in the projector.
FIG. 7 is a diagram showing a system configuration for generating reference correction data used in the flicker correction circuit.
FIG. 8 is a diagram illustrating an example of an analysis result of an FFT analyzer.
FIG. 9 is a diagram illustrating an example of a flicker component characteristic with respect to a counter electrode voltage.
FIG. 10 is a diagram showing stored contents of a correction table used in the flicker correction circuit.
FIG. 11 is a flowchart showing the operation of the flicker correction circuit.
FIG. 12 is a block diagram showing the main configuration of a phase expansion circuit 303R.
FIG. 13 is a timing chart showing various signal waveforms of the phase expansion circuit 303R.
FIG. 14 is a block diagram showing a main configuration of an amplification / inversion circuit 304R.
FIG. 15 is a timing chart showing various signal waveforms of the amplifying / inverting unit U1.
FIG. 16 is a block diagram showing a main configuration of a flicker correction circuit 302 ′ of a second embodiment.
FIG. 17 is a conceptual diagram showing coordinates corresponding to reference correction data in a display area of the liquid crystal display panel used in the embodiment.
FIG. 18 is a conceptual diagram showing storage contents of a ROM 12 ′ used in the same embodiment.
FIG. 19 is a conceptual diagram showing storage contents of a correction table 14R ′ used in the embodiment.
FIG. 20 is a front view showing a configuration of a personal computer as an example of an electronic apparatus to which the image processing circuit is applied.
FIG. 21 is a perspective view illustrating a configuration of a mobile phone as an example of an electronic apparatus to which the image processing circuit is applied.
[Explanation of symbols]
10 …… X counter
11 ... Y counter
12 ... ROM (first storage means)
13: Interpolation processing unit (first interpolation processing means)
14R …… Correction table
15R: Calculation unit (second interpolation processing means)
16R: Adder (correction means)
17R: Address generator (reading means)
103 …… Display area (image display area)
300 …… Image processing circuit
302 …… Flicker correction circuit
DR, DG, DB ... Input image data
Dref …… Reference correction data
DH (DHr, DHg, DHb) ...... correction data (first correction data)
Dh: Correction data (second correction data)
DCLK …… Dot clock signal (first clock signal)
HCLK: Horizontal clock signal (second clock signal)
Dx, Dy: X coordinate data, Y coordinate data

Claims (13)

An electro-optical material is sandwiched between a first substrate and a second substrate, and includes a plurality of pixel electrodes and a counter electrode facing the plurality of pixel electrodes, and a counter electrode voltage is applied to the counter electrode. On the other hand, a flicker reduction method for reducing flicker of an electro-optical device that applies a polarity-reversed image signal obtained by reversing the polarity of a voltage corresponding to a gradation value of an image signal to be displayed to each pixel electrode,
While changing the counter electrode voltage, measure flicker components at a plurality of reference coordinates of the image display area for a plurality of gradation values,
Based on the measurement result, an amplitude center voltage that becomes an amplitude center when the polarity of the voltage of the image signal is inverted is obtained for each of the plurality of reference coordinates and the plurality of gradation values so that the flicker component is minimized,
A difference voltage between the amplitude center voltage and the counter electrode voltage is determined for each of the plurality of reference coordinates and the plurality of gradation values,
The difference voltage is stored as reference correction data in advance in association with the plurality of reference coordinates and the plurality of gradation values,
By applying interpolation processing to the reference correction data with respect to gradation values, each correction data corresponding to each gradation value that can be taken by the image signal is generated for each reference coordinate,
Based on the gradation value of the image signal and the coordinates on the image display area, each of the first correction data corresponds to a plurality of reference coordinates in the vicinity of the coordinates and corresponds to the gradation value. Select the first correction data,
By performing interpolation processing for the coordinates on the selected first correction data, second correction data corresponding to the image signal is generated,
Generating an amplitude center voltage based on the second correction data and the counter electrode voltage;
A method for reducing flicker, characterized in that the polarity-inverted image signal is generated by inverting the polarity of the voltage of the image signal at a constant cycle using the amplitude center voltage as a reference voltage, and applying this to the pixel electrodes. An electro-optical material is sandwiched between a first substrate and a second substrate, and includes a plurality of pixel electrodes and a counter electrode facing the plurality of pixel electrodes, and a counter electrode voltage is applied to the counter electrode. On the other hand, an image processing circuit for reducing flicker of an electro-optical device that applies a polarity-reversed image signal obtained by reversing the polarity of a voltage corresponding to a gradation value of an image signal to be displayed to each pixel electrode,
First storage means for preliminarily storing each reference correction data corresponding to a plurality of gradation values selected from among each gradation value that can be taken by the input image data for a plurality of reference coordinates on the image display area;
The first correction data corresponding to each gradation value that can be taken by the input image data is obtained for each reference coordinate by performing interpolation processing on the reference correction data read from the first storage means with respect to the gradation value. First interpolation processing means to generate,
Second storage means for storing each first correction data in association with each reference coordinate and gradation value;
Based on the gradation value of the input image data and the coordinates on the image display area, the gradation value corresponding to a plurality of reference coordinates near the coordinates is selected from the stored first correction data. Selecting means for selecting corresponding first correction data;
Second interpolation processing means for generating second correction data corresponding to the input image data by performing interpolation processing on the selected first correction data with respect to coordinates;
An amplitude center voltage is generated based on the second correction data and the counter electrode voltage, and the polarity of the image signal is inverted at a constant period using the amplitude center voltage as a reference voltage to generate the polarity-inverted image signal. An image processing circuit for an electro-optical device, comprising: a polarity inversion signal generation unit. The first substrate in the image display area is switched in correspondence with a plurality of data lines extending in the Y direction, a plurality of scanning lines extending in the X direction, and intersections of the data lines and the scanning lines. An element and the pixel electrode are formed, and the polarity inversion signals of a plurality of systems are supplied to a plurality of the data lines,
The polarity inversion signal generating means includes
An image signal phase expansion unit that divides the input image data into a plurality of systems and extends a time axis to generate a plurality of systems of phase expansion image signals;
In synchronization with the image signal phase expansion means, a correction signal phase expansion unit that divides the second correction data into a plurality of systems and extends a time axis to generate a plurality of systems of correction signals;
Each amplitude center voltage is generated for each system based on each correction signal and the counter electrode voltage, and each phase developed image signal is inverted in polarity at a constant period using each amplitude center voltage as a reference voltage. The image processing circuit of the electro-optical device according to claim 2, further comprising a polarity reversing unit that generates a system polarity reversal image signal. The first substrate in the image display area is switched in correspondence with a plurality of data lines extending in the Y direction, a plurality of scanning lines extending in the X direction, and intersections of the data lines and the scanning lines. An element and the pixel electrode are formed;
The selection means includes
An X counter that counts a first clock signal serving as a time reference for scanning in the X direction of the image display area, and generates X coordinate data that indicates an X coordinate on which the input image data is to be displayed on the image display area; ,
A Y counter that counts a second clock signal that serves as a time reference for scanning in the Y direction of the image display area, and generates Y coordinate data indicating the Y coordinate to display the input image data on the image display area;
Based on the X coordinate data and the Y coordinate data, a plurality of reference coordinates in the vicinity of the coordinates of the input image data are specified, and based on the gradation values of the input image data and the specified reference coordinates. Reading means for reading out a plurality of corresponding correction data from the second storage means,
The second interpolation processing means uses each coordinate of the input image data specified by the X coordinate data and the Y coordinate data and each reference coordinate of the plurality of first correction data read by the reading means. The image processing circuit of the electro-optical device according to claim 2, wherein each distance from the input image data to the coordinates of the input image data is specified, and interpolation processing is performed based on the specified distance. The image display area of the electro-optical device uses liquid crystal as an electro-optical material,
The reference correction data stored in the first storage means for a plurality of reference coordinates of the image display area are respectively at first and second change points at which display characteristic curves indicating transmittance with respect to the applied voltage of the liquid crystal change sharply. 3. The electro-optical device according to claim 2, wherein the electro-optical device corresponds to the corresponding first and second gradation values and one or more gradation values between the first and second gradation values. Image processing circuit. The first interpolation processing means performs the interpolation processing based on the reference correction data for each gradation value from the first gradation value to the second gradation value to generate the first correction data,
Each gradation value less than the first gradation value corresponds to the reference correction data corresponding to the first gradation value, and the reference correction data exceeding the second gradation value corresponds to the second gradation value. Outputting the reference correction data as the first correction data;
The second storage means stores the first correction data for each gradation value from the first gradation value to the second gradation value;
When the gradation value of the input image data is less than the first gradation value, the selection unit selects the first correction data corresponding to the first gradation value, and the gradation of the input image data When the value is in the range from the first gradation value to the second gradation value, the first correction data corresponding to each gradation value is selected, and the gradation value of the input image data is the first gradation value. 6. The image processing circuit according to claim 5, wherein the first correction data corresponding to the second gradation value is selected when exceeding two gradation values. The input image data is composed of data corresponding to RGB colors,
The reference correction data is composed of data corresponding to RGB colors,
The first interpolation processing means generates the first correction data for each color of RGB,
The image processing circuit of the electro-optical device according to claim 2, wherein the second storage unit and the second interpolation processing unit are provided for each of RGB colors.   The image processing circuit of the electro-optical device according to claim 7, wherein a data amount of the reference correction data for the G color is larger than a data amount of the reference correction data for the R color or the B color.   9. The reference correction data for the R color or the B color corresponds to coordinates obtained by extracting a plurality of reference coordinates corresponding to the reference correction data for the G color according to a certain rule. An image processing circuit of the electro-optical device. The input image data is composed of data corresponding to RGB colors,
The reference correction data is composed of data corresponding to RGB colors,
The first storage means, the first interpolation processing means, the X counter, and the Y counter are combined for each color of RGB,
The image processing circuit of the electro-optical device according to claim 4, wherein the second storage unit, the second interpolation processing unit, and the reading unit are provided for each of RGB colors. An image processing circuit according to any one of claims 2 to 10,
An image display unit including a plurality of scanning lines, a plurality of data lines, and pixels corresponding to intersections of the scanning lines and the data lines;
An electro-optical device comprising: a drive circuit that displays an image on the image display unit based on a polarity-reversed image signal generated by the image processing circuit. In a driving method of an electro-optical device including a plurality of scanning lines, a plurality of data lines, and an image display unit including a pixel corresponding to the intersection of each scanning line and each data line,
The method for driving an electro-optical device, wherein the flicker reduction method according to claim 1 is used when an image is displayed on the image display unit.   An electronic apparatus comprising the electro-optical device according to claim 11.

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