JP3768302B2 - Method for manufacturing compound semiconductor device - Google Patents
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- JP3768302B2 JP3768302B2 JP26520996A JP26520996A JP3768302B2 JP 3768302 B2 JP3768302 B2 JP 3768302B2 JP 26520996 A JP26520996 A JP 26520996A JP 26520996 A JP26520996 A JP 26520996A JP 3768302 B2 JP3768302 B2 JP 3768302B2
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- 239000004065 semiconductor Substances 0.000 title claims description 103
- 150000001875 compounds Chemical class 0.000 title claims description 60
- 238000004519 manufacturing process Methods 0.000 title claims description 28
- 238000000034 method Methods 0.000 title claims description 17
- 239000000758 substrate Substances 0.000 claims description 112
- SBIBMFFZSBJNJF-UHFFFAOYSA-N selenium;zinc Chemical compound [Se]=[Zn] SBIBMFFZSBJNJF-UHFFFAOYSA-N 0.000 claims description 89
- -1 ZnSe compound Chemical class 0.000 claims description 38
- 239000013078 crystal Substances 0.000 claims description 33
- 229910001218 Gallium arsenide Inorganic materials 0.000 claims description 31
- 238000005530 etching Methods 0.000 claims description 31
- 230000001678 irradiating effect Effects 0.000 claims description 16
- 239000007864 aqueous solution Substances 0.000 claims description 15
- 238000004544 sputter deposition Methods 0.000 claims description 6
- 229910004298 SiO 2 Inorganic materials 0.000 claims description 5
- 238000010030 laminating Methods 0.000 claims description 5
- 238000000151 deposition Methods 0.000 claims description 4
- 239000000243 solution Substances 0.000 claims 1
- 239000010410 layer Substances 0.000 description 77
- 230000007547 defect Effects 0.000 description 6
- 238000005253 cladding Methods 0.000 description 4
- 239000011521 glass Substances 0.000 description 4
- 229910021417 amorphous silicon Inorganic materials 0.000 description 3
- 230000015572 biosynthetic process Effects 0.000 description 3
- 230000000052 comparative effect Effects 0.000 description 3
- 239000000203 mixture Substances 0.000 description 3
- 238000005498 polishing Methods 0.000 description 3
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- 229910007709 ZnTe Inorganic materials 0.000 description 2
- 238000007796 conventional method Methods 0.000 description 2
- 238000005566 electron beam evaporation Methods 0.000 description 2
- ZAMOUSCENKQFHK-UHFFFAOYSA-N Chlorine atom Chemical compound [Cl] ZAMOUSCENKQFHK-UHFFFAOYSA-N 0.000 description 1
- 229910000530 Gallium indium arsenide Inorganic materials 0.000 description 1
- 238000003486 chemical etching Methods 0.000 description 1
- 239000000460 chlorine Substances 0.000 description 1
- 229910052801 chlorine Inorganic materials 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 229910052681 coesite Inorganic materials 0.000 description 1
- 229910052906 cristobalite Inorganic materials 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000007774 longterm Effects 0.000 description 1
- 238000001451 molecular beam epitaxy Methods 0.000 description 1
- 229910052757 nitrogen Inorganic materials 0.000 description 1
- 230000006798 recombination Effects 0.000 description 1
- 238000005215 recombination Methods 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
- 235000012239 silicon dioxide Nutrition 0.000 description 1
- 239000002356 single layer Substances 0.000 description 1
- 229910052682 stishovite Inorganic materials 0.000 description 1
- 238000005979 thermal decomposition reaction Methods 0.000 description 1
- 229910052905 tridymite Inorganic materials 0.000 description 1
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- Electrodes Of Semiconductors (AREA)
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- Physical Deposition Of Substances That Are Components Of Semiconductor Devices (AREA)
- Led Devices (AREA)
- Crystals, And After-Treatments Of Crystals (AREA)
Description
【０００１】
【発明の属する技術分野】
本発明は、青色からオレンジ色にいたる発光素子等に利用される半導体発光素子およびその製造方法に関するもので、特にＧａＡｓあるいはＩｎＰ基板を利用したＺｎＳｅ系化合物を発光材料とした発光素子およびその製造方法に関するものである。
【０００２】
【従来の技術】
ＺｎＳｅ系発光素子は、従来ＧａＡｓ、ＩｎＰあるいはＺｎＳｅ基板上に結晶成長をさせることにより作成されており、その代表的な構造は図１に示すとおりである。
この図１を参照して説明すると、例えばＧａＡｓ基板上にＺｎＳｅ系化合物半導体を用いた素子を成長させる場合に、ＧａＡｓとＺｎＳｅとでは格子定数がそれぞれ５．６６５４Åと５．６６９Åと異なっているため、ＺｎＳＳｅ等のＧａＡｓに格子整合するような化合物組成を選んで成長させる方法が一般的に採用されている。
エピタキシャル層の結晶性を向上させる手段として、基板とエピタキシャル成長部の界面にバッファ層と呼ばれる緩衝層を成長させることも行われている。
輝度を高める対策として、キャリアの再結合を効率よく行わせるために、活性層を単一層から複数層にした多重量子井戸を用いる手段をとる場合もある。
またＺｎＳｅ単結晶基板上に素子を成長させることにより、格子定数の差に起因する結晶欠陥を無くし、高輝度化と長寿命化を達成する試みも行われている。
【０００３】
しかしこのような従来技術にあっては、次のような欠点があった。
（１）ＧａＡｓ基板上にＺｎＳｅ系化合物半導体を成長させると１０3 〜１０7 ｃｍ-2オーダの欠陥密度が発生する。こうした欠陥は活性層内にダークラインディフェクトと呼ばれる発光しない部分を形成し、素子の明るさを減少させることになる。またこの欠陥は時間が経過するとともに増殖して、ついには素子が発光しなくなるので、長期の信頼性を確保することが難しかった。
（２）本質的な問題として、ＧａＡｓおよびＩｎＰのバンドギャップがそれぞれ１．４６ｅＶ、１．２７ｅＶでありＺｎＳｅのバンドギャップ値約２．７ｅＶに比べて小さいため、ＧａＡｓあるいはＩｎＰ基板上に発光素子を形成した場合、基板に発光が吸収され、これが発光素子の高輝度化の障害となっていた。
【０００４】
【発明が解決しようとする課題】
ＧａＡｓあるいはＩｎＰを基板としてＺｎＳｅ系化合物半導体を用いた発光素子は、上記（１）、（２）の欠点を有している。そこでこれらの問題点を克服するために、（１）については、ＺｎＳｅ、ＺｎＳＳｅ超格子を生成させたり、また（２）については、基板を除去して活性層からの発光を基板に吸収させなくすることにより光量が減らなくなり、高輝度が達成できる。
本発明の目的は、上記（１）、（２）の問題を解決できるＺｎＳｅ系半導体発光素子とその製造方法を提供することにある。
【０００５】
【課題を解決するための手段】
ＧａＡｓまたはＩｎＰを基板としてＺｎＳｅ系化合物半導体を用いた発光素子を成長させる場合、基板をエッチングによりキャビティー加工し、そのキャビティー内にＺｎＳｅ系の化合物半導体を成長させ、その後基板の裏面を研磨およびエッチングのどちらか、あるいはこれらの両方を用いて除去する。これにより活性層からの発光が基板に吸収されない高輝度発光素子を容易に作成することができる。
あるいは、ＧａＡｓまたはＩｎＰ基板上にＺｎＳｅ系化合物半導体を成長させて発光素子を作成する場合、基板の裏面の一部を研磨およびエッチングのどちらか、あるいはこれらの両方を用いて除去して素子の底部を露出させる。これにより、素子の発光が基板に吸収されない高輝度発光素子を容易に作成することができる。
すなわち、本発明のＺｎＳｅ系化合物半導体用基板および発光素子は、単結晶基板上にｐｎ接合を形成して発光素子を作成し、その後基板の裏面を除去して基板底部にＺｎＳｅ素子層を露出させ、この露出部と上部ＺｎＳｅ層に正負の電極を形成することを特徴とした高輝度発光素子に関するものである。
【０００６】
すなわち、本発明は第１に、ＧａＡｓ単結晶基板の片面にＺｎＳｅ系化合物半導体が積層されてそのＺｎＳｅ系化合物半導体層に正負一対の電極が形成されてなるＺｎＳｅ系化合物半導体発光素子の製造方法において、前記ＺｎＳｅ系化合物半導体層が積層された面と対向する基板面からＨｅ−Ｎｅレーザ光を照射しながらＨ2ＳＯ4とＨ2Ｏ2とを含む水溶液でエッチングを行って基板の一部をＺｎＳｅ系化合物半導体層に達する深さまで取り除きＺｎＳｅ系化合物半導体を露出する工程と、露出されたＺｎＳｅ系化合物半導体表面に正負いずれかの電極を形成する工程とを含むＺｎＳｅ系化合物半導体素子の製造方法；第２に、ＧａＡｓ単結晶基板の片面にＺｎＳｅ系化合物半導体が積層されてそのＺｎＳｅ系化合物半導体層に正負一対の電極が形成されてなるＺｎＳｅ系化合物半導体発光素子の製造方法において、単結晶基板上にＺｎＳｅ系化合物半導体層を積層してｐｎ接合を有する発光素子を形成する工程と、前記ＺｎＳｅ系化合物半導体層が積層された面と対向する基板面を素子底部が露出するまでＨｅ−Ｎｅレーザ光を照射しながらＨ2ＳＯ4とＨ2Ｏ2とを含む水溶液でエッチングを行って除去する工程と、露出された素子表面に正負いずれかの電極を形成する工程とを含むＺｎＳｅ系化合物半導体素子の製造方法；第３に、ＧａＡｓ単結晶基板の片面にＺｎＳｅ系化合物半導体が積層されてそのＺｎＳｅ系化合物半導体層に正負一対の電極が形成されてなるＺｎＳｅ系化合物半導体発光素子の製造方法において、単結晶基板の片面にエッチングによるキャビティー加工を行う工程と、該キャビティー内にＺｎＳｅ系化合物半導体層を積層してｐｎ接合を有する発光素子を形成する工程と、前記ＺｎＳｅ系化合物半導体層が積層された面と対向する基板面を素子底部が露出するまでＨｅ−Ｎｅレーザ光を照射しながらＨ2ＳＯ4とＨ2Ｏ2とを含む水溶液でエッチングを行って除去する工程と、露出された素子表面に正負いずれかの電極を形成する工程とを含むＺｎＳｅ系化合物半導体素子の製造方法；第４に、ＧａＡｓ単結晶基板の片面にＺｎＳｅ系化合物半導体が積層されてそのＺｎＳｅ系化合物半導体層に正負一対の電極が形成されてなるＺｎＳｅ系化合物半導体発光素子の製造方法において、単結晶基板の片面にレジストによりドットを形成し、次いでスパッタ法により該面にＳｉＯ2を堆積させた後、該レジストを除去して該面に穴あきマスクを形成する工程と、該面にエッチングによるキャビティー加工を行う工程と、該キャビティー内にＺｎＳｅ系化合物半導体層を積層してｐｎ接合を有する発光素子を形成する工程と、前記ＺｎＳｅ系化合物半導体層が積層された面と対向する基板面を素子底部が露出するまでＨｅ−Ｎｅレーザ光を照射しながらＨ2ＳＯ4とＨ2Ｏ2とを含む水溶液でエッチングを行って除去する工程と、露出された素子表面に正負いずれかの電極を形成する工程とを含むＺｎＳｅ系化合物半導体素子の製造方法；第５に、単結晶基板の片面にＺｎＳｅ系化合物半導体が積層されてそのＺｎＳｅ系化合物半導体層に正負一対の電極が形成されてなるＺｎＳｅ系化合物半導体発光素子の製造方法において、ＺｎＳｅ系化合物半導体に格子整合するＧａＡｓ単結晶基板上に緩衝層（バッファ層）として、ＺｎＳｅ、ＺｎＳＳｅ超格子を成長させる工程と、該緩衝層の上にｐｎ接合を有する発光素子を形成する工程と、前記ＺｎＳｅ系化合物半導体層が積層された面と対向する基板面を素子底部が露出するまでＨｅ−Ｎｅレーザ光を照射しながらＨ2ＳＯ4とＨ2Ｏ2とを含む水溶液でエッチングを行って除去する工程と、露出された素子表面に正負いずれかの電極を形成する工程とを含むＺｎＳｅ系化合物半導体素子の製造方法；第６に、単結晶基板の片面にＺｎＳｅ系化合物半導体が積層されてそのＺｎＳｅ系化合物半導体層に正負一対の電極が形成されてなるＺｎＳｅ系化合物半導体発光素子の製造方法において、ＺｎＳｅ系化合物半導体に格子整合するＧａＡｓ単結晶基板の片面にエッチングによるキャビティー加工を行う工程と、該キャビティー内に緩衝層（バッファ層）としてＺｎＳｅ、ＺｎＳＳｅ超格子を成長させる工程と、該緩衝層の上にｐｎ接合を有する発光素子を形成する工程と、前記ＺｎＳｅ系化合物半導体層が積層された面と対向する基板面を素子底部が露出するまでＨｅ−Ｎｅレーザ光を照射しながらＨ2ＳＯ4とＨ2Ｏ2とを含む水溶液でエッチングを行って除去する工程と、露出された素子表面に正負いずれかの電極を形成する工程とを含むＺｎＳｅ系化合物半導体素子の製造方法；第７に、単結晶基板の片面にＺｎＳｅ系化合物半導体が積層されてそのＺｎＳｅ系化合物半導体層に正負一対の電極が形成されてなるＺｎＳｅ系化合物半導体発光素子の製造方法において、ＺｎＳｅ系化合物半導体に格子整合するＧａＡｓ単結晶基板の片面にレジストによりドットを形成し、次いでスパッタ法により該面にＳｉＯ2を堆積させた後、該レジストを除去して該面に穴あきマスクを形成する工程と、該面にエッチングによるキャビティー加工を行う工程と、該キャビティー内に緩衝層（バッファ層）としてＺｎＳｅ、ＺｎＳＳｅ超格子を成長させる工程と、該緩衝層の上にｐｎ接合を有する発光素子を形成する工程と、前記ＺｎＳｅ系化合物半導体層が積層された面と対向する基板面を素子底部が露出するまでＨｅ−Ｎｅレーザ光を照射しながらＨ2ＳＯ4とＨ2Ｏ2とを含む水溶液でエッチングを行って除去する工程と、露出された素子表面に正負いずれかの電極を形成する工程とを含むＺｎＳｅ系化合物半導体素子の製造方法である。
【０００７】
【発明の実施の形態】
図２は本発明の実施例１に示した発光素子基板の断面構造を示す。
あらかじめＧａＡｓ基板には、エッチングによりキャビティーを形成する。キャビティー内にバッファ層を形成すると基板の平坦性が向上することで欠陥の生成が抑えられる。ＧａＡｓ基板を使用する場合、バッファ層としてはまずＧａＡｓバッファ層を形成した後、ＺｎＳｅ／ＺｎＳＳｅ超格子バッファを形成すると良い。またＩｎＰ基板を使用する場合は、ＩｎＧａＡｓバッファ層とすることが望ましい。
次に、バッファ層上にＺｎＳｅ系化合物半導体を用いてｐｎ接合を形成して発光素子とする。次に、基板の裏面に研磨とエッチングを行って素子底部を除去し、ＺｎＳｅ層を露出させる。この露出部と上部ＺｎＳｅ層に正負の電極を形成して発光素子とする。素子断面図を図３から図５に示した。
【０００８】
図６から図９は、本発明の実施例２に示した発光素子の断面構造を示す。素子は単結晶上にバッファ層を成長させ、ＺｎＳｅ系化合物半導体を用いてｐｎ接合を形成し、発光素子とする。次に、素子底部の基板を除去し、ＺｎＳｅ素子層を露出させる。この露出部と上部ＺｎＳｅ層に正負の電極を形成して発光素子とする。
すなわち本発明のＺｎＳｅ系発光素子では、基板を除去したことにより基板へ発光が到達する際この基板での光の吸収がなくなる。すなわち活性層からの光が基板に吸収されるのを防止できるため、より高効率な発光素子を提供することができたのである。
【０００９】
【実施例１】
図２から図５は、実施例１において行った素子の作成手順を素子の断面図で示したものである。以下にこれらの図を用いて実施例１を説明する。
基板１としては高抵抗の面方位（１００）のＧａＡｓ基板を使用した。基板１には洗浄後レジストにより直径７００μｍのドットを形成した。これをマスクとして、スパッタ法により基板表面に約１００μｍのＳｉＯ2 を堆積させた。その後超音波を用いてレジストをリフトオフして、基板表面に直径７００μｍの穴あきマスクを形成した。次にＮＨ4 ＯＨ：Ｈ2 Ｏ2 ：Ｈ2 Ｏ（混合比、１：２０：２０）を用いて約７分間エッチングを行い、直径７００μｍ、深さ２０μｍのキャビティー９を形成した。キャビティー形成後の基板は図２に示した。
【００１０】
素子の作成は分子線エピタキシ法により行った。以下その詳細を説明する。
基板１は約１００℃にて３時間のベーキングを行った後、１０-10 Ｔｏｒｒに真空排気された成長室に導入した。熱分解法により基板の酸化膜を除去した後、多重量子井戸バッファ層２としてＺｎＳｅとＺｎＳ0.13Ｓｅ0.87をそれぞれ約３ｎｍ交互に０．１μｍ成長させた。次にｎ型クラッド層３として、Ｍｇ0.1 Ｚｎ0.9 Ｓ0.15Ｓｅ0.85（塩素ドープ）を約１．５μｍ成長させた。活性層４はＺｎ0.9 Ｃｄ0.1 ＳｅとＭｇ0.1 Ｚｎ0.9 Ｓ0.15Ｓｅ0.85を交互に６層成長させた。成長膜厚はそれぞれ６．５ｎｍおよび８．５ｎｍとした。さらに、ｐ型クラッド層５としてＭｇ0.1 Ｚｎ0.9 Ｓ0.15Ｓｅ0.85（窒素ドープ）を約１．５μｍ成長させた。バッファ層６としてｐ型のＺｎ0.06Ｓｅ0.94とＺｎＳｅをそれぞれ０．１μｍ成長させ、コンタクト層８としてＺｎＳｅ、ＺｎＴｅの擬傾斜組成層７を５２ｎｍ成長させて、ＺｎＴｅにて５０ｎｍ膜厚でキャップした。ここでＳｉＯ2 によりマスクされた部分には付着係数の違いによりＺｎＳｅ膜は堆積しておらず、キャビティー９内のみに結晶が成長していた。これを図３に素子形成後の基板として示した。
成長が終了した基板１は、その成長面にレジストを塗布してガラス基板に固定した後、裏面をメカノケミカル研磨により素子界面の下部から約１００μｍまで除去した。これを図４に示した。
【００１１】
次に、基板１をガラス基板に固定した状態のままＨ2 ＳＯ4 ：Ｈ2 Ｏ2 （混合比２：１）水溶液中に入れ、Ｈｅ−Ｎｅレーザ光（波長：６３２８．２Å）を照射しながらエッチングを行い、ＺｎＳｅ素子の下部層を露出させた。ここでＨｅーＮｅレーザ光を使用するホトアシストケミカルエッチングを用いたのは、ＧａＡｓとＺｎＳｅのバンドギャップの差によりＧａＡｓ基板のみがエッチングされ、ＺｎＳｅ層においてエッチングが停止する効果を利用して、ＺｎＳｅ素子層が破壊されるのを防止するためである。電極構造としては、下部のｎ層にはＴｉ／Ｐｔ／Ａｕを各０．１μｍ、０．１μｍ、０．３μｍ厚さに、上部のｐ層には、Ｐｄ／Ｐｔ／Ａｕ層を各０．１μｍ、０．１μｍ、０．３μｍ厚さに電子線蒸着により成膜して発光素子とした。これを図５に示した。
得られた素子の特性を表１に示す。
【００１２】
【表１】
【実施例２】
図６から図９は、実施例２で行った素子の作成手順を素子の断面図で示したものである。以下これらの図を用いて実施例２を説明する。
ｎ型面方位（１００）のＧａＡｓ基板上に実施例１と同様の構造の発光素子を形成した。これを図６に示した。
次に、基板裏面にレジストにより直径７００μｍのドットを形成し、これをマスクとしてスパッタ法により基板表面に約１０μｍのアモルフォスシリコン（ａーＳｉ）を堆積させた。これを図７に示した。
その後超音波を用いてレジストをリフトオフして、基板裏面に直径７００μｍの穴あきマスクを形成した。基板の成長表面をレジストにてガラス基板に固定し、次にガラス基板に固定した状態のまま基板をＨ2 ＳＯ4 ：Ｈ2 Ｏ2 （混合比２：１）水溶液中に入れ、Ｈｅ−Ｎｅレーザ光（波長：６３２８．２Å）を照射しながらエッチングを行い、ＺｎＳｅ素子の下部層を露出させた。これを図８に示した。
電極構造は、実施例１と同様に作成した。これを図９に示した。
得られた素子の特性は、表１に示した実施例１と同じであった。
【００１４】
【比較例】
図１は比較例の作成手順を素子断面図で示したものである。以下この断面図を用いて比較例を説明する。
ｎ型面方位（１００）のＧａＡｓ基板上に実施例２と同様の構造の発光素子を形成した。基板裏面にｎ層電極としてＴｉ／Ｐｔ／Ａｕを各０．１μｍ、０．１μｍ、０．３μｍの厚さに、上部のｐ層電極としてＰｄ／Ｐｔ／Ａｕを各０．１μｍ、０．１μｍ、０．３μｍの厚さに電子線蒸着法により成膜して発光素子とした。得られた素子の明るさは、基板を除去した場合（実施例１、２）の約半分であった。素子特性の詳細は、表１に他の実施例と共に示した。
【００１５】
【発明の効果】
本発明の製造方法では、単結晶基板上にｐｎ接合を形成して発光素子を作成し、その後基板の裏面を除去して基板底部にＺｎＳｅ素子層を露出させ、この露出部と上部ＺｎＳｅ層に正負の電極を形成しているので、素子の発光が基板に吸収されず、表１に示すように従来法に比べて高輝度の発光素子を容易に作成することが可能になった。
【図面の簡単な説明】
【図１】ＺｎＳｅ素子の断面図である。
【図２】実施例１におけるキャビティー形成後の基板の断面図である。
【図３】実施例１における素子形成後の基板の断面図である。
【図４】実施例１における素子下部の基板を除去した後の基板の断面図である。
【図５】実施例１において製作した発光素子の断面図である。
【図６】実施例２における素子形成後の基板の断面図である。
【図７】実施例２におけるａーＳｉマスクを形成した基板の断面図である。
【図８】実施例２におけるエッチング後の基板の断面図である。
【図９】実施例２において製作した発光素子の断面図である。
【符号の説明】
１ 基板
２ ｎ型バッファ層
３ ｎ型半導体層（クラッド層）
４ 活性層
５ ｐ型半導体層（クラッド層）
６ ｐ型バッファ層
７ 擬傾斜組成層
８ コンタクト層
９ キャビティー[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor light emitting device used for a light emitting device ranging from blue to orange and the like, and a method for manufacturing the same. It is about.
[0002]
[Prior art]
A ZnSe-based light emitting element is conventionally produced by crystal growth on a GaAs, InP or ZnSe substrate, and a typical structure thereof is as shown in FIG.
Referring to FIG. 1, for example, when an element using a ZnSe-based compound semiconductor is grown on a GaAs substrate, the lattice constants of GaAs and ZnSe are different from 5.6654Å and 5.669Å, respectively. In general, a method of growing by selecting a compound composition that lattice matches with GaAs such as ZnSSe is adopted.
As means for improving the crystallinity of the epitaxial layer, a buffer layer called a buffer layer is grown on the interface between the substrate and the epitaxial growth portion.
As a measure to increase the luminance, there is a case in which means for using a multiple quantum well in which the active layer is changed from a single layer to a plurality of layers may be taken in order to efficiently perform carrier recombination.
Attempts have also been made to achieve higher brightness and longer life by growing elements on a ZnSe single crystal substrate to eliminate crystal defects caused by differences in lattice constants.
[0003]
However, such conventional techniques have the following drawbacks.
(1) When a ZnSe compound semiconductor is grown on a GaAs substrate, a defect density of the order of 10 3 to 10 7 cm −2 is generated. Such a defect forms a non-light-emitting portion called a dark line defect in the active layer, thereby reducing the brightness of the device. Further, this defect grows with time, and finally the device does not emit light, so it was difficult to ensure long-term reliability.
(2) As an essential problem, since the band gaps of GaAs and InP are 1.46 eV and 1.27 eV, respectively, which is smaller than the band gap value of ZnSe of about 2.7 eV, a light emitting element is formed on a GaAs or InP substrate. When formed, light emission was absorbed by the substrate, which was an obstacle to increasing the luminance of the light emitting element.
[0004]
[Problems to be solved by the invention]
A light emitting device using a ZnSe-based compound semiconductor with GaAs or InP as a substrate has the disadvantages (1) and (2). Therefore, in order to overcome these problems, a ZnSe or ZnSSe superlattice is generated for (1), or the substrate is removed so that light emission from the active layer is not absorbed by the substrate. By doing so, the amount of light is not reduced, and high brightness can be achieved.
An object of the present invention is to provide a ZnSe-based semiconductor light emitting device capable of solving the problems (1) and (2) and a method for manufacturing the same.
[0005]
[Means for Solving the Problems]
When growing a light-emitting device using a ZnSe-based compound semiconductor with GaAs or InP as a substrate, the substrate is cavity processed by etching, a ZnSe-based compound semiconductor is grown in the cavity, and then the back surface of the substrate is polished and polished. Either or both of the etching are used for removal. Thereby, a high-luminance light-emitting element in which light emitted from the active layer is not absorbed by the substrate can be easily produced.
Alternatively, when a light emitting device is formed by growing a ZnSe-based compound semiconductor on a GaAs or InP substrate, a part of the back surface of the substrate is removed by polishing and / or etching to remove the bottom of the device. To expose. Thereby, a high-luminance light-emitting element in which the light emission of the element is not absorbed by the substrate can be easily produced.
That is, the ZnSe-based compound semiconductor substrate and the light emitting device of the present invention are formed by forming a pn junction on a single crystal substrate, and then removing the back surface of the substrate to expose the ZnSe device layer at the bottom of the substrate. The present invention relates to a high-luminance light emitting device characterized in that positive and negative electrodes are formed on the exposed portion and the upper ZnSe layer.
[0006]
That is, the present invention firstly relates to a method of manufacturing a ZnSe compound semiconductor light emitting device in which a ZnSe compound semiconductor is laminated on one surface of a GaAs single crystal substrate and a pair of positive and negative electrodes are formed on the ZnSe compound semiconductor layer. Then, etching is performed with an aqueous solution containing H 2 SO 4 and H 2 O 2 while irradiating a He—Ne laser beam from the surface of the substrate facing the surface on which the ZnSe-based compound semiconductor layer is laminated, and a part of the substrate is formed. A method for producing a ZnSe-based compound semiconductor device, comprising: removing a ZnSe-based compound semiconductor layer to a depth reaching the ZnSe-based compound semiconductor layer; exposing the ZnSe-based compound semiconductor; and forming a positive or negative electrode on the exposed ZnSe-based compound semiconductor surface; Second, a ZnSe-based compound semiconductor is stacked on one surface of a GaAs single crystal substrate, and a pair of positive and negative electrodes is formed on the ZnSe-based compound semiconductor layer. In a method for manufacturing a ZnSe-based compound semiconductor light-emitting device having electrodes formed thereon, a step of forming a light-emitting device having a pn junction by stacking a ZnSe-based compound semiconductor layer on a single crystal substrate, and the ZnSe-based compound semiconductor layer comprising: Etching with an aqueous solution containing H 2 SO 4 and H 2 O 2 while irradiating the substrate surface opposite to the laminated surface with He—Ne laser light until the bottom of the device is exposed, and removing the substrate surface. Forming a ZnSe-based compound semiconductor device including a step of forming either a positive or negative electrode on the surface of the device; third, a ZnSe-based compound semiconductor layer formed by laminating a ZnSe-based compound semiconductor on one surface of a GaAs single crystal substrate In a method of manufacturing a ZnSe-based compound semiconductor light-emitting device in which a pair of positive and negative electrodes are formed on a single crystal substrate, a cavity is added to one side of a single crystal substrate by etching. Forming a light emitting device having a pn junction by laminating a ZnSe-based compound semiconductor layer in the cavity, and a substrate surface facing the surface on which the ZnSe-based compound semiconductor layer is stacked. Etching with an aqueous solution containing H 2 SO 4 and H 2 O 2 while irradiating a He—Ne laser beam until the bottom is exposed, and forming either positive or negative electrode on the exposed element surface And, fourth, a ZnSe compound semiconductor device comprising a ZnSe compound semiconductor layered on one surface of a GaAs single crystal substrate and a pair of positive and negative electrodes formed on the ZnSe compound semiconductor layer. the method of manufacturing a system compound semiconductor light-emitting device, a resist by forming dots on one side of the single-crystal substrate, and then after depositing the SiO 2 to said surface by sputtering Removing the resist to form a perforated mask on the surface; performing a cavity processing by etching on the surface; and emitting light having a pn junction by laminating a ZnSe-based compound semiconductor layer in the cavity H 2 SO 4 and H 2 O 2 while irradiating the substrate surface opposite to the surface on which the ZnSe-based compound semiconductor layer is laminated and irradiating a He—Ne laser beam until the bottom of the device is exposed. A method of manufacturing a ZnSe-based compound semiconductor device, comprising: a step of etching and removing with an aqueous solution containing; and a step of forming a positive or negative electrode on the exposed surface of the device; fifth, ZnSe on one surface of a single crystal substrate; In a method for manufacturing a ZnSe compound semiconductor light emitting device, in which a ZnSe compound semiconductor is laminated and a pair of positive and negative electrodes are formed on the ZnSe compound semiconductor layer, A step of growing a ZnSe, ZnSSe superlattice as a buffer layer (buffer layer) on a GaAs single crystal substrate lattice-matched to a physical semiconductor, a step of forming a light emitting device having a pn junction on the buffer layer, Etching with an aqueous solution containing H 2 SO 4 and H 2 O 2 while irradiating the substrate surface opposite to the surface on which the ZnSe-based compound semiconductor layer is stacked with He—Ne laser light until the bottom of the device is exposed is removed. And a method of manufacturing a ZnSe-based compound semiconductor device including a step of forming a positive or negative electrode on the exposed device surface; sixth, a ZnSe-based compound semiconductor is laminated on one side of a single crystal substrate; In a method for manufacturing a ZnSe-based compound semiconductor light-emitting device in which a pair of positive and negative electrodes are formed on a ZnSe-based compound semiconductor layer, Ga is lattice-matched to the ZnSe-based compound semiconductor. a step of performing cavity processing by etching on one surface of an s single crystal substrate, a step of growing a ZnSe or ZnSSe superlattice as a buffer layer (buffer layer) in the cavity, and a pn junction on the buffer layer A step of forming a light emitting element, and H 2 SO 4 and H 2 O 2 while irradiating a He—Ne laser beam until the bottom of the element is exposed on the substrate surface opposite to the surface on which the ZnSe-based compound semiconductor layer is laminated. A method of manufacturing a ZnSe-based compound semiconductor device, comprising: a step of etching and removing with an aqueous solution containing an element; and a step of forming a positive or negative electrode on the exposed device surface; In a method for manufacturing a ZnSe-based compound semiconductor light-emitting device in which a ZnSe-based compound semiconductor is stacked and a pair of positive and negative electrodes are formed on the ZnSe-based compound semiconductor layer, Resist by forming dots on one side of the GaAs single crystal substrate which is lattice-matched to the Se-based compound semiconductor, and then after depositing the SiO 2 to said surface by a sputtering method, a perforated mask flat-panel by removing the resist A step of forming a cavity by etching on the surface, a step of growing a ZnSe, ZnSSe superlattice as a buffer layer (buffer layer) in the cavity, and a pn junction on the buffer layer forming a light emitting device having, H 2 while irradiating He-Ne laser beam to element bottom substrate surface on which the ZnSe-based compound semiconductor layer is opposite to the laminated surface is exposed SO 4 and H 2 O 2 Of a ZnSe-based compound semiconductor device comprising: a step of removing by etching with an aqueous solution containing: and a step of forming either a positive or negative electrode on the exposed device surface It is a production method.
[0007]
DETAILED DESCRIPTION OF THE INVENTION
FIG. 2 shows a cross-sectional structure of the light-emitting element substrate shown in Example 1 of the present invention.
A cavity is previously formed in the GaAs substrate by etching. When the buffer layer is formed in the cavity, the flatness of the substrate is improved, so that generation of defects can be suppressed. When a GaAs substrate is used, it is preferable to form a ZnSe / ZnSSe superlattice buffer after first forming a GaAs buffer layer as the buffer layer. When using an InP substrate, it is desirable to use an InGaAs buffer layer.
Next, a pn junction is formed on the buffer layer using a ZnSe-based compound semiconductor to obtain a light emitting element. Next, polishing and etching are performed on the back surface of the substrate to remove the bottom of the element, and the ZnSe layer is exposed. Positive and negative electrodes are formed on the exposed portion and the upper ZnSe layer to form a light emitting element. Device cross-sectional views are shown in FIGS.
[0008]
6 to 9 show cross-sectional structures of the light-emitting element shown in Example 2 of the present invention. In the device, a buffer layer is grown on a single crystal, and a pn junction is formed using a ZnSe-based compound semiconductor, whereby a light emitting device is obtained. Next, the substrate at the bottom of the element is removed, and the ZnSe element layer is exposed. Positive and negative electrodes are formed on the exposed portion and the upper ZnSe layer to form a light emitting element.
That is, in the ZnSe-based light emitting device of the present invention, the light is absorbed by the substrate when the light reaches the substrate by removing the substrate. That is, light from the active layer can be prevented from being absorbed by the substrate, so that a more efficient light-emitting element can be provided.
[0009]
[Example 1]
FIGS. 2 to 5 show the element creation procedure performed in Example 1 in a cross-sectional view of the element. Embodiment 1 will be described below with reference to these drawings.
As the substrate 1, a GaAs substrate with a high resistance plane orientation (100) was used. On the substrate 1, after cleaning, dots having a diameter of 700 μm were formed by a resist. Using this as a mask, about 100 .mu.m of SiO2 was deposited on the substrate surface by sputtering. Thereafter, the resist was lifted off using ultrasonic waves, and a holed mask having a diameter of 700 μm was formed on the substrate surface. Next, etching was performed for about 7 minutes using NH 4 OH: H 2 O 2 : H 2 O (mixing ratio, 1:20:20) to form a
[0010]
The device was prepared by molecular beam epitaxy. The details will be described below.
The substrate 1 was baked at about 100 ° C. for 3 hours and then introduced into a growth chamber evacuated to 10 −10 Torr. After the oxide film on the substrate was removed by the thermal decomposition method, ZnSe and ZnS 0.13 Se 0.87 were alternately grown by about 3 nm as the multi-quantum
After the growth was completed, the substrate 1 was coated with a resist on the growth surface and fixed to the glass substrate, and then the back surface was removed from the lower part of the element interface to about 100 μm by mechanochemical polishing. This is shown in FIG.
[0011]
Next, while the substrate 1 is fixed to the glass substrate, it is put in an aqueous solution of H 2 SO 4 : H 2 O 2 (mixing ratio 2: 1) and irradiated with a He—Ne laser beam (wavelength: 6328.2Å). Etching was performed to expose the lower layer of the ZnSe element. Here, photo-assisted chemical etching using He—Ne laser light is used because only the GaAs substrate is etched due to the difference in band gap between GaAs and ZnSe, and the etching is stopped in the ZnSe layer. This is to prevent the element layer from being destroyed. As the electrode structure, Ti / Pt / Au has a thickness of 0.1 μm, 0.1 μm, and 0.3 μm in the lower n layer, and Pd / Pt / Au layers have a thickness of 0.1 μm in the upper p layer. Films were formed by electron beam evaporation to a thickness of 1 μm, 0.1 μm, and 0.3 μm to obtain a light emitting device. This is shown in FIG.
Table 1 shows the characteristics of the obtained element.
[0012]
[Table 1]
[Example 2]
6 to 9 are cross-sectional views of the device, showing the device creation procedure performed in Example 2. FIG.
A light emitting device having the same structure as that of Example 1 was formed on a GaAs substrate having an n-type plane orientation (100). This is shown in FIG.
Next, a dot having a diameter of 700 μm was formed on the back surface of the substrate with a resist, and about 10 μm of amorphous silicon (a-Si) was deposited on the surface of the substrate by sputtering using this as a mask. This is shown in FIG.
Thereafter, the resist was lifted off using ultrasonic waves, and a holed mask having a diameter of 700 μm was formed on the back surface of the substrate. The growth surface of the substrate is fixed to the glass substrate with a resist, and then the substrate is placed in an aqueous solution of H 2 SO 4 : H 2 O 2 (mixing ratio 2: 1) while being fixed to the glass substrate. Etching was performed while irradiating laser light (wavelength: 6328.2 mm) to expose the lower layer of the ZnSe element. This is shown in FIG.
The electrode structure was prepared in the same manner as in Example 1. This is shown in FIG.
The characteristics of the obtained device were the same as those of Example 1 shown in Table 1.
[0014]
[Comparative example]
FIG. 1 is a cross-sectional view of a device for producing a comparative example. Hereinafter, a comparative example will be described using this cross-sectional view.
A light emitting device having a structure similar to that of Example 2 was formed on a GaAs substrate having an n-type plane orientation (100). Ti / Pt / Au is 0.1 μm, 0.1 μm, and 0.3 μm thick as an n-layer electrode on the back side of the substrate, and Pd / Pt / Au is 0.1 μm and 0.1 μm each as an upper p-layer electrode. , A film having a thickness of 0.3 μm was formed by electron beam evaporation to obtain a light emitting device. The brightness of the obtained element was about half that when the substrate was removed (Examples 1 and 2). Details of device characteristics are shown in Table 1 together with other examples.
[0015]
【The invention's effect】
In the manufacturing method of the present invention, a pn junction is formed on a single crystal substrate to produce a light emitting element, and then the back surface of the substrate is removed to expose the ZnSe element layer at the bottom of the substrate, and the exposed portion and the upper ZnSe layer are formed. Since the positive and negative electrodes are formed, the light emission of the element is not absorbed by the substrate, and as shown in Table 1, it becomes possible to easily produce a light-emitting element with higher brightness than the conventional method.
[Brief description of the drawings]
FIG. 1 is a cross-sectional view of a ZnSe element.
2 is a cross-sectional view of a substrate after forming a cavity in Example 1. FIG.
3 is a cross-sectional view of a substrate after element formation in Example 1. FIG.
4 is a cross-sectional view of a substrate after removing a substrate under the element in Example 1. FIG.
5 is a cross-sectional view of a light emitting device manufactured in Example 1. FIG.
6 is a cross-sectional view of a substrate after element formation in Example 2. FIG.
7 is a cross-sectional view of a substrate on which an a-Si mask is formed in Example 2. FIG.
8 is a sectional view of a substrate after etching in Example 2. FIG.
9 is a cross-sectional view of a light emitting device manufactured in Example 2. FIG.
[Explanation of symbols]
1 Substrate 2 n-type buffer layer 3 n-type semiconductor layer (cladding layer)
4 Active layer 5 p-type semiconductor layer (cladding layer)
6 p-
Claims (7)
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|---|---|---|---|
| JP26520996A JP3768302B2 (en) | 1996-09-13 | 1996-09-13 | Method for manufacturing compound semiconductor device |
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| JP26520996A JP3768302B2 (en) | 1996-09-13 | 1996-09-13 | Method for manufacturing compound semiconductor device |
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| JPH1093141A JPH1093141A (en) | 1998-04-10 |
| JP3768302B2 true JP3768302B2 (en) | 2006-04-19 |
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| JP26520996A Expired - Fee Related JP3768302B2 (en) | 1996-09-13 | 1996-09-13 | Method for manufacturing compound semiconductor device |
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