JP3775135B2 - Multitask processing system - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a multitask processing system that receives data from a network and performs data processing by a multitask method, and more particularly, includes an interrupt receiving unit to execute reception of data transmitted over the network with the highest priority. Relates to a multitasking processing system.
[0002]
[Prior art]
2. Description of the Related Art Conventionally, an information processing system has been developed that exchanges data with an ID, which is an identifier corresponding to each device, via a network when exchanging data with a plurality of external devices.
As a conventional system, for example, as shown in FIG. 10, a multitask processing device comprising external devices U1 to U15, an interrupt register IR ′, a general-purpose register R16, a control unit 6, a ring buffer 2 and a data table 3 is used. N is connected.
When data is transmitted from the external devices U1 to U15 to the network N, the interrupt register IR ′ receives the data and immediately outputs the interrupt signal IS to the control unit 6.
[0003]
The control operation in the control unit 6 includes a communication driver task for transferring data stored in the interrupt register IR ′ to the ring buffer 2, a data management task for transferring data stored in the ring buffer 2 to the data table 3, and data Based on the data stored in the table 3, it comprises arithmetic processing tasks for performing arithmetic processing or transmission, and each task is sequentially executed according to a preset priority order.
[0004]
Specifically, when the communication driver task has the highest priority and the interrupt signal IS is input, it is immediately executed. If another task has been executed, the operation of the task is temporarily switched to a stopped state and resumed after the processing of the communication driver task is completed.
The next priority is in the arithmetic processing task, which is activated if the communication driver task is not executed by being started by predetermined control. When the communication driver task is being executed, the communication driver task is in a standby state until the operation of the communication driver task is completed.
[0005]
The data management task is the lowest priority task. This task is started in a polling manner, and is executed if the communication driver task or the arithmetic processing task is not executed.
When the communication driver task or the arithmetic processing task is activated, the communication driver task or the arithmetic processing task is temporarily stopped and resumed after the processing of the communication driver task or the arithmetic processing task is completed.
[0006]
In order for normal operation to be performed, it is necessary to keep the balance between the execution time and the number of execution times during which these tasks are executed within a predetermined range.
For this reason, the execution state of each task is monitored by a monitoring device (not shown), and if an imbalance occurs in the execution state of the task, error recovery measures are executed.
[0007]
For example, the execution state of each task is monitored by a watchdog timer, and if any task is not executed even once after a predetermined time, it is considered that some trouble has occurred in the processing device, The operation of the processing device is once stopped and restarted.
Alternatively, in the multiprocessor system described in JP-A-8-202409, etc., when an imbalance is detected in the task execution state by one CPU, it is considered that the runtime of the CPU is insufficient. The task execution state imbalance is eliminated by transferring a part of the load to another CPU.
[0008]
[Problems to be solved by the invention]
However, in the multitask processing apparatus, one of the causes of the imbalance of tasks is that there is no abnormality in the multitask processing apparatus itself, but there is a case where an abnormality occurs in the external apparatus that transmits data.
In particular, when data is transmitted at an overrate higher than the normal transmission rate due to an abnormality in the external device, when the overrate data is received by the interrupt register, reception by the interrupt register, output of the interrupt signal IS, and communication driver Data transfer by a task is frequently repeated, and there is a case where the task execution state is unbalanced due to insufficient time for executing another task.
[0009]
In this case, even if the processing device is restarted, the imbalance in the task execution state is not resolved, and even if the reception of the overrate data is transferred to another CPU, the CPU that receives the overrate data, The task execution state is unbalanced again.
For this reason, the multitask processing apparatus on the receiving side originally has a problem that the error recovery operation on the receiving side is frequently repeated even though no abnormality has occurred, and the operation is hindered.
[0010]
In view of such a conventional problem, the present invention does not hinder the operation on the receiving side even when data is transmitted at an over rate higher than a predetermined transmission rate due to an abnormality of an external device. An object of the present invention is to provide an improved multitask processing system.
[0011]
[Means for Solving the Problems]
In order to solve the above-described problem, in the first aspect of the present invention, an external device that transmits data with an identifier corresponding to each device to the network, an interrupt receiving unit that receives data from the network and outputs an interrupt signal, A receiver with an identifier for receiving data whose identifier matches the set identifier from data transmitted to the network, and an interrupt receiver for receiving data captured by the interrupt receiver when an interrupt signal is output A communication driver task for transferring data from the temporary storage unit to the temporary storage unit, a data management task for transferring the data stored in the temporary storage unit to the storage unit at a predetermined transfer rate, and arithmetic processing based on the data stored in the storage unit or A control unit that sequentially executes arithmetic processing tasks to be transmitted based on a preset priority order; -Overwrite detection means for detecting that it is in the bar light state and the identifier list of data transmitted at a higher rate than the normal transmission rate by analyzing the data content stored in the temporary storage unit in the over write state Overrate identifier list creating means for creating the identifier, identifier setting means for setting the identifier of the overrate identifier list as an identifier of the receiver with identifier, and data received by the receiver with identifier at a predetermined rate to the storage section It is assumed that there is an over-rate identifier data transfer means for transferring, and the interrupt receiving unit takes in data with an identifier to which no identifier is set in the receiving unit with identifier from the network.
[0012]
In invention of Claim 2, The temporary storage unit is a ring buffer It was supposed to be.
[0013]
【The invention's effect】
In the first aspect of the invention, when the external device is transmitting data in a normal state, all the data is received by the interrupt receiving unit, and every time data is received by the communication driver task of the control unit. The data is transferred from the interrupt receiving unit to the temporary storage unit, and transferred from the temporary storage unit to the storage unit by the data management task. The arithmetic processing task performs arithmetic processing based on the data stored in the storage unit.
[0014]
When an error occurs in the external device and data is transmitted at an overrate higher than the normal transmission rate, data is frequently transferred from the interrupt receiving unit to the temporary storage unit, and the temporary storage unit is overwritten. .
In the control unit, when the overwrite state of the temporary storage unit is detected by the overwrite detection unit, the overrate identifier list creation unit is transmitted at an overrate rate from the data stored in the temporary storage unit. An overrate identifier list which is a list of data is created, and an identifier of the overrate identifier list is set as an identifier of the receiver with identifier by an overrate identifier setting unit.
[0015]
When an identifier is set in the receiver with identifier, among the data transmitted to the network, the data with the identifier set in the receiver with identifier is received by the corresponding receiver with identifier, and the identifier is received with the identifier. Only data that is not set in the receiver is received by the interrupt receiver.
[0016]
For this reason, since the interrupt receiving unit receives only data transmitted at a normal transmission rate, data transfer from the interrupt receiving unit to the temporary storage unit by the communication driver task is frequently performed so as to prevent execution of other tasks. Never done.
Therefore, even when data is transmitted at a higher rate than the normal transmission rate due to an abnormality in the external device, it is possible to prevent the operation of the processing device on the receiving side from being hindered, and improve the reliability of the multitask processing system. be able to.
[0017]
In the invention according to claim 2, the temporary storage unit Easily detect overwrite status by using a ring buffer as it can.
[0018]
DETAILED DESCRIPTION OF THE INVENTION
The embodiment of the present invention will be described with reference to examples.
FIG. 1 is a block diagram showing a configuration of an embodiment of the present invention.
The control unit 1 is connected to an interrupt register IR, ID-added registers R1 to R7, general purpose registers R8 to R15, a ring buffer 2, and a data table 3.
The interrupt register IR and the ID registers R1 to R7 are connected to the network N via the ID mask unit 4. The general purpose registers R8 to R15 are directly connected to the network N.
[0019]
External devices U1 to U15 are connected to the network N, the external device U1 transmits data assigned ID = 1, the external device U2 assigns ID = 2, and the external devices U3 to U15 similarly ID = 3. Data with ID = 15 is transmitted.
ID = 0 is set in the control unit 1.
[0020]
The registers with IDs R1 to R7 are registers for receiving overrate data and are not normally used.
When an ID is set by an overwrite error process, which will be described later, data with an ID that matches a preset ID is received.
Data received by the registers with IDs R1 to R7 is read and transferred by the control unit 1 at a constant cycle. Once the registers with IDs R1 to R7 receive and store the data, they do not receive the data until the data stored by the control unit 1 is read and transferred.
[0021]
The interrupt register IR receives data with an ID that does not match the ID set in the register with ID. If the ID of the register with ID is not set, all data is received.
When data is received, an interrupt signal IS is immediately output to the control unit 1.
The general purpose registers R8 to R15 are used as various storage units as necessary.
[0022]
The ring buffer 2 is a ring-shaped buffer composed of a plurality of positions as shown in FIG. The first position of the stored data is the Head position, and the last position is the Tail position.
The data table 3 is a storage unit having a sufficient storage capacity for storing received data.
The interrupt register IR and the ID mask unit 4 constitute an interrupt receiving unit of the invention. The ID-added registers R1 to R7 constitute an identifier-added receiving unit of the invention, the ring buffer 2 constitutes a temporary storage unit of the invention, and the data table 3 constitutes a storage unit.
[0023]
Next, the operation of the multitask processing system of the present invention will be described focusing on the operation of the control unit 1.
The control operation in the control unit 1 is composed of the following three tasks.
First, the communication driver task transfers the data stored in the interrupt register IR to the ring buffer 2. When the ring buffer 2 is overwritten, an overwrite error process described later is performed, and the ID of the over-rate data transmitted at a higher rate than the normal transmission rate is set as the ID of the ID-added registers R1 to R7. Set.
[0024]
The data management task transfers the data stored in the ring buffer 2 to the data table 3. When the overwrite error process is performed, the data received by the ID-added registers R1 to R7 is transferred to the data table 3 at a constant cycle. The arithmetic processing task performs arithmetic processing or transmission based on the data stored in the data table 3. Further, the control unit 1 is kept in a fail-safe state while the overwrite error process is being executed.
[0025]
Each task is sequentially executed while transitioning between a plurality of operation states according to a preset priority order.
The communication driver task transitions between three states: a sleeping state that is not activated, an operation state that is performing processing, and a ready state that is activated and waiting, and an arithmetic processing task is the sleeping state, operation state, ready state, and processing The data management task transits between the operation state and the blocked state.
[0026]
First, the transition condition of the operation state in the communication driver task will be described with reference to FIG.
The communication driver task has the highest priority. When the interrupt signal IS is input from the interrupt register IR, the communication driver task enters a ready state, immediately enters an operation state, and executes processing. If another task has been executed, the operation of the task is interrupted and switched to the blocked state, and the processing of the communication driver task is preferentially executed.
When the processing is completed, the communication driver task changes from the operation state to the sleeping state, and keeps the sleeping state until the interrupt signal IS is input next time.
Since it is the highest priority task, it will not be blocked.
[0027]
Next, the operation state transition condition in the arithmetic processing task having the second priority will be described with reference to FIG.
If the communication driver task is not started, that is, in a sleeping state, it is started at a predetermined fixed period and is immediately moved from the ready state to the operation state and executed.
When the communication driver task is activated, the communication driver task waits in a ready state until the processing operation of the communication driver task is completed.
If the communication driver task is activated while the process is being executed in the operation state, the process is interrupted and switched to the blocked state. When the processing of the communication driver task is completed and the communication driver task shifts to the sleeping state, the arithmetic processing task shifts from the blocked state to the operation state and restarts the processing.
[0028]
FIG. 5 shows the transition conditions of the operation state in the data management task with the lowest priority.
The data management task is activated in a polling manner, and is always executed unless the communication driver task and the arithmetic processing task are activated.
When the communication driver task or the arithmetic processing task is activated, the communication driver task or the arithmetic processing task is immediately blocked and resumed after the processing of the activated communication driver task or arithmetic processing task is completed.
If an error occurs in the system, the error processing is prioritized over the transition condition.
[0029]
Next, the operation in the control unit 1 will be described in detail with reference to the flowcharts shown in FIGS.
FIG. 6 is a flowchart showing the flow of the communication driver task.
In step 101, when the interrupt signal IS is input from the interrupt register IR, the sleep state is changed to the ready state and the operation state, and the process proceeds to step 102.
[0030]
When the interrupt signal IS is not input, monitoring of the input of the interrupt signal IS is continued in the sleeping state.
In step 102, it is determined whether or not an overwrite state in which no empty positions for writing data to the ring buffer 2 remain.
Specifically, the value obtained by adding 1 to the tail position, which is the last position of the stored data, is compared with the value of the head position, which is the first position of the stored data. In step 105 to 118, an overwrite error process is performed.
[0031]
If the value obtained by adding 1 to the tail position is not equal to the value of the head position, the ring buffer 2 is in a state where there is still a margin for writing data, that is, data transmitted from an external device at an abnormally high rate is stored. Since it has not been received, the routine proceeds to step 103 as a normal operation, and data is transferred from the interrupt register IR to the ring buffer 2.
In step 104, 1 is added to the value of the tail position, and the process returns to step 102.
[0032]
In step 105, the ring buffer 2 is in an overwrite state in which there is no room for writing data, and an overwrite error flag is set.
In step 106, a system error flag indicating a system error is also set.
In step 107, the communication driver task is temporarily shifted to the sleeping state, and waits in the sleeping state until a response signal A is input from the arithmetic processing task.
When the reply signal A is input, the process proceeds to step 108, and in steps 108 to 111, IDs of over-rate data transmitted at a transmission rate higher than the normal transmission rate are listed.
[0033]
In step 108, first, the data accumulation time elapsed until data is accumulated in all positions of the ring buffer 2 is calculated.
Specifically, the data stored in the data management task is transferred from the data in the ring buffer 2 to the data table 3, and the ring buffer 2 is overwritten from the data transfer time when all the positions in the ring buffer 2 are vacant. The elapsed time up to the time when is detected is calculated and used as the data accumulation time.
[0034]
Next, in step 109, an ID storage number table indicating the number of storages for each ID of all data stored in the ring buffer 2 is created.
Specifically, the data stored in the ring buffer 2 is read sequentially, the ID of the read data is detected, and the number for each ID is calculated.
The number of all data stored in the ring buffer 2 for each ID is calculated and used as an ID storage number table.
[0035]
In step 110, an ID reception rate table indicating the reception rate for each ID is created by dividing the value in the ID storage number table by the data storage time calculated in step.
In step 111, for each ID, it is checked whether the reception rate is higher than the normal reception rate corresponding to the normal transmission rate, that is, whether the data is overrate data. An overrate ID list that is a list is created.
In this case, if the transmission rates of the external devices are different, the comparison may be made with the normal transmission rate of the external device corresponding to each ID.
[0036]
In step 112, sorting is performed to rearrange the overrate ID list so that the overrate ID list is sequentially arranged from the highest reception rate to the lowest.
In step 113, ID numbers are assigned to the ID-added registers R1 to R7 in descending order of reception rate in the overrate ID list.
For example, when a list as shown in FIG. 7A is created as the overrate ID list, ID = 4 is set in the ID-added register R1, and ID = 6 is set in the ID-added register R2. ID = 10 is set in the register with ID R3.
[0037]
When the overrate ID list as shown in FIG. 7A is created, ID = 15 is set in the register with ID R4, ID = 1 is set in the register with ID R5, and ID = 2 is set in the register with ID R6, and ID = 9 is set in the register with ID R7. In this case, since the data with ID = 13 cannot be received by the registers with IDs R1 to R7, the data is received by the interrupt register IR. However, since the reception rate is relatively low, the operation of the multitask control device is hindered. The probability of causing is low.
[0038]
In step 114, the overwrite error flag is erased.
In step 115, an overrate data mode flag is set. This flag is used in the data management task to determine whether to perform only normal transfer or to transfer data in the ID-added register for overrate data.
[0039]
Step 116 also clears the system error flag.
Step 117 outputs an error processing end signal ES.
Step 118 temporarily changes the communication driver task to the sleeping state, and waits in the sleeping state until a response signal A is input from the arithmetic processing task.
When the response signal A is input, the process returns to step 101.
[0040]
Next, the operation in the data management task will be described using the flowchart shown in FIG.
In step 201, it is activated by a polling method, and it is determined whether or not the communication driver task and the arithmetic processing task are sleeping. If both tasks are in the sleeping state, go to step 202. If either task is not in the sleeping state, it is blocked and waits until both tasks are in the sleeping state.
[0041]
In step 202, it is determined whether or not data is stored in the ring buffer 2.
If no data is stored, the process proceeds to step 205.
If data is stored, the process proceeds to step 203, where the data stored in the ring buffer 2 is transferred to the data table 3, and stored in step 204 as the transferred time data transfer time.
[0042]
In step 205, it is determined whether or not the over-rate data mode flag is set.
If the over rate data mode flag is not set, the process returns to step 201.
If the over rate data mode flag is set, the process proceeds to step 206.
[0043]
In step 206, it is determined whether it is the transfer time of the overrate data stored in the register with ID.
Specifically, the elapsed time after transferring the overrate data is measured by the overrate clock, and if the predetermined time has elapsed, it is considered that the transfer time of the overrate data is reached, and the process proceeds to step 207.
If it is not the transfer time of the overrate data, the process returns to step 201.
In step 207, it is checked whether data is stored in the ID registers R1 to R7. If data is stored, the data is transferred from the register with ID to the data table 3.
[0044]
Furthermore, the operation | movement in a calculation processing task is demonstrated using the flowchart shown in FIG.
In step 301, when a clock signal CS is input from a clock having a predetermined cycle, the clock signal CS is activated and becomes ready.
In step 302, it is determined whether or not the communication driver task is in a sleeping state.
If it is in the sleeping state, the process proceeds to step 303.
If it is not in the sleeping state, it waits in the ready state until the communication driver task enters the sleeping state.
[0045]
In step 303, it is determined whether or not a system error flag is set.
If the system error flag is not set, the process proceeds to step 304, data necessary for the control calculation is read from the data table, a normal calculation process is performed, and the process returns to step 301.
If the system error flag is set, the process proceeds to step 305.
[0046]
In step 305, it is determined whether or not an overwrite error flag is set.
If the overwrite error flag is not set, the process proceeds to step 306, performs processing suitable for the error content, and returns to step 301.
If the overwrite error flag is set, the process proceeds to step 307.
In step 307, the control unit 1 is subjected to fail-safe processing corresponding to the overwrite state.
[0047]
In step 308, the operation stop of the data management task is requested.
In step 309, the reply signal A is output to the communication driver task, and the communication driver task is prompted to start the overwrite error process.
In step 310, the process waits until an error processing end signal ES is input from the communication driver task.
[0048]
In step 311, it is determined whether or not the over-rate data mode flag is set.
If the overrate data mode flag is set, it is considered that normal error processing has ended, and the process proceeds to step 313.
If the over rate data mode flag is not set despite the input of the error processing end signal ES, there is a possibility that some abnormality has occurred in the control unit 1, so that the process proceeds to step 312, where fail safe Prompt appropriate action by warning etc. without releasing the state.
In step 313, the operation start of the data management task is requested.
In step 314, the fail safe state is canceled, the normal operation state is restored, and then the routine returns to step 301.
[0049]
Note that step 102 in the flowchart shown in FIG. 6 constitutes an overwrite detection unit of the invention, steps 108 to 111 constitute an overrate identifier list creation unit, and step 113 constitutes an identifier setting unit.
Further, step 207 in the flowchart shown in FIG. 8 constitutes the over-rate identifier data transfer means of the invention, and step 307 in the flowchart shown in FIG. 9 constitutes a fail-safe means.
[0050]
When the external devices U1 to U15 transmit data in a normal state by the above operation, all data is received by the interrupt register IR, and every time data is received by the communication driver task of the control unit 1. Then, the data is transferred from the interrupt register IR to the ring buffer 2 and transferred from the ring buffer 2 to the data table 3 by the data management task. The arithmetic processing task performs arithmetic processing based on the data stored in the data table 3.
[0051]
When an abnormality occurs in the external device and data is transmitted at an overrate higher than the normal transmission rate, an overwrite state is detected and an overrate ID list that is a list of data transmitted at the overrate is created, The ID of the overrate data is set in the registers with IDs R1 to R7.
When the ID is set in the register with ID, the data in which the ID is set in the register with ID among the data transmitted to the network N by the ID mask unit 4 is received by the corresponding ID register, and the ID is set. Only data that is not set in the register with ID is received by the interrupt register IR.
[0052]
For this reason, since the interrupt register IR receives only data transmitted at a normal transmission rate, the data transfer from the interrupt register IR to the ring buffer 2 by the communication driver task frequently prevents the execution of other tasks. Never done.
[0053]
Therefore, even when data is transmitted at a rate higher than the normal transmission rate due to an abnormality in the external devices U1 to U15, it is possible to prevent the operation of the processing device on the receiving side from being hindered, and the reliability of the multitask processing system Can be improved.
If the number of external devices that transmit overrate data is greater than the number of registers with IDs that are installed in advance for receiving overrate data, IDs are set in order from the ID of the data with the highest rate, and the interrupt register In the IR, data transmitted at a rate as low as possible among over-rate data is received, so that the register with ID can be used most effectively.
[0054]
Further, when the overwriting state of the ring buffer 2 is detected, the control unit 1 is maintained in a fail-safe state, so that the subsequent operation is not hindered and the reliability of the multitask processing system is further improved. be able to.
By using the ring buffer 2 as a transfer destination of data from the interrupt register IR, it is possible to easily detect the overwrite state.
[Brief description of the drawings]
FIG. 1 is a block diagram showing a configuration of an embodiment of the present invention.
FIG. 2 is a diagram illustrating a ring buffer.
FIG. 3 is a diagram illustrating a state transition condition in a communication driver task.
FIG. 4 is a diagram illustrating a state transition condition in an arithmetic processing task.
FIG. 5 is a diagram showing a state transition condition in a data management task.
FIG. 6 is a flowchart illustrating an operation flow in a communication driver task.
FIG. 7 is a diagram illustrating an overrate ID list.
FIG. 8 is a flowchart illustrating an operation flow in a data management task.
FIG. 9 is a flowchart for explaining an operation flow in an arithmetic processing task;
FIG. 10 is a block diagram showing a configuration of a conventional example.
[Explanation of symbols]
1, 6 Control unit
2 Ring buffer
3 Data table
4 ID mask section
IR, IR 'interrupt register
R1-R7 Register with ID
R8 to R16 general purpose registers
U1-U15 External device

Claims (2)

An external device that transmits data with an identifier corresponding to each device to the network;
An interrupt receiver that receives data from the network and outputs an interrupt signal;
An identifier-equipped receiving unit that receives data whose identifier matches the set identifier from the data transmitted to the network;
A communication driver task for transferring the data captured by the interrupt receiving unit when the interrupt signal is output from the interrupt receiving unit to a temporary storage unit, and a predetermined transfer of the data stored in the temporary storage unit A data management task to be transferred to a storage unit at a rate, and a control unit that sequentially executes a calculation processing task for performing calculation processing or transmission based on data stored in the storage unit based on a preset priority order ,
The control unit includes an overwrite detection unit that detects that the temporary storage unit is in an overwrite state;
Overrate identifier list creating means for analyzing the data content stored in the temporary storage unit in the overwritten state and creating an identifier list of data transmitted at a higher rate than the normal transmission rate;
Identifier setting means for setting an identifier of the overrate identifier list as an identifier of the identifier-attached receiving unit;
Over rate identifier data transfer means for transferring the data received by the identifier-attached receiving unit to the storage unit at a predetermined rate;
The multi-task processing system, wherein the interrupt receiving unit takes in data having an identifier to which no identifier is set in the receiving unit with identifier from a network. The multitask processing system according to claim 1, wherein the temporary storage unit is a ring buffer .

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