JP3779537B2 - Digital amplifier - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a digital amplifier that employs an oversampling method, and more particularly to a digital amplifier having a power output stage that achieves high efficiency.
[0002]
[Prior art]
FIG. 6 is a block diagram of a conventional digital audio amplifier. In the figure, Vi is an analog signal input. The signal processing unit of the circuit block 2 incorporates a ΔΣ A / D converter. Q1 and Q2 perform inverter operation with the main switch of the output stage. Vpog and Vneg are load power supplies and have positive and negative potentials with respect to the load ground P Gnd. (For example, Vpog = 30V, Vneg = −30V) LPF2 is an output low-pass filter, and Sp is a load (speaker). Rs1 and Rs2 are overcurrent detection resistors, and circuit blocks 3 and 4 are overcurrent protection circuits.
[0003]
The operation of the circuit of FIG. 6 is as follows. The input analog signal Vi is taken into the circuit block 2 through the analog signal low pass filter LPF1. In the circuit block 2, sampling is performed at an n-fold frequency and A / D conversion is performed. With this 1-bit digital time series signal, the drive circuits 5 and 6 drive the gates of the main switches Q1 and Q2. Digital signals output from the main switches Q1 and Q2 become amplified analog signals when passing through the output low-pass filter LPF2. The signals of the drive circuits 5 and 6 are substantially simultaneous switching signals because of the necessity of high-speed switching of the main switches Q1 and Q2.
[0004]
In general, the turn-off time of the MOSFET is much longer than the turn-on time (for example, ton = 13 ns, toff = 65 ns), and in the case of the above gate signal, a period in which the main switches Q1, Q2 are simultaneously turned on occurs. During that period, a through current flows from the positive power source Vpog to the negative power source Vneg. This is shown in FIG. The through current component was also about 10 times the rated load current, for example. When a through current flows through the main switches Q1 and Q2, there is a problem that a loss occurs and the main switches Q1 and Q2 generate heat.
[0005]
There was an overcurrent protection circuit consisting of resistors Rs1 and Rs2 and block circuits 3 and 4, but this stopped the gate circuit when the effective current flowing in Q1 and Q2 exceeded 3 times the maximum rated value, for example. Thus, no effect was obtained for a current that flows large instantaneously such as a through current.
[0006]
[Problems to be solved by the invention]
The present invention has been made in view of the above-mentioned problems of the prior art, and its purpose is to control the through current flowing through the main switches Q1 and Q2 when switching the output stage main switch of the digital amplifier, thereby reducing the input current noise. It is to provide a digital amplifier that reduces, improves efficiency, and performs stable operation.
[0007]
[Means for Solving the Problems]
In order to achieve the above object, according to the present invention, an input analog signal is sampled at an n-fold frequency and A / D converted, and connected to an output stage of a 1-bit time-series digital signal. In the digital amplifier having a low-pass filter for converting to an analog signal, the output stage of the digital signal includes an inverter having two main switches and a power supply for load, the inverters are connected in series, and the inverter is connected to both ends of the inverter. A load power supply is connected, and a constant current limiting circuit is connected to each or one side between the inverter and the load power supply. This constant current limiting circuit varies the output setting level, and this output setting It is characterized by limiting the through current according to the level.
[0008]
Also, it is formed by a transistor to which a voltage is applied between the gate and source so as to have a current limit value proportional to the output setting of the constant current limit circuit so as to control only the through current and not limit the output current, or By using a transistor to which a voltage is applied between the gate and source so as to have a current limit value proportional to the absolute value of the analog signal output, it can be efficiently amplified by control proportional to the analog signal obtained at the input. In addition, since the through current is controlled, there is little heat generation, and the switching is performed by a small main switch, so that the cost is low.
[0009]
Furthermore, it is possible to put a constant current limiting circuit on one side between the inverter and the load power supply. In this case, if a through current flows, the potential of the output stage of the main switches Q1 and Q2 becomes the potential on the opposite side. However, the period in which the through current flows is sufficiently short, and this circuit is effective when this influence can be ignored.
[0010]
DETAILED DESCRIPTION OF THE INVENTION
FIG. 1 shows a digital amplifier according to an embodiment of the present invention, which is different from a conventional digital amplifier in that a through current limiting transistor Q3 is provided between main switches Q1 and Q2 of an output stage and load power sources Vpog and Vneg. , Q4 is put in each. The reference power supply Vref1, the resistors R3 and R4, and the through current limiting transistor Q3 form a constant current limiting circuit on the positive power supply Vpog side, and the reference power supply Vref2, the resistors R5 and R6, and the through current limiting transistor Q4 are the negative power supply Vneg Side constant current limiting circuit is formed .
[0011]
FIG. 2 shows operation waveforms of the circuit of FIG. FIG. 2A shows the current IL flowing into the output low pass filter LPF2 and the limit value of the constant current limiting circuit. FIG. 2B shows details of the source-drain current of the switch Q1. The through current is suppressed as compared with FIG. 7B because of the effects of the through current limiting transistors Q3 and Q4. If the characteristics that give the limiting values of the through current limiting transistors Q3 and Q4 are aligned, the influence of the through current of the current IL flowing through the output low pass filter LPF2 can always be regarded as a certain minimum value.
[0012]
In order to make the constant current limit values of the through current limiting transistors Q3 and Q4 the same constant value, select transistors having the same characteristics as the through current limiting transistors Q3 and Q4. For further matching, it is common to trim the resistors R3, R4, R5, R6. The through current limiting transistors Q3 and Q4 have a small early voltage and slightly punch-through characteristics. Even if the current limiting values are not uniform, the variation in VCE when a through current flows is smaller.
[0013]
According to the third aspect of the present invention, the through current can be set to a constant value by forming the transistor with a constant voltage applied between the gate and the source of the constant current limiting circuit.
[0014]
According to a fourth aspect of the present invention, the constant current limiting circuit is formed by a transistor to which a voltage is applied between the gate and the source so as to have a current limiting value proportional to the output setting, thereby limiting the through current according to the output. It is also possible. For example, in the embodiment of FIG. 3, Vref3 can be realized by setting the amount proportional to the square root of the output setting level (volume adjustment level) and the amount proportional to the sum of the threshold value Vth of Q5.
[0015]
Further, the constant current limiting circuit is formed by a transistor to which a voltage is applied between the gate and the source so that the constant current limiting circuit has a current limiting value proportional to the absolute value of the analog signal output. It is possible to control the through current with higher accuracy. For example, in the embodiment shown in FIG. 4, it can be realized by causing the D / A converters Vref4 and Vref5 to output an amount proportional to the square root of the absolute value of the analog signal and an amount proportional to the sum of the threshold values Vth of Q6 and Q7. .
[0016]
FIG. 3 shows a second embodiment according to the second aspect of the present invention. This is a case where a constant current limiting circuit is inserted between the positive power sources Vpog and Q1. In this case, there is a problem that the potential of the output stage of the main switches Q1 and Q2 becomes approximately Vneg when a through current flows. However, the period in which the through current flows is sufficiently short, and this circuit is effective when this influence can be ignored. In this case, the through current limiting transistor Q5 has better characteristics of saturation type current-voltage characteristics such that there is no punch through.
[0017]
The reason why the reference voltage Vref3 can be varied in FIG. 3 is that the limit value can be roughly varied according to the output setting level according to claim 4. The signal processing unit 2 in FIG. 3 includes a part for calculating the square root of the output setting level. Thereby, the through current can be more effectively limited. Although the through-current control transistor Q5 is inserted between the positive power source Vpog and the main switch Q1 this time, the same effect can be expected if it is inserted between the negative power source and the main switch Q2 contrary to this embodiment .
[0018]
FIG. 4 shows a third embodiment according to the present invention. As in FIG. 1, constant current limiting circuits are placed above and below the main switches Q1 and Q2. Trimming resistors R8 and R9 are trimmed so as to align the limit values for constant current. The reason why the reference voltages Vref4 and Vref5 are formed in the D / A converter is to allow the limit value of the constant current limiting circuit to be varied in proportion to the absolute value of the analog signal. . The signal processing unit 2 in FIG. 4 includes a part for calculating the square root of the absolute value of the analog signal. The drain current Isd in the saturation region of the MOSFET is Isd ∝ (Vg−Vth) ² with gate voltage Vg and threshold voltage Vth.
. . . (1)
The reference voltages Vref4 and Vref5 are set in consideration of the relationship.
[0019]
FIG. 5 shows operation waveforms of the circuit of FIG. It can be seen that the limit value of the constant current limiting circuit is proportional to the absolute value of the analog signal, like the limit value indicated by the broken line in FIG. It can be seen from FIG. 5B that the through current is satisfactorily suppressed. It can be seen from FIG. 5C that the reference voltages Vref4 and Vref5 are in proportion to the sum of the amounts proportional to the threshold voltage Vth and the square root of the absolute value of the drain current Isd.
[0020]
What can be said from the embodiments of the present invention shown in FIGS. 1, 3 and 4 is that the power loss of the main switches Q1 and Q2 is smaller than that of the conventional digital amplifier, and there is an advantage that a transistor with a smaller capacity can be obtained. Further, there is an advantage that an overcurrent protection circuit which is necessary for a conventional digital amplifier is not required.
[0021]
In the embodiment of the present invention shown in FIGS. 1, 3 and 4, an analog signal low-pass filter LPF1 is provided at the input, and a ΔΣ A / D converter is incorporated in the signal processing section of the circuit block 2. Obviously, the digital signal can be omitted directly.
[0022]
【The invention's effect】
If the output stage using the constant current limiting circuit of the present invention is used, a digital amplifier having low input current noise, high efficiency and stable operation can be provided at low cost, and the effect is great.
[Brief description of the drawings]
FIG. 1 is a circuit diagram (block diagram) of a first embodiment of the present invention.
FIG. 2 is an operation waveform diagram of the first embodiment of the present invention.
FIG. 3 is a circuit diagram (block diagram) of a second embodiment of the present invention.
FIG. 4 is a circuit diagram (block diagram) of a third embodiment of the present invention.
FIG. 5 is an operation waveform diagram of the third embodiment of the present invention.
FIG. 6 is a circuit diagram (block diagram) of a conventional digital amplifier.
FIG. 7 is an operation waveform diagram of a conventional digital amplifier.
[Explanation of symbols]
1. Digital audio amplifier control drive unit 2, signal processing units 3, 4, overcurrent protection circuits 5, 6, drive circuit
Vi, analog signal input
LPF1, low-pass filter for analog signal
A Gnd, analog signal ground
Vref1, Vref2, reference voltage (when output voltage is fixed)
Vref3, reference voltage (when the output voltage can be varied roughly)
Vref4, Vref5, reference voltage (when the output voltage can be varied with high accuracy)
Q1, Q2, main switch (MOSFET)
Q3, Q4, Q5, Q6, Q7, through current limiting transistor
Rg1, Rg2, gate resistance of main switch
Rg3, Rg4, Rg5, gate resistance of through current limiting transistor
Rs1, Rs2, overcurrent detection resistors
R3, R4, R5, R6, R7, resistance
R8, R9, trimming resistor
LPF2, low pass filter for output
Sp, load (speaker)
Vpog, load drive plus power supply
Vneg, negative power supply for load drive
P Gnd, Load drive ground

Claims (1)

A digital amplifier having a low-pass filter that samples an input analog signal at an n-fold frequency and performs A / D conversion to convert the analog signal to a 1-bit time-series digital signal output stage and an analog signal connected thereto. The output stage includes an inverter having two main switches and a load power source, the inverters are connected in series, and the load power source is connected to both ends of the inverter. The inverter and the load power source A constant current limiting circuit is connected to each one or one side , and this constant current limiting circuit is configured to vary the output setting level and limit the through current according to this output setting level. A digital amplifier characterized by

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