JP3783064B2 - Organic EL display and active matrix substrate - Google Patents

Description

  The present invention relates to a display and an array substrate, and more particularly to an active matrix organic EL (Electro-Luminescence) display and an active matrix substrate used therefor.

  Flat panel displays such as liquid crystal displays are rapidly growing in demand due to advantageous features such as thinness, light weight, and low power consumption compared to cathode ray tube displays. Among them, an active matrix display that can hold a video signal by providing a memory property to each pixel is used in various displays such as portable information devices because it can obtain a good display quality. .

  In recent years, among flat panel displays, organic EL displays, which are self-luminous displays that can respond more quickly and have a wider viewing angle than liquid crystal displays, have been actively developed.

  FIG. 8 is a diagram illustrating an example of a pixel circuit of a conventional organic EL display. This pixel circuit is disclosed in Patent Document 1 and operates as described below.

First, with open switch Sw2, closing switches Sw1 and Sw3, supplies the desired video signal current I _in the transistor Dr. At this time, since the transistor Dr is diode-connected by the switch Sw1, the gate of the transistor Dr - source voltage that source - are set as the magnitude of the current flowing between the drain is equal to the current I _in. Thereafter, the switch Sw1 and the switch Sw3 are opened. The gate of the transistor Dr set corresponding to the current I _in - source voltage is held by the capacitor C1. As described above, the writing period is completed.

Next, the switch Sw2 is closed to connect the organic EL element OLED to the drain of the transistor Dr. The gate of the transistor Dr - source voltage is set as described above, substantially equal magnitude current flows between the current I _in the organic EL element OLED. Thereby, the light emission period is started. Note that the light emission period continues until the next writing period starts.

  In the above display method, it is ideal that the gate-source voltage is kept constant during the light emission period. However, if the non-conducting state of the switch Sw1 is incomplete, the charge can move between the gate and the drain of the transistor Dr, and thus the gate-source voltage varies. As a result, it may be difficult to display an image according to the written video signal. For example, the luminance of the dark display pixel increases, and in an extreme case, it may be visually recognized as a bright spot defect.

Such a problem does not occur only in an organic EL display using the circuit of FIG. 8 for pixels. That is, the above problem may occur even in an organic EL display that uses a circuit for writing a video signal by a voltage signal instead of a circuit for writing a video signal by a current signal.
US Pat. No. 6,373,454B1

  An object of the present invention is to improve the display quality of an active matrix organic EL display.

According to a first aspect of the present invention, a plurality of pixels arranged in a matrix are provided, each of the plurality of pixels corresponding to a first terminal connected to a first power supply terminal, a control terminal, and a voltage therebetween. A drive control element having a second terminal for outputting a drive current with a predetermined magnitude, and one electrode is connected to the control terminal, so that the voltage between the first terminal and the control terminal can be kept constant. A capacitor, an organic EL element connected between the second terminal and the second power supply terminal, and a plurality of first switches connected in series between the second terminal and the control terminal. The plurality of first switches are field effect transistors having the same conductivity type, and the gates of the plurality of first switches are connected to the same scanning signal input terminal, and the plurality of first switches connected in series. Of the first terminal on the control terminal side. The switch has a longer channel length than the other first switch connected to the control terminal through the switch, and the first switch on the control terminal side is in a conductive state as compared to the other first switch. There is provided an active matrix organic EL display characterized in that switching from a non-conductive state to a non-conductive state occurs earlier .

According to a second aspect of the present invention, a plurality of pixels arranged in a matrix are provided, each of the plurality of pixels corresponding to a first terminal connected to a first power supply terminal, a control terminal, and a voltage therebetween. A drive control element having a second terminal for outputting a drive current with a predetermined magnitude, and one electrode is connected to the control terminal, so that the voltage between the first terminal and the control terminal can be kept constant. A capacitor, an organic EL element connected between the second terminal and the second power supply terminal, and a plurality of first switches connected in series between the second terminal and the control terminal. The plurality of first switches are field effect transistors having the same conductivity type, and the gates of the plurality of first switches are connected to the same scanning signal input terminal, and the plurality of first switches connected in series. of the switches, the first scan of the control terminal side And pitch, and the other of the first switch connected to said control terminal via which have different impurity concentration in the channel, thereby, the first switch is directly connected to the control terminal There is provided an active matrix organic EL display characterized in that switching from a conductive state to a non-conductive state occurs earlier than the other first switches .

According to a third aspect of the present invention, it includes a plurality of pixel circuits arranged in a matrix form, each of the plurality of pixel circuits, a first terminal connected to the power supply terminal and the control terminal voltage between them A drive control element having a second terminal that outputs a drive current with a corresponding magnitude, and one electrode is connected to the control terminal, and the voltage between the first terminal and the control terminal is kept constant. a capacitor capable, and the pixel electrode, the second and a plurality of first switches connected in series between the terminal and the control terminal, the plurality of first switches is identical field conductivity type an effect transistors, said plurality of gates of the first switch is connected to the same scanning signal input terminal, among the plurality of first switches connected in series, a first switch of the control terminal side, this Connected to the control terminal via Compared to the other of the first switch, the channel length is more rather long and the first switch of the control terminal side, wherein the resulting toggles sooner from a conductive state compared to the other first switch to the non-conducting state An active matrix substrate is provided.

According to a fourth aspect of the present invention, a plurality of pixel circuits arranged in a matrix form, each of the plurality of pixel circuits, the first terminal and the control terminal and the voltage between them which is connected to the power supply terminal A drive control element having a second terminal that outputs a drive current with a magnitude corresponding to the first terminal, one electrode is connected to the control terminal, and the voltage between the first terminal and the control terminal is kept constant. A sustainable capacitor; a pixel electrode; and a plurality of first switches connected in series between the second terminal and the control terminal , wherein the plurality of first switches have the same conductivity type. A plurality of first switches having gates connected to the same scanning signal input terminal; among the plurality of first switches connected in series; the first switch on the control terminal side; and Connected to the control terminal via The other first switch has a different impurity concentration in the channel, so that the first switch directly connected to the control terminal is in a non-conductive state compared to the other first switch. There is provided an active matrix substrate characterized in that switching to a state occurs earlier .

  According to the present invention, the display quality of an active matrix organic EL display can be improved.

  Hereinafter, some aspects of the present invention will be described in detail with reference to the drawings. In each figure, the same reference numerals are given to components that exhibit the same or similar functions, and duplicate descriptions are omitted.

FIG. 1 is a plan view schematically showing an active matrix type organic EL display according to the first embodiment of the present invention.
An active matrix organic EL display 1 shown in FIG. 1 includes an organic EL panel DP and a controller CNT.

  The organic EL panel DP includes an insulating substrate 2 such as a glass substrate, and pixels PX are arranged in a matrix on one main surface of the substrate 2. These pixels PX define a display area on the main surface of the substrate 2. A scanning signal line driver YDR and a video signal line driver XDR are arranged as drive circuits in a region outside the display region, that is, a peripheral region.

  Each pixel PX includes an organic EL element OLED, a drive control element Dr, a capacitor C1, a switch group SwG formed by connecting a plurality of switches in series, a switch Sw2, and a switch Sw3. Here, as an example, the switch group SwG is configured by three switches Sw1a to Sw1c. Here, as an example, a p-channel TFT (thin film transistor), which is one of field effect transistors, is used for the drive control element Dr, the switches Sw1a to Sw1c (switch group SwG), the switch Sw2, and the switch Sw3. .

  The drive control element Dr, the switch Sw2, and the organic EL element OLED include a power supply line Vdd and a power supply line Vss that serve as power supply terminals that supply power necessary for the organic EL element OLED to emit light to the pixel PX. Are connected in series in this order. The potentials of the power supply line Vdd and the power supply line Vss are set, for example, to + 10V and 0V, respectively.

  The capacitor C1 has at least one terminal connected to the control terminal (gate) of the drive control element Dr, and is connected to the gate of the drive control element Dr and the power supply line Vdd of the drive control element Dr corresponding to the input signal. Keep the potential difference from the connected terminal (source). Here, the capacitor C1 is connected between the power supply line Vdd and the gate which is the control terminal of the drive control element Dr.

  The switches Sw1a to Sw1c are connected in series between a control terminal of the drive control element Dr and a terminal (drain) connected to the switch Sw2 of the drive control element Dr. The control terminals (gates) of the switches Sw1a to Sw1c are connected to the scanning signal line driver YDR via the same control line for each pixel row. In this example, the control terminals of the switches Sw1a to Sw1c are connected to the scanning signal line Scan1 to which the control terminal of the switch Sw3 is connected. However, scanning for supplying a scanning signal to the control terminals of the switches Sw1a to Sw1c is performed. The signal line may be provided separately from the scanning signal line Scan1.

  A gate that is a control terminal of the switch Sw2 is connected to the scanning signal line Scan2.

  The switch Sw3 is connected between the video signal line Data connected to the video signal line driver XDR and a terminal connected to the switch Sw2 of the drive control element Dr. The gate that is the control terminal of the switch Sw3 is connected to the scanning signal line driver YDR via the scanning signal line Scan1.

  The controller CNT is formed on a printed circuit board disposed outside the organic EL panel DP, and controls operations of the scanning signal line driver YDR and the video signal line driver XDR. The controller CNT receives a digital video signal and a synchronization signal supplied from the outside, and generates a vertical scanning control signal for controlling the vertical scanning timing and a horizontal scanning control signal for controlling the horizontal scanning timing based on the synchronizing signal. The controller CNT supplies the vertical scanning control signal and the horizontal scanning control signal to the scanning signal line driver YDR and the video signal line driver XDR, respectively, and sends the digital video signal to the video signal line driver in synchronization with the horizontal and vertical scanning timings. Supply to XDR.

  The video signal line driver XDR converts the digital video signal into an analog format under the control of the horizontal scanning control signal in each horizontal scanning period, and these converted video signals are parallel to a plurality of video signal lines Data. To supply. In this example, the video signal line driver XDR supplies the video signal to the video signal line Data as a current signal.

  The scanning signal line driver YDR sequentially supplies scanning signals for controlling switching of the switches Sw1a to Sw1c and Sw3 to the plurality of scanning signal lines Scan1 under the control of the vertical scanning control signal. Further, the scanning signal line driver YDR sequentially supplies a scanning signal for controlling the switching of the switch Sw2 to the plurality of scanning signal lines Scan2 under the control of the vertical scanning control signal.

  In the display 1, the substrate 2, the scanning signal line Scan1, the video signal line Data, the switches Sw1a to Sw1c, Sw2, and Sw3, the drive control element Dr, and the capacitor C1 constitute an active matrix substrate. Yes. As shown in FIG. 1, the active matrix substrate may further include a scanning signal line driver YDR and a video signal line driver XDR. The active matrix substrate can further include one electrode of the organic EL element OLED.

Next, a method for driving the organic EL display 1 will be described.
In the writing period, first, the scanning signal line driver YDR outputs a scanning signal (in this case, a high level scanning signal) for deselecting the switch Sw2 for the scanning signal line Scan2 connected to the pixel PX to be selected. In addition, a scanning signal (in this case, a low level scanning signal) for selecting the switches Sw1a to Sw1c and Sw3 is supplied to the scanning signal line Scan1 connected to the pixel PX. As a result, the switch Sw2 is turned off and the switches Sw1a to Sw1c and Sw3 are turned on.

Next, in this state, the video signal line driver XDR transfers the video signal to the conductive path from the power supply line Vdd to the video signal line driver XDR via the drive control element Dr, the switch Sw3, and the video signal line Data. A constant current having a magnitude equal to the current I _in is passed. At this time, since the switch Sw1a to Sw1c is in the conductive state, the potential difference between the control terminal and the power supply line Vdd of the drive control element Dr (gate - source voltage) is set to a value corresponding to the current I _in. After that, a scanning signal (in this case, a high-level scanning signal) for turning off the switches Sw1a to Sw1c and Sw3 is supplied to the scanning signal line Scan1, and the switches Sw1a to Sw1c and Sw3 are turned off. The gate of the current I _in the correspondingly configured drive control element Dr - source voltage is held by the capacitor C1. As described above, the writing period is completed.

  Next, a scanning signal (in this case, a low level scanning signal) for selecting the switch Sw2 is supplied to the scanning signal line Scan2, and the switch Sw2 is turned on. Since the gate-source voltage of the drive control element Dr is set as described above, a current substantially equal to the current Iin flows through the organic EL element OLED. Thereby, the light emission period is started. Note that the light emission period continues until the next writing period starts.

  In this embodiment, a terminal connected to the switch Sw2 of the drive control element Dr and a control terminal, that is, a drain and a gate are connected via a plurality of switches Sw1a to Sw1c connected in series. Therefore, the voltage applied between the drain and gate of the drive control element Dr during the light emission period can be distributed to each of the switches Sw1a to Sw1c. As a result, during the light emission period, it is difficult for charge to move between the drain and the gate of the drive control element Dr, and the fluctuation of the gate-source voltage is suppressed.

  Even if any one of the switches Sw1a to Sw1c is short-circuited between the source and the drain, if the remaining TFT is normal, the non-conducting state of the entire switch Sw1 can be secured. Therefore, it is possible to provide redundancy for occurrence of pixel defects. Therefore, it is possible to perform a good display operation, and particularly it is possible to suppress an increase in luminance of a dark display pixel and occurrence of a pixel defect.

  By the way, in the display 1 described above, for example, when the plurality of switches Sw1a to Sw1c constituting the switch group SwG are switched from the conductive state to the non-conductive state at the same time, the brightness of the bright display pixel is insufficient. May cause display problems such as This problem is that among the plurality of switches Sw1a to Sw1c constituting the switch group SwG, the switch Sw1a positioned at the terminal on the control terminal side of the drive control element Dr is larger in scanning signal than the other switches Sw1b and Sw1c. This can be avoided by causing the switching from the conducting state to the non-conducting state in response to the change in the length to occur (complete) earlier. This will be described by taking as an example the case where these threshold values are used for switching timing control of the switches Sw1a to Sw1c.

  FIG. 2 is a plan view schematically showing an actual arrangement that can be adopted for the pixel PX in the organic EL display 1 of FIG. FIG. 3 is a plan view schematically showing a modification of the structure shown in FIG. FIG. 4 is a plan view schematically showing an actual arrangement of pixels of an organic EL display according to a reference example.

  In the structure shown in FIG. 2, the channel lengths La to Lc of the transistors used as the switches Sw1a to Sw1c satisfy the relationships represented by the inequalities: La> Lb, La> Lc (for example, La = 4.5 μm, Lb = Lc = 3 μm). 3 is the same as the structure shown in FIG. 2 except that the channel lengths La to Lc are equal to each other (for example, La = Lb = Lc = 3 μm), and the structure shown in FIG. 4 includes three switches Sw1a. The structure is the same as that shown in FIG. 2 except that only one switch Sw1 is provided instead of Sw1c (for example, channel length L = 3 μm).

  In the structure shown in FIG. 4, the drain and gate of the drive control element Dr are connected via only one switch Sw1. Therefore, in the light emission period, all the drain-gate voltage of the drive control element Dr is applied between the source and drain of the switch Sw1. Therefore, when the structure shown in FIG. 4 is adopted, the movement of electric charge between the drain and the gate of the drive control element Dr is likely to occur during the light emission period, and there arises a problem that the luminance of the dark display pixel increases, for example. Further, when a short circuit between the source and the drain occurs in the switch Sw1, there arises a problem that a pixel defect occurs.

  On the other hand, in the structure shown in FIG. 3, the drain and gate of the drive control element Dr are connected via three switches Sw1a to Sw1c connected in series. Therefore, during the light emission period, the drain-gate voltage of the drive control element Dr is distributed to the three switches Sw1a to Sw1c. Therefore, when the structure shown in FIG. 3 is employed, it is difficult for the charge to move between the drain and the gate of the drive control element Dr during the light emission period, and the increase in the luminance of the dark display pixel can be suppressed. . The above is as described above.

  By the way, in the structure shown in FIGS. 3 and 4, the following phenomenon occurs as the magnitude of the scanning signal is changed from the low level to the high level in order to end the writing period.

  In the structure shown in FIG. 4, the switch Sw1 behaves as if it were a capacitor connected between the scanning signal line Scan1 and the gate of the drive control element Dr. In the process of changing the magnitude of the scanning signal from the low level to the high level, it is difficult for the electric charge to move between the drain and the gate of the drive control element Dr. Therefore, the magnitude of the scanning signal is changed from the low level to the high level. As the level changes, the gate potential of the drive control element Dr rises. However, in the structure shown in FIG. 4, the capacitance of this capacitor is much smaller than the capacitance of the capacitor C1, so that the amount of shift of the gate potential is small. Therefore, the influence on the image defect due to the shift of the gate potential is small.

  On the other hand, in the structure shown in FIG. 3, the switches Sw1a to Sw1c have the same threshold value, and the switching from the conductive state to the nonconductive state proceeds simultaneously. Therefore, until the switches Sw1a to Sw1c become completely non-conductive, the switches Sw1a to Sw1c are as if three switches connected in parallel between the scanning signal line Scan1 and the control terminal of the drive control element Dr. Acts like a capacitor. Therefore, in the structure shown in FIG. 3, the shift amount of the gate potential is about three times that in the structure shown in FIG. Therefore, according to the structure shown in FIG. 3, there is a possibility that a display defect may occur as the gate potential shifts.

  On the other hand, in this aspect, among the plurality of switches Sw1a to Sw1c constituting the switch group SwG, the switch Sw1a located at the terminal on the control terminal side of the drive control element Dr is more than the other switches Sw1b and Sw1c. The switching from the conductive state to the non-conductive state with respect to the change in the magnitude of the scanning signal occurs earlier (completed). Note that this timing control is performed, for example, by configuring the switches Sw1a to Sw1c so that the threshold of the switch Sw1a is deeper than the thresholds of the switches Sw1b and Sw1c. For example, as shown in FIG. 2, the threshold values are controlled such that the channel lengths La to Lc of the transistors used as the switches Sw1a to Sw1c satisfy the relationship expressed by the inequalities: La> Lb, La> Lc. This is done by setting to.

  When such timing control is performed, the switch Sw1a behaves as a capacitor connected to the gate of the drive control element Dr, as described with reference to FIG. However, since the switches Sw1b and Sw1c are insulated from the gate of the drive control element Dr when the switch Sw1a becomes non-conductive, the switches Sw1b and Sw1c subsequently shift the gate potential of the drive control element Dr. There is no. Therefore, ideally, only the switch Sw1a can cause the shift of the gate potential among the switches Sw1a to Sw1c.

  When the switch Sw1a is regarded as a capacitor connected between the scanning signal line Scan1 and the gate of the drive control element Dr, the capacitance is proportional to the channel length La. Therefore, when the structure of FIG. 2 (La = 4.5 μm) is adopted, the influence of the switch Sw1a on the shift of the gate potential is about 1.5 times that of the case of employing the structure of FIG. 3 (La = 3 μm). Double. However, as described above, when the structure of FIG. 3 is adopted, not only the switch Sw1a but also the switches Sw1b and Sw1c shift the gate potential of the drive control element Dr. Therefore, the structure of FIG. 2 (La = 4.5 μm) The gate potential shift amount when adopting is about half of the gate potential shift amount when the structure of FIG. 3 (La = Lb = Lc = 3 μm) is adopted.

  As described above, according to this aspect, it is possible to suppress the gate potential from being largely shifted, and it is possible to suppress the occurrence of display defects accompanying the shift of the gate potential. That is, according to this aspect, it is possible to suppress the gate potential of the drive control element Dr from fluctuating due to the leakage current during the period when the switch connected between the gate and the drain of the drive control element Dr is in the OFF state. In addition, according to this aspect, by controlling the turn-off timing of each switch of the switch group SwG, it is possible to prevent the gate potential of the drive control element Dr from fluctuating due to a voltage penetration when turning off these switches. It becomes possible. Therefore, extremely excellent display quality can be realized.

  In this embodiment, among the plurality of switches Sw1a to Sw1c connected in series, the difference between the threshold value of the switch Sw1a located at the terminal on the control terminal side of the drive control element Dr and the threshold value of the other switches Sw1b and Sw1c is 0. It is desirable to be about 1V to 0.8V. When the threshold is controlled by the channel length, the channel length of the switch Sw1a is preferably about 1.3 to 3.0 times the channel length of the other switches Sw1b and Sw1c. When the threshold value and the channel length are within the above ranges, the switch Sw1a and the switch Sw1b are switched at the timing of switching from the conductive state to the non-conductive state while maintaining the resistance value between the source and the drain in the conductive state of the switch Sw1a sufficiently low. And Sw1c can be made sufficiently different.

  In the first aspect, the thresholds are made different between the switch Sw1a and the switches Sw1b and Sw1c using the channel length, but these threshold values can be made different by other methods. In the second aspect of the present invention, the dose amount of the impurity is made different between the switch Sw1a and the switches Sw1b and Sw1c, and thereby the threshold value is made different between the switch Sw1a and the switches Sw1b and Sw1c. For example, when p-channel TFTs are used as the switches Sw1a to Sw1c, the dose amount of the p-type dopant to the channels of the switches Sw1b and Sw1c is made larger than the dose amount of the p-type dopant to the channel of the switch Sw1a. The threshold values of the switch Sw1b and the switch Sw1c can be made shallower than the threshold value of the switch Sw2. That is, the threshold value of the switch Sw1a is deeper than the threshold values of the switches Sw1b and Sw1c.

  The switches Sw1a to Sw1c having different impurity doses can be manufactured, for example, by the following method. That is, in the normal process for forming the TFT, the number of times that the impurity is doped in the channel region of the switches Sw1b and Sw1c is made larger than the number of times that the impurity is doped in the channel region of the switch Sw1a. For example, first, impurities are doped into the channel regions of the switches Sw1a to Sw1c. Next, the channel region of the switch Sw1a is masked using a photoresist. Subsequently, impurities are further doped into the channel regions of the switches Sw1b and Sw1c. In this way, the dose of dopant into the channels of switches Sw1b and Sw1c is greater than the dose of p-type dopant into the channels of switch Sw1a.

When the threshold value is made different between the switch Sw1a and the switches Sw1b and Sw1c using the impurity dose, the dose is different by about 1 × 10 ¹¹ cm ^{−2 to} 5 × 10 ¹¹ cm ⁻² between the switches. Is desirable. In this case, before the switches Sw1b and Sw1c are turned off, the switch Sw1a can be turned off more reliably.

  The threshold value of the switch Sw1a and the threshold values of the switches Sw1b and Sw1c can be made different by another method. In the third aspect of the present invention, different layer structures are adopted for the switch Sw1a and the switches Sw1b and Sw1c, thereby making the threshold of the switch Sw1a different from the threshold of the switches Sw1b and Sw1c.

  FIG. 5 schematically shows an example of a structure that can be adopted for the switches Sw1b and Sw1c other than the one located at the terminal on the control terminal side of the drive control element Dr among the plurality of switches Sw1a to Sw1c included in the switch group SwG. It is sectional drawing shown. FIG. 6 is a cross-sectional view schematically illustrating an example of a structure that can be employed in the switch Sw1a positioned at the terminal on the control terminal side of the drive control element Dr among the plurality of switches Sw1a to Sw1c included in the switch group SwG. .

  The switch shown in FIG. 5 is a top gate type p-channel TFT. This TFT has a source 50a and a drain 50b in which a predetermined amount of impurities are implanted, and an impurity having a lower concentration than that implanted in the source 50a and the drain 50b, or is intrinsic. It includes a semiconductor layer in which a channel 50c in a state is formed. A gate G is disposed above the channel 50 c via a gate insulating film 52. The gate G is covered with an interlayer insulating film 54, and a source electrode S and a drain electrode D are formed on the interlayer insulating film 54. The source electrode S and the drain electrode D are connected to the source 50a and the drain 50b through through holes formed in the gate insulating film 52 and the interlayer insulating film 54, respectively.

  The switch shown in FIG. 6 has the same structure as the switch shown in FIG. 5 except that the back gate BG is disposed below the channel 50c via the insulating film 59. A bias that deepens the threshold of the switch Sw1a is applied to the back gate BG. For example, the voltage between the back gate BG and the source 50a of the switch Sw1a is set to about + 0.2V to + 1.0V.

  When the structure of FIG. 5 is adopted for the switches Sw1b and Sw1c and the structure of FIG. 6 is adopted for the switch Sw1a, the threshold value of the switch Sw1a becomes deeper than the threshold values of the switches Sw1b and Sw1c. Therefore, also in this case, the switch Sw1a can be brought into a non-conductive state before the switches Sw1b and Sw1c.

  5 and 6 exemplify a top gate type TFT, but a bottom gate type thin film transistor may be used as the switches Sw1a to Sw1c. Also in this case, if a back gate structure is adopted for the switch Sw1a, the threshold value of the switch Sw1a becomes deeper than the threshold values of the switches Sw1b and Sw1c. Note that the back gate here is a gate arranged to face the control terminal via the gate insulating film and the semiconductor layer.

  In the first to third aspects, the switch group SwG is composed of the three switches Sw1a to Sw1c. However, the number of switches constituting the switch group SwG may be two or more. In the first to third embodiments, p-channel transistors are used for all the switches in the pixel PX. However, n-channel transistors may be used, and p-channel transistors and n-channel transistors may be mixed. .

  As described above, the gate potential of the drive control element Dr generated during the light emission period by connecting the gate and drain of the drive control element Dr with the switch group SwG formed by connecting a plurality of switches Sw1a to Sw1c in series. The fluctuation can be effectively suppressed. Therefore, an undesirable display operation failure can be suppressed.

  Further, when the control terminal of the switch group SwG is connected to the same control wiring Scan1 and controlled by the same scanning signal, the switch Sw1a to Sw1c of the switch group SwG is located at the end on the gate side of the drive control element Dr. By making the threshold value of the switch Sw1a deeper than the threshold values of the other switches Sw1b and Sw1c, the switch from the conductive state to the nonconductive state with respect to the change in the scanning signal magnitude of the switch Sw1a located on the gate side of the drive control element Dr Can be generated earlier than the other switches Sw1b and Sw1c. This makes it possible to minimize undesired gate potential fluctuations of the drive control element Dr that occur at the end of the writing period, and to perform a good display operation.

  FIG. 7 is a cross-sectional view schematically showing an example of a structure that can be employed in the organic EL panels of the first to third aspects. FIG. 7 shows a cross section across the switch Sw1a, the drive control element Dr, and the organic EL element OLED of the organic EL panel DP.

  The organic EL panel DP includes a light transmissive insulating substrate 2 such as a glass substrate. The light emitted from the organic EL element OLED is extracted to the outside of the organic EL panel DP through, for example, the light transmissive insulating substrate 2.

  A patterned semiconductor layer is disposed on the insulating substrate 2. These semiconductor layers are, for example, polysilicon layers.

  In each semiconductor layer, a source 50a and a drain 50b of the TFT are formed apart from each other. Note that a region 50c between the source 50a and the drain 50b in the semiconductor layer is used as a channel.

  A gate insulating film 52, a first conductor pattern, and an insulating film 54 are sequentially formed on the semiconductor layer. This first conductor pattern is used as the gate G of the TFT, the first electrode of the capacitor C1, the scanning signal lines Scan1 and Scan2, and the wiring connecting them. The insulating film 54 is used as an interlayer insulating film and a dielectric layer of the capacitor C1.

  A second conductor pattern is formed on the insulating film 54. The second conductor pattern is used as the source electrode S, the drain electrode D, the second electrode of the capacitor C1, the video signal line Data, and the wiring connecting them. The source electrode S and the drain electrode D are connected to the source 50a and the drain 50b of the TFT via through holes provided in the insulating films 52 and 54, respectively.

  On the second conductor pattern and insulating film 54, a passivation film 56 and an anode 62 of the organic EL element OLED are sequentially formed. The anode 62 is connected to the drain D of the switch Sw <b> 2 through a through hole provided in the passivation film 56. In this example, a light transmissive conductor such as ITO (Indium Tin Oxide) is used as the material of the anode 62.

  An insulating layer 58 is formed on the passivation film 56. The insulating layer 58 is provided with a through hole at a position corresponding to the central portion of the anode 62. The insulating layer 58 is a lyophilic inorganic insulating layer, for example.

  An insulating layer 60 is formed on the insulating layer 58. The insulating layer 60 is provided with a through-hole having a diameter larger than that of the through-hole of the insulating layer 58 at a position corresponding to the central portion of the anode 62. The insulating layer 60 is, for example, a liquid repellent organic insulating layer. The laminated body of the insulating layer 58 and the insulating layer 60 forms a partition insulating layer having a through hole at a position corresponding to the anode 62.

  A buffer layer 63 and a light emitting layer 64 are sequentially formed on the anode 62 exposed in the through hole of the partition insulating layer. The buffer layer 63 plays a role of mediating injection of holes from the anode 62 to the light emitting layer 64. The light emitting layer 64 is a thin film containing a luminescent organic compound whose emission color is red, green, or blue, for example.

  On the partition insulating layer and the light emitting layer 64, a cathode 66 is provided as an electrode common to all pixels. The cathode 66 is connected to the power supply line Vss through a contact hole (not shown) provided in the passivation film 56 and the partition insulating layer. As the cathode 66, for example, a laminate of a main conductor layer containing barium or the like and a protective conductor layer containing aluminum or the like is used. Each organic EL element OLED is composed of the anode 62, the buffer layer 63, the light emitting layer 64, and the cathode 66.

  The light emitted from the light emitting layer 64 may be extracted from the cathode 66 side to the outside of the organic EL panel DP. In this case, the cathode 66 may be light transmissive.

  Further benefits and variations are readily apparent to those skilled in the art. Therefore, the invention in its broader aspects should not be limited to the specific descriptions and representative embodiments described herein. Accordingly, various modifications may be made without departing from the spirit or scope of the generic concept of the invention as defined by the appended claims and their equivalents.

1 is a plan view schematically showing an active matrix organic EL display according to a first embodiment of the present invention. The top view which shows roughly the actual arrangement | positioning which can be employ | adopted as a pixel with the organic EL display of FIG. The top view which shows roughly the modification of the structure shown in FIG. The top view which shows roughly the actual arrangement | positioning of the pixel of the organic electroluminescent display which concerns on one reference example. Sectional drawing which shows roughly an example of the structure employable as switches other than what was located in the terminal by the side of the control terminal of a drive control element among the some switches contained in a switch group. Sectional drawing which shows schematically an example of the structure employable as the switch located in the terminal of the control terminal side of a drive control element among the some switches contained in a switch group. Sectional drawing which shows schematically an example of the structure employable for the organic electroluminescent panel of a 1st thru | or 5th aspect. The figure which shows an example of the pixel circuit of the conventional organic EL display.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 1 ... Organic EL display, 2 ... Insulating substrate, 50a ... Source, 50b ... Drain, 50c ... Channel, 52 ... Gate insulating film, 54 ... Interlayer insulating film, 56 ... Passivation film, 58 ... Insulating layer, 59 ... Insulating film, 60 ... Insulating layer, 62 ... Anode, 63 ... Buffer layer, 64 ... Light emitting layer, 66 ... Cathode, DP ... Organic EL panel, CNT ... Controller, XDR ... Video signal line driver, YDR ... Scanning signal line driver, Vdd ... Power supply Line, Vss ... Power supply line, Data ... Video signal line, Scan1 ... Scanning signal line, Scan2 ... Scanning signal line, PX ... Pixel, OLED ... Organic EL element, Dr ... Drive control element, C1 ... Capacitor, SwG ... Switch group, Sw1a ... switch, Sw1b ... switch, Sw1c ... switch, Sw2 ... switch, Sw3 ... switch, S ... source electrode, D ... Drain electrode, G ... gate, BG ... back gate.

Claims (8)

A plurality of pixels arranged in a matrix, and each of the plurality of pixels includes:
A drive control element comprising a first terminal connected to the first power supply terminal, a control terminal, and a second terminal for outputting a drive current in a magnitude corresponding to the voltage between them;
A capacitor having one electrode connected to the control terminal and capable of maintaining a constant voltage between the first terminal and the control terminal;
An organic EL element connected between the second terminal and the second power supply terminal;
A plurality of first switches connected in series between the second terminal and the control terminal ;
The plurality of first switches are field effect transistors having the same conductivity type,
Gates of the plurality of first switches are connected to the same scanning signal input terminal;
Among the plurality of first switches connected in series, the first switch on the control terminal side has a longer channel length than the other first switches connected to the control terminal through the first switch. An active matrix organic EL display characterized in that switching from a conductive state to a non-conductive state occurs earlier . The display according to claim 1, wherein the channel length of the first switch on the control terminal side is in a range of 1.3 to 3.0 times the channel length of the other first switch. The display according to claim 1, wherein a difference in threshold value between the first switch on the control terminal side and the other first switch is in a range of 0.1V to 0.8V. A plurality of pixels arranged in a matrix, and each of the plurality of pixels includes:
A drive control element comprising a first terminal connected to the first power supply terminal, a control terminal, and a second terminal for outputting a drive current in a magnitude corresponding to the voltage between them;
A capacitor having one electrode connected to the control terminal and capable of maintaining a constant voltage between the first terminal and the control terminal;
An organic EL element connected between the second terminal and the second power supply terminal;
A plurality of first switches connected in series between the second terminal and the control terminal;
The plurality of first switches are field effect transistors having the same conductivity type,
Gates of the plurality of first switches are connected to the same scanning signal input terminal;
Of the plurality of first switches connected in series, the first switch on the control terminal side and the other first switch connected to the control terminal via this switch have different impurity concentrations in the channel. and which, thereby, the first switch is directly connected to the control terminal active matrix you wherein the resulting toggles sooner from a conductive state compared to the other first switch to the non-conducting state Type organic EL display. A plurality of scanning signal lines arranged corresponding to a plurality of rows formed by the plurality of pixels, and a plurality of video signal lines arranged corresponding to a plurality of columns formed by the plurality of pixels, Each of the plurality of pixels further includes a second switch and a third switch, and the second switch and the organic EL element are connected in series between the second terminal and the second power supply terminal in this order, 5. The third switch according to claim 1, wherein a third switch is connected between the video signal line and the second terminal, and gates of the plurality of first switches are connected to the scanning signal line. display. A plurality of pixel circuits arranged in a matrix, each of the plurality of pixel circuits,
A drive control element comprising a first terminal connected to the power supply terminal, a control terminal, and a second terminal for outputting a drive current in a magnitude corresponding to the voltage between them;
A capacitor having one electrode connected to the control terminal and capable of maintaining a constant voltage between the first terminal and the control terminal;
A pixel electrode connected to the second terminal;
A plurality of first switches connected in series between the second terminal and the control terminal;
The plurality of first switches are field effect transistors having the same conductivity type,
Gates of the plurality of first switches are connected to the same scanning signal input terminal;
Of the plurality of first switches connected in series, the first switch on the control terminal side has a longer channel length than the other first switches connected to the control terminal through this switch. The active matrix substrate according to claim 1, wherein the first switch on the control terminal side switches from the conductive state to the nonconductive state earlier than the other first switches. A plurality of pixel circuits arranged in a matrix, each of the plurality of pixel circuits,
A drive control element comprising a first terminal connected to the power supply terminal, a control terminal, and a second terminal for outputting a drive current in a magnitude corresponding to the voltage between them;
A capacitor having one electrode connected to the control terminal and capable of maintaining a constant voltage between the first terminal and the control terminal;
A pixel electrode connected to the second terminal;
A plurality of first switches connected in series between the second terminal and the control terminal;
The plurality of first switches are field effect transistors having the same conductivity type,
Gates of the plurality of first switches are connected to the same scanning signal input terminal;
Of the plurality of first switches connected in series, the first switch on the control terminal side and the other first switch connected to the control terminal via this switch have different impurity concentrations in the channel. As a result, the first switch directly connected to the control terminal is more quickly switched from the conductive state to the non-conductive state than the other first switch. substrate. A plurality of scanning signal lines arranged corresponding to a plurality of rows formed by the plurality of pixel circuits; and a plurality of video signal lines arranged corresponding to a plurality of columns formed by the plurality of pixel circuits. Each of the plurality of pixel circuits further includes a second switch and a third switch, the second switch is connected between the second terminal and the pixel electrode, and the third switch is connected to the video signal line. The active matrix substrate according to claim 6, wherein the active matrix substrate is connected to the second terminal, and gates of the plurality of first switches are connected to the scanning signal line.

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