JP3792004B2 - Cell multiplexing control circuit - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a cell multiplexing control circuit that selects and multiplexes cells (information units) given from a plurality of different systems in ATM (Asyncronous Transfer Mode) transmission.
[0002]
[Prior art]
FIG. 2 is a block diagram showing an example of a conventional cell duplex control circuit.
This cell duplication control circuit is a circuit that multiplexes cells by switching and outputting a cell C _{( 0)} given from the 0 system and a cell C ₍₁₎ given from the ₁ system. And an effective cell detection circuit 1 connected to the 1 system for detecting an effective cell, a buffer (or memory) 2 connected to the 1 system, and two 2-input selection circuits 3 and 4. . A selector control circuit 5 is provided on the output side of the valid cell detection circuit 1, and an output terminal of the selector control circuit 5 is connected to a selection terminal of the selection circuit 4. One input terminal of the selection circuit 3 is connected to the first system, and the other input terminal is connected to the output terminal of the buffer 2. One input terminal of the selection circuit 4 is connected to the 0 system, and the other input terminal of the selection circuit 4 is connected to the output terminal of the selection circuit 3. In this cell duplication control circuit, the effective cell detection circuit 1 receives cells given via the 0 system and the 1 system. The valid cell detection circuit 1 detects whether a given cell is a valid cell or an invalid cell from the header of information attached to the head of each cell, and gives the information to the selector control circuit 5. The selector control circuit 5 sends a selection signal to the selection circuit 4 based on the information given from the valid cell detection circuit 1 and controls the selection in the selection circuit 4.
[0003]
For example, when a valid cell is received from the 0 system and an invalid cell is received from the 1 system, the selection circuit 3 selects a cell on the 1 system and is controlled by the selector control circuit 5 to select the selection circuit 4. Selects and outputs a valid cell given to the 0 system. When an invalid cell is transferred to the 0 system and a valid cell is transferred to the 1 system, the selection circuit 3 selects a cell on the 1 system and selects and outputs an effective cell output from the selection circuit 3 To do. When valid cells are simultaneously transferred to both the 0 system and the 1 system, the buffer 2 holds the valid cells on the 1 system, and the selection circuit 4 selects and outputs the valid cells on the 0 system. . When the cell transferred to both the 0-system and the 1-system is an invalid cell, the selection circuit 3 selects the valid cell held in the buffer 2, and the selection circuit 4 outputs the valid cell output from the selection circuit 3. Select cell and output.
[0004]
[Problems to be solved by the invention]
However, the conventional cell duplication control circuit of FIG. 2 has the following problems.
When valid cells are received simultaneously from both the 0 system and the 1 system, the priority order of the cells to be output is fixedly determined by the system. That is, the 0 system is determined. Therefore, when a valid cell is continuously received in the non-priority system (system 1) and invalid cells are continuously received in the priority system (system 0), when a single effective cell is received in the priority system, The cells output from the selection circuit 4 are switched. That is, the 0-system valid cell is output. A single effective cell is often a monitoring cell transferred for confirmation of continuity in the apparatus, and may be a cell with low priority. In the conventional cell duplication control circuit of FIG. 2, there is a problem in that cells that need to have a low priority are output with priority.
[0005]
[Means for Solving the Problems]
In order to solve the above-mentioned problem, the present invention is connected to an arbitrary number of systems that transmit cells having information indicating validity or invalidity, and an effective cell that indicates validity by the information is one of the arbitrary number of systems. When receiving from one system, this valid cell is selected and output, and when valid cells are simultaneously received from a plurality of systems among the arbitrary number of systems, one valid cell is selected from the plurality of valid cells. In addition, a cell multiplexing control circuit that stores other effective cells and outputs the stored effective cells when no effective cells arrive from the arbitrary number of systems has the following configuration. .
That is, connected to the arbitrary number of systems, and when there is a valid cell in the received cell, is connected to the effective cell detection circuit that detects which system the effective cell has arrived from, and the arbitrary number of systems, A first selection means for selecting a cell received from the arbitrary number of systems based on a given first selection signal; and a plurality of the arbitrary number of systems connected to an output side of the first selection means. Buffer means for taking in and storing valid cells output from the first selection means when valid cells arrive simultaneously from the system, and connected to the arbitrary number of systems and the output side of the buffer means. Second selection means for selecting and outputting cells given from the arbitrary number of systems based on a second selection signal or valid cells stored in the buffer means.
[0006]
Further, the cell multiplexing control circuit includes a selection information holding circuit for holding selection information indicating a selection state in the first selection means for the previous cell in time, and a detection result of the valid cell detection circuit. And the first selection signal and the second selection signal based on the selection information from the selection information holding circuit, and when a valid cell is received from one of the arbitrary number of systems, Select a valid cell to output from the second selection means, and when a plurality of valid cells are received simultaneously, give priority to the effective cells of the system that have been selected and output so far from the second selection means, Effective cells of other systems are stored in the buffer means, and the effective cells stored in the buffer are output from the second selecting means when no effective cells have been received from the system that has been selected and output so far . Selection system And means are provided.
According to the present invention, since the cell multiplexing control circuit is configured as described above, even if a valid cell is received simultaneously for a valid cell given to a certain system, the selection information holding circuit is Since the effective cell of the system that has been selected and output so far is preferentially output, the effective cell of the other system is stored in the buffer means. The effective cell stored in the buffer means is output when no effective cell is received. Therefore, the problem can be solved.
[0007]
DETAILED DESCRIPTION OF THE INVENTION
FIG. 1 is a block diagram showing the configuration of a cell duplex control circuit according to an embodiment of the present invention.
This cell duplication control circuit selects a cell received from the 0-system or 1-system, multiplexes the selected cells and outputs the selected cell, and is an effective cell circuit connected to the 0-system and the 1-system. 11, a two-input selection circuit 12 serving as a first selection means, and a three-input selection circuit 13 serving as a second selection means.
The valid cell detection circuit 11 detects whether the cells on the 0-system and the 1-system are valid cells. On the output side of the valid cell detection circuit 11, a selection signal S14 ₁₂ is sent to each of the selection circuits 12, 13. , S14 ₁₃ are respectively connected to a selector control circuit 14 which is a selection control means for sending. The selector control circuit 14, the selection information holding circuit 15 holds the selection signal S14 ₁₂ to feedback to the selector control circuit 14 is connected.
[0008]
A configuration in which one input terminal of the selection circuit 12 is connected to the 0 system and the other input terminal is connected to the 1 system, and a cell received from the 0 system or the 1 system is selected by the selection signal S14 ₁₃ from the selector control circuit 14 It has become. A buffer 16 serving as buffer means is connected to the output side of the selection circuit 12. The output terminal of the buffer 16 is connected to one input terminal of the selection circuit 13. The other two input terminals of the selection circuit 13 are connected to the 0 system and the 1 system. The selection circuit 13 selects and outputs a cell received from the 0-system or 1-system or a cell output from the buffer 16 according to a selection signal S14 ₁₃ given from the selector control circuit 14. The cell output from the selection circuit 13 is the output of the cell duplex control circuit.
FIG. 3 is a diagram showing the operation mode of FIG. 1, and the operation of the cell duplex control circuit of FIG. 1 will be described with reference to FIG.
When a valid cell arrives from the 0 system and when a valid cell arrives at the 1 system, the valid cell detection circuit 11 detects from which system the valid cell has arrived. The selector control circuit 14 outputs selection signals S14 ₁₂ and S14 ₁₃ based on the selection information fed back from the selection information holding circuit 15 and the detection result of the valid cell detection circuit 11. Selection information storing circuit 15, so holding the selection signal S14 ₁₂ fed to the selection circuit 12 for selecting the previous cell (front cell), to the selector control circuit 14 from the selection information storage circuit 15 The selection information fed back indicates the selection state of the selection circuit 12 at the time of passage of the previous cell. This fed back selection information is information indicating which system has priority.
[0009]
The selection circuits 12 and 13 perform selection controlled by selection signals S1412 and S1413, respectively. That is, the duplex control circuit has 16 modes m1 to m16 in FIG. 3 according to the state of the selection circuit 12 when passing through the previous cell, the arrival status of the valid cells of the 0 and 1 systems, and the holding state of the buffer 16. Operate in mode.
In the modes m1 to m8 in which the selection circuit 12 selects and passes the cell received from the 0 system in the previous cell, if no valid cell is stored in the buffer 16, the 0 system cell is the effective cell and the 1 system. The selection circuit 12 selects the system 1 only when the current cell is an invalid cell (mode m3), and the system 0 is selected when the cells of both systems are valid (mode m4) and at other times (modes m1 and m2). select. The selection circuit 13 selects and outputs a cell in the reverse system to the selection circuit 12 in the modes m1 to m4. In the mode m4, valid cells received from the 0 system are stored in the buffer 16. When cells are already stored in the buffer 16 (modes m5 to m8), the selection circuit 12 selects all 0 systems. When the 0 system cells are valid cells (modes m7 and m8), the 0 system is selected. Valid cells are stored in the buffer. In the modes m5 to m8, the selection circuit 13 operates when both the 0-system cell and the 1-system cell are invalid cells (mode m5), and when the 0-system cell is a valid cell and the 1-system cell is an invalid cell. In (mode m7), a cell output from the buffer 16 is selected and output. In other cases ( modes m6 and m8), a 1-system cell is selected and output.
[0010]
In the mode m9 to m16 in which the selection circuit 12 selects and passes the cell received from the 1st cell in the previous cell, if the cell is not stored in the buffer 16, the 1st cell is the effective cell and the 0th cell Only when the cell is an invalid cell (mode m10), the selection circuit 12 selects the 0 system, and when the cells of both systems are valid (mode m12) and the other (modes m9 and m11), the 1 system is selected. To do. The selection circuit 13 selects and outputs a cell in the opposite system to the selection circuit 12 in the modes m9 to m12 . In the mode m12, valid cells received from the first system are stored in the buffer 16. When cells are stored in the buffer 16, the selection circuit 12 selects a 1-system cell at any time (modes m13 to m16). Among the modes m13 to m16, when the 1-system cell is a valid cell (modes m14 and m16), the 1-system cell is stored in the buffer. In modes m13 to m16, the selection circuit 13 operates when both the 0-system cell and the 1-system cell are invalid cells (mode m13), and when the 0-system cell is an invalid cell and the 1-system cell is a valid cell. In (mode m14), a cell output from the buffer 16 is selected and output. In other cases (modes m15 and m16), a 0-system cell is selected and output.
[0011]
That is, the selection of the selection circuit 12 is switched when there is no accumulation of cells in the buffer 16, the cell received by the system selected by the selection circuit 12 is a valid cell, and the system selected by the non-selected system. This is when the received cell is an invalid cell. In addition, the selection circuit 13 basically selects a cell opposite to the selection circuit 12, and there are cells stored in the buffer 16, and no valid cell is received by the non-selection system of the selection circuit 12. Sometimes, the cells output from the buffer 16 are selected and output. In this way, the selection circuit 13 outputs the multiplexed cells.
As described above, in the present embodiment, the selection circuit 12 selects the effective cell received from the 0-system and the effective cell received from the 1-system and stores the selected cell in the buffer 16, and also stores the previous cell. A selection information holding circuit 15 for feeding back selection information indicating the selection state of the selection circuit 12 to the selector control circuit 14 is provided, and selection signals S1412 and S1413 referring to the feedback information are given to the selection circuits 12 and 13. Therefore, the cells stored in the buffer 16 are not fixed by the system, and a priority system can be variably created, and the delay of the true priority system cell can be suppressed.
For example, when valid cells are continuously received from the 0 system and invalid cells are continuously received from the 1 system, the operation mode is the mode m11 , and the selection circuit 12 selects the 1 system and selects it. The circuit 13 outputs a 0-system cell. When a single effective cell is received from system 1 in this state, the operation becomes mode m12, the system 1 effective cell is stored in buffer 16, and selection circuit 13 continues to select the effective cell received from system 0. Output.
[0012]
In addition, this invention is not limited to the said embodiment, A various deformation | transformation is possible.
In the above embodiment, the cell duplex control circuit in ATM transmission is described in which cells are received from the two systems 0 and 1 and the cells are multiplexed and output. As long as there is information to indicate, the number of systems can be increased arbitrarily by increasing the number of entrances of the selection circuits 12 and 13 and the number of buffers 16.
[0013]
【The invention's effect】
As described above in detail, according to the present invention, the effective cell detection circuit, the first selection unit, and the effective cell output from the first selection unit when the effective cell arrives simultaneously from a plurality of systems are obtained. Buffer means for capturing and storing, second selection means, selection information holding circuit for holding selection information for the previous cell in time, and first and second selection means for the first and second selection means Selection control means for sending a second selection signal. Then, when the effective cell is received from the system that has been selected and output by the control by the first and second selection signals, the effective cell is selected and output, and when a plurality of effective cells are received simultaneously. The effective cells of the system that have been selected and output until then are preferentially output, the effective cells of other systems are stored in the buffer means, and the effective cells stored in the buffer are output when no effective cells are received. Since it did in this way, the effective cell which should be truly prioritized can be output without delay.
[Brief description of the drawings]
FIG. 1 is a block diagram showing a configuration of a cell duplex control circuit according to an embodiment of the present invention.
FIG. 2 is a configuration block diagram showing a conventional cell duplication control circuit;
FIG. 3 is a diagram illustrating an operation mode of FIG. 1;
[Explanation of symbols]
11 Valid cell detection circuit 12 Selection circuit (first selection means)
13 Selection circuit (second selection means)
14 Selector control circuit (selection control means)
15 Selection information holding circuit 16 Buffer (buffer means)
S14 ₁₂ First selection signal S14 ₁₃ Second selection signal

Claims (1)

Connected to an arbitrary number of systems carrying cells having information indicating validity or invalidity, and when an effective cell indicating validity by the information is received from one of the arbitrary number of systems, this effective cell is selected. When the effective cells are simultaneously received from a plurality of systems out of the arbitrary number of systems, one effective cell is selected from the plurality of effective cells and the other effective cells are accumulated, In a cell multiplexing control circuit for outputting the stored effective cells when no effective cells have arrived from the arbitrary number of systems,
An effective cell detection circuit connected to the arbitrary number of systems and detecting from which system the effective cell arrives when the received cell has an effective cell;
First selection means connected to the arbitrary number of systems and selecting cells received from the arbitrary number of systems based on a given first selection signal;
Buffer means connected to the output side of the first selection means, and taking in and storing valid cells output from the first selection means when valid cells simultaneously arrive from a plurality of systems out of the arbitrary number of systems; ,
Connected to the arbitrary number of systems and the output side of the buffer means, and selects a cell given from the arbitrary number of systems or an effective cell stored in the buffer means based on a given second selection signal. Second selection means for outputting
A selection information holding circuit for holding selection information indicating a selection state in the first selection means for the previous cell in time;
Sending out the first selection signal and the second selection signal based on the detection result of the valid cell detection circuit and the selection information from the selection information holding circuit, from one of the arbitrary number of systems When an effective cell is received, the effective cell is selected and output from the second selection means. When a plurality of effective cells are received simultaneously, the effective cell of the system that has been selected and output until then is prioritized. The effective cells of the other system are stored in the buffer means, and the effective cells stored in the buffer are not received from the system that has been selected and output so far. Selection control means for outputting from the second selection means;
A cell multiplexing control circuit comprising:

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