JP3795232B2

JP3795232B2 - 2-terminal surge protection element

Info

Publication number: JP3795232B2
Application number: JP18135798A
Authority: JP
Inventors: 律夫岡; 秀隆佐藤; 恒一西川; 弘明岩黒
Original assignee: Shindengen Electric Manufacturing Co Ltd; Nippon Telegraph and Telephone Corp; NTT Inc USA
Current assignee: Shindengen Electric Manufacturing Co Ltd; NTT Inc; NTT Inc USA
Priority date: 1998-06-15
Filing date: 1998-06-15
Publication date: 2006-07-12
Anticipated expiration: 2018-06-15
Also published as: JP2000004030A

Description

【０００１】
【発明の属する技術分野】
本発明は雷サージ及びスイッチングサージ等の過電圧及び過電流から、通信機器回路系を保護するための２端子サージ防護素子における改良に関するものである。
【０００２】
【従来の技術】
近年、２端子サージ防護素子は、通信回線その他における雷サージ防護用などとして用途も多岐に亘り広く使用され、保持電流値の規格等の要求仕様も多岐に亘る傾向にある。
図８は従来の２端子サージ防護素子の構造例を示すもので、図８（ａ）は平面図，図８（ｂ）は断面図を示している。図８において、１は半導体チップ、２はＮ型又はＰ型導電型の半導体基板、３及び４は半導体基板２の両面に設けられたＰ型又はＮ型導電型のベース拡散部（ベース領域）、５及び６はベース拡散部３，４にそれぞれ設けられたＮ型又はＰ型導電型のエミッタ拡散部（エミッタ領域）、７及び８は二酸化ケイ素（ＳｉＯ₂）膜又はガラス膜により形成された絶縁膜、９及び１０はベースオーミック開口部及びエミッタ開口部に設けられた金属電極で、その材質Ｍ１はニッケル（Ｎｉ）又はアルミニウム（Ａｌ）などの金属である。
【０００３】
一方、サージ防護回路では、サージ通過後に自動復帰（続流防止）することが要求されるが、それを制御する電気特性パラメータは保持電流である。従来の２端子サージ防護素子の構造においては、この保持電流は、エミッタ拡散部５，６の下部のベース拡散部３，４の幅（ＷB ）及びベース拡散部３，４の不純物濃度と、エミッタの短絡構造パターンの設定により決定される。
【０００４】
【発明が解決しようとする課題】
そのため、従来の構造の２端子サージ防護素子は、その基本特性である保持電流値の決定要因が、前述のようにウエハの不純物拡散処理工程（エミッタ領域下部のベース領域幅（ＷB ）及び不純物濃度設計と、ベース・エミッタ短絡構造パタン設計）までで決定されていた。従って、同一不純物拡散ウエハから複数種の保持電流規格品を製造することができず、また従来では保持電流規格外のロットは使用不能となるなど、生産性の向上を阻害する要因となっていた。
本発明は、この点に鑑み、ベース拡散及びエミッタ拡散の不純物拡散処理後のウエハであっても、保持電流値の設定変更を可能とする構造の２端子サージ防護素子を提供するもので、同一不純物拡散ウエハから、複数種類の保持電流規格品を製造することが可能となり、また従来では保持電流規格外でロットアウトされていた不純物拡散済ウエハのロットも再生可能としたものである。
【０００５】
【課題を解決するための手段】
本願の第１の発明による２端子サージ防護素子は、第一導電型の半導体基板を共通基板として、その両面にそれぞれ第二導電型のベース領域と第一導電型のエミッタ領域を設け、該ベース領域と該エミッタ領域の露出面をそれぞれ金属電極により短絡した２端子サージ防護素子において、前記ベース領域及び前記エミッタ領域の露出した片面又は両面の前記金属電極を、該ベース領域上と該エミッタ領域上とでシリコンとの電位障壁が異なる種類の金属で別個に形成することにより、前記電位障壁による金属接触抵抗の差を利用して、サージ防護素子の点弧特性を変更して所要の保持電流特性値を得るようにしたものである。
【０００６】
本願の第２の発明による２端子サージ防護素子は、第一導電型の半導体基板を共通基板として、その一面に第二導電型のベース領域と第一導電型のエミッタ領域を設け、該ベース領域と該エミッタ領域の露出面を金属電極で短絡すると共に、前記共通基板の他面にベース領域と金属電極を設けた２端子サージ防護素子において、前記共通基板の一面に設けられた前記ベース領域と前記エミッタ領域の露出面の前記金属電極を、該ベース領域上と該エミッタ領域上とでシリコンとの電位障壁が異なる種類の金属で別個に形成することにより、前記電位障壁による金属接触抵抗の差を利用して、サージ防護素子の点弧特性を変更して所要の保持電流特性値を得るようにしたものである。
【０００７】
本願の第３の発明による２端子サージ防護素子は、第一導電型の半導体基板を共通基板として、その一面に第二導電型のベース領域と第一導電型のエミッタ領域を設け、該ベース領域と該エミッタ領域の露出面を金属電極で短絡すると共に、前記共通基板の他面にベース領域を設け、該ベース領域の露出面と前記共通基板の他面の露出面とを金属電極により短絡した２端子サージ防護素子において、前記共通基板の一面に設けられた前記ベース領域と前記エミッタ領域の露出面の前記金属電極を、該ベース領域上と該エミッタ領域上とでシリコンとの電位障壁が異なる種類の金属で別個に形成することにより、前記電位障壁による金属接触抵抗の差を利用して、サージ防護素子の点弧特性を変更して所要の保持電流特性値を得るようにしたものである。
【０００８】
【実施例】
図１は本発明による２端子サージ防護素子の一実施例を示すもので、図１（ａ）は平面図、図１（ｂ）は断面図をである。図１において、２１は半導体チップ、２はＮ型又はＰ型導電型の半導体基板、３及び４は半導体基板２の両面に設けられたＰ型又はＮ型導電型のベース拡散部（ベース領域）、５及び６はベース拡散部３，４にそれぞれ設けられたＮ型又はＰ型導電型のエミッタ拡散部（エミッタ領域）、７及び８は二酸化ケイ素（ＳｉＯ₂）膜又はガラス膜により形成された絶縁膜、１１及び１２はエミッタ拡散部５又は６の露出面上に設けられた材質Ｍ２の金属電極、１３及び１４はベース拡散部（ベースオーミック領域部）の露出面上に設けられた材質Ｍ３の金属電極である。
【０００９】
このエミッタ拡散部５又は６の露出面上に設けられた金属電極１１，１２の材質Ｍ２と、ベース拡散部３及び４の露出面上にそれぞれ設けられた金属電極１３，１４の材質Ｍ３とはシリコン（Ｎ型又はＰ型）に対する電位障壁（ショットキー障壁）の高さ（φB ）が異なるものを用いる。即ち、図２に示すように各金属の中から、後述する作用に基づき適宜選択するものである。また、図３（ａ）（ｂ）にＮ型及びＰ型の各ショットキー障壁と接触抵抗の関係を示してあるが、シリコンの不純物濃度が変化すると当該シリコンと各金属との接触抵抗の変化は、不純物濃度の変化に対応してほぼ規則的に変化する傾向を有している。
【００１０】
次に、図１（ｂ）に本発明による２端子サージ防護素子の第１の実施例の構造断面図を示してあるが、この構造断面図の上側の部分に係る等価回路図を図４に示してある。即ち、ベース拡散部３（ベースオーミック領域部）の露出面と材質Ｍ３の金属電極１３との接触抵抗値はＲ７であり、エミッタ拡散部５の露出面と材質Ｍ２の金属電極１１との接触抵抗値はＲ１０である。そこで、ベース拡散部３の露出面と材質Ｍ３の金属電極１３との接触抵抗値Ｒ７を、エミッタ拡散部５の露出面と材質Ｍ２の金属電極１１との接触抵抗値Ｒ１０に比較して低下（又はＲ１０をＲ７に比較して増大）させる方向に金属電極の種類を選択すると、点弧感度は低下し保持電流値は増大する方向となる。
【００１１】
また、逆に接触抵抗値Ｒ７を接触抵抗値Ｒ１０に比較して増大（又はＲ１０をＲ７に比較して低下）させる方向に金属電極の種類を選択すると、点弧感度は増大し保持電流値は減少する方向となる。
なお、図４に示した等価回路図は、半導体チップ２１の上側のみをエミッタ拡散部５とベース拡散部３を露出するようにし、この各露出面を異なる材質Ｍ２，Ｍ３の金属電極１１，１３で構成している例を示しているが、半導体チップ２１の下側も同様に構成した場合も、保持電流値を変化させることができる。
【００１２】
このように、図１に示す実施例における金属電極１１，１２の材質Ｍ２と金属電極１３，１４の材質Ｍ３を、必要とする保持電流値が得られる接触抵抗値となるシリコンに対する電位障壁（ショットキー障壁）の高さを選択すること、即ち電位障壁による金属接触抵抗の差を利用してサージ防護素子の点弧特性を変更することにより、目的とする保持電流値を有する半導体チップ２１を得ることができるものである。従って、同一不純物拡散ウエハから、複数種類の保持電流値を有する半導体チップの製造が可能となると共に、保持電流値が規格外であるためロットアウトとなった不純物拡散ウエハの再生も可能とすることができる。
【００１３】
図５（ａ）（ｂ）は、本発明の第２の実施例の半導体チップ３１を示す平面図及び断面図である。なお、この実施例の各部の構成のうち図１に示した半導体チップ２１と同様な部分は同一記号で示してある。この図５の実施例は、エミッタ拡散部５，６の露出面に設けられた材質Ｍ２の金属電極１１，１２と、ベース拡散部（ベースオーミック領域部）３，４の露出面に設けられた材質Ｍ３の金属電極１３，１４とを絶縁膜７，８で分離し、材質Ｍ２の金属電極１１と材質Ｍ３の金属電極１３及び、材質Ｍ２の金属電極１２と材質Ｍ３の金属電極１４を、接続用金属電極１５，１６でそれぞれ短絡している構成である。
この実施例も材質Ｍ２の金属電極１１，１２と材質Ｍ３の金属電極１３，１４を、電位障壁（ショットキー障壁）に差異のある２種類の金属で分離形成し、そのベース拡散部３とエミッタ拡散部５の表面接触抵抗のバランスを変更することで保持電流値を設定するよう構成したものである。
【００１４】
図６（ａ）（ｂ）は、本発明の第３の実施例の半導体チップ４１を示す平面図及び断面図である。なお、この実施例の各部の構成のうち図１に示した半導体チップ２１と同様な部分は同一記号で示してある。この図６に示した半導体チップ４１は、半導体基板２の上側は図１の半導体チップ２１の構成と同じであるが、下側はベース拡散部４と例えば材質Ｍ１の金属電極１７が設けてあるだけで、エミッタ拡散部が設けられていない逆阻止タイプのサージ防護素子と言われているものである。この実施例の場合も前述したと同様に、ベース拡散部３（ベースオーミック領域部）の露出面に設けられた金属電極１３と、エミッタ拡散部５の露出面に設けられた金属電極１１とを、電位障壁（ショットキー障壁）に差異のある２種類の金属で分離形成し、そのベース拡散部３とエミッタ拡散部５の表面接触抵抗のバランスを変更することで保持電流値を設定するよう構成したものである。
【００１５】
図７（ａ）（ｂ）は、本発明の第４の実施例の半導体チップ５１を示す平面図及び断面図である。なお、この実施例の各部の構成のうち図１に示した半導体チップ２１と同様な部分は同一記号で示してある。この図７に示した半導体チップ５１は、半導体基板２の上側は図１の半導体チップ２１の構成と同じであるが、下側は半導体基板２の一部にベース拡散部４を設け、半導体基板２の露出面とベース拡散部４の露出部とを、例えば材質Ｍ１の金属電極１８で短絡したもので、逆通電型のサージ防護素子と言われているものある。
この実施例の場合も前述したと同様に、ベース拡散部３（ベースオーミック領域部）の露出面に設けられた金属電極１３と、エミッタ拡散部５の露出面に設けられた金属電極１１とを、電位障壁（ショットキー障壁）に差異のある２種類の金属で分離形成し、そのベース拡散部３とエミッタ拡散部５の表面接触抵抗のバランスを変更することで保持電流値を設定するよう構成したものである。
【００１６】
【発明の効果】
以上詳細に説明したように本発明によれば、ベース及びエミッタの不純物拡散処理後のウエハであっても、保持電流値の設定変更が可能となり、同一不純物拡散済ウエハから、複数種類の保持電流値の規格品を製造することが可能となる。また、従来では保持電流値が規格値外でロットアウトされていた不純物拡散済ウエハのロットも再生して使用可能とすることができる効果を奏する。
【図面の簡単な説明】
【図１】本発明の２端子サージ防護素子の第１の実施例の構造を示す平面図及び断面図である。
【図２】各金属のシリコン（Ｎ型及びＰ型）に対する障壁の高さ（φ_B）の例を示す図である。
【図３】Ｎ型及びＰ型シリコンでの各不純物濃度におけるショットキー障壁と接触抵抗の関係を示す図である。
【図４】本発明の２端子サージ防護素子の作用を説明するための等価回路図である。
【図５】本発明の２端子サージ防護素子の第２の実施例の構造を示す平面図及び断面図である。
【図６】本発明の２端子サージ防護素子の第３の実施例の構造を示す平面図及び断面図である。
【図７】本発明の２端子サージ防護素子の第４の実施例の構造を示す平面図及び断面図である。
【図８】従来の２端子サージ防護素子の構造の一例を示す平面図及び断面図である。
【符号の説明】
１，２１，３１，４１，５１半導体チップ
２半導体基板
３，４ベース拡散部
５，６エミッタ拡散部
７，８絶縁膜
９，１０，１７，１８金属電極（Ｍ１）
１１，１２金属電極（Ｍ２）
１３，１４金属電極（Ｍ３）
１５，１６接続用金属電極（Ｍ１）[0001]
BACKGROUND OF THE INVENTION
The present invention relates to an improvement in a two-terminal surge protection element for protecting a communication equipment circuit system from overvoltage and overcurrent such as lightning surge and switching surge.
[0002]
[Prior art]
2. Description of the Related Art In recent years, two-terminal surge protection elements have been widely used for lightning surge protection in communication lines and the like, and there is a tendency for required specifications such as holding current value standards to be diverse.
FIG. 8 shows an example of the structure of a conventional two-terminal surge protection element. FIG. 8 (a) is a plan view and FIG. 8 (b) is a sectional view. In FIG. 8, 1 is a semiconductor chip, 2 is an N-type or P-type conductivity semiconductor substrate, and 3 and 4 are P-type or N-type conductivity type base diffusion portions (base regions) provided on both surfaces of the semiconductor substrate 2. Reference numerals 5 and 6 are N-type or P-type conductivity type emitter diffusion parts (emitter regions) provided in the base diffusion parts 3 and 4, respectively, and 7 and 8 are silicon dioxide (SiO ₂ ) films or glass films. The insulating films 9 and 10 are metal electrodes provided in the base ohmic opening and the emitter opening, and the material M1 thereof is a metal such as nickel (Ni) or aluminum (Al).
[0003]
On the other hand, the surge protection circuit is required to automatically return (prevention of continuous current) after passing the surge, and the electrical characteristic parameter for controlling it is the holding current. In the structure of the conventional two-terminal surge protection element, this holding current includes the width (WB) of the base diffusion portions 3 and 4 below the emitter diffusion portions 5 and 6, the impurity concentration of the base diffusion portions 3 and 4, the emitter This is determined by setting the short-circuit structure pattern.
[0004]
[Problems to be solved by the invention]
Therefore, in the conventional two-terminal surge protection device, the determinant of the holding current value, which is its basic characteristic, is the impurity diffusion processing step of the wafer (base region width (WB) under the emitter region and impurity concentration as described above). Design and base-emitter short-circuit structure pattern design). Therefore, a plurality of types of holding current standards cannot be manufactured from the same impurity diffusion wafer, and conventionally, a lot outside the holding current standard becomes unusable, which has been a factor that hinders productivity improvement. .
In view of this point, the present invention provides a two-terminal surge protection element having a structure capable of changing the setting of the holding current value, even for a wafer after impurity diffusion processing of base diffusion and emitter diffusion. A plurality of types of holding current standard products can be manufactured from the impurity diffusion wafer, and a lot of impurity-diffused wafers that were conventionally lot-out out of the holding current standard can also be regenerated.
[0005]
[Means for Solving the Problems]
According to a first aspect of the present invention, a two-terminal surge protection device includes a first conductivity type semiconductor substrate as a common substrate, and a second conductivity type base region and a first conductivity type emitter region provided on both sides of the common substrate. in 2 terminal surge protection device that is short-circuited by each metal electrode to the exposed surface of the region and the emitter region, said base region and exposed one or both surfaces of the metal electrodes of the emitter region, said base region and said emitter region by potential barrier between the silicon in the above separately formed by different metals, by utilizing the difference in metal contact resistance due to the potential barrier, the required change the restriking characteristic points of surge protection element A holding current characteristic value is obtained.
[0006]
A two-terminal surge protection element according to a second invention of the present application uses a first conductivity type semiconductor substrate as a common substrate, and a second conductivity type base region and a first conductivity type emitter region are provided on one surface thereof, and the base region In the two-terminal surge protection device in which the exposed surface of the emitter region is short-circuited with a metal electrode and the base region and the metal electrode are provided on the other surface of the common substrate, the base region provided on one surface of the common substrate; The metal electrode on the exposed surface of the emitter region is separately formed of a metal having a different potential barrier with respect to silicon on the base region and the emitter region, so that a difference in metal contact resistance due to the potential barrier occurs. utilizing, in which to obtain the required holding current characteristic value by changing the ignition characteristics in terms of surge protection devices.
[0007]
A two-terminal surge protection element according to a third invention of the present application has a first conductivity type semiconductor substrate as a common substrate, a second conductivity type base region and a first conductivity type emitter region provided on one surface thereof, and the base region In addition, the exposed surface of the emitter region is short-circuited by a metal electrode, a base region is provided on the other surface of the common substrate, and the exposed surface of the base region and the exposed surface of the other surface of the common substrate are short-circuited by the metal electrode. In the two-terminal surge protection device, the base electrode provided on one surface of the common substrate and the metal electrode on the exposed surface of the emitter region have different potential barriers between silicon on the base region and the emitter region. by separately forming the type of metal, by utilizing the difference in metal contact resistance due to the potential barrier, also to obtain the required holding current characteristic value by changing the ignition characteristics in terms of surge protection element It is.
[0008]
【Example】
1A and 1B show an embodiment of a two-terminal surge protection element according to the present invention. FIG. 1A is a plan view and FIG. 1B is a cross-sectional view. In FIG. 1, 21 is a semiconductor chip, 2 is an N-type or P-type conductivity semiconductor substrate, 3 and 4 are P-type or N-type conductivity type base diffusion portions (base regions) provided on both sides of the semiconductor substrate 2. Reference numerals 5 and 6 are N-type or P-type conductivity type emitter diffusion parts (emitter regions) provided in the base diffusion parts 3 and 4, respectively, and 7 and 8 are silicon dioxide (SiO ₂ ) films or glass films. Insulating films, 11 and 12 are metal electrodes made of material M2 provided on the exposed surface of the emitter diffusion portion 5 or 6, and 13 and 14 are materials M3 provided on the exposed surface of the base diffusion portion (base ohmic region portion). It is a metal electrode.
[0009]
The material M2 of the metal electrodes 11 and 12 provided on the exposed surface of the emitter diffusion portion 5 or 6 and the material M3 of the metal electrodes 13 and 14 provided on the exposed surfaces of the base diffusion portions 3 and 4, respectively. Those having a different potential barrier (Schottky barrier) height (φB) relative to silicon (N-type or P-type) are used. That is, as shown in FIG. 2, it is appropriately selected from the metals based on the action described later. FIGS. 3A and 3B show the relationship between the N-type and P-type Schottky barriers and the contact resistance. When the impurity concentration of silicon changes, the contact resistance changes between the silicon and each metal. Has a tendency to change almost regularly in response to changes in the impurity concentration .
[0010]
Next, FIG. 1B shows a structural sectional view of the first embodiment of the two-terminal surge protection element according to the present invention. FIG. 4 shows an equivalent circuit diagram relating to the upper part of this structural sectional view. It is shown. That is, the contact resistance value between the exposed surface of the base diffusion portion 3 (base ohmic region portion) and the metal electrode 13 made of material M3 is R7, and the contact resistance between the exposed surface of the emitter diffusion portion 5 and the metal electrode 11 made of material M2. The value is R10. Therefore, the contact resistance value R7 between the exposed surface of the base diffusion portion 3 and the metal electrode 13 made of the material M3 is lower than the contact resistance value R10 between the exposed surface of the emitter diffusion portion 5 and the metal electrode 11 made of the material M2 ( If the type of the metal electrode is selected in the direction in which R10 is increased compared to R7), the ignition sensitivity is decreased and the holding current value is increased.
[0011]
Conversely, if the type of metal electrode is selected in a direction that increases the contact resistance value R7 compared to the contact resistance value R10 (or decreases R10 compared to R7), the ignition sensitivity increases and the holding current value becomes It will be a decreasing direction.
In the equivalent circuit diagram shown in FIG. 4, the emitter diffusion part 5 and the base diffusion part 3 are exposed only on the upper side of the semiconductor chip 21, and the exposed surfaces of the metal electrodes 11 and 13 made of different materials M2 and M3 are used. However, even when the lower side of the semiconductor chip 21 is similarly configured, the holding current value can be changed.
[0012]
As described above, the material M2 of the metal electrodes 11 and 12 and the material M3 of the metal electrodes 13 and 14 in the embodiment shown in FIG. By selecting the height of the key barrier), that is, by changing the ignition characteristic of the surge protection element using the difference in the metal contact resistance due to the potential barrier, the semiconductor chip 21 having the desired holding current value is obtained. It is something that can be done. Therefore, it is possible to manufacture a semiconductor chip having a plurality of types of holding current values from the same impurity diffusion wafer, and it is also possible to regenerate a lot-out impurity diffusion wafer because the holding current values are out of specification. Can do.
[0013]
5A and 5B are a plan view and a cross-sectional view showing a semiconductor chip 31 according to the second embodiment of the present invention. In the configuration of each part of this embodiment, the same parts as those of the semiconductor chip 21 shown in FIG. The embodiment of FIG. 5 is provided on the exposed surfaces of the metal electrodes 11 and 12 of the material M2 provided on the exposed surfaces of the emitter diffusion portions 5 and 6 and the base diffusion portions (base ohmic region portions) 3 and 4. The metal electrodes 13 and 14 made of the material M3 are separated by the insulating films 7 and 8, and the metal electrode 11 made of the material M2, the metal electrode 13 made of the material M3, and the metal electrode 12 made of the material M2 and the metal electrode 14 made of the material M3 are connected. The metal electrodes 15 and 16 for use are short-circuited.
In this embodiment, the metal electrodes 11 and 12 made of the material M2 and the metal electrodes 13 and 14 made of the material M3 are separately formed by two kinds of metals having different potential barriers (Schottky barriers), and the base diffusion portion 3 and the emitter are formed. The holding current value is set by changing the balance of the surface contact resistance of the diffusion portion 5.
[0014]
6A and 6B are a plan view and a cross-sectional view showing a semiconductor chip 41 according to the third embodiment of the present invention. In the configuration of each part of this embodiment, the same parts as those of the semiconductor chip 21 shown in FIG. The semiconductor chip 41 shown in FIG. 6 has the same configuration as that of the semiconductor chip 21 in FIG. 1 on the upper side of the semiconductor substrate 2, but the base diffusion portion 4 and the metal electrode 17 made of material M1, for example, are provided on the lower side. Thus, it is said to be a reverse blocking type surge protection element in which no emitter diffusion portion is provided. In the case of this embodiment, as described above, the metal electrode 13 provided on the exposed surface of the base diffusion portion 3 (base ohmic region portion) and the metal electrode 11 provided on the exposed surface of the emitter diffusion portion 5 are provided. The holding current value is set by changing the balance of the surface contact resistance between the base diffusion part 3 and the emitter diffusion part 5 by separating and forming two kinds of metals having different potential barriers (Schottky barriers). It is a thing.
[0015]
FIGS. 7A and 7B are a plan view and a cross-sectional view showing a semiconductor chip 51 according to the fourth embodiment of the present invention. In the configuration of each part of this embodiment, the same parts as those of the semiconductor chip 21 shown in FIG. In the semiconductor chip 51 shown in FIG. 7, the upper side of the semiconductor substrate 2 is the same as the configuration of the semiconductor chip 21 in FIG. 1, but the lower side is provided with a base diffusion portion 4 in a part of the semiconductor substrate 2 to provide a semiconductor substrate. The exposed surface 2 and the exposed portion of the base diffusion portion 4 are short-circuited by, for example, a metal electrode 18 made of material M1, and are called reverse-current type surge protection elements.
In the case of this embodiment, as described above, the metal electrode 13 provided on the exposed surface of the base diffusion portion 3 (base ohmic region portion) and the metal electrode 11 provided on the exposed surface of the emitter diffusion portion 5 are provided. The holding current value is set by changing the balance of the surface contact resistance between the base diffusion part 3 and the emitter diffusion part 5 by separating and forming two kinds of metals having different potential barriers (Schottky barriers). It is a thing.
[0016]
【The invention's effect】
As described above in detail, according to the present invention, it is possible to change the setting of the holding current value even for the wafer after the impurity diffusion treatment of the base and the emitter, and a plurality of types of holding current can be obtained from the same impurity-diffused wafer. It becomes possible to manufacture standard products of values. In addition, there is an effect that a lot of impurity-diffused wafers, in which the holding current value has been out of the standard value in the past, can be regenerated and used.
[Brief description of the drawings]
1A and 1B are a plan view and a cross-sectional view showing a structure of a first embodiment of a two-terminal surge protection element according to the present invention.
FIG. 2 is a diagram showing an example of a barrier height (φ _B ) for silicon (N-type and P-type) of each metal.
FIG. 3 is a diagram showing a relationship between a Schottky barrier and a contact resistance at each impurity concentration in N-type and P-type silicon.
FIG. 4 is an equivalent circuit diagram for explaining the operation of the two-terminal surge protection element of the present invention.
FIGS. 5A and 5B are a plan view and a cross-sectional view showing the structure of a second embodiment of the two-terminal surge protection element of the invention. FIGS.
6A and 6B are a plan view and a cross-sectional view showing the structure of a third embodiment of the two-terminal surge protection element of the present invention.
7A and 7B are a plan view and a cross-sectional view showing the structure of a fourth embodiment of the two-terminal surge protection element of the present invention.
8A and 8B are a plan view and a cross-sectional view showing an example of the structure of a conventional two-terminal surge protection element.
[Explanation of symbols]
1, 2, 31, 41, 51 Semiconductor chip 2 Semiconductor substrate 3, 4 Base diffusion part 5, 6 Emitter diffusion part 7, 8 Insulating film 9, 10, 17, 18 Metal electrode (M1)
11,12 Metal electrode (M2)
13,14 Metal electrode (M3)
15,16 Metal electrode for connection (M1)

Claims

Using a first conductivity type semiconductor substrate as a common substrate, a base region of the second conductivity type and an emitter region of the first conductivity type are provided on both surfaces thereof, and the exposed surfaces of the base region and the emitter region are short-circuited by metal electrodes, respectively. In the two-terminal surge protection element
Said base region and exposed one or both surfaces of the metal electrodes of the emitter region, by the potential barrier between the silicon in the said base region and said emitter region is formed separately with different kinds of metals, the by utilizing the difference in metallic contact resistance by potential barriers, service over the point of the di-protection device by changing the arc characteristics, characterized in that to obtain the required holding current characteristic value 2 terminal surge protection device.

A semiconductor substrate of the first conductivity type is used as a common substrate, a base region of the second conductivity type and an emitter region of the first conductivity type are provided on one surface, and the exposed surface of the base region and the emitter region is short-circuited with a metal electrode. In a two-terminal surge protection element in which a base region and a metal electrode are provided on the other surface of the common substrate,
The metal electrodes on the exposed surfaces of the base region and the emitter region provided on one surface of the common substrate are separately formed of different types of metals having different potential barriers with silicon on the base region and the emitter region. by, by utilizing the difference of the metal contact resistance due to the potential barrier, two terminals surge, characterized in that to obtain the required holding current characteristic value by changing the ignition characteristics in terms of surge protection element Protective element.

A semiconductor substrate of the first conductivity type is used as a common substrate, a base region of the second conductivity type and an emitter region of the first conductivity type are provided on one surface, and the exposed surface of the base region and the emitter region is short-circuited with a metal electrode. In the two-terminal surge protection element in which a base region is provided on the other surface of the common substrate and the exposed surface of the base region and the exposed surface of the other surface of the common substrate are short-circuited by a metal electrode,
The metal electrodes on the exposed surfaces of the base region and the emitter region provided on one surface of the common substrate are separately formed of different types of metals having different potential barriers with silicon on the base region and the emitter region. by, by utilizing the difference of the metal contact resistance due to the potential barrier, two terminals surge, characterized in that to obtain the required holding current characteristic value by changing the ignition characteristics in terms of surge protection element Protective element.

4. The two-terminal surge protection according to claim 1, wherein the metal electrodes separately formed of different kinds of metals on the exposed surfaces of the base region and the emitter region are separated by an insulating film. element.

The two-terminal surge protection element according to claim 1, 2 or 3, wherein the first conductivity type is a P-type conductivity type and the second conductivity type is an N-type conductivity type.

The two-terminal surge protection element according to claim 1, 2 or 3, wherein the first conductivity type is an N-type conductivity type and the second conductivity type is a P-type conductivity type.