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JP3813752B2 - Semiconductor device acceleration test method and apparatus - Google Patents
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JP3813752B2 - Semiconductor device acceleration test method and apparatus - Google Patents

Semiconductor device acceleration test method and apparatus Download PDF

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JP3813752B2
JP3813752B2 JP00070599A JP70599A JP3813752B2 JP 3813752 B2 JP3813752 B2 JP 3813752B2 JP 00070599 A JP00070599 A JP 00070599A JP 70599 A JP70599 A JP 70599A JP 3813752 B2 JP3813752 B2 JP 3813752B2
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voltage
semiconductor device
electrodes
frequency
semiconductor element
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JP2000199778A (en
JP2000199778A5 (en
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修二 緒方
良孝 菅原
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Kansai Electric Power Co Inc
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Kansai Electric Power Co Inc
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Description

【0001】
【発明の属する技術分野】
本発明は半導体素子、特に大電力用半導体素子の加速試験方法及びその試験装置に関するものである。
【0002】
【従来の技術】
大電力用の半導体素子の主要な特性に耐圧がある。半導体素子の一例のサイリスタをオフ状態にして、アノードとカソード間に電圧を印加したとき、リーク電流が流れる。ある一定のリーク電流が流れたときにサイリスタに印加した電圧を耐圧という。一般に耐圧は半導体素子の使用期間が長くなると低下することが知られている。耐圧が低下すると、半導体素子が組み込まれた電気回路又は電子回路の動作に異常をきたすおそれがでてくる。このため、長期間にわたって半導体素子を使用する場合には耐圧の変化が所定の許容範囲にあることを確認するために、信頼性試験を実施している。
【0003】
大電力用半導体素子の耐圧の従来の試験方法には、直流電圧印加試験と交流電圧印加試験とがある。直流電圧印加試験は、多数の半導体素子に一定の直流電圧を長時間印加して時間に対する、破損した半導体装置の数の分布を調べるものである。交流電圧印加試験は、多数の半導体素子に商用周波数の一定の交流電圧を加えて時間に対する破損した半導体装置の数の分布を調べる。いずれの場合も印加する電圧は、大電力用の半導体素子の定格電圧以下であるが、通常の使用条件よりも厳しい、例えば定格電圧の90%や80%などの電圧値である。これにより半導体素子の物理的、化学的な劣化を加速して調べ、使用期間中に耐圧が大幅に変化しないことを確認する。またこれにより半導体素子の使用状態における寿命や故障率を推定することもできる。
【0004】
【発明が解決しようとする課題】
通常、大電力用の半導体素子は商用周波数で使用されるため、電圧は順方向と逆方向の両方向に交互に印加される。従来の直流電圧印加試験の場合、半導体素子の順方向と逆方向の2回に分けて印加試験を行わなくてはならず、試験時間が長くなる。又、直流電圧印加試験の場合は半導体素子の順方向もしくは逆方向の一方向に印加電圧によるストレスが連続的に与えられるため、ストレスが大きくなりすぎ、別の劣化モードによる破壊が生じるという問題があった。一方従来の交流電圧印加試験は通常の使用条件と同じ商用周波数で試験を行うため、半導体素子に過大なストレスを与えず実レベルのストレスの下で試験ができる。しかし劣化試験をあまり加速することができず、長い試験時間を要するという問題があった。
【0005】
本発明は半導体素子の耐圧に関する加速試験方法及びその試験装置に関するものであり、半導体素子に上記従来の試験のような過大なストレスを与えることなく適度なストレスの範囲で加速試験を行うことができる試験方法と試験装置を提供することを目的とする。
【0006】
【課題を解決するための手段】
本発明の半導体素子の加速試験方法は、両極間の電流経路を開閉する半導体素子の加速試験方法であって、半導体素子の使用時に前記半導体素子の電流経路を形成する両極間に印加する交流電圧の周波数より高い周波数であり、オフ状態の前記半導体素子をオンにする、前記両極間の印加電圧の上昇速度で定義される臨界オフ電圧上昇率を、前記半導体素子の定格電圧の4倍の値で除した値で表される周波数よりは低い周波数であって、前記半導体素子の定格電圧より低い値の交流電圧を前記両極間に印加するステップ、及び前記交流電圧が前記両極間に印加されているときに、前記半導体素子の前記両極間を流れるリーク電流を測定するステップを有する。
【0007】
本発明の半導体素子の加速試験装置は、両極間の電流経路を開閉する半導体素子の加速試験装置であって、半導体素子の使用時に前記半導体素子の電流経路を形成する両極間に印加する交流電圧の周波数より高い周波数であって、オフ状態の前記半導体素子をオンにする、前記両極間の印加電圧の上昇速度で定義される臨界オフ電圧上昇率を、前記半導体素子の定格電圧の4倍の値で除した値で表される周波数より低い周波数であって、前記半導体素子の定格電圧より低い値の交流電圧を前記両極間に印加する交流電源、及び前記交流電圧が前記両極間に印加されているときに、前記半導体素子の前記両極間を流れるリーク電流を測定する電流測定手段を有する。
【0008】
本発明の加速試験方法及び加速試験装置によれば、半導体素子の両電極間に実使用周波数の商用周波数よりも高い周波数の電圧を印加し、半導体素子に順方向及び逆方向の電圧ストレスを与える。電力用の半導体素子などの、高い温度で使用されるとともに、印加される電圧がきわめて高い半導体素子では、半導体素子に電圧が印加される回数に応じて劣化が進行する。半導体素子の両極間に定格電圧以下で実使用周波数よりも高い周波数の電圧を印加することにより、所定時間内に半導体素子に与えられるストレスの回数が増加し素子の劣化が加速される。
【0009】
【発明の実施の形態】
この発明の加速試験方法は、半導体素子の両電極間に商用周波数よりも高い周波数の電圧を印加する。印加電圧は定格電圧以下の所定の電圧とし、定格電圧と臨界オフ電圧上昇率とから算出される最大周波数より低く、試験対象素子が実際に使用される周波数の50Hz又は60Hzより高い周波数の電圧を印加して試験を行い、リーク電流を測定して耐圧の変化を推定する。
以下、本発明の好適な実施例を図1から図8を参照して説明する。
【0010】
《第1実施例》
以下に本発明の第1の実施例の半導体素子の加速試験装置を図1を参照して説明する。図1は、この発明の半導体素子の加速試験装置のブロック図である。
【0011】
被試験半導体素子として定格電圧8000Vの光サイリスタ素子1を用いる場合について説明する。三相200Vの商用電源3に接続されたコンバータ4によって三相交流を直流に変換する。コンバータ4の2本の出力端はインバータ5の入力端に接続され、商用電源の周波数より高い所定の周波数の交流電圧に変換する。インバータ5の出力端は変圧器2の入力端子2Aに接続され、交流電圧は変圧器2により昇圧される。変圧器2で所定の電圧に昇圧された交流電圧は、変圧器の両出力電圧2Bにそれぞれ接続された光サイリスタ1のアノードとカソードに印加される。両出力端子2B間には電圧プローブ8が接続され、出力電圧を測定する。出力端子2Bの一方とカソードとの接続線16には電流を検出するCT7がもうけられている。光サイリスタ1の電極には熱電対などの温度センサが取り付けられている。温度センサ6,CT7,及び電圧プローブ8の検出値を計測用のオシロスコープなどの記録装置9に入力して記録する。記録装置9は内部に時計を有し、アノード電流(リーク電流)の変化を1万ないし2万時間にわたって記録する。光サイリスタ1には、加熱装置17に接続されたヒータ18が取り付けられている。加熱装置17は、温度センサ6の検出値に基づいて光サイリスタ1を所定の温度に保つ。この温度は例えば125℃である。
【0012】
光サイリスタ1が試験により極端に劣化するのを防ぐために印加する交流電圧の最大値は定格電圧の80%である6400Vにしている。
【0013】
光サイリスタ1のオフ状態において、アノードとカソード間の順方向電圧を所定の電圧上昇速度、例えば2000V/μsで上昇させると、光サイリスタ1はオンとなる。この電圧の上昇速度を「臨界オフ電圧上昇率」という。光サイリスタ1の臨界オフ電圧上昇率が2000V/μsであるとき、光サイリスタ1がオンにならない印加交流電圧の最大周波数は(2000×10)/(8000×4)の演算により求められ、62500Hzとなる。本実施例では、定格電圧以下の電圧で、使用周波数よりも高い周波数の電圧を印加することにより試験を加速して行う。加速の倍率は電圧には依存せず、周波数に依存する。最大周波数が62500Hzであるので60Hzの商用周波数と比べて最大1041倍の加速が可能となる。50Hzの場合は1250倍の加速が可能となる。本実施例では62500Hzより低い周波数である1200Hzで実験を行って、60Hzの場合と比較した。60Hz、6400Vの交流電圧を10000時間印加した素子と、1200Hz、6400Vの交流電圧を500時間印加した素子とを比較した結果を図2に示す。図2の横軸は時間を示し、縦軸はリーク電流の測定結果を示す。図2に示すようにリーク電流はほぼ同じであった。
【0014】
一般に半導体素子を長期間使用したとき耐圧が低下する。耐圧が低下した半導体素子は正常な素子に比べて同じ電圧でより大きなリーク電流が流れる。従ってリーク電流を測定することによって耐圧の変化を推定することができる。図2において、60Hz、6400Vの交流電圧を10000時間印加したものと、1200Hz、6400Vの交流電圧を500時間印加したものとのリーク電流が同じことから、60Hzでは10000時間で生じた耐圧の低下が、1200Hzでは500時間で生じたことが推定できる。この実験結果から高い周波数の交流電圧を用いることによって耐圧の低下を加速させることができることが確認された。加速による時間短縮は周波数に反比例している。これにより耐圧の変化が周波数を高くすることによって加速できることが確認できた。
【0015】
《第2実施例》
本発明の第2の実施例の試験装置の構成は実質的に図1に示す第1の実施例のものと同じである。異なる点は、被試験サイリスタのアノードとカソード間に印加する電圧の正負の波高値が互いに異なっていることである。
一般に、インバータ装置などに用いられる大電力用半導体素子に印加される順方向電圧は、逆方向電圧より高い。本実施例はこのような用途の半導体素子に好適である。
【0016】
図3に、印加する電圧の波形図を示す。図3に示すように、アノード電圧の正の電圧の波高値が負の電圧の波高値よりも高くなされている。このような波形は、図1のインバータ5のパルス幅制御を行うことにより形成することができ印加する電圧の逆方向電圧を順方向電圧より小さくしている。これにより半導体装置の実際に使用される状態に適合するように加速の条件を設定することができる。本実施例でも定格電圧以下で使用周波数よりも高い周波数の電圧を印加することにより試験を加速して行うものである。加速率は電圧には依存せず、周波数に依存するので8000Vの光サイリスタの場合最大1041倍(62500/60)まで加速できる。本実施例では、たとえば、印加電圧が同じ場合、60Hzで10000時間印加した素子と、1200Hzで500時間印加した素子とのリ−ク電流が同じことから、耐圧の変化が周波数を増加させることで加速され、リーク電流を測定することで検出されることが確認できた。
【0017】
《第3実施例》
次に本発明の第3の実施例の試験装置を図4のブロック図を参照して説明する。被試験半導体素子が定格電圧4500VのGTOサイリスタ(Gate turn off thyrister)の場合について説明する。インバータ5の出力端は単相半波整流回路10の入力端に接続されている。単相半波整流回路10の出力端は変圧器2の入力端子2Aに接続されている。変圧器2の両出力端子2B間にはGTOサイリスタ11が接続されている。その他の構成は、図1のものと同じであるので重複する説明は省略する。コンバータ4で商用周波数の3相交流をいったん直流に変換し、インバータ5でこの直流を高周波電圧に変換する。現在のほとんどの高耐圧GTOサイリスタは逆阻止耐圧が極めて低い逆導電形である。従って高い逆方向電圧を印加するとGTOサイリスタ11が破損するおそれがある。本実施例では、単相半波整流回路10で高周波電圧を半波整流して半波の出力電圧を得る。半波の出力電圧を変圧器2で昇圧して順方向の最大電圧が定格電圧の80%で、逆方向電圧が実質的に零の電圧を生成しGTOサイリスタ11に印加する。
【0018】
印加する電圧の最大値は定格電圧の80%である3600Vである。このGTOサイリスタ11の臨界オフ電圧上昇率は600V/μsであるので、印加交流電圧の最大周波数は33333Hzとなる(600×10/4500×4)。従って60Hzの商用周波数に比べて最大556倍の加速試験が可能となる。本実施例では60Hzと1200Hzの交流電圧を用いて実験を行った。60Hz、3600Vの電圧を10000時間印加した素子と、1200Hz、3600Vの電圧を500時間印加した素子とのリーク電流が同じであった。測定結果を図5に示す。これにより耐圧の変化が周波数を増加することで加速され、変化した耐圧をリーク電流の測定で知ることができることが確認できた。
【0019】
《第4実施例》
次に本発明の第4の実施例の試験装置を図6のブロック図を参照して説明する。図6に示す試験装置では定格電圧2000Vのサイリスタ14を測定対象としている。3相の商用電源3にコンバータ4が接続され、三相交流をいったん直流に変換する。コンバータ4の出力端に、2個のインバータ12とインバータ13が並列に接続され、直流電圧を高周波電圧に変換する。インバータ12とインバータ13とは変換周波数が互に異なるように構成されているので、変圧器2の入力端子2Aに振幅変調された高周波電圧を出力することができる。このような電圧条件で使用する用途としては大出力ラジオ放送装置などに用いる半導体素子がある。例えばインバータ12から出力される高周波電圧を式、Acos(ωt+θ)で表される波形とし、インバータ13から出力される高周波電圧を式、Acosptで表される波形とする。両者を合成すると合成された高周波電圧は式、A(1+kcospt)cos(ωt+θ)で表される波形となる。図7に示すアノード電圧の波形図は、上記の各式において、A=1、k=1、p=1、ω=10、θ=πとした場合を示す。
【0020】
図6において、サイリスタ14のアノードとカソード間に印加する電圧の最大値は定格電圧の80%である1600Vである。このサイリスタ14の臨界オフ電圧上昇率は300V/μsであるので、印加交流電圧の最大周波数は37500Hzとなる(300×10/2000×4)。従って60Hzの商用周波数に比べて最大625倍の加速試験が可能となる。
【0021】
本実施例によれば、大出力ラジオ放送に用いられる、高い振幅変調電圧が印加される大電力用半導体素子に関しても、半導体素子の極端な劣化を招くことなく、最大625倍までの加速試験ができる。搬送周波数60Hz、1600Vの電圧を10000時間印加した素子と、搬送周波数12000Hz、1600Vの電圧を50時間印加した素子とのリーク電流が同じであった。測定結果を図8に示す。これにより耐圧の変化が周波数を増加させることで加速され、リーク電流を測定することで検出されることが確認できた。
【0022】
以上のように、本実施例の試験装置では、半導体素子の定格電圧と臨界オフ電圧上昇率から算出される最大周波数より低く、かつ試験対象素子が実際に使用される周波数の50Hz又は60Hzより大きな周波数の電圧を印加して試験を行なうことにより半導体素子の劣化を加速して短時間で耐圧の変化を知ることができる。これに基づいて半導体素子の使用状態における寿命や故障率を推定することができる。
【0023】
この発明の実施の態様は以上の実施例に限定されるものではなく、細部については様々な変形が可能である。例えば半導体素子に流れる電流を測定して記録する手段としては、オシロスコープやCTに限るものではなく、回路に抵抗を挿入して抵抗に生じる電圧に基づいて測定してもよい。またコンバータでいったん商用電圧を直流電圧に変換してから、インバータで直流電圧を高周波電圧に変換しているが、サイクロコンバータで直接商用電源の200Vから電圧を高周波電圧に変換してもよい。
さらにこの発明は、サイリスタ、GTOサイリスタだけではなくダイオード、トランジスタ、IGBT、SIトランジスタ、SIサイリスタ、MOSFETなどの各種半導体素子や、複数の半導体素子を含むハイブリッドICあるいは複数の半導体素子が組み合わされたモジュールなどにも適用できる。
【0024】
【発明の効果】
以上の実施例の説明から明らかなように、本発明によれば、半導体素子の定格として定められた定格電圧と臨界オフ電圧上昇率から算出される最大周波数以下でかつ試験対象素子が実際に使用される周波数の50Hz又は60Hzより大きな周波数の電圧を印加して試験を行う。これにより、使用条件と大幅に異なる劣化を招くことなく半導体素子の劣化要因を加速して、耐圧の変化を短時間で確認できるとともに、半導体素子の使用状態における寿命や故障率を推定することができ、試験に要する期間を低減することができる。
【図面の簡単な説明】
【図1】 この発明の第1の実施例である半導体素子の試験装置のブロック図
【図2】 第1の実施例における60Hzと1200Hzでのリーク電流と試験時間との関係を示すグラフ
【図3】 第2の実施例におけるアノード電圧の波形図
【図4】 この発明の第3の実施例である半導体素子の試験装置のブロック図
【図5】 第3の実施例における60Hzと1200Hzでのリーク電流と試験時間との関係を示すグラフ
【図6】 この発明の第4の実施例である半導体素子の試験装置のブロック図
【図7】 第4の実施例におけるアノード電圧の波形図
【図8】 第4の実施例における60Hzと12000Hzでのリーク電流と試験時間との関係を示すグラフ
【符号の説明】
1 光サイリスタ
2 変圧器
3 商用電源
4 コンバータ
5 インバータ
6 温度センサ
7 CT
8 電圧プローブ
9 オシロスコープ
10 記録装置
11 GTOサイリスタ
12 インバータ
13 インバータ
14 サイリスタ
16 接続線
17 加熱装置
18 ヒーター
[0001]
BACKGROUND OF THE INVENTION
The present invention relates to an acceleration test method and a test apparatus for a semiconductor element, particularly a high power semiconductor element.
[0002]
[Prior art]
The main characteristic of high-power semiconductor devices is withstand voltage. When a thyristor as an example of a semiconductor element is turned off and a voltage is applied between the anode and the cathode, a leak current flows. The voltage applied to the thyristor when a certain leak current flows is called withstand voltage. In general, it is known that the breakdown voltage decreases as the period of use of a semiconductor element increases. When the withstand voltage is lowered, there is a risk that the operation of the electric circuit or electronic circuit in which the semiconductor element is incorporated becomes abnormal. For this reason, when a semiconductor element is used for a long period of time, a reliability test is performed in order to confirm that the change in breakdown voltage is within a predetermined allowable range.
[0003]
Conventional test methods for the breakdown voltage of high-power semiconductor devices include a DC voltage application test and an AC voltage application test. In the DC voltage application test, a constant DC voltage is applied to a large number of semiconductor elements for a long time to examine the distribution of the number of damaged semiconductor devices with respect to time. In the AC voltage application test, a constant AC voltage having a commercial frequency is applied to a large number of semiconductor elements to examine the distribution of the number of damaged semiconductor devices with respect to time. In any case, the voltage to be applied is equal to or lower than the rated voltage of the semiconductor element for high power, but is a voltage value that is stricter than normal use conditions, for example, 90% or 80% of the rated voltage. This accelerates and examines physical and chemical degradation of the semiconductor element, and confirms that the withstand voltage does not change significantly during the period of use. This also makes it possible to estimate the lifetime and failure rate of the semiconductor element in use.
[0004]
[Problems to be solved by the invention]
Usually, since a semiconductor element for high power is used at a commercial frequency, a voltage is applied alternately in both the forward and reverse directions. In the case of a conventional DC voltage application test, the application test must be performed in two steps, the forward direction and the reverse direction of the semiconductor element, and the test time becomes longer. In addition, in the case of a DC voltage application test, the stress due to the applied voltage is continuously applied in one direction of the semiconductor element in the forward direction or the reverse direction, so that the stress becomes too large and the breakdown due to another deterioration mode occurs. there were. On the other hand, since the conventional AC voltage application test is performed at the same commercial frequency as that under normal use conditions, the test can be performed under actual level stress without applying excessive stress to the semiconductor element. However, there is a problem that the deterioration test cannot be accelerated so much and a long test time is required.
[0005]
The present invention relates to an acceleration test method and a test apparatus for a breakdown voltage of a semiconductor element, and can perform an acceleration test in an appropriate stress range without applying excessive stress to the semiconductor element as in the conventional test. An object is to provide a test method and a test apparatus.
[0006]
[Means for Solving the Problems]
The semiconductor element acceleration test method of the present invention is a semiconductor element acceleration test method for opening and closing a current path between two electrodes, and an AC voltage applied between the two electrodes forming the current path of the semiconductor element when the semiconductor element is used. A critical off-voltage rise rate defined by the rate of rise of the applied voltage between the two electrodes that turns on the off-state semiconductor element is a value that is four times the rated voltage of the semiconductor element. A step of applying an alternating voltage between the two electrodes, the frequency being lower than the frequency represented by the value divided by the lower value than the rated voltage of the semiconductor element, and the alternating voltage being applied between the two electrodes. A leakage current flowing between the two electrodes of the semiconductor element is measured.
[0007]
A semiconductor element acceleration test apparatus according to the present invention is a semiconductor element acceleration test apparatus that opens and closes a current path between two electrodes, and an AC voltage applied between the two electrodes that form the current path of the semiconductor element when the semiconductor element is used. The critical off-voltage rise rate defined by the rate of rise of the applied voltage between the two electrodes that turns on the off-state semiconductor element is four times the rated voltage of the semiconductor element. An alternating current power source for applying an alternating voltage between the two electrodes, which is a frequency lower than the frequency represented by the value divided by the value and lower than the rated voltage of the semiconductor element, and the alternating voltage is applied between the two electrodes. Current measuring means for measuring a leakage current flowing between the two electrodes of the semiconductor element .
[0008]
According to the acceleration test method and the acceleration test apparatus of the present invention, a voltage having a frequency higher than the commercial frequency of the actual use frequency is applied between both electrodes of the semiconductor element, thereby applying forward and reverse voltage stress to the semiconductor element. . In a semiconductor element that is used at a high temperature and has a very high voltage applied, such as a power semiconductor element, the deterioration proceeds according to the number of times the voltage is applied to the semiconductor element. By applying a voltage having a frequency lower than the rated voltage and higher than the actual use frequency between both electrodes of the semiconductor element, the number of stresses applied to the semiconductor element within a predetermined time is increased, and the deterioration of the element is accelerated.
[0009]
DETAILED DESCRIPTION OF THE INVENTION
In the accelerated test method of the present invention, a voltage having a frequency higher than the commercial frequency is applied between both electrodes of the semiconductor element. The applied voltage is a predetermined voltage equal to or lower than the rated voltage, and a voltage having a frequency lower than the maximum frequency calculated from the rated voltage and the critical off-voltage rise rate and a frequency higher than 50 Hz or 60 Hz, which is the frequency at which the test target element is actually used. A test is performed by applying voltage, and a leakage current is measured to estimate a change in breakdown voltage.
A preferred embodiment of the present invention will be described below with reference to FIGS.
[0010]
<< First Example >>
A semiconductor device acceleration test apparatus according to a first embodiment of the present invention will be described below with reference to FIG. FIG. 1 is a block diagram of a semiconductor device acceleration test apparatus according to the present invention.
[0011]
The case where the optical thyristor element 1 having a rated voltage of 8000 V is used as the semiconductor element to be tested will be described. The converter 4 connected to the three-phase 200V commercial power supply 3 converts the three-phase alternating current into direct current. The two output terminals of the converter 4 are connected to the input terminal of the inverter 5 and convert it into an AC voltage having a predetermined frequency higher than the frequency of the commercial power supply. The output terminal of the inverter 5 is connected to the input terminal 2 </ b> A of the transformer 2, and the AC voltage is boosted by the transformer 2. The AC voltage boosted to a predetermined voltage by the transformer 2 is applied to the anode and cathode of the optical thyristor 1 connected to both output voltages 2B of the transformer. A voltage probe 8 is connected between the output terminals 2B to measure the output voltage. A connection line 16 between one of the output terminals 2B and the cathode is provided with CT7 for detecting current. A temperature sensor such as a thermocouple is attached to the electrode of the optical thyristor 1. The detection values of the temperature sensors 6, CT7 and voltage probe 8 are input to a recording device 9 such as an oscilloscope for measurement and recorded. The recording device 9 has a clock inside, and records changes in anode current (leakage current) over 10,000 to 20,000 hours. A heater 18 connected to the heating device 17 is attached to the optical thyristor 1. The heating device 17 keeps the optical thyristor 1 at a predetermined temperature based on the detection value of the temperature sensor 6. This temperature is, for example, 125 ° C.
[0012]
In order to prevent the optical thyristor 1 from being extremely deteriorated by the test, the maximum value of the alternating voltage applied is set to 6400 V which is 80% of the rated voltage.
[0013]
When the forward voltage between the anode and the cathode is increased at a predetermined voltage increase rate, for example, 2000 V / μs in the off state of the optical thyristor 1, the optical thyristor 1 is turned on. This rate of voltage increase is referred to as “critical off-voltage increase rate”. When the critical off voltage increase rate of the optical thyristor 1 is 2000 V / μs, the maximum frequency of the applied AC voltage at which the optical thyristor 1 does not turn on is obtained by the calculation of (2000 × 10 6 ) / (8000 × 4), and is 62500 Hz. It becomes. In the present embodiment, the test is accelerated by applying a voltage not higher than the rated voltage and a frequency higher than the operating frequency. The acceleration factor does not depend on the voltage, but on the frequency. Since the maximum frequency is 62500 Hz, acceleration of up to 1041 times is possible compared with the commercial frequency of 60 Hz. In the case of 50 Hz, acceleration of 1250 times is possible. In this example, the experiment was performed at 1200 Hz, which is a frequency lower than 62500 Hz, and compared with the case of 60 Hz. FIG. 2 shows a result of comparison between an element to which an AC voltage of 60 Hz and 6400 V was applied for 10,000 hours and an element to which an AC voltage of 1200 Hz and 6400 V was applied for 500 hours. The horizontal axis of FIG. 2 indicates time, and the vertical axis indicates the measurement result of leakage current. As shown in FIG. 2, the leakage current was almost the same.
[0014]
Generally, the breakdown voltage decreases when a semiconductor element is used for a long time. A semiconductor element having a reduced breakdown voltage flows a larger leak current at the same voltage than a normal element. Therefore, the change in breakdown voltage can be estimated by measuring the leakage current. In FIG. 2, since the leak current is the same when the alternating voltage of 60 Hz and 6400 V is applied for 10,000 hours and when the alternating voltage of 1200 Hz and 6400 V is applied for 500 hours, the decrease in breakdown voltage that occurred in 10,000 hours at 60 Hz is observed. It can be estimated that it occurred in 500 hours at 1200 Hz. From this experimental result, it was confirmed that the decrease in breakdown voltage can be accelerated by using an AC voltage having a high frequency. Time reduction due to acceleration is inversely proportional to frequency. Thus, it was confirmed that the change in breakdown voltage can be accelerated by increasing the frequency.
[0015]
<< Second Embodiment >>
The configuration of the test apparatus of the second embodiment of the present invention is substantially the same as that of the first embodiment shown in FIG. The difference is that the peak values of the voltages applied between the anode and cathode of the thyristor under test are different from each other.
Generally, a forward voltage applied to a high power semiconductor element used in an inverter device or the like is higher than a reverse voltage. This embodiment is suitable for a semiconductor device for such a use.
[0016]
FIG. 3 shows a waveform diagram of the applied voltage. As shown in FIG. 3, the peak value of the positive voltage of the anode voltage is higher than the peak value of the negative voltage. Such a waveform can be formed by controlling the pulse width of the inverter 5 shown in FIG. 1, and the reverse voltage of the applied voltage is made smaller than the forward voltage. As a result, the acceleration condition can be set so as to match the state in which the semiconductor device is actually used. In this embodiment, the test is accelerated by applying a voltage lower than the rated voltage and higher than the operating frequency. Since the acceleration rate does not depend on the voltage but depends on the frequency, in the case of an optical thyristor of 8000 V, the acceleration can be increased up to 1041 times (62500/60). In this embodiment, for example, when the applied voltage is the same, the leak current of the element applied for 10000 hours at 60 Hz and the element applied for 500 hours at 1200 Hz are the same, so the change in breakdown voltage increases the frequency. It was confirmed that it was accelerated and detected by measuring the leakage current.
[0017]
<< Third embodiment >>
Next, a test apparatus according to a third embodiment of the present invention will be described with reference to the block diagram of FIG. The case where the semiconductor device under test is a GTO thyristor (Gate turn off thyrister) with a rated voltage of 4500 V will be described. The output terminal of the inverter 5 is connected to the input terminal of the single-phase half-wave rectifier circuit 10. The output terminal of the single-phase half-wave rectifier circuit 10 is connected to the input terminal 2 </ b> A of the transformer 2. A GTO thyristor 11 is connected between both output terminals 2B of the transformer 2. Other configurations are the same as those in FIG. The converter 4 once converts the commercial frequency three-phase alternating current into direct current, and the inverter 5 converts the direct current into a high frequency voltage. Most current high breakdown voltage GTO thyristors are of the reverse conductivity type with extremely low reverse blocking breakdown voltage. Therefore, if a high reverse voltage is applied, the GTO thyristor 11 may be damaged. In this embodiment, the single-phase half-wave rectifier circuit 10 half-wave rectifies the high-frequency voltage to obtain a half-wave output voltage. The half-wave output voltage is boosted by the transformer 2 to generate a voltage whose maximum forward voltage is 80% of the rated voltage and whose reverse voltage is substantially zero, and is applied to the GTO thyristor 11.
[0018]
The maximum value of the applied voltage is 3600 V, which is 80% of the rated voltage. Since the critical rate of rise of off-state voltage of the GTO thyristor 11 is a 600V / .mu.s, the maximum frequency of the applied AC voltage is 33333Hz (600 × 10 6/4500 × 4). Therefore, an acceleration test of up to 556 times is possible compared with a commercial frequency of 60 Hz. In this example, the experiment was performed using 60 Hz and 1200 Hz AC voltage. The leakage current was the same between the element applied with a voltage of 60 Hz and 3600 V for 10,000 hours and the element applied with a voltage of 1200 Hz and 3600 V for 500 hours. The measurement results are shown in FIG. As a result, it was confirmed that the change in the breakdown voltage was accelerated by increasing the frequency, and the changed breakdown voltage could be known by measuring the leakage current.
[0019]
<< 4th Example >>
Next, a test apparatus according to a fourth embodiment of the present invention will be described with reference to the block diagram of FIG. In the test apparatus shown in FIG. 6, the thyristor 14 having a rated voltage of 2000 V is the measurement target. A converter 4 is connected to the three-phase commercial power source 3 to convert the three-phase alternating current into direct current. Two inverters 12 and 13 are connected in parallel to the output terminal of the converter 4 to convert a DC voltage into a high-frequency voltage. Since the inverter 12 and the inverter 13 are configured to have different conversion frequencies, an amplitude-modulated high-frequency voltage can be output to the input terminal 2 </ b> A of the transformer 2. As an application to be used under such a voltage condition, there is a semiconductor element used for a high-power radio broadcast apparatus or the like. For example, the high-frequency voltage output from the inverter 12 is an expression, a waveform represented by Acos (ωt + θ), and the high-frequency voltage output from the inverter 13 is an expression, a waveform represented by Acostt. When both are combined, the combined high-frequency voltage has a waveform represented by the expression A (1 + kcostt) cos (ωt + θ). The waveform diagram of the anode voltage shown in FIG. 7 shows a case where A = 1, k = 1, p = 1, ω = 10, and θ = π in each of the above equations.
[0020]
In FIG. 6, the maximum value of the voltage applied between the anode and the cathode of the thyristor 14 is 1600 V, which is 80% of the rated voltage. Since the critical rate of rise of off-state voltage of the thyristor 14 is a 300 V / .mu.s, the maximum frequency of the applied AC voltage is 37500Hz (300 × 10 6/2000 × 4). Therefore, an acceleration test of up to 625 times is possible compared with a commercial frequency of 60 Hz.
[0021]
According to this embodiment, even for a high-power semiconductor device to which a high amplitude modulation voltage is applied, which is used for high-power radio broadcasting, an acceleration test up to 625 times can be performed without causing extreme deterioration of the semiconductor device. it can. The leak current was the same between the element to which the voltage of carrier frequency 60 Hz and 1600 V was applied for 10,000 hours and the element to which the voltage of carrier frequency 12000 Hz and 1600 V was applied for 50 hours. The measurement results are shown in FIG. As a result, it was confirmed that the change in breakdown voltage was accelerated by increasing the frequency and detected by measuring the leakage current.
[0022]
As described above, in the test apparatus of this example, the frequency is lower than the maximum frequency calculated from the rated voltage of the semiconductor element and the critical off-voltage increase rate, and is higher than 50 Hz or 60 Hz, which is the frequency at which the test target element is actually used. By performing a test by applying a voltage of a frequency, the deterioration of the semiconductor element can be accelerated and the change in the breakdown voltage can be known in a short time. Based on this, it is possible to estimate the lifetime and failure rate of the semiconductor element in use.
[0023]
The embodiment of the present invention is not limited to the above embodiments, and various modifications can be made to the details. For example, the means for measuring and recording the current flowing through the semiconductor element is not limited to an oscilloscope or CT, but may be measured based on a voltage generated in the resistance by inserting a resistance in the circuit. Further, the commercial voltage is once converted into a DC voltage by the converter, and then the DC voltage is converted into a high-frequency voltage by the inverter. However, the voltage may be directly converted from a commercial power supply of 200 V to a high-frequency voltage by a cycloconverter.
Furthermore, the present invention is not limited to thyristors and GTO thyristors, but also includes various semiconductor elements such as diodes, transistors, IGBTs, SI transistors, SI thyristors, MOSFETs, hybrid ICs including a plurality of semiconductor elements, or a module in which a plurality of semiconductor elements are combined. It can also be applied.
[0024]
【The invention's effect】
As is clear from the above description of the embodiments, according to the present invention, the device under test is actually used at a frequency lower than the maximum frequency calculated from the rated voltage defined as the rating of the semiconductor device and the critical off-voltage rise rate. The test is performed by applying a voltage having a frequency higher than 50 Hz or 60 Hz. As a result, the deterioration factor of the semiconductor element can be accelerated without causing deterioration significantly different from the use condition, and the change of the breakdown voltage can be confirmed in a short time, and the lifetime and failure rate in the use state of the semiconductor element can be estimated. And the time required for the test can be reduced.
[Brief description of the drawings]
FIG. 1 is a block diagram of a semiconductor device test apparatus according to a first embodiment of the present invention. FIG. 2 is a graph showing a relationship between a leak current at 60 Hz and 1200 Hz and a test time in the first embodiment. 3] Waveform diagram of anode voltage in the second embodiment. [FIG. 4] Block diagram of a semiconductor device testing apparatus according to the third embodiment of the present invention. [FIG. 5] At 60 Hz and 1200 Hz in the third embodiment. FIG. 6 is a block diagram of a semiconductor device testing apparatus according to a fourth embodiment of the present invention. FIG. 7 is a waveform diagram of an anode voltage in the fourth embodiment. 8] A graph showing the relationship between the leakage current at 60 Hz and 12000 Hz and the test time in the fourth embodiment.
1 Optical Thyristor 2 Transformer 3 Commercial Power Supply 4 Converter 5 Inverter 6 Temperature Sensor 7 CT
8 Voltage probe 9 Oscilloscope 10 Recording device 11 GTO thyristor 12 Inverter 13 Inverter 14 Thyristor 16 Connection line 17 Heating device 18 Heater

Claims (11)

両極間の電流経路を開閉する半導体素子の加速試験方法であって、
前記半導体素子の使用時に前記半導体素子の電流経路を形成する両極間に印加する交流電圧の周波数より高い周波数であり、オフ状態の前記半導体素子をオンにする、前記両極間の印加電圧の上昇速度で定義される臨界オフ電圧上昇率を、前記半導体素子の定格電圧の4倍の値で除した値で表される周波数よりは低い周波数であって、前記半導体素子の定格電圧よりは低い値の交流電圧を前記両極間に印加するステップ、
及び
前記交流電圧が前記両極間に印加されているときに、前記半導体素子の前記両極間を流れるリーク電流を測定するステップ
を有する半導体素子の加速試験方法。
A method for accelerating a semiconductor element that opens and closes a current path between two electrodes,
The rising speed of the said when using the semiconductor device is a frequency higher than the frequency of the AC voltage applied between the electrodes to form the current path of the semiconductor device, to turn on the semiconductor device in the OFF state, the voltage applied between the two electrodes Is a frequency lower than the frequency represented by a value obtained by dividing the critical off voltage increase rate defined by the value by four times the rated voltage of the semiconductor element, and is lower than the rated voltage of the semiconductor element. Applying an alternating voltage between the electrodes;
as well as
A method for accelerating a semiconductor device, comprising: measuring a leakage current flowing between the electrodes of the semiconductor device when the AC voltage is applied between the electrodes .
前記半導体素子に対してあらかじめ求めておいたリーク電流と耐圧の関係から、上記測定されたリーク電流に対する耐圧を求めるステップを有する請求項1記載の半導体素子の加速試験方法。  The accelerated test method for a semiconductor device according to claim 1, further comprising a step of obtaining a withstand voltage with respect to the measured leak current from a relationship between a leak current and a withstand voltage obtained in advance for the semiconductor element. 前記半導体素子の両極間に印加する交流電圧の、順方向の電圧が、逆方向の電圧より高いことを特徴とする請求項1記載の半導体素子の加速試験方法。  2. The accelerated test method for a semiconductor device according to claim 1, wherein a forward voltage of an alternating voltage applied between both electrodes of the semiconductor device is higher than a reverse voltage. 前記半導体素子の両極間に印加する交流電圧の、逆方向の電圧が実質的に零であることを特徴とする請求項1記載の半導体素子の加速試験方法。  2. The accelerated test method for a semiconductor device according to claim 1, wherein the reverse voltage of the AC voltage applied between both electrodes of the semiconductor device is substantially zero. 前記半導体素子の両極間に印加する交流電圧は振幅変調されていることを特徴とする請求項1記載の半導体素子の加速試験方法。  2. The acceleration test method for a semiconductor device according to claim 1, wherein the alternating voltage applied between both electrodes of the semiconductor device is amplitude-modulated. 前記半導体素子は所定の温度に加熱されていることを特徴とする請求項1記載の半導体素子の加速試験方法。  The method of claim 1, wherein the semiconductor element is heated to a predetermined temperature. 両極間の電流経路を開閉する半導体素子の加速試験装置であって、
前記半導体素子の使用時に前記半導体素子の電流経路を形成する両極間に印加する交流電圧の周波数より高い周波数であり、オフ状態の前記半導体素子をオンにする、前記両極間の印加電圧の上昇速度で定義される臨界オフ電圧上昇率を、前記半導体素子の定格電圧の4倍の値で除した値で表される周波数よりは低い周波数であって、前記半導体素子の定格電圧より低い値の交流電圧を前記両極間に印加する交流電源、
及び
前記交流電圧が前記両極間に印加されているときに、前記半導体素子の前記両極間を流れるリーク電流を測定する電流測定手段
を有する半導体素子の加速試験装置。
A semiconductor device acceleration test apparatus that opens and closes a current path between two electrodes,
The rising speed of the said when using the semiconductor device is a frequency higher than the frequency of the AC voltage applied between the electrodes to form the current path of the semiconductor device, to turn on the semiconductor device in the OFF state, the voltage applied between the two electrodes An alternating current having a frequency lower than a frequency represented by a value obtained by dividing the critical off-voltage increase rate defined by (4) by a value four times the rated voltage of the semiconductor element and lower than the rated voltage of the semiconductor element. AC power supply for applying a voltage between the two electrodes,
as well as
An acceleration test apparatus for a semiconductor device, comprising current measuring means for measuring a leakage current flowing between the electrodes of the semiconductor element when the AC voltage is applied between the electrodes .
前記交流電源の半導体素子の両極間に印加する交流電圧は、順方向の電圧が、逆方向の電圧より高いことを特徴とする請求項記載の半導体素子の加速試験装置。8. The acceleration test apparatus for a semiconductor device according to claim 7 , wherein the AC voltage applied between both electrodes of the semiconductor device of the AC power source has a forward voltage higher than a reverse voltage. 前記交流電源の半導体素子の両極間に印加する交流電圧は、逆方向の電圧が実質的に零であることを特徴とする請求項記載の半導体素子の加速試験装置。8. The acceleration test apparatus for a semiconductor device according to claim 7 , wherein a reverse voltage of the AC voltage applied between both electrodes of the semiconductor device of the AC power supply is substantially zero. 前記交流電源の半導体素子の両極間に印加する交流電圧は、振幅変調されていることを特徴とする請求項記載の半導体素子の加速試験装置。8. The acceleration test apparatus for a semiconductor device according to claim 7 , wherein the AC voltage applied between both electrodes of the semiconductor device of the AC power supply is amplitude-modulated. 前記半導体素子を所定の温度に加熱する加熱手段を有することを特徴とする請求項記載の半導体素子の加速試験装置。8. The acceleration test apparatus for a semiconductor element according to claim 7, further comprising a heating unit that heats the semiconductor element to a predetermined temperature.
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CN114002564B (en) * 2021-10-29 2023-04-07 西安交通大学 Thyristor electric-heat combined aging experimental system for simulating long-term operation condition of converter valve

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