JP3824871B2 - Automatic gain control device and demodulator - Google Patents

Description

【００７０】
【数２】

【００７１】
第１回目の積分は、利得制御を行った後も、しばらくの間（＝ディジタルフィルタ６，７の処理時間）出力される利得制御前の受信レベルＥ_iを積分する。ただし、積分回数をＭＨ、積分結果をＳＨとする。第２回目の積分は、利得制御後の受信レベルＥ_iを積分する。ただし、積分回数をＭＲ、積分結果をＳＲとする。なお、上記積分処理のタイミングは、制御部２３によって管理される。
【００７２】
受信レベル平均値算出部２４では、（９）式によって利得制御後の受信レベルＥ_iの平均値ＡＥを算出する。
ＡＥ＝（ＳＲ＋ＳＨ×Ｇａ）／（ＭＨ＋ＭＲ） （９）
ただし、Ｇａは、利得制御による電圧の増幅率であり、利得制御前の電圧データをＶ_k-1、利得制御後の電圧データをＶ_kとすると、（１０）式で表すことができる。
Ｇａ＝Ｖ_k／ Ｖ_k-1 （１０）
【００７３】
ここで、上記（９）式による受信レベルＥ_iの平均値ＡＥの算出方法を図面にしたがって説明する。まず、Ｄフリップフロップ３３が、（７）式によって求めた利得制御前の受信レベルＥ_iの積分値ＳＨをラッチする。つぎに、乗算器３４が、制御部２３からのラッチ信号によってラッチされた積分値ＳＨに、Ｇａを乗算する。この乗算により、利得制御前の受信レベルＥ_iの積分値ＳＨから、利得制御後の受信レベルＥ_iの積分値ＳＨ´を得ることができる。つぎに、加算器３５が、（８）式によって求めた利得制御後の受信レベルＥ_iの積分値ＳＲと、乗算器３４の出力ＳＨ´と、を加算する。最後に、除算器３６が、加算器３５の出力を（ＭＨ＋ＭＲ）で除算し、受信レベルＥ_iの平均値ＡＥを出力する。なお、（ＭＨ＋ＭＲ）の値を２のべき乗とすれば、除算はビットシフトで実現でき、除算の回路化が容易となる。
【００７４】
受信レベル比算出部２５では、除算器３７が、基準レベル値と受信レベルＥ_iの平均値ＡＥとの比を求め、ｄＢ変換部３８が、その比をｄＢ表記に変換して出力する。なお、受信レベル比算出部２５では、除算処理およびｄＢ変換処理にて複雑な演算を行うため、回路規模が増大するが、通常、基準レベル値は固定値であるため、入力である平均値ＡＥが判れば、出力であるレベル比を決定できる。したがって、受信レベル比算出部２５は、ＲＯＭを用いることにより小さな回路規模で実現できる。
【００７５】
利得制御電圧データ生成部２６では、受信レベル比算出部２５で求めたレベル比ＬＲ_kを、加算器３９およびＤフリップフロップ４０を用いて積分し、その積分結果を真数表記に変換して出力する。この出力データが、利得可変アンプ２を制御する電圧データＶ_kである。ただし、ｋは自動利得制御装置８が行う利得制御の回数に応じて増加する整数値である（ｋ＝１，２，３，・・・）。
【００７６】
また、リミタ４１では、電圧データＶ_kをＤ／Ａ変換器９の入力レンジ内に保持するために設けられており、Ｄフリップフロップ４０の出力値ＤＶによって、以下の３通りの値を出力する。
▲１▼ＤＶが、しきい値±Ｔｄ以内の場合（−Ｔｄ≦ＤＶ≦Ｔｄ）；ＤＶを出力
▲２▼ＤＶが、しきい値−Ｔｄより小さい値を示す場合（ＤＶ＜−Ｔｄ）；−Ｔｄを出力
▲３▼ＤＶが、しきい値Ｔｄより大きい値を示す場合（ＤＶ＞Ｔｄ）；Ｔｄを出力
【００７７】
また、真数変換部４２では、リミタ４１の出力を真数に変換し、変換後のデータを電圧データＶ_kとして出力する。なお、真数変換部４２についても、ＲＯＭを用いることで複雑な真数変換演算が不要となり、回路規模を削減することができる。
【００７８】
利得制御電圧増幅率算出部２７では、利得制御による電圧の増幅率Ｇａを求める。増幅率Ｇａは（１０）式による除算で求まるが、除算処理には大規模な回路が必要となるため、ｄＢ値であるリミタ４１の出力を差分して、（１）式と同様の処理を実現する。すなわち、Ｄフリップフロップ４３が、１つ前の電圧データのｄＢ値ｌｏｇ₁₀（Ｖ_k-1）（＝リミタ４１の出力）をラッチし、加算器４４が、現在の電圧データのｄＢ値ｌｏｇ₁₀（Ｖ_k）から、１つ前の電圧データのｄＢ値ｌｏｇ₁₀（Ｖ_k-1）を減算する。ｄＢ値の減算は、真数の除算を意味するが、ここでは、（１０）式で行われる除算の役割を加算器４４が担う。そして、真数変換部４５が、加算器４４の出力を真数に変換し、変換後の信号を利得制御による電圧の増幅率Ｇａとして出力する。なお、真数変換部４５は、たとえば、ＲＯＭを用いて実現される。
【００７９】
最後に、Ｄ／Ａ変換器９では、従来と同様に、電圧データＶ_kをアナログ信号に変換して、利得可変アンプ２に与える。
【００８０】
以上、ここまでは、通常時（ｋ≧２）の自動利得制御装置８の動作について説明を行った。以降では、初期時（ｋ＝１）における自動利得制御装置８の動作について説明する。図４は、自動利得制御装置８のｋ＝１，２，…までの動作を示すタイミングチャートである。すなわち、自動利得制御装置８を含む上記復調器が、時刻ｔ＝０から受信動作を開始した場合を示している。
【００８１】
時刻ｔ＝０において、ディジタルフィルタ６，７の各レジスタは、“０”であるため、ディジタルフィルタ６，７から出力されるデータ系列Ｉｄ_i，Ｑｄ_iは、しばらくの間（＝ディジタルフィルタの処理時間）、“０”に近い値を出力する。よって、受信レベルＥ_iは、この間、実際の受信レベルではない“０”に近い値を示す（図中の時間▲１▼に相当）。
【００８２】
受信レベル積分部２２では、この間の無意味な受信レベルＥ_iを、式（７）にしたがってＭＨ回にわたって積分し、積分結果ＳＨ₁を出力するが、ｋ＝１の時だけ増幅率Ｇａ₀を“０”とすることで、受信レベル平均値算出部２４における受信レベルの算出に、増幅率Ｇａ₀を用いないようにする。
【００８３】
受信レベルＥ_iは、動作開始後しばらくして有意な値になる（図中の時間▲２▼に相当）。そこで、受信レベル積分部２２では、この間の有意な受信レベルＥ_iを式（８）にしたがって、ＭＲ回にわたって積分し、積分結果ＳＲ₁を出力する。したがって、ｋ＝１回目における受信レベル平均値ＡＥ₁は、ＭＲ回にわたって積分した結果ＳＲ₁だけを用いて求める必要があるため、式（９）ではなく、次式（１１）を用いて求める。ここで、Ｇａ₀は“０”であるため、実際は、ＳＲ₁をＭＲで除算してＡＥ₁を求めている。なお、ＭＲも２のべき数であれば、複雑な演算処理で行う除算をビットシフトで実現できる。
ＡＥ₁＝（ＳＲ₁₊ＳＨ₁×Ｇａ₀）／ＭＲ （１１）
【００８４】
自動利得制御装置８では、上記のように算出されたＡＥ₁に基づいて、受信レベルＥ_iを基準レベルとするｋ＝１回目の電圧データＶ₁と増幅率Ｇａ₁を算出する。なお、Ｋ＝１の初期動作時の場合、Ｄフリップフロップ４３は“０”であるため、Ｖ₁＝Ｇａ₁となる。
【００８５】
その後、第１回目の利得制御が行われた後（ｋ≧２）、自動利得制御装置８では、前述したｋ≧２以降の処理を行う。すなわち、第１回目の利得制御が行われた後もしばらくの間、第１回の利得制御前のデータがディジタルフィルタ６，７に残っているため、受信レベルＥ_iは、この間（図中の時間▲３▼に相当）、第１回の利得制御前の値となる。このとき、受信レベル積分部２２では、この間の受信レベルＥ_iをＭＨ回にわたって積分し、受信レベル平均値算出部２４では、この積分結果ＳＨ₂に増幅率Ｇａ₁を乗算することで、利得制御した積分結果ＳＨ₂´を求める。
【００８６】
つぎに、受信レベルＥ_iは、第１回の利得制御による変化が生じる（図中の時間▲４▼）。このとき、受信レベル積分部２２では、この間の有意な受信レベルＥ_iをＭＲ回にわたって積分し、積分結果ＳＲ₂を出力する。したがって、Ｋ＝１回目と異なり、積分結果ＳＨ₂´も有意な情報であるため、ｋ＝２回目における受信レベル平均値ＡＥ₂は、ＭＨ回にわたって積分した結果ＳＨ₂´と、ＭＲ回にわたって積分した結果ＳＲ₂の両方を用いて、すなわち、式（９）を用いて、求めることができる。
【００８７】
自動利得制御装置８では、上記のように算出されたＡＥ₂に基づいて、受信レベルＥ_iを基準レベルとするｋ＝２回目の電圧データＶ₂と増幅率Ｇａ₂を算出する。なお、ｋ≧３では、上記ｋ＝２の場合と同様に、（ＭＨ＋ＭＲ）個の受信レベルＥ_iを用いた利得制御が繰り返し実行される。
【００８８】
式（９）と式（１１）を比較しても明らかなように、Ｋ−１の方が平均化に使用するＥ_iのデータ数がＭＨ個だけ少ないため、利得制御の正確さは、Ｋ＝２より多少劣り、たとえば、図４に示すように、受信レベルＥ_iは、時間▲４▼〜▲５▼にかけて基準レベルより若干異なった値を示す場合がある。しかしながら、ｋ≧２では正確な利得制御が行われ、図９に示すように、時間▲６▼では、受信レベルＥ_iは基準レベルにほぼ一致する。なお、多少の性能の劣化を許容できるのであれば、積分結果ＳＲ_kだけを用いて、回路規模を削減することとしてもよい。この場合は、ｋの値に関係無く、受信レベル平均値AE_kは、次式（１２）で求められる。
ＡＥ_k＝ＳＲ_k／ＭＲ （１２）
【００８９】
この場合、図１における利得制御電圧増幅率算出部２７、受信レベル平均値算出部２４内のＤフリップフロップ３３、乗算器３４、および加算器３５を削除することができる。
【００９０】
このように、本実施の形態の自動利得制御装置においては、受信レベルＥ_iを平均化し、その結果に基づいて、受信レベルを基準値とする直接的な利得制御を行い、制御回数が１回ないし２回で引込み動作を完了する構成とした。これにより、引込み時間の大幅な短縮を実現することができる。
【００９１】
また、本実施の形態の自動利得制御装置において、第２回目以降の利得制御については、ディジタルフィルタの信号処理にかかる時間が経過するまでに出力される利得制御前の受信レベルＥ_iと、利得制御後の受信レベルＥ_iと、の両方を用いて受信レベルの平均値を算出し、その結果に基づいて、受信レベルを基準値とする利得制御を行う。これにより、従来例における利得制御と比較して、引込み後の高精度な利得制御を実現することができる。
【００９２】
また、本実施の形態の自動利得制御装置においては、ディジタルフィルタにおける信号増幅制御（式（６）参照）により、常に受信レベルＥ_iの有効ビット数を多く確保することができるため、伝送レートに関係無く、正確な利得制御を実現することができる。
【００９３】
また、本実施の形態の復調器においては、自動利得制御装置８による高速かつ高精度な利得制御により、バースト信号が入力されてから短時間で良好なビット誤り率特性を実現することができる。
【００９４】
また、本実施の形態の復調器においては、ディジタルフィルタにおける信号増幅制御（式（６）参照）により、常にディジタルフィルタ出力のデータの有効ビット数を多く確保することができるため、伝送レートに関係無く、正確な軟判定を実現することができる。また、同様の信号増幅制御により、基準レベル値を伝送レートに関係無く、一定に保つことができるため、無調整化を達成できる。
【００９５】
なお、本実施の形態では、デシメーションフィルタ５１でオーバーサンプル数ｏｖｓの範囲を、２≦ｏｖｓ＜４とする場合を一例として説明したが、ロールオフ率が３５％程度と低く、さらに自波の占める周波数占有帯域幅が狭い場合については、デシメーションフィルタ５１でオーバーサンプル数ｏｖｓの範囲を、１．５≦ｏｖｓ＜３としてもよい。
【００９６】
この場合、ｍは以下のようにして求める。まず、ｍ´を次式（１３）にしたがって求める。
ｍ´＝ｉｎｔ［ｌｏｇ₂（ｆ_samp／（Ｒｓ））］ （１３）
つぎに、ＭＱを次式（１４）にしたがって求める。
ＭＱ＝（ｆ_samp／（Ｒｓ＊２^m´）） （１４）
最後に、ｍを次式（１５）にしたがって求める。
ｍ＝ｍ´ （ＭＱ≧１．５）
ｍ＝ｍ´−１ （ＭＱ＜１．５） （１５）
【００９７】
なお、ｏｖｓは、上記式（１３）〜（１５）で求めたｍを式（３）に代入して求める。この場合も、前記式（４）は成立するため、ディジタルフィルタ６，７において、式（６）を用いて増幅量Ｇｒを算出する。このように、デシメーションフィルタ５１で、オーバーサンプル数ｏｖｓの範囲を、（２≦ｏｖｓ＜４）→（１．５≦ｏｖｓ＜３）とすることにより、後段の波形整形フィルタ５２のシフトレジスタの段数を軽減することができるため、ディジタルフィルタの回路規模を低減することができる。
【００９８】
実施の形態２．
図５は、本発明にかかる自動利得制御装置および復調器の実施の形態２の構成を示す図である。なお、前述の実施の形態１と同様の構成については、同一の符号を付してその説明を省略する。図５において、８ａは自動利得制御装置であり、２３ａは制御部であり、６１はオーバーフロー検出部であり、６２は選択部である。
【００９９】
前述したように、実施の形態１では、自波以外に隣接波も受信し、ディジタルフィルタにおいて当該隣接波を除去している。このような処理は、アナログフィルタの特性を固定（無調整）にしながら、伝送レート（すなわち、自波の帯域幅）を自由に変えられるような要望からきている。
【０１００】
たとえば、Ａ／Ｄ変換器の前に位置するアナログフィルタの周波数特性は、伝送レートが最も高い場合（即ち自波の帯域が最も広い場合）に対応して広帯域とする必要があるため、伝送レートが低いような場合、すなわち、自波の帯域が狭い場合、Ａ／Ｄ変換器は、自波と別の周波数で使用している隣接波とを同時に受信することになる。
【０１０１】
図６は、Ａ／Ｄ変換器入力の受信信号の周波数スペクトラムを示す図である。なお、図６（ａ）が時刻ｔ₁の周波数スペクトラムを表し、（ｂ）が時刻ｔ₂の周波数スペクトラムを表し、（ｃ）が時刻ｔ₃の周波数スペクトラムを表す。また、ここでは、実線が自波、点線が隣接波をそれぞれ表す。
【０１０２】
図示のとおり、他のユーザーが使用している隣接波の出現および消失は不規則であるため（たとえばｔ₁→ｔ₂→ｔ₃のように）、Ａ／Ｄ変換器入力の受信レベルも時間とともに変動し、その変動は急激になる場合も予想される。たとえば、時刻ｔ₁のように、隣接波が１波しか存在していないと、Ａ／Ｄ変換器入力の受信レベルは低いが、時刻ｔ₂のように、隣接波が６波存在すると、Ａ／Ｄ変換器入力の受信レベルは非常に高くなる。このとき、Ａ／Ｄ変換器における入力レベルの急激な変動は予期できず、他のユーザーが同時に通信を始めた場合、Ａ／Ｄ変換器の入力レベルは急激に増加する。
【０１０３】
そして、復調器が非常にレベルが低い無信号を受信している状態で、たとえば、自波と隣接波のタイミングが一致し、急激なＡ／Ｄ変換器における入力レベルの増加が生じると、入力信号は最大入力レンジを越え（オーバーフローが発生し）、Ａ／Ｄ変換器の出力は不確かなものとなる。
【０１０４】
このような場合には、自動利得制御装置の引込み特性や復調器のビット誤り率特性が劣化してしまう場合が考えられる。本実施の形態においては、このような問題を解決する。
【０１０５】
以下、上記問題を解決する実施の形態２の自動利得制御装置８ａの動作について説明する。まず、自動利得制御装置８ａでは、ディジタルフィルタ６，７の出力以外に、さらに、Ａ／Ｄ変換器４，５の出力データＩＡ_i，ＱＡ_iを用いる。そして、オーバーフロー検出部６１では、各Ａ／Ｄ変換器の出力データＩＡ_i，ＱＡ_iから、そのときの受信電力ＷＡ_iを、次式（１６）で求める。
ＷＡ_i＝ＩＡ_i ²＋ＱＡ_i ² （１６）
【０１０６】
つぎに、オーバーフロー検出部６１では、受信電力ＷＡ_iをある特定の値Ｗｔｈと比較し、次式（１７）を満たす場合に、各Ａ／Ｄ変換器がオーバーフローを起こしていると判定し、オーバーフロー検出信号を出力する。
ＷＡ_i≧Ｗｔｈ （１７）
【０１０７】
そして、オーバーフロー検出部６１でオーバーフローを起こしていると判定された場合には、以下の動作が行われる。まず、選択部６２では、受信レベル比算出部２５の情報を無視し、制御ステップ幅［ｄＢ］に相当するＸＤ（＜０）を利得制御電圧データ生成部２６に対して出力する。ＸＤは、たとえば、−６［ｄＢ］など、利得制御ステップ幅が大きくなるように設定する。つぎに、制御部２３ａでは、受信レベル積分部２２内のＤフリップフロップ３２（レジスタ）、受信レベル平均値算出部２４内のＤフリップフロップ３３（レジスタ）、およびその時のＧａ_kの値を“０”にリセットして、オーバーフロー発生時の確からしくない状態をリセット状態に戻す。
【０１０８】
一方、オーバーフロー検出部６１でオーバーフローを起こしていないと判定された場合には、実施の形態１の自動利得制御装置８と同様の動作が行われる。具体的にいうと、選択部６２では、受信レベル比算出部２５の情報を利得制御電圧データ生成部２６に対して出力する。そして、制御部２３ａでは、前述の実施の形態１の制御部２３と同様の処理を行う。
【０１０９】
このように、本実施の形態においては、バースト捕捉時に隣接波の出現によってＡ／Ｄ変換器がオーバーフローを起こし、ディジタルフィルタ６，７から確からしくないデータが出力された場合においても、利得をＸＤ［ｄＢ］単位に下げることで、即座にオーバーフローの状態を回避する構成とした。これにより、引込み特性を劣化させることはなく、利得制御の高速引込みを実現する。
【０１１０】
また、本実施の形態においては、隣接波の出現および消失が繰り返されるバースト捕捉時においても、高速な利得制御によって、良好なビット誤り率特性を実現することができる。
【０１１１】
実施の形態３．
図７は、本発明にかかる自動利得制御装置および復調器の実施の形態３の構成を示す図である。なお、先に説明した実施の形態１と同様の構成については、同一の符号を付してその説明を省略する。図７において、８ｂは自動利得制御装置であり、自動利得制御装置８ｂにおいて、７１はレベル比検出部であり、２２ｂは受信レベル比積分部であり、２４ｂは受信レベル比平均値算出部であり、２７ｂは利得制御電圧増幅率算出部である。また、受信レベル比積分部２２ｂにおいて、７２は加算器であり、７３はＤフリップフロップであり、受信レベル比平均値算出部２４ｂにおいて、７４、７６、７８は除算器であり、７５、７７は加算器である。
【０１１２】
以下、上記実施の形態３の自動利得制御装置８ｂの動作について説明する。自動利得制御装置８ｂでは、先に説明した実施の形態１の自動利得制御装置８と同程度の性能を実現しつつ、さらに回路規模を低減する。具体的にいうと、実施の形態３の自動利得制御装置８ｂでは、受信レベルを平均化後に基準レベル値と比較するのではなく、先に受信レベルと基準レベル値との比をｄＢ値で検出し、その検出値を平均化する。この処理により、自動利得制御装置８ｂでは、自動利得制御装置８における受信レベル比算出部２５（ｄＢ変換部３８を有する）、真数変換部４５および乗算器３４が不要となる。
【０１１３】
まず、レベル比検出部７１では、式（１）にしたがってデータ系列Ｉｄ_i，Ｑｄ_iから受信レベルＥ_iを算出し、当該算出結果と基準レベル値との比ＣＥ_iを求める。そして、その比をｄＢ表記で出力する。なお、レベル比検出部７１は、データ系列Ｉｄ_i，Ｑｄ_iを入力アドレスとし、ＣＥ_iを出力とするＲＯＭで構成できるため、小さな回路規模で実現できる。
【０１１４】
受信レベル比積分部２２ｂでは、ＣＥ_iを加算器７２，Ｄフリップフロップ７３を用いて積分する。積分は、先に説明した実施の形態１の自動利得制御装置８と同様、ある周期Ｌで２回にわたって行われる。この場合、第１回目の積分は、（７）式中の“Ｅ_j”を“ＣＥ_j”とする変更で実現できる。また、第２回目の積分についても、（８）式中の“Ｅ_j”を“ＣＥ_j”とする変更で実現できる。
【０１１５】
受信レベル比平均値算出部２４ｂでは、上記各レベル比の積分値から、レベル比の平均値を算出する。まず、除算器７４では、第１回目の積分値をその積分回数ＭＨで除算し、その結果を利得制御前レベル比平均値として出力する。加算器７５では、後述する利得制御電圧増幅率算出部２７ｂからの値（ｄＢ表記）と利得制御前レベル比平均値とを加算し、その結果を第１のレベル比平均値として出力する。除算器７６では、第２回目の積分値をその積分回数ＭＲで除算して利得制御前のレベル比を求め、その結果を第２のレベル比平均値として出力する。加算器７７では、第１のレベル比平均値と第２のレベル比平均値とを加算する。最後に、除算器７８では、加算器７７の加算結果を“２”で除算してレベル比の平均値を出力する。
【０１１６】
利得制御電圧データ生成部２６は、除算器７３出力であるレベル比の平均値を入力として、先に説明した実施の形態１の自動利得制御装置８と同様に動作する。
【０１１７】
利得制御電圧増幅率算出部２７ｂでは、先に説明した実施の形態１の利得制御電圧増幅率算出部２７と同様に、Ｄフリップフロップ４３と加算器４４を用いて、リミタ４１の出力を差分する。ただし、前記実施の形態１の自動利得制御装置８ｂでは、この差分値を真数変換部４５で真数に変換し、真数変換後の値とＤフリップフロップ３３の出力値とを乗算していたが、受信レベル比平均値算出部２４ｂのデータ処理がｄＢ値で行われる本実施の形態の自動利得制御装置８ｂでは、同様の処理を、リミタ４１の出力の差分値と除算器７４の出力値とを加算することで実現できる。
【０１１８】
なお、実施の形態１の自動利得制御装置８にて受信レベルの平均値と基準レベルとの比をｄＢ変換した値と、本実施の形態３の自動利得制御装置８ｂにてｄＢ変換した受信レベル比の平均値は、多少の差が生じるが、その差に起因する両者の性能の差は僅かである。
【０１１９】
以上、ここまでの説明は、通常時（図４中のｋ≧２）の自動利得制御装置８ｂの動作について説明を行った。以降では、初期時（図４中のｋ＝１）における自動利得制御装置８ｂの動作について説明する。
【０１２０】
自動利得制御装置８ｂでは、加算器７５の出力を初期動作時のみ“０”（無効）とし、除算器７８で行われる“２”の除算を行わないように制御する。この場合、受信レベル比平均値算出部２４ｂの出力値は、第２のレベル比平均値と等しくなる。
【０１２１】
なお、多少の性能劣化を許容できるのであれば、常に初期時の状態で自動利得制御装置８ｂを動作させ、“第２のレベル比平均値”だけを用いて利得制御を行うことで、回路規模を削減してもよい。また、自動利得制御装置８ｂの受信レベル比平均値算出部２４ｂと利得制御電圧データ生成部２６との間に、前述の実施の形態２の自動利得制御装置８ａにおける選択部６２を挿入し、制御部２３を制御部２３ａに変更し、さらにオーバーフロー検出部６１を図５と同じ配線で挿入する構成に拡張することで、利得制御のさらなる高速引込みを実現することとしてもよい。
【０１２２】
このように、本実施例の形態における自動利得制御装置においては、受信レベルと基準レベル値との比をｄＢ値で検出し、その検出値を平均化する構成としたため、先に説明した実施の形態１と比較して、同程度の性能を実現しつつ、回路規模をさらに削減できる。
【０１２３】
【発明の効果】
以上、説明したとおり、本発明によれば、受信レベルを平均化し、その結果に基づいて、受信レベルを基準値とする直接的な利得制御を行い、制御回数が１回ないし２回で引込み動作を完了する構成とした。これにより、引込み時間の大幅な短縮を実現することができる、という効果を奏する。また、第２回目以降の利得制御については、ディジタルフィルタの信号処理にかかる時間が経過するまでに出力される利得制御前の受信レベルと、利得制御後の受信レベルと、の両方を用いて受信レベルの平均値を算出し、その結果に基づいて、受信レベルを基準値とする利得制御を行う。これにより、従来例における利得制御と比較して、引込み後の高精度な利得制御を実現することができる、という効果を奏する。
【０１２４】
つぎの発明によれば、バースト捕捉時に隣接波の出現によってＡ／Ｄ変換器がオーバーフローを起こし、ディジタルフィルタから確からしくないデータが出力された場合においても、利得を特定値単位に下げることで、即座にオーバーフローの状態を回避する構成とした。これにより、引込み特性を劣化させることはなく、利得制御の高速引込みを実現することができる、という効果を奏する。
【０１２５】
つぎの発明によれば、積分回数ＭＲと積分回数ＭＨの合計を２のべき乗の値とすることにより、受信レベル平均値算出手段における除算をビットシフトで実現できるため、除算の回路化が容易になる、という効果を奏する。
【０１２６】
つぎの発明によれば、受信レベル積分手段がレベル検出手段で検出した受信レベルをＭＲ回にわたって積分し、さらに、受信レベル平均値算出手段がその積分結果を全積分回数ＭＲで除算することで、受信レベルの平均値を算出する構成とした。これにより、初期時の処理量を通常時と比較して大幅に削減することができる、という効果を奏する。
【０１２７】
つぎの発明によれば、積分回数ＭＲを２のべき乗の値とすることにより、ここでも、受信レベル平均値算出手段における除算をビットシフトで実現できる、という効果を奏する。
【０１２８】
つぎの発明によれば、受信レベル比算出手段をＲＯＭで構成することにより、除算処理およびｄＢ変換処理にて複雑な演算を行う必要がなくなるため、回路規模の増大を回避できる、という効果を奏する。
【０１２９】
つぎの発明によれば、電圧増幅率算出手段および電圧データ生成手段をＲＯＭで構成することにより、複雑な真数変換演算を行う必要がなくなるため、回路規模の増大を回避できる、という効果を奏する。
【０１３０】
つぎの発明によれば、受信レベルと基準レベル値との比をｄＢ値で検出し、その検出値を平均化する構成としたため、同程度の性能を維持しながら回路規模をさらに削減できる、という効果を奏する。
【０１３１】
つぎの発明によれば、高速かつ高精度な自動利得制御により、バースト信号が入力されてから短時間で良好なビット誤り率特性を実現することができる、という効果を奏する。
【０１３２】
つぎの発明によれば、隣接波の出現および消失が繰り返されるバースト捕捉時においても、高速な利得制御によって、良好なビット誤り率特性を実現することができる、という効果を奏する。
【０１３３】
つぎの発明によれば、積分回数ＭＲと積分回数ＭＨの合計を２のべき乗の値とすることにより、受信レベル平均値算出手段における除算をビットシフトで実現できるため、除算の回路化が容易になる、という効果を奏する。
【０１３４】
つぎの発明によれば、受信レベル積分手段がレベル検出手段で検出した受信レベルをＭＲ回にわたって積分し、さらに、受信レベル平均値算出手段がその積分結果を全積分回数ＭＲで除算することで、受信レベルの平均値を算出する構成とした。これにより、初期時の処理量を通常時と比較して大幅に削減することができる、という効果を奏する。
【０１３５】
つぎの発明によれば、積分回数ＭＲを２のべき乗の値とすることにより、ここでも、受信レベル平均値算出手段における除算をビットシフトで実現できる、という効果を奏する。
【０１３６】
つぎの発明によれば、受信レベル比算出手段をＲＯＭで構成することにより、除算処理およびｄＢ変換処理にて複雑な演算を行う必要がなくなるため、回路規模の増大を回避できる、という効果を奏する。
【０１３７】
つぎの発明によれば、電圧増幅率算出手段および電圧データ生成手段をＲＯＭで構成することにより、複雑な真数変換演算を行う必要がなくなるため、回路規模の増大を回避できる、という効果を奏する。
【０１３８】
つぎの発明によれば、内部の自動利得制御装置が、受信レベルと基準レベル値との比をｄＢ値で検出し、その検出値を平均化する構成としたため、同程度の性能を維持しながら回路規模をさらに削減できる、という効果を奏する。
【０１３９】
つぎの発明によれば、ディジタルフィルタにおける信号増幅制御により、常にディジタルフィルタ出力のデータの有効ビット数を多く確保することができるため、伝送レートに関係無く、正確な軟判定を実現することができる、という効果を奏する。また、同様の信号増幅制御により、基準レベル値を伝送レートに関係無く、一定に保つことができるため、無調整化を達成できる、という効果を奏する。
【０１４０】
つぎの発明によれば、データ判定に軟判定処理を採用することにより、最適なデータ復調を実現することができる、という効果を奏する。
【図面の簡単な説明】
【図１】 本発明にかかる自動利得制御装置および復調器の実施の形態１の構成を示す図である。
【図２】 実施の形態１のディジタルフィルタの構成を示す図である。
【図３】 実施の形態１の波形整形フィルタの構成を示す図である。
【図４】 実施の形態１の自動利得制御装置の動作を示すタイミングチャートである。
【図５】 本発明にかかる自動利得制御装置および復調器の実施の形態２の構成を示す図である。
【図６】 Ａ／Ｄ変換器入力の受信信号の周波数スペクトラムを示す図である。
【図７】 本発明にかかる自動利得制御装置および復調器の実施の形態３の構成を示す図である。
【図８】 従来の自動利得制御装置を備えたディジタル衛星通信システム用復調器の構成を示す図である。
【図９】 従来のディジタルフィルタの構成を示す図である。
【図１０】 従来の自動利得制御装置の動作を説明するための図である。
【図１１】 図９とは異なる従来のディジタルフィルタの構成を示す図である。
【符号の説明】
１ アンテナ、２ 利得可変アンプ、３ 周波数変換部、４，５ Ａ／Ｄ変換器（Ａ／Ｄ）、６，７ ディジタルフィルタ、８，８ａ，８ｂ 自動利得制御装置、９ Ｄ／Ａ変換器（Ｄ／Ａ）、１０ 検波部、２１ レベル検出部、２２ 受信レベル積分部、２２ｂ 受信レベル比積分部、２３，２３ａ 制御部、２４受信レベル平均値算出部、２４ｂ 受信レベル比平均値算出部、２５ 受信レベル比算出部、２６ 利得制御電圧データ生成部、２７，２７ｂ 利得制御電圧増幅率算出部、３１，３５，３９，４４，７２，７５，７７ 加算器、３２，３３，４０，４３，７３ Ｄフリップフロップ、３４ 乗算器、３６，３７，７４，７６，７８ 除算器、３８ ｄＢ変換器、４１ リミタ、４２，４５ 真数変換部、５１ デシメーションフィルタ、５２ 波形整形フィルタ、５３ａ，５３ｂ，５３ｃ，５３ｄ ３ｄＢ増幅部、５４ 減衰部、６１ オーバーフロー検出部、６２ 選択部、７１ レベル比検出部。[0001]
BACKGROUND OF THE INVENTION
The present invention relates to an automatic gain control (AGC) apparatus and demodulator applicable to a variable rate digital satellite communication system.
[0002]
[Prior art]
A conventional automatic gain control device and demodulator will be described below. As a demodulator equipped with a conventional automatic gain control device, for example, it is described in the document “AGC circuit for burst modem” (Electronic Information and Communication Society 1989 Autumn Conference B-122, authors: Aoki, Uchijima, Tozawa, Yuda) There is a demodulator for digital satellite communication systems (PLL system using output information of a digital filter).
[0003]
FIG. 8 is a diagram showing a configuration of a demodulator for a digital satellite communication system (simply called a demodulator) provided with a conventional automatic gain control device. In FIG. 8, 101 is an antenna, 102 is a variable gain amplifier, 103 is a frequency converter, 104 and 105 are A / D converters (A / D), 106 and 107 are digital filters, 108 is an automatic gain control device, 109 is a D / A converter (D / A), and 110 is a detector. In the automatic gain control device 108, 121 is a level detection unit, 122 is a subtraction unit, 123 is a loop filter, and 124 is a coefficient setting unit. In the loop filter 123, 131 is a multiplier, 132 is an adder, and 133 is a D flip-flop.
[0004]
FIG. 9 is a diagram showing the configuration of the digital filters 106 and 107. In the conventional example, the digital filter is constituted by a transversal filter. In FIG. 9, 141a, 141b, 141c, 141d, 141e, 141f, 141g, 141h, 141i, 141j, 141k are D flip-flops, 142a, 142b, 142c, 142d, 142e are adders, and 143a, 143b , 143c, 143d, 143e, and 143f are multipliers, and 144 is an adder.
[0005]
The operation of the demodulator having the conventional automatic gain control device will be described below. First, the antenna 101 receives a burst signal subjected to PSK modulation. The variable gain amplifier 102 controls the gain of the received signal based on the control voltage output from the automatic gain control device 108 after D / A conversion.
[0006]
In the frequency converter 103, the frequency f_RFrequency f output from detector 110 for the received signal in the band_RMultiply '' local signal. And two frequency components f generated by multiplication_R+ F_R', F_R-F_R'To the harmonic component f_R+ F_R'Is removed, and the received signal is frequency-converted to a baseband signal (baseband signal).
[0007]
In the A / D converter 104, the in-phase component of the baseband signal is oversampled using the sampling clock from the detection unit 110, and the baseband in-phase data series I which is digital data is obtained._i(I = 1, 2, 3,...) Similarly, the A / D converter 105 oversamples the quadrature component of the baseband signal using the sampling clock from the detection unit 110, and the baseband quadrature data sequence Q which is digital data._i(I = 1, 2, 3,...)
[0008]
The digital filters 106 and 107 operate as a waveform shaping filter and have a roll-off filter characteristic. For example, in the digital filter 106, the baseband in-phase data series I_iIn the digital filter 107, the baseband in-phase data series Q_iAre respectively filtered to remove a noise component and an interference wave component contained in the baseband signal.
[0009]
Specifically, in the digital filters 106 and 107, input data is input to a 2n + 1 (n ≧ 1) stage shift register in which D flip-flops 141a to 141k are connected in series. The n adders 142a to 142e add the (n−y + 1) th data and the (n + y + 1) th data in the shift register (where y = 1, 2,..., n). . The (n + 1) multipliers 143a to 143f have a weighting coefficient W corresponding to the impulse response of the roll-off filter with respect to the outputs of the n adders 142a to 142e and the output of the D flip-flop 141f.₀~ W_nMultiply Weighting factor W₀~ W_nIs determined by the roll-off rate and the number of oversampled input data (= input data sampling rate / symbol rate). The adder 144 adds the outputs of (n + 1) multipliers 143a to 143f, and uses the addition result as the output of the digital filter.
[0010]
In the detection unit 110, the data series Id output from the digital filter 106._i(I = 1, 2, 3,...) And the data series Qd output from the digital filter 107_iBased on (i = 1, 2, 3,...), The timing phase difference of the sampling clock, the carrier frequency deviation Δf = (f_R-F_R') And the carrier phase difference. Then, control for correcting these is applied to the sampling clock and the local signal, and timing synchronization, carrier frequency synchronization, and carrier phase synchronization are established.
[0011]
After establishing each synchronization, the detection unit 110 determines data by synchronous detection (or delay detection), and outputs the determined data as demodulated data. As a timing synchronization control method, for example, the document “Examination of QPSK Timing Recovery Method Using Received Signal Phase Information” (Fujimura, IEICE Transactions Vol.J81-B-II no.6, pp. 665-668, June 1998). As carrier frequency control (AFC: Automatic Frequency Control) and carrier phase control (APC: Automatic Phase Control), for example, the document “Configuration and Characteristics of a Small and Highly Stabilized Burst Carrier Recovery Circuit” (Showa 63 of IEICE) SB-3-4, authors: Enomoto, Kubota, Umehira, Kato).
[0012]
In the automatic gain control device 108, the data series Id output from the digital filter 106._i(I = 1, 2, 3,...) And the data series Qd output from the digital filter 107_i(I = 1, 2, 3,...) Is input, and voltage data (digital data) for controlling the level of the received signal to a certain reference level is output. Finally, the D / A converter 109 converts this voltage data into an analog signal and supplies it to the variable gain amplifier 102.
[0013]
Here, the operation in the automatic gain control apparatus 108 will be described. First, in the level detection unit 121, the data series Id_i, Qd_iOn the basis of the reception level E in equation (1)_i(I = 1, 2, 3,...) Is calculated.
E_i= Id_i ²+ Qd_i ²                                          (1)
[0014]
In the subtractor 122, the reception level E is obtained from the reference level value Th._iIs subtracted (S_i= Th-E_i) In the loop filter 123, the output S of the subtractor 122 is obtained._i(I = 1, 2, 3,...) Is an input. Within the loop filter 123, the multiplier 131 performs a subtraction value S._iIs multiplied by a coefficient α (α <1), and an integrator composed of an adder 132 and a D flip-flop 133 is connected to an output M of the multiplier 131._i(I = 1, 2, 3,...) Is integrated, and this integrated value is converted to voltage data V_i(I = 1, 2, 3,...) And output from the automatic gain control device 108.
[0015]
Reception level E_iThe operation of the automatic gain control device 108 will be described by taking as an example the case where the value exceeds the reference level value. FIG. 10 is a diagram for explaining the operation of the automatic gain control device 108. Reception level E at the start of operation₁Is a large value exceeding the reference level value Th, so that the subtraction value S₁Is a small negative value. Therefore, the integral value V₁Is αS₁And a negative value is input. In response to this result, the automatic gain control device 108 receives an integral value V that is a negative value at time {circle around (1)} in FIG._i= ΑS₁Is output as voltage data, and the gain of the variable gain amplifier 102 is lowered.
[0016]
In this state, even if the gain control at time {circle around (1)} is performed, the data before gain control remains in the digital filters 106 and 107, so the reception level E_iDoes not drop immediately after time (1). Reception level E after gain control at time (1)_iIs reduced by about half the number of shift register stages (2n + 1) in the digital filters 106 and 107 (≈sampling speed of digital filter input data × n). Therefore, in order to avoid malfunction, after the gain control at time (1), the gain-controlled data E_iIs output from the level detection unit 121, the automatic gain control device 108 stops (holds) the operation of the loop filter 123.
[0017]
Next, even if gain control is performed at time {circle over (1)}, the reception level E₂Is still larger than the reference level, and thus becomes a negative value, but the subtraction value S₂Absolute value | S₂| Is | S₂| <| S₁The level difference between the two becomes narrower. The integral value of the loop filter is V₂= Α (S₁+ S₂) And output as voltage data at time {circle around (2)} in FIG. 10, and the gain of the variable gain amplifier 102 is further lowered. In this way, | S₂| <| S₁As can be seen from the relationship |_iSince the absolute value of the value decreases each time the gain control is repeated (| S₁｜ ＞ ｜ S₂｜ ＞ ｜ S_Three｜ ＞ ｜ S_Four|> ...), the integrator (= voltage data) in the loop filter never overflows. In the process in which the gain control is repeated in the order of time (1) → (2) → (3) → (4) →._iConverges to a voltage value that controls the reception level to the reference value (see FIG. 10).
[0018]
On the other hand, reception level E_iConversely, when the value is lower than the reference level value, the subtraction value S₂Becomes positive and the integrator in the loop filter increases in the positive direction.₁｜ ＞ ｜ S₂｜ ＞ ｜ S_Three｜ ＞ ｜ S_FourSince |> is established, voltage data V_iConverges to a voltage value that controls the reception level to a reference value.
[0019]
The coefficient setting unit 124 controls the value of the coefficient α. Here, when the value of the coefficient α (<1) is set to a large value (for example, 0.1), the response speed of the loop filter 123 increases, so that the reception level can be drawn to the reference level value in a short time. However, there is a disadvantage that the gain control voltage jitter (fluctuation) after the pull-in is large and unstable. On the other hand, when the value of the coefficient α (<1) is set to a small value (for example, 0.001), the response speed of the loop filter 123 decreases, and it takes a long time to pull the reception level to the reference level value. However, the jitter (fluctuation) of the gain control voltage after the pull-in is small and highly stable. Therefore, the coefficient setting unit 124 outputs the coefficient α as a large value when the reception level is pulled down to the reference level value, and outputs the coefficient α as a small value otherwise. To achieve high stability.
[0020]
As described above, in the conventional demodulator, the feedback control based on the series of operations described above allows the A / D converters 104 and 105 to be controlled regardless of whether the level of the received signal input from the antenna 101 is large or small. It is at a constant level at the input end. Further, the conventional automatic gain control device 108 is also applied to a recent satellite communication transmission rate variable digital demodulator.
[0021]
Here, the transmission rate variable digital demodulator for satellite communication will be described. This variable transmission rate digital demodulator is described in the document “Transmission rate variable digital demodulator for satellite communications” (SB-2-1 Autumn Conference of the Institute of Electronics, Information and Communication Engineers, 1988, Author: Iwasaki, Otani, Tanimoto, Kobayashi, Makida, Abe. , Shibata), the transmission rate is variable in order to support not only voice but also FAX, image, and data communication.
[0022]
In the satellite communication transmission rate variable digital demodulator, the adjacent wave is removed by using a pre-filter composed of an analog circuit in front of the A / D converter. The included signal is sampled, and the adjacent wave is removed by a digital filter. This is called an all-digital variable transmission rate demodulator. In this case, the digital filter section assumes the role of removing adjacent waves of the pre-filter that is an analog circuit. When realizing such an all-digital satellite transmission rate variable digital demodulator for satellite communication, the digital filters 106 and 107 are not only the waveform shaping filter (see FIG. 9) but also a decimation filter and a waveform shaping filter (see FIG. 11). Reference).
[0023]
FIG. 11 is a diagram showing the configuration of digital filters 106 and 107 different from those in FIG. In FIG. 11, 147 is a decimation filter, 148 is a waveform shaping filter, 145a, 145b, 145c, and 145d are half-band filters, and 146a, 146b, 146c, and 146d are latches.
[0024]
The decimation filter 147 uses a low-pass filter to extract only the DC to low frequency band including its own wave from the frequency components of the input data, and then thins the data at 1/2 or less of the sampling rate of the input data. In FIG. 11, half-band filters 145a to 145d serve as thinning-out, and latches 146a to 146d serve as the low-pass filter. Usually, the decimation filter is constituted by, for example, m half-band filters + latch connected in series. The configuration of FIG. 11 is a realization notation by multistage of a half-band filter. In this case, the decimation filter 147 reduces the data sampling rate by 1/2 while removing the adjacent wave.^mDrop twice.
[0025]
That is, the half band filter 145a of the stage (1) filters the frequency band of the input data to about ½, and the latch 146a thins out the output data at a speed that is ½ times the sampling speed of the input data. Further, the half-band filter 145b of the stage (2) filters the frequency band of the data output from the latch 146a to about ½, and the latch 146b outputs the output data at a rate ¼ times the sampling rate of the input data. Thin out. Similarly, the half band filter 145d of the stage (m) filters the frequency band of the data output from the preceding latch to about ½, and the latch 146d is ½ of the sampling rate of the input data.^mOutput data is thinned out at double speed. For details on the half-band filter, see, for example, the document “Multi-rate signal processing” (Hiroshi Hitoshi, Digital Signal Processing Series Vol. 14, pp61-pp76, publisher; Shoshodo, first edition issued in 1st edition; 1995 10 May 6).
[0026]
Next, the transmission rate Rs and the reception level E in the conventional demodulator._iThe relationship between the output data of the digital filters 106 and 107 and the | amplitude value | will be described using equations. The transmission rate is Rs [baud], and the sampling rate of the A / D converter is f._samp[Hz] When the range of the oversampled number ovs of the decimation filter output is 2 ≦ ovs <4, the decimation number m is
m = int [log₂(F_samp/ (2Rs))] (2)
Also, ovs is
ovs = f_samp/ (Rs * 2^m(3)
It is obtained by.
[0027]
In this case, the weighting coefficient W of the waveform shaping filter₀~ W_nDetermines the impulse of the roll-off filter based on the value sampled by the oversample number ovs. However, in the expression (2), int [A] represents an integer value (decimal digits truncation) of the value A in [].
[0028]
Then, the maximum value RX = max (Rs) of Rs is changed to RX = f_samp/ 4 (ie, f_samp= 4Rs, m = 1 and ovs = 2 according to the above equations (2) and (3)), and the reception level E when the transmission rate is RX_iAssuming that the average value of EX is EX, the reception level E at the transmission rate Rs (≦ RX)_iThe average value EM of ## EQU2 ## is obtained by equation (4), and the average value AM of | amplitude value | which is the digital filter output is obtained by equation (5).
EM = EX (ovs / 2^m(4)
AM = EM^(1/2)                                              (5)
[0029]
From the above equations, m increases as the transmission rate Rs decreases (see equation (2)), and when m increases, the reception level E_iIt can also be seen that the | amplitude value | of the output data of the digital filters 106 and 107 decreases (see equations (4) and (5)). In addition, the ovs value varies depending on the transmission rate Rs (see Expression (3)), and the reception level E also depends on the ovs value._iIt can also be seen that the | amplitude value | of the output data of the digital filters 106 and 107 changes (see equations (4) and (5)).
[0030]
[Problems to be solved by the invention]
However, in the conventional demodulator for the digital satellite communication system, after the gain variable amplifier changes the gain, the time corresponding to the signal processing in the digital filters 106 and 107 (in the conventional example of FIG. The reception level E until the half of the stage number 2n + 1) elapses._iOutputs the value before gain control. Therefore, even when the coefficient α is decreased to shorten the pull-in time, the operation of the automatic gain control device 108 is held (stopped) to prevent malfunction until the time corresponding to the signal processing in the digital filters 106 and 107 elapses. ), Which hinders shortening of the pull-in time.
[0031]
Particularly in recent satellite communication transmission rate variable digital demodulators, since it is necessary to remove adjacent wave components over a wide band by the digital filters 106 and 107, the signal processing time of the digital filters 106 and 107 further increases. Therefore, when the conventional automatic gain control device 108 is applied to a recent digital transmission rate variable demodulator for satellite communication, the hold time is further increased, and thereby the time required for pulling is greatly increased. was there.
[0032]
In the conventional digital transmission rate variable digital demodulator for satellite communication, when the transmission rate is lowered, the ratio of the own signal band to the entire band of the sampled signal is decreased._iDecrease. As a result, the reception level E_iAs the number of effective bits decreases, the reception level E_iThere has been a problem that the quantization noise increases and gain control is not performed normally.
[0033]
In many cases, a decoder for error correction such as a Viterbi decoder is present after the demodulator. In this case, the demodulator performs soft decision on the data by the demodulator, and the Viterbi decoder performs soft decision on the demodulated data. Enter. There is an optimum value for the threshold interval for this soft decision (soft decision threshold interval), and if the soft decision threshold interval deviates from the optimum value, the error correction capability also decreases. Therefore, when the transmission rate becomes low, the | amplitude value | of the output data of the digital filters 106 and 107 and the number of effective bits of the output data also decrease. Therefore, the detection unit 110 determines the demodulated data as an optimum soft decision. There was a problem that it was difficult to make a soft decision at a threshold interval.
[0034]
The reception level E depends on the transmission rate._iTherefore, there is a problem that it is necessary to reset the reference level value in the automatic gain control device 108 according to the transmission rate at that time.
[0035]
The present invention has been made in view of the above, and achieves both high-speed automatic gain control pull-in and high-stable operation after pull-in, and gain control operation and soft decision operation are not affected by the value of the transmission rate. An object is to obtain an automatic gain control device and a demodulator.
[0036]
[Means for Solving the Problems]
In order to solve the above-described problems and achieve the object, the automatic gain control device according to the present invention receives the baseband data output from the digital filter and detects the reception level of the baseband data. The detection means (corresponding to a level detection unit 21 in the embodiment described later) and the detected reception level are integrated MH (MH is a natural number) times, and the result is output as first integration data. A reception level integrating means (corresponding to the reception level integrating section 22) for integrating the reception level MR (MR is a natural number) times and outputting the result as second integration data; and a predetermined amplification for the first integration data By multiplying the rate data, adding the multiplication result and the second integration data, and dividing the addition result by the total number of integrations (MH + MR), A reception level average value calculating means (corresponding to the reception level average value calculation unit 24) for calculating an average value of the transmission level and outputting the average value as reception level average data; and a start / end timing of the integration operation; The control means (corresponding to the control unit 23) for controlling the latch timing of the first integral data, the ratio between the specific reference value and the reception level average data is calculated as a dB value, and the dB value is used as the level ratio data. The reception level ratio calculation means for output (corresponding to the reception level ratio calculation unit 25) and the level ratio data are integrated within a predetermined range ± Td, and if the integration result is equal to or greater than Td, the level ratio data integrated value is calculated. When Td is equal to or less than -Td, the level ratio data integrated value is set to -Td, and the true value of the level ratio data integrated value is output as voltage data (gain data generating means (gain A voltage amplification factor calculating means (gain control voltage amplification factor) for obtaining a difference value of the integrated value of the level ratio data and calculating an absolute value of the difference value as the predetermined amplification factor data. Equivalent to the calculation unit 27).
[0037]
In the automatic gain control device according to the next invention, the reception level of the digital data output from the A / D converter is calculated, and if the value is greater than a certain threshold value, the A / D converter overflows. The overflow detection means (corresponding to the overflow detection unit 61) that outputs the determination result as an overflow detection signal and the baseband data output from the digital filter are received and the reception level of the baseband data is detected. Level detection means that integrates the detected reception level over MH (MH is a natural number) times, outputs the result as first integration data, and then integrates the reception level over MR (MR is a natural number) times Receiving level integration means for outputting the result as second integration data, and the first integration data Multiplying constant amplification factor data, adding the multiplication result and the second integration data, and dividing the addition result by the total number of integrations (MH + MR), calculates the average value of the reception level, Reception level average value calculating means for outputting an average value as reception level average data, a reception level for calculating a ratio between a specific reference value and the reception level average data as a dB value, and outputting the dB value as level ratio data When the overflow detection signal is output, the ratio calculation means selects a predetermined value defined in advance, and when the overflow detection signal is not output, selects the level ratio data, and the selection result Selection means (corresponding to the selection unit 62) for outputting as selection data, the selection data is integrated within a predetermined range ± Td, and if the integration result is equal to or greater than Td, selection is performed. The selection data integration value is Td, and if it is -Td or less, the selection data integration value is -Td, and the difference between the selection data integration value and voltage data generating means for outputting the true value of the selection data integration value as voltage data Voltage amplification factor calculating means for obtaining a value and outputting the exact value of the difference value as the predetermined amplification factor data; and when the overflow detection signal is output, the amplification factor data and the reception level integrating means Reset the register and the register in the reception level average value calculation means, and control the start / end timing of the integration operation and the latch timing of the first integration data when the overflow detection signal is not output Control means (corresponding to the control unit 23a).
[0038]
In the automatic gain control apparatus according to the next invention, the sum of the number of integrations MR and the number of integrations MH takes a power of two.
[0039]
In the automatic gain control device according to the next invention, at the initial stage, the reception level integration means integrates the reception level detected by the level detection means over MR times, and the reception level average value calculation means includes the The average value of the reception level is calculated by dividing the integration result by the total number of integration MR, and the control means controls the start / end timing of the integration operation.
[0040]
In the automatic gain control apparatus according to the next invention, the integration number MR is a power of two.
[0041]
The automatic gain control apparatus according to the next invention is characterized in that the reception level ratio calculation means is constituted by a ROM.
[0042]
The automatic gain control apparatus according to the next invention is characterized in that a true number conversion part in the voltage gain calculation means and the voltage data generation means is constituted by a ROM.
[0043]
In the automatic gain control device according to the next invention, the reception baseband data output from the digital filter is received, the reception level of the baseband data is calculated, and the ratio between the specific reference value and the reception level is calculated. And a reception level ratio detection means (corresponding to the level ratio detection unit 71) that outputs the dB value as a reception level ratio detection value, and integrates the dB value MH (MH is a natural number) times, The result is output as first integration data, and thereafter the dB value is integrated MR (MR is a natural number) times, and the result is output as second integration data (reception level ratio integration means). And the first integrated data is divided by the number of integrations MH to calculate the level ratio average value before gain control, and further the level before gain control. The result obtained by adding predetermined amplification factor data (dB value) to the ratio average value is defined as a first level ratio average value, and the result obtained by dividing the second integration data by the number of integration MR is the second level ratio average value. And a reception level ratio average value calculation means (reception level ratio average) that outputs the result of dividing the sum of the first level ratio average value and the second level ratio average value by “2” as level ratio data The control unit (equivalent to the control unit 23) for controlling the start / end timing of the integration operation and the latch timing of the first integration data, and the level ratio data within a predetermined range. Integrate within ± Td, and if the integration result is Td or higher, the level ratio data integrated value is Td, and if it is -Td or lower, the level ratio data integrated value is -Td. Exact value Voltage data generation means (corresponding to the gain control voltage data generation unit 26) that outputs as voltage data, a difference value of the level ratio data integrated value, and a voltage gain that outputs the difference value as the predetermined gain data And a calculating means (corresponding to the gain control voltage amplification factor calculating unit 27b).
[0044]
In the demodulator according to the next invention, an antenna for receiving an RF signal (corresponding to the antenna 1), a gain control amplifier (corresponding to the variable gain amplifier 2) for controlling the gain of the RF signal by a gain control voltage, and Frequency conversion means (corresponding to the frequency conversion section 3) for converting the output signal of the gain control amplifier into a reception baseband signal, and A / D conversion means for oversampling the reception baseband signal and converting it into digital data (Corresponding to A / D converters 4 and 5) and the adjacent wave component and noise component included in the digital data are removed, the received wave signal is shaped, and the result is converted into baseband data. As a digital filter (corresponding to digital filters 6 and 7) and the baseband data, carrier frequency synchronization, The carrier phase synchronization and the timing synchronization are established, then the data is determined, the detection result (corresponding to the detection unit 10) is output as demodulated data, the baseband data is received, and the baseband data is received Level detection means for detecting the level, and the detected reception level is integrated MH (MH is a natural number) times, the result is output as first integration data, and then the reception level is MR (MR is a natural number). Receiving level integrating means for integrating the output over a number of times and outputting the result as second integration data; multiplying the first integration data by a predetermined amplification factor data; and multiplying the multiplication result by the second integration data. Addition and dividing the addition result by the total number of integrations (MH + MR), the average value of the reception level is calculated, and the average value is calculated as the reception level level. A reception level average value calculating means for outputting as data, a control means for controlling the start / end timing of the integration operation and the latch timing of the first integration data; a specific reference value and the reception level average data; A reception level ratio calculating means for calculating the ratio as a dB value and outputting the dB value as level ratio data; and integrating the level ratio data within a predetermined range ± Td, and if the integration result is equal to or greater than Td The level ratio data integrated value is Td, and if it is equal to or less than -Td, the level ratio data integrated value is set to -Td, and a true value of the level ratio data integrated value is output as voltage data, and the level ratio data A voltage amplification factor calculating means for obtaining a difference value of the integral value and outputting the exact value of the difference value as the predetermined amplification factor data; and D for the voltage data A conversion, and D / A converting means for outputting an analog signal after conversion as the gain control voltage (corresponding to a D / A converter 9), characterized in that it comprises a.
[0045]
In the demodulator according to the next invention, an antenna for receiving an RF signal, a gain control amplifier for controlling the gain of the RF signal by a gain control voltage, and an output signal of the gain control amplifier as a reception baseband signal. Frequency conversion means for frequency conversion, A / D conversion means for oversampling the received baseband signal to convert it to digital data, adjacent wave components and noise components included in the digital data are removed, and the received self wave The carrier frequency synchronization, the carrier phase synchronization, and the timing synchronization are established using the digital filter that performs waveform shaping on the signal and outputs the result as baseband data, and the baseband data. Detecting means for determining and outputting the result as demodulated data, and the digital An overflow detection means for calculating the reception level of the data and determining that the A / D conversion means has overflowed when the value is equal to or greater than a threshold value, and outputting the determination result as an overflow detection signal; Level detection means for receiving baseband data output from the digital filter and detecting the reception level of the baseband data; and integrating the detected reception level over MH (where MH is a natural number) times; Output as integration data, and thereafter integrate the reception level MR (MR is a natural number) times, and output the result as second integration data; and a predetermined amplification for the first integration data The rate data is multiplied, the multiplication result and the second integration data are added, and the addition result is calculated as the total number of integrations (MH + R) divides by the reception level average value calculating means for calculating the average value of the reception level and outputting the average value as the reception level average data, and the ratio between the specific reference value and the reception level average data. A reception level ratio calculation means for calculating the dB value and outputting the dB value as level ratio data, and when the overflow detection signal is output, a predetermined value specified in advance is selected, and the overflow detection signal is If not output, the level ratio data is selected, a selection means for outputting the selection result as selection data, the selection data is integrated within a predetermined range ± Td, and the integration result is Td or more. If there is, the selected data integral value is Td, and if it is -Td or less, the selected data integral value is -Td, and the true value of the selected data integral value is output as voltage data. When the voltage data generating means, the voltage gain calculating means for obtaining the difference value of the selected data integral value, and outputting the true value of the difference value as the predetermined gain data, and the overflow detection signal are output Resetting the gain data, the register in the reception level integration means, and the register in the reception level average value calculation means, and when the overflow detection signal is not output, the start / end timing of the integration operation And control means for controlling the latch timing of the first integral data; and D / A conversion means for performing D / A conversion on the voltage data and outputting the converted analog signal as the gain control voltage; It is characterized by providing.
[0046]
In the demodulator according to the next invention, the sum of the integration number MR and the integration number MH takes a power of two.
[0047]
In the demodulator according to the next invention, at the initial stage, the reception level integration unit integrates the reception level detected by the level detection unit over MR times, and the reception level average value calculation unit includes the integration result. Is divided by the total number of integrations MR to calculate an average value of the reception level, and the control means controls the start / end timing of the integration operation.
[0048]
In the demodulator according to the next invention, the integration number MR is a power of two.
[0049]
In the demodulator according to the next invention, the reception level ratio calculating means is constituted by a ROM.
[0050]
In the demodulator according to the next invention, the true number conversion part in the voltage amplification factor calculating means and the voltage data generating means is constituted by a ROM.
[0051]
In the demodulator according to the next invention, an antenna for receiving an RF signal, a gain control amplifier for controlling the gain of the RF signal by a gain control voltage, and an output signal of the gain control amplifier as a reception baseband signal. Frequency conversion means for frequency conversion, A / D conversion means for oversampling the received baseband signal to convert it to digital data, adjacent wave components and noise components included in the digital data are removed, and the received self wave The carrier frequency synchronization, the carrier phase synchronization, and the timing synchronization are established using the digital filter that performs waveform shaping on the signal and outputs the result as baseband data, and the baseband data. Detecting means for determining and outputting the result as demodulated data, and the baseband Receive level ratio detection that receives data, calculates a reception level of the baseband data, calculates a ratio between a specific reference value and the reception level as a dB value, and outputs the dB value as a reception level ratio detection value Means and the dB value is integrated MH (MH is a natural number) times, and the result is output as first integration data, and then the dB value is integrated MR (MR is a natural number) times, and the result is Reception level ratio integration means for outputting as second integration data; dividing the first integration data by the number of integrations MH to calculate a level ratio average value before gain control; and further, level ratio average before gain control The result obtained by adding predetermined amplification factor data (dB value) to the value is defined as a first level ratio average value, and the result obtained by dividing the second integral data by the number of integrations MR is the second level ratio average value. A reception level ratio average value calculating means for outputting a result obtained by dividing an addition value of the first level ratio average value and the second level ratio average value by “2” as level ratio data; and the integration operation The control means for controlling the start / end timing of the first integration data and the latch timing of the first integration data and the level ratio data are integrated within a predetermined range ± Td, and if the integration result is equal to or greater than Td, the level is obtained. The ratio data integrated value is Td, and if it is equal to or less than -Td, the level ratio data integrated value is set to -Td, the true value of the level ratio data integrated value is output as voltage data, and the level ratio data integrated A voltage amplification factor calculating means for obtaining a difference value of the value and outputting the difference value as the predetermined amplification factor data; performing D / A conversion on the voltage data; The characterized in that it and a D / A converting means for outputting as the gain control voltage.
[0052]
In the demodulator according to the next invention, the digital filter is composed of a decimation filter and a waveform shaping filter. When the decimation filter sets the number of decimations to m, the level of output data after decimation is 2^mAnd the waveform shaping filter divides the data output from the decimation filter by the number of oversamples of the data.
[0053]
In the demodulator according to the next invention, the detection means employs soft decision processing for data decision.
[0054]
DETAILED DESCRIPTION OF THE INVENTION
Embodiments of an automatic gain control device and a demodulator according to the present invention will be described below in detail with reference to the drawings. Note that the present invention is not limited to the embodiments.
[0055]
Embodiment 1 FIG.
FIG. 1 is a diagram showing a configuration of a demodulator according to a first embodiment of the present invention. In FIG. 1, 1 is an antenna, 2 is a variable gain amplifier, 3 is a frequency converter, 4 and 5 are A / D converters (A / D), and 6 and 7 are digital filters. Yes, 8 is an automatic gain control device, 9 is a D / A converter (D / A), and 10 is a detector. In the automatic gain control device 8, 21 is a level detection unit, 22 is a reception level integration unit, 23 is a control unit, 24 is a reception level average value calculation unit, and 25 is a reception level ratio calculation. , 26 is a gain control voltage data generation unit, and 27 is a gain control voltage amplification factor calculation unit.
[0056]
In the reception level integration unit 22, 31 is an adder, 32 is a D flip-flop, in the reception level average value calculation unit 24, 33 is a D flip-flop, 34 is a multiplier, and 35 is An adder, 36 is a divider, in the reception level ratio calculation unit 25, 37 is a divider, 38 is a dB converter, 39 is a gain control voltage data generation unit 26, 39 is an adder , 40 is a D flip-flop, 41 is a limiter, 42 is a true number conversion unit, 43 in the gain control voltage amplification factor calculation unit 27, 43 is a D flip-flop, 44 is an adder, 45 Is a true number conversion unit.
[0057]
FIG. 2 is a diagram showing the configuration of the digital filters 6 and 7. In addition, about the structure similar to FIG. 11 mentioned above, the same code | symbol is attached | subjected and the description is abbreviate | omitted. In FIG. 2, 51 is a decimation filter, 52 is a waveform shaping filter, and 53a, 53b, 53c, and 53d are 3 dB amplification units. FIG. 3 is a diagram showing the configuration of the waveform shaping filter 52. In addition, about the structure similar to FIG. 9 mentioned above, the same code | symbol is attached | subjected and the description is abbreviate | omitted. In FIG. 3, 54 is an attenuation part.
[0058]
Hereinafter, the operation of the demodulator of the present embodiment will be described. First, the antenna 1 receives a burst signal subjected to PSK modulation. The variable gain amplifier 2 controls the gain of the received signal based on the control voltage output from the automatic gain control device 8 after D / A conversion.
[0059]
In the frequency converter 3, the frequency f_RFrequency f output from the detector 10 for the received signal in the band_RMultiply '' local signal. And two frequency components f generated by multiplication_R+ F_R', F_R-F_R'To the harmonic component f_R+ F_R'Is removed, and the received signal is frequency-converted to a baseband signal (baseband signal).
[0060]
In the A / D converter 4, the in-phase component of the baseband signal is oversampled using the sampling clock from the detection unit 10, and the baseband in-phase data series I which is digital data is obtained._i(I = 1, 2, 3,...) Similarly, the A / D converter 5 oversamples the quadrature component of the baseband signal using the sampling clock from the detection unit 10, and the baseband quadrature data sequence Q which is digital data._i(I = 1, 2, 3,...)
[0061]
In the digital filter 6, the baseband in-phase data series I_iIn the digital filter 7, the baseband in-phase data series Q_iAre respectively filtered to remove a noise component and an interference wave component contained in the baseband signal. At this time, the decimation filter 51 and the waveform shaping filter 52 can receive the reception level E regardless of the transmission rate Rs (≦ RX)._iIs a data series Id that always takes the average value of Rs as the reception level EX when transmitting the maximum value RX of Rs_i, Qd_iIs output. The other operations of each digital filter are the same as those of the conventional digital filters 106 and 107.
[0062]
For example, when the range of the oversampled number ovs of the decimation filter output data is 2 ≦ ovs <4, each digital filter first includes m 3 dB amplifying units 53a to 53d in the decimation filter 51 as half-band filters. The output signals 145a to 145d are amplified by 3 dB (that is, the amplitude is amplified by √2). Then, the attenuation unit 54 in the waveform shaping filter 52 divides the output signal of the adder 144 by √ (ovs).
[0063]
As a result, the reception level E_iThe average value EP of the reception level E in the conventional example_iGr = 2 of the average value EM (see equation (4))^mSince (/ ovs) times, equation (6) is established regardless of the transmission rate Rs, and a constant value is obtained.
EP = Gr × EM = EX (6)
[0064]
Through the above processing, the reception level E_iThe average value EP changes only depending on the state of the wireless transmission path, such as the propagation distance and the presence or absence of rainfall, and does not change depending on the value of the transmission rate.
[0065]
In the detection unit 10, the data series Id output from the digital filter 6 is performed in the same procedure as in the prior art._i(I = 1, 2, 3,...) And the data series Qd output from the digital filter 7_iBased on (i = 1, 2, 3,...), The timing phase difference of the sampling clock, the carrier frequency deviation Δf = (f_R-F_R') And the carrier phase difference. Then, control for correcting these is applied to the sampling clock and the local signal, and timing synchronization, carrier frequency synchronization, and carrier phase synchronization are established. In addition, the detection unit 10 determines data by synchronous detection (or delay detection) after establishing each synchronization, and outputs the determined data as demodulated data.
[0066]
Data series Id_i, Qd_iIs amplified to a sufficiently large value by the processing of Equation (6) even when the transmission rate is low, the data series Id_i, Qd_iThe number of effective bits is sufficiently secured. Therefore, the detection unit 10 can easily make a soft decision on the demodulated data.
[0067]
Next, the operation of the automatic gain control device 8 of the present embodiment will be described in detail. In the conventional automatic gain control device 108, the reception level E_iAnd a reference level is detected, gain control is performed a plurality of times, and the level difference is gradually pulled down to “0”. On the other hand, in the automatic gain control device 8 of the present embodiment, the reception level E_iIn order to perform the gain control to cancel the level difference between the average value and the reference level, the pull-in operation is basically completed with one gain control.
[0068]
First, in the level detection unit 21, as in the conventional case, the data series Id according to the equation (1)._i, Qd_iTo reception level E_iIs output. In the reception level integration unit 22, the reception level E is expressed by the equations (7) and (8)._iIs integrated. This integration is performed twice in a certain period L.
[0069]
[Expression 1]

[0070]
[Expression 2]

[0071]
The first integration is performed for a while (= processing time of the digital filters 6 and 7) after gain control._iIs integrated. However, the number of integrations is MH, and the integration result is SH. The second integration is the reception level E after gain control._iIs integrated. However, the number of integrations is MR, and the integration result is SR. Note that the timing of the integration process is managed by the control unit 23.
[0072]
In the reception level average value calculation unit 24, the reception level E after gain control is calculated by the equation (9)._iThe average value AE is calculated.
AE = (SR + SH × Ga) / (MH + MR) (9)
However, Ga is the gain of the voltage by gain control, and the voltage data before gain control is V_k-1The voltage data after gain control is V_kThen, it can be expressed by equation (10).
Ga = V_k/ V_k-1                                          (10)
[0073]
Here, the reception level E according to the above equation (9)_iA method for calculating the average value AE will be described with reference to the drawings. First, the D flip-flop 33 receives the reception level E before gain control obtained by the equation (7)._iThe integrated value SH is latched. Next, the multiplier 34 multiplies the integrated value SH latched by the latch signal from the control unit 23 by Ga. By this multiplication, the reception level E before gain control_iReceived value E after gain control from the integrated value SH_iCan be obtained. Next, the adder 35 receives the reception level E after gain control obtained by the equation (8)._iAnd the output value SH ′ of the multiplier 34 are added. Finally, the divider 36 divides the output of the adder 35 by (MH + MR) to obtain the reception level E_iThe average value AE is output. If the value of (MH + MR) is a power of 2, division can be realized by bit shift, and the division circuit can be easily realized.
[0074]
In the reception level ratio calculation unit 25, the divider 37 receives the reference level value and the reception level E._iA ratio with the average value AE is obtained, and the dB conversion unit 38 converts the ratio into a dB notation and outputs it. The reception level ratio calculation unit 25 performs complicated calculations in the division process and the dB conversion process, so that the circuit scale increases. Usually, however, since the reference level value is a fixed value, the input average value AE Can be used to determine the output level ratio. Therefore, the reception level ratio calculation unit 25 can be realized with a small circuit scale by using a ROM.
[0075]
In the gain control voltage data generation unit 26, the level ratio LR obtained by the reception level ratio calculation unit 25 is obtained._kIs integrated using the adder 39 and the D flip-flop 40, and the integration result is converted into a notation of the true number and output. This output data is voltage data V for controlling the variable gain amplifier 2._kIt is. However, k is an integer value which increases according to the number of gain control performed by the automatic gain control device 8 (k = 1, 2, 3,...).
[0076]
In the limiter 41, the voltage data V_kIs held in the input range of the D / A converter 9 and the following three values are output by the output value DV of the D flip-flop 40.
(1) When DV is within threshold value ± Td (−Td ≦ DV ≦ Td); DV is output
(2) When DV shows a value smaller than the threshold value -Td (DV <-Td); -Td is output
(3) When DV shows a value larger than the threshold value Td (DV> Td); Td is output
[0077]
Further, the true number conversion unit 42 converts the output of the limiter 41 into a true number, and converts the converted data into voltage data V_kOutput as. The true number conversion unit 42 also uses a ROM, so that a complicated true number conversion operation is unnecessary, and the circuit scale can be reduced.
[0078]
The gain control voltage gain calculation unit 27 obtains the voltage gain Ga by gain control. The amplification factor Ga can be obtained by division according to the equation (10). However, since a large-scale circuit is required for the division processing, the output of the limiter 41 that is a dB value is subtracted, and the same processing as the equation (1) is performed. Realize. That is, the D flip-flop 43 determines the dB value log of the previous voltage data._Ten(V_k-1) (= The output of the limiter 41) and the adder 44 determines that the dB value log of the current voltage data_Ten(V_k) To dB value log of the previous voltage data_Ten(V_k-1) Is subtracted. The subtraction of the dB value means a true division. Here, the adder 44 plays the role of the division performed by the equation (10). Then, the true number conversion unit 45 converts the output of the adder 44 into a true number, and outputs the converted signal as a voltage amplification factor Ga by gain control. The true number conversion unit 45 is realized by using, for example, a ROM.
[0079]
Finally, in the D / A converter 9, as in the conventional case, the voltage data V_kIs converted to an analog signal and supplied to the variable gain amplifier 2.
[0080]
So far, the operation of the automatic gain control device 8 at normal time (k ≧ 2) has been described. Hereinafter, the operation of the automatic gain control device 8 at the initial time (k = 1) will be described. FIG. 4 is a timing chart showing the operation of the automatic gain control device 8 up to k = 1, 2,. That is, the demodulator including the automatic gain control device 8 starts receiving operation from time t = 0.
[0081]
Since the registers of the digital filters 6 and 7 are “0” at the time t = 0, the data series Id output from the digital filters 6 and 7_i, Qd_iOutputs a value close to “0” for a while (= digital filter processing time). Therefore, reception level E_iIndicates a value close to “0” which is not an actual reception level during this period (corresponding to time (1) in the figure).
[0082]
In the reception level integration unit 22, a meaningless reception level E during this period_iIs integrated MH times according to the equation (7), and the integration result SH₁Is output only when k = 1.₀Is set to “0”, the reception level average value calculation unit 24 calculates the reception level by using the gain Ga.₀Do not use.
[0083]
Reception level E_iBecomes a significant value for a while after the start of the operation (corresponding to time (2) in the figure). Therefore, the reception level integrator 22 receives a significant reception level E during this period._iIs integrated over MR times according to equation (8), and the integration result SR₁Is output. Therefore, the average reception level AE at the first time k = k.₁Is the result of integration over MR times SR₁Therefore, the following equation (11) is used instead of equation (9). Where Ga₀Is “0”, so in fact, SR₁Divided by MR and AE₁Seeking. If MR is a power of 2, division performed by complicated arithmetic processing can be realized by bit shift.
AE₁= (SR₁₊SH₁× Ga₀) / MR (11)
[0084]
The automatic gain control device 8 calculates the AE calculated as described above.₁Based on reception level E_iK = first voltage data V with reference level₁And gain Ga₁Is calculated. In the initial operation of K = 1, since the D flip-flop 43 is “0”, V₁= Ga₁It becomes.
[0085]
Thereafter, after the first gain control is performed (k ≧ 2), the automatic gain control device 8 performs the above-described processing after k ≧ 2. That is, since the data before the first gain control remains in the digital filters 6 and 7 for a while after the first gain control is performed, the reception level E_iIs the value before the first gain control during this period (corresponding to time (3) in the figure). At this time, the reception level integrator 22 receives the reception level E during this period._iIs integrated MH times, and the reception level average value calculation unit 24 calculates the integration result SH.₂Amplification factor Ga₁Is multiplied to obtain a gain-controlled integration result SH.₂Ask for '.
[0086]
Next, the reception level E_iChanges due to the first gain control (time (4) in the figure). At this time, the reception level integrator 22 receives a significant reception level E during this period._iIs integrated over MR times, and the integration result SR₂Is output. Therefore, unlike K = 1, the integration result SH₂Since ′ is also significant information, the reception level average value AE at k = 2nd time₂Is the result SH integrated over MH times₂'And the result SR integrated over MR times₂Both, i.e., using equation (9).
[0087]
The automatic gain control device 8 calculates the AE calculated as described above.₂Based on reception level E_iK = second voltage data V with reference level₂And gain Ga₂Is calculated. When k ≧ 3, as in the case of k = 2, (MH + MR) reception levels E_iThe gain control using is repeatedly executed.
[0088]
As is clear from the comparison of Equations (9) and (11), K-1 uses E for averaging._iTherefore, the accuracy of gain control is slightly inferior to K = 2. For example, as shown in FIG._iMay show a value slightly different from the reference level from time (4) to time (5). However, when k ≧ 2, accurate gain control is performed, and as shown in FIG._iAlmost matches the reference level. If a slight degradation in performance is acceptable, the integration result SR_kThe circuit scale may be reduced by using only the circuit. In this case, regardless of the value of k, the reception level average value AE_kIs obtained by the following equation (12).
AE_k= SR_k/ MR (12)
[0089]
In this case, the gain control voltage amplification factor calculation unit 27, the D flip-flop 33, the multiplier 34, and the adder 35 in the reception level average value calculation unit 24 in FIG. 1 can be deleted.
[0090]
Thus, in the automatic gain control device of the present embodiment, the reception level E_iBased on the result, direct gain control using the reception level as a reference value is performed, and the pull-in operation is completed when the number of times of control is one or two. As a result, a significant reduction in the pull-in time can be realized.
[0091]
In the automatic gain control apparatus of the present embodiment, for the second and subsequent gain control, the reception level E before gain control that is output until the time required for the signal processing of the digital filter has elapsed._iAnd reception level E after gain control_iBoth are used to calculate the average value of the reception level, and based on the result, gain control is performed using the reception level as a reference value. Thereby, compared with the gain control in the conventional example, highly accurate gain control after the pull-in can be realized.
[0092]
Further, in the automatic gain control apparatus of the present embodiment, the reception level E is always controlled by signal amplification control (see Expression (6)) in the digital filter._iTherefore, accurate gain control can be realized regardless of the transmission rate.
[0093]
In the demodulator according to the present embodiment, good bit error rate characteristics can be realized in a short time after a burst signal is input by high-speed and high-accuracy gain control by the automatic gain control device 8.
[0094]
Also, in the demodulator of this embodiment, the signal amplification control in the digital filter (see Equation (6)) can always secure a large number of effective bits of the data of the digital filter output. And accurate soft decision can be realized. Further, by the same signal amplification control, the reference level value can be kept constant regardless of the transmission rate, and thus no adjustment can be achieved.
[0095]
In the present embodiment, the case where the range of the number of oversamples ovs in the decimation filter 51 is 2 ≦ ovs <4 has been described as an example. However, the roll-off rate is as low as about 35% and the self-wave occupies. When the frequency occupation bandwidth is narrow, the decimation filter 51 may set the range of the oversample number ovs to 1.5 ≦ ovs <3.
[0096]
In this case, m is obtained as follows. First, m ′ is obtained according to the following equation (13).
m ′ = int [log₂(F_samp/ (Rs))] (13)
Next, MQ is calculated | required according to following Formula (14).
MQ = (f_samp/ (Rs * 2^m′)) (14)
Finally, m is obtained according to the following equation (15).
m = m ′ (MQ ≧ 1.5)
m = m′−1 (MQ <1.5) (15)
[0097]
Note that ovs is obtained by substituting m obtained in the above equations (13) to (15) into equation (3). Also in this case, since the equation (4) is established, the digital filter 6 and 7 calculates the amplification amount Gr using the equation (6). As described above, in the decimation filter 51, the range of the number of oversamples ovs is set to (2 ≦ ovs <4) → (1.5 ≦ ovs <3), so that the number of shift register stages of the subsequent waveform shaping filter 52 Therefore, the circuit scale of the digital filter can be reduced.
[0098]
Embodiment 2. FIG.
FIG. 5 is a diagram showing a configuration of a second embodiment of the automatic gain control device and the demodulator according to the present invention. In addition, about the structure similar to the above-mentioned Embodiment 1, the same code | symbol is attached | subjected and the description is abbreviate | omitted. In FIG. 5, 8a is an automatic gain control device, 23a is a control unit, 61 is an overflow detection unit, and 62 is a selection unit.
[0099]
As described above, in the first embodiment, adjacent waves are received in addition to the own wave, and the adjacent waves are removed by the digital filter. Such processing comes from the demand that the transmission rate (that is, the bandwidth of the own wave) can be freely changed while the characteristics of the analog filter are fixed (no adjustment).
[0100]
For example, the frequency characteristic of the analog filter positioned in front of the A / D converter needs to be a wide band corresponding to the case where the transmission rate is the highest (that is, the case where the self-wave band is the widest). Is low, that is, when the band of the own wave is narrow, the A / D converter receives the own wave and the adjacent wave used at a different frequency at the same time.
[0101]
FIG. 6 is a diagram showing the frequency spectrum of the received signal input to the A / D converter. Note that FIG. 6A shows the time t.₁(B) is the time t₂(C) is the time t_ThreeRepresents the frequency spectrum. Here, the solid line represents the own wave, and the dotted line represents the adjacent wave.
[0102]
As shown, the appearance and disappearance of adjacent waves used by other users is irregular (e.g. t₁→ t₂→ t_ThreeThe reception level of the A / D converter input also varies with time, and the variation is expected to be abrupt. For example, time t₁If there is only one adjacent wave as shown, the reception level of the A / D converter input is low, but the time t₂If there are 6 adjacent waves, the reception level at the input of the A / D converter becomes very high. At this time, a sudden change in the input level in the A / D converter cannot be expected, and when another user starts communication at the same time, the input level of the A / D converter increases rapidly.
[0103]
In the state where the demodulator receives a no-signal with a very low level, for example, when the timing of the self-wave and the adjacent wave coincide with each other and the input level in the A / D converter suddenly increases, The signal exceeds the maximum input range (overflow occurs), and the output of the A / D converter becomes uncertain.
[0104]
In such a case, it is conceivable that the pull-in characteristic of the automatic gain control device and the bit error rate characteristic of the demodulator deteriorate. In the present embodiment, such a problem is solved.
[0105]
The operation of the automatic gain control device 8a according to the second embodiment that solves the above problem will be described below. First, in the automatic gain control device 8a, in addition to the outputs of the digital filters 6 and 7, the output data IA of the A / D converters 4 and 5 is further increased._i, QA_iIs used. The overflow detector 61 outputs the output data IA of each A / D converter._i, QA_iTo the received power WA at that time_iIs obtained by the following equation (16).
WA_i= IA_i ²+ QA_i ²                                      (16)
[0106]
Next, the overflow detection unit 61 receives the received power WA._iIs compared with a specific value Wth, and when the following expression (17) is satisfied, it is determined that each A / D converter has caused an overflow, and an overflow detection signal is output.
WA_i≧ Wth (17)
[0107]
If the overflow detection unit 61 determines that an overflow has occurred, the following operation is performed. First, the selection unit 62 ignores the information of the reception level ratio calculation unit 25 and outputs XD (<0) corresponding to the control step width [dB] to the gain control voltage data generation unit 26. XD is set so that the gain control step width becomes large, for example, −6 [dB]. Next, in the control unit 23a, the D flip-flop 32 (register) in the reception level integration unit 22, the D flip-flop 33 (register) in the reception level average value calculation unit 24, and the Ga at that time_kIs reset to “0” to return the uncertain state at the time of overflow to the reset state.
[0108]
On the other hand, when the overflow detection unit 61 determines that no overflow has occurred, the same operation as that of the automatic gain control device 8 of the first embodiment is performed. Specifically, the selection unit 62 outputs the information of the reception level ratio calculation unit 25 to the gain control voltage data generation unit 26. And in the control part 23a, the process similar to the control part 23 of above-mentioned Embodiment 1 is performed.
[0109]
As described above, in this embodiment, even when the A / D converter overflows due to the appearance of the adjacent wave at the time of burst capture and uncertain data is output from the digital filters 6 and 7, the gain is set to XD. By reducing the unit to [dB], an overflow state is immediately avoided. As a result, the pull-in characteristic is not deteriorated, and the high-speed pull-in of the gain control is realized.
[0110]
In the present embodiment, a good bit error rate characteristic can be realized by high-speed gain control even at the time of burst capture in which the appearance and disappearance of adjacent waves are repeated.
[0111]
Embodiment 3 FIG.
FIG. 7 is a diagram showing a configuration of a third embodiment of the automatic gain control device and the demodulator according to the present invention. In addition, about the structure similar to Embodiment 1 demonstrated previously, the same code | symbol is attached | subjected and the description is abbreviate | omitted. In FIG. 7, 8b is an automatic gain control device. In the automatic gain control device 8b, 71 is a level ratio detection unit, 22b is a reception level ratio integration unit, and 24b is a reception level ratio average value calculation unit. 27b are gain control voltage amplification factor calculation units. In the reception level ratio integration unit 22b, 72 is an adder, 73 is a D flip-flop, 74, 76, and 78 are dividers in the reception level ratio average value calculation unit 24b, and 75 and 77 are It is an adder.
[0112]
Hereinafter, the operation of the automatic gain control device 8b of the third embodiment will be described. The automatic gain control device 8b achieves the same performance as the automatic gain control device 8 of the first embodiment described above, and further reduces the circuit scale. Specifically, in the automatic gain control device 8b according to the third embodiment, instead of comparing the reception level with the reference level value after averaging, the ratio between the reception level and the reference level value is first detected by the dB value. Then, the detected values are averaged. With this process, the automatic gain control device 8b eliminates the reception level ratio calculation unit 25 (having the dB conversion unit 38), the true number conversion unit 45, and the multiplier 34 in the automatic gain control device 8.
[0113]
First, in the level ratio detection unit 71, the data series Id according to the equation (1)._i, Qd_iTo reception level E_iAnd the ratio CE between the calculation result and the reference level value_iAsk for. Then, the ratio is output in dB. The level ratio detection unit 71 receives the data series Id_i, Qd_iAs the input address and CE_iCan be realized with a small circuit scale.
[0114]
In the reception level ratio integration unit 22b, CE_iIs integrated using an adder 72 and a D flip-flop 73. The integration is performed twice in a certain period L as in the automatic gain control device 8 of the first embodiment described above. In this case, the first integration is “E” in the equation (7)._jTo CE_jThe second integration can also be realized by changing “E” in the equation (8)._jTo CE_jIt can be realized by the change “”.
[0115]
The reception level ratio average value calculation unit 24b calculates the average value of the level ratio from the integrated value of each level ratio. First, the divider 74 divides the first integration value by the number of integrations MH, and outputs the result as a level ratio average value before gain control. The adder 75 adds a value (dB notation) from a gain control voltage amplification factor calculation unit 27b described later and a level ratio average value before gain control, and outputs the result as a first level ratio average value. The divider 76 divides the second integration value by the integration number MR to obtain a level ratio before gain control, and outputs the result as a second level ratio average value. The adder 77 adds the first level ratio average value and the second level ratio average value. Finally, the divider 78 divides the addition result of the adder 77 by “2” and outputs the average value of the level ratio.
[0116]
The gain control voltage data generation unit 26 operates in the same manner as the automatic gain control device 8 of the first embodiment described above with the average value of the level ratio as the output of the divider 73 as an input.
[0117]
In the gain control voltage amplification factor calculation unit 27b, the output of the limiter 41 is differentiated using the D flip-flop 43 and the adder 44, similarly to the gain control voltage amplification factor calculation unit 27 of the first embodiment described above. . However, in the automatic gain control device 8b of the first embodiment, this difference value is converted to a true number by the true number conversion unit 45, and the value after the true number conversion is multiplied by the output value of the D flip-flop 33. However, in the automatic gain control device 8b of the present embodiment in which the data processing of the reception level ratio average value calculation unit 24b is performed with the dB value, the same processing is performed by the difference value of the output of the limiter 41 and the output of the divider 74. This can be realized by adding the value.
[0118]
It should be noted that the value obtained by converting the ratio between the average value of the reception level and the reference level by dB in the automatic gain control device 8 according to the first embodiment and the reception level obtained by performing the dB conversion by the automatic gain control device 8b according to the third embodiment. The average value of the ratio is slightly different, but the difference in performance between the two due to the difference is slight.
[0119]
In the above description, the operation of the automatic gain control device 8b at the normal time (k ≧ 2 in FIG. 4) has been described. Hereinafter, the operation of the automatic gain control device 8b at the initial time (k = 1 in FIG. 4) will be described.
[0120]
The automatic gain control device 8b performs control so that the output of the adder 75 is set to “0” (invalid) only during the initial operation, and the “2” division performed by the divider 78 is not performed. In this case, the output value of the reception level ratio average value calculation unit 24b is equal to the second level ratio average value.
[0121]
If some performance degradation can be tolerated, the automatic gain control device 8b is always operated in the initial state, and the gain control is performed using only the “second level ratio average value”, so that the circuit scale can be obtained. May be reduced. Further, the selection unit 62 in the automatic gain control device 8a of the above-described second embodiment is inserted between the reception level ratio average value calculation unit 24b and the gain control voltage data generation unit 26 of the automatic gain control device 8b. By changing the unit 23 to the control unit 23a and further expanding the overflow detection unit 61 into a configuration in which the same is inserted as in FIG. 5, it is possible to realize further high speed pull-in of the gain control.
[0122]
As described above, in the automatic gain control apparatus according to the embodiment, the ratio between the reception level and the reference level value is detected by the dB value, and the detected value is averaged. As compared with the first embodiment, the circuit scale can be further reduced while realizing the same level of performance.
[0123]
【The invention's effect】
As described above, according to the present invention, the reception level is averaged, and based on the result, direct gain control is performed using the reception level as a reference value, and the pull-in operation is performed once or twice. It was set as the structure which completes. Thereby, there is an effect that the pull-in time can be greatly shortened. For the second and subsequent gain control, reception is performed using both the reception level before gain control and the reception level after gain control that are output until the time required for signal processing of the digital filter elapses. An average value of the levels is calculated, and gain control using the reception level as a reference value is performed based on the result. Thereby, compared with the gain control in a prior art example, there exists an effect that the highly accurate gain control after drawing can be implement | achieved.
[0124]
According to the next invention, even when the A / D converter overflows due to the appearance of the adjacent wave at the time of burst capture and uncertain data is output from the digital filter, by reducing the gain to a specific value unit, The configuration avoids the overflow condition immediately. As a result, the pull-in characteristic is not deteriorated, and an effect is achieved that high-speed pull-in of gain control can be realized.
[0125]
According to the next invention, since the sum of the number of integrations MR and the number of integrations MH is set to a power of 2, the division in the reception level average value calculating means can be realized by bit shift. The effect of becoming.
[0126]
According to the next invention, the reception level integration means integrates the reception level detected by the level detection means over MR times, and the reception level average value calculation means divides the integration result by the total number of integration MR, The average reception level is calculated. Thereby, there is an effect that the processing amount at the initial time can be significantly reduced as compared with the normal time.
[0127]
According to the next invention, by setting the number of integration MR to a power of two, there is an effect that the division in the reception level average value calculation means can be realized by bit shift here as well.
[0128]
According to the next invention, since the reception level ratio calculating means is constituted by the ROM, it is not necessary to perform complicated calculations in the division processing and the dB conversion processing, and therefore an effect of avoiding an increase in circuit scale can be achieved. .
[0129]
According to the next invention, since the voltage amplification factor calculating means and the voltage data generating means are constituted by the ROM, it is not necessary to perform a complex true number conversion calculation, so that an increase in circuit scale can be avoided. .
[0130]
According to the next invention, the ratio between the reception level and the reference level value is detected by the dB value, and the detected value is averaged, so that the circuit scale can be further reduced while maintaining the same level of performance. There is an effect.
[0131]
According to the next invention, it is possible to realize a good bit error rate characteristic in a short time after a burst signal is input by high-speed and high-accuracy automatic gain control.
[0132]
According to the next invention, there is an effect that a good bit error rate characteristic can be realized by high-speed gain control even at the time of burst capture in which the appearance and disappearance of adjacent waves are repeated.
[0133]
According to the next invention, since the sum of the number of integrations MR and the number of integrations MH is set to a power of 2, the division in the reception level average value calculating means can be realized by bit shift. The effect of becoming.
[0134]
According to the next invention, the reception level integration means integrates the reception level detected by the level detection means over MR times, and the reception level average value calculation means divides the integration result by the total number of integration MR, The average reception level is calculated. Thereby, there is an effect that the processing amount at the initial time can be significantly reduced as compared with the normal time.
[0135]
According to the next invention, by setting the number of integration MR to a power of two, there is an effect that the division in the reception level average value calculation means can be realized by bit shift here as well.
[0136]
According to the next invention, since the reception level ratio calculating means is constituted by the ROM, it is not necessary to perform complicated calculations in the division processing and the dB conversion processing, and therefore an effect of avoiding an increase in circuit scale can be achieved. .
[0137]
According to the next invention, since the voltage amplification factor calculating means and the voltage data generating means are constituted by the ROM, it is not necessary to perform a complex true number conversion calculation, so that an increase in circuit scale can be avoided. .
[0138]
According to the next invention, the internal automatic gain control device detects the ratio between the reception level and the reference level value by the dB value, and averages the detected value, so that the same level of performance is maintained. There is an effect that the circuit scale can be further reduced.
[0139]
According to the next invention, the signal amplification control in the digital filter can always ensure a large number of effective bits of the data of the digital filter output, so that an accurate soft decision can be realized regardless of the transmission rate. , Has the effect. Further, by the same signal amplification control, the reference level value can be kept constant regardless of the transmission rate, so that there is an effect that no adjustment can be achieved.
[0140]
According to the next invention, by adopting the soft decision processing for the data decision, there is an effect that the optimum data demodulation can be realized.
[Brief description of the drawings]
FIG. 1 is a diagram illustrating a configuration of a first embodiment of an automatic gain control device and a demodulator according to the present invention.
FIG. 2 is a diagram illustrating a configuration of a digital filter according to the first embodiment.
FIG. 3 is a diagram illustrating a configuration of a waveform shaping filter according to the first embodiment.
FIG. 4 is a timing chart showing the operation of the automatic gain control apparatus according to the first embodiment.
FIG. 5 is a diagram illustrating a configuration of a second embodiment of an automatic gain control device and a demodulator according to the present invention.
FIG. 6 is a diagram illustrating a frequency spectrum of a reception signal input to an A / D converter.
FIG. 7 is a diagram showing a configuration of a third embodiment of an automatic gain control device and a demodulator according to the present invention.
FIG. 8 is a diagram illustrating a configuration of a demodulator for a digital satellite communication system including a conventional automatic gain control device.
FIG. 9 is a diagram illustrating a configuration of a conventional digital filter.
FIG. 10 is a diagram for explaining the operation of a conventional automatic gain control apparatus.
11 is a diagram showing a configuration of a conventional digital filter different from FIG.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 Antenna, 2 gain variable amplifier, 3 Frequency conversion part, 4,5 A / D converter (A / D), 6,7 Digital filter, 8, 8a, 8b Automatic gain control apparatus, 9 D / A converter ( D / A), 10 detection unit, 21 level detection unit, 22 reception level integration unit, 22b reception level ratio integration unit, 23, 23a control unit, 24 reception level average value calculation unit, 24b reception level ratio average value calculation unit, 25 reception level ratio calculation unit, 26 gain control voltage data generation unit, 27, 27b gain control voltage amplification factor calculation unit, 31, 35, 39, 44, 72, 75, 77 adder, 32, 33, 40, 43, 73 D flip-flop, 34 multiplier, 36, 37, 74, 76, 78 divider, 38 dB converter, 41 limiter, 42, 45 true number conversion unit, 51 decimation filter, 5 Waveform shaping filter, 53a, 53b, 53c, 53d 3 dB amplification unit, 54 damping unit, 61 an overflow detector, 62 selecting unit, 71 level ratio detector.

Claims (18)

Level detection means for receiving baseband data output from the digital filter and detecting a reception level of the baseband data;
The detected reception level is integrated MH (MH is a natural number) times, the result is output as first integration data, and then the reception level is integrated MR (MR is a natural number) times, and the result is Receiving level integrating means for outputting as integral data of 2;
Multiplying the first integration data by predetermined amplification factor data, adding the multiplication result and the second integration data, and dividing the addition result by the total number of integrations (MH + MR) A reception level average value calculating means for calculating an average value and outputting the average value as reception level average data;
Control means for controlling the start / end timing of the integration operation and the latch timing of the first integration data;
A reception level ratio calculating means for calculating a ratio between a specific reference value and the reception level average data as a dB value and outputting the dB value as level ratio data;
The level ratio data is integrated within a predetermined range ± Td, and if the integration result is Td or more, the level ratio data integration value is Td, and if it is -Td or less, the level ratio data integration value is -Td, Voltage data generating means for outputting the true value of the level ratio data integral value as voltage data;
A voltage amplification factor calculating means for obtaining a difference value of the level ratio data integral value and outputting a true value of the difference value as the predetermined amplification factor data;
An automatic gain control device comprising: The reception level of the digital data output from the A / D converter is calculated, and when the value exceeds a certain threshold value, it is determined that the A / D converter has overflowed, and the determination result is used as an overflow detection signal. Overflow detection means for outputting;
Level detection means for receiving baseband data output from the digital filter and detecting a reception level of the baseband data;
The detected reception level is integrated MH (MH is a natural number) times, the result is output as first integration data, and then the reception level is integrated MR (MR is a natural number) times, and the result is Receiving level integrating means for outputting as integral data of 2;
Multiplying the first integration data by predetermined amplification factor data, adding the multiplication result and the second integration data, and dividing the addition result by the total number of integrations (MH + MR) A reception level average value calculating means for calculating an average value and outputting the average value as reception level average data;
A reception level ratio calculating means for calculating a ratio between a specific reference value and the reception level average data as a dB value and outputting the dB value as level ratio data;
When the overflow detection signal is output, a predetermined value specified in advance is selected. When the overflow detection signal is not output, the level ratio data is selected and the selection result is output as selection data. Selection means to
The selection data is integrated within a predetermined range ± Td, and if the integration result is Td or more, the selection data integration value is Td, and if it is -Td or less, the selection data integration value is -Td. Voltage data generating means for outputting the integral value of the integral value as voltage data;
A voltage amplification factor calculating means for obtaining a difference value of the selected data integral value and outputting a true value of the difference value as the predetermined amplification factor data;
When the overflow detection signal is output, the amplification factor data, the register in the reception level integration means, and the register in the reception level average value calculation means are reset, and the overflow detection signal is not output Control means for controlling the start / end timing of the integration operation and the latch timing of the first integration data;
An automatic gain control device comprising: 3. The automatic gain control device according to claim 1, wherein the sum of the integration number MR and the integration number MH takes a power of two. In the early days,
The reception level integration means integrates the reception level detected by the level detection means over MR times,
The reception level average value calculation means calculates the average value of the reception level by dividing the integration result by the total number of integrations MR,
4. The automatic gain control apparatus according to claim 1, wherein the control means controls a start / end timing of the integration operation. 5. The automatic gain control apparatus according to claim 4, wherein the number of integrations MR is a power of 2. 6. The automatic gain control apparatus according to claim 1, wherein the reception level ratio calculation means is constituted by a ROM. The automatic gain control device according to any one of claims 1 to 6, wherein a true number conversion part in the voltage amplification factor calculation means and the voltage data generation means is constituted by a ROM. Receive baseband data output from a digital filter, calculate a reception level of the baseband data, calculate a ratio between a specific reference value and the reception level as a dB value, and calculate the dB value as a reception level ratio A reception level ratio detection means for outputting as a detection value;
The dB value is integrated MH (MH is a natural number) times, and the result is output as first integration data. Thereafter, the dB value is integrated MR (MR is a natural number) times, and the result is integrated into the second value. Receive level ratio integration means for outputting as integration data;
A result of dividing the first integral data by the number of integrations MH to calculate a level ratio average value before gain control, and further adding predetermined amplification factor data (dB value) to the level ratio average value before gain control Is the first level ratio average value, and the result obtained by dividing the second integration data by the number of integrations MR is the second level ratio average value, and the first level ratio average value and the second level ratio A reception level ratio average value calculating means for outputting the result obtained by dividing the addition value with the average value by “2” as level ratio data;
Control means for controlling the start / end timing of the integration operation and the latch timing of the first integration data;
The level ratio data is integrated within a predetermined range ± Td, and if the integration result is equal to or greater than Td, the level ratio data integral value is set to Td. Voltage data generating means for outputting the true value of the integrated value of the level ratio data as voltage data;
A voltage amplification factor calculating means for obtaining a difference value of the level ratio data integral value and outputting the difference value as the predetermined amplification factor data;
An automatic gain control device comprising: An antenna for receiving an RF signal;
A gain control amplifier for controlling the gain of the RF signal by a gain control voltage;
Frequency conversion means for converting the frequency of the output signal of the gain control amplifier into a received baseband signal;
A / D conversion means for oversampling the received baseband signal and converting it to digital data;
A digital filter that removes adjacent wave components and noise components included in the digital data, performs waveform shaping on the received self-wave signal, and outputs the result as baseband data;
Using the baseband data, carrier frequency synchronization, carrier phase synchronization, and timing synchronization are established, then data is determined, and the detection means for outputting the result as demodulated data;
Level detection means for receiving the baseband data and detecting the reception level of the baseband data;
The detected reception level is integrated MH (MH is a natural number) times, the result is output as first integration data, and then the reception level is integrated MR (MR is a natural number) times, and the result is Receiving level integrating means for outputting as integral data of 2;
Multiplying the first integration data by predetermined amplification factor data, adding the multiplication result and the second integration data, and dividing the addition result by the total number of integrations (MH + MR) A reception level average value calculating means for calculating an average value and outputting the average value as reception level average data;
Control means for controlling the start / end timing of the integration operation and the latch timing of the first integration data;
A reception level ratio calculating means for calculating a ratio between a specific reference value and the reception level average data as a dB value and outputting the dB value as level ratio data;
The level ratio data is integrated within a predetermined range ± Td, and if the integration result is Td or more, the level ratio data integration value is Td, and if it is -Td or less, the level ratio data integration value is -Td, Voltage data generating means for outputting the true value of the level ratio data integral value as voltage data;
A voltage amplification factor calculating means for obtaining a difference value of the level ratio data integral value and outputting a true value of the difference value as the predetermined amplification factor data;
D / A conversion means for performing D / A conversion on the voltage data and outputting the converted analog signal as the gain control voltage;
A demodulator. An antenna for receiving an RF signal;
A gain control amplifier for controlling the gain of the RF signal by a gain control voltage;
Frequency conversion means for converting the frequency of the output signal of the gain control amplifier into a received baseband signal;
A / D conversion means for oversampling the received baseband signal and converting it to digital data;
A digital filter that removes adjacent wave components and noise components included in the digital data, performs waveform shaping on the received self-wave signal, and outputs the result as baseband data;
Using the baseband data, carrier frequency synchronization, carrier phase synchronization, and timing synchronization are established, then data is determined, and the detection means for outputting the result as demodulated data;
Overflow detection means for calculating the reception level of the digital data, and determining that the A / D conversion means has overflowed when the value is equal to or greater than a threshold value, and outputting the determination result as an overflow detection signal; ,
Level detection means for receiving baseband data output from the digital filter and detecting a reception level of the baseband data;
The detected reception level is integrated MH (MH is a natural number) times, the result is output as first integration data, and then the reception level is integrated MR (MR is a natural number) times, and the result is Receiving level integrating means for outputting as integral data of 2;
Multiplying the first integration data by predetermined amplification factor data, adding the multiplication result and the second integration data, and dividing the addition result by the total number of integrations (MH + MR) A reception level average value calculating means for calculating an average value and outputting the average value as reception level average data;
A reception level ratio calculating means for calculating a ratio between a specific reference value and the reception level average data as a dB value and outputting the dB value as level ratio data;
When the overflow detection signal is output, a predetermined value specified in advance is selected. When the overflow detection signal is not output, the level ratio data is selected and the selection result is output as selection data. Selection means to
The selection data is integrated within a predetermined range ± Td, and if the integration result is Td or more, the selection data integration value is Td, and if it is -Td or less, the selection data integration value is -Td. Voltage data generating means for outputting the integral value of the integral value as voltage data;
A voltage amplification factor calculating means for obtaining a difference value of the selected data integral value and outputting a true value of the difference value as the predetermined amplification factor data;
When the overflow detection signal is output, the amplification factor data, the register in the reception level integration means, and the register in the reception level average value calculation means are reset, and the overflow detection signal is not output Control means for controlling the start / end timing of the integration operation and the latch timing of the first integration data;
D / A conversion means for performing D / A conversion on the voltage data and outputting the converted analog signal as the gain control voltage;
A demodulator. The demodulator according to claim 9 or 10, wherein the sum of the integration number MR and the integration number MH takes a power of two. In the early days,
The reception level integration means integrates the reception level detected by the level detection means over MR times,
The reception level average value calculation means calculates the average value of the reception level by dividing the integration result by the total number of integrations MR,
The demodulator according to claim 9, 10 or 11, wherein the control means controls the start / end timing of the integration operation. The demodulator according to claim 12, wherein the integration number MR is a power of two. The demodulator according to any one of claims 9 to 13, wherein the reception level ratio calculating means comprises a ROM. The demodulator according to any one of claims 9 to 14, wherein a true number conversion part in the voltage amplification factor calculation means and the voltage data generation means is constituted by a ROM. An antenna for receiving an RF signal;
A gain control amplifier for controlling the gain of the RF signal by a gain control voltage;
Frequency conversion means for converting the frequency of the output signal of the gain control amplifier into a received baseband signal;
A / D conversion means for oversampling the received baseband signal and converting it to digital data;
A digital filter that removes adjacent wave components and noise components included in the digital data, performs waveform shaping on the received self-wave signal, and outputs the result as baseband data;
Using the baseband data, carrier frequency synchronization, carrier phase synchronization, and timing synchronization are established, then data is determined, and the detection means for outputting the result as demodulated data;
Reception that receives the baseband data, calculates a reception level of the baseband data, calculates a ratio between a specific reference value and the reception level as a dB value, and outputs the dB value as a reception level ratio detection value Level ratio detection means;
The dB value is integrated MH (MH is a natural number) times, and the result is output as first integration data. Thereafter, the dB value is integrated MR (MR is a natural number) times, and the result is integrated into the second value. Receive level ratio integration means for outputting as integration data;
A result of dividing the first integral data by the number of integrations MH to calculate a level ratio average value before gain control, and further adding predetermined amplification factor data (dB value) to the level ratio average value before gain control Is the first level ratio average value, and the result obtained by dividing the second integration data by the number of integrations MR is the second level ratio average value, and the first level ratio average value and the second level ratio A reception level ratio average value calculating means for outputting the result obtained by dividing the addition value with the average value by “2” as level ratio data;
Control means for controlling the start / end timing of the integration operation and the latch timing of the first integration data;
The level ratio data is integrated within a predetermined range ± Td, and if the integration result is equal to or greater than Td, the level ratio data integral value is set to Td. Voltage data generating means for outputting the true value of the integrated value of the level ratio data as voltage data;
A voltage amplification factor calculating means for obtaining a difference value of the level ratio data integral value and outputting the difference value as the predetermined amplification factor data;
D / A conversion means for performing D / A conversion on the voltage data and outputting the converted analog signal as the gain control voltage;
A demodulator. The digital filter is composed of a decimation filter and a waveform shaping filter,
When the decimation filter sets the number of decimations to m, the output data level after decimation is multiplied by 2 ^m ,
The demodulator according to any one of claims 9 to 16, wherein the waveform shaping filter divides data output from the decimation filter by the number of oversamples of the data. The demodulator according to any one of claims 9 to 17, wherein the detection means employs soft decision processing for data decision.

Images