JP3833136B2 - Semiconductor structure and bonding method - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor structure and a bonding method capable of reducing the thickness and size of a package.
[0002]
[Prior art]
FIG. 6 shows a conventional semiconductor structure. In the figure, 1 is a substrate for mounting a semiconductor chip such as a printed circuit board, a film substrate, and a lead frame, 2 is a semiconductor chip mounted on the substrate 1, 3 is an electrode pad formed on the periphery of the upper surface of the semiconductor chip 2, 4 Is an electrode pad for wiring formed on the substrate 1, and 5 is a metal wire such as a gold wire bonded between the electrode pads 3 and 4.
[0003]
The semiconductor structure shown in FIG. 6 is referred to as a so-called forward method in which a metal wire 5 is first primarily bonded to an electrode pad 3 on a semiconductor chip 2 and then secondarily bonded to an electrode pad 4 on a substrate 1. Wiring is performed by a wire bonding method.
[0004]
That is, in the forward method, a capillary (not shown) through which the metal wire 5 is inserted is positioned immediately above the electrode pad 3 of the semiconductor chip 2, and a ball is formed on the tip of the metal wire 5 protruding from the tip of the capillary by discharge from the discharge electrode. Then, the melted ball is primarily bonded to the electrode pad 3 by lowering the capillary and pressing it against the electrode pad 3, and then the capillary is directly above the electrode pad 4 on the substrate 1 along a predetermined trajectory. Then, the metal wire 5 is secondarily bonded to the electrode pad 4 at the capillary tip position by being lowered toward the electrode pad 4 at that position, and simultaneously pressing and applying ultrasonic waves.
[0005]
By the way, in the bonding method as described above, in order to give the metal wire 5 sufficient connection strength, the metal wire 5 is once raised in the vertical direction by a predetermined distance at the primary bonding position and then directed to the secondary bonding position. It is necessary to bend and wire. For this reason, in the case of the forward method in which the electrode pad 3 on the semiconductor chip 2 is the primary bonding point, the wire height h from the chip surface is increased by that much and cannot be further reduced in thickness. There was a drawback that the thickness of the completed semiconductor package would be increased.
[0006]
[Problems to be solved by the invention]
Conventionally, as one method for eliminating the above-described drawbacks, first, as shown in FIG. 7, first, a metal wire 5 is first bonded to the electrode pad 4 on the substrate 1, and then 2 to the electrode pad 3 of the semiconductor chip 2. A wire bonding method referred to as a reverse method for performing the next bonding is used.
[0007]
However, with recent increases in the density and multi-electrodes of semiconductor chips, electrode pads are not only arranged in a single line along the upper surface periphery of the semiconductor chip, but also in a double or triple array on the inner side. Array electrodes have been adopted. In the case of a semiconductor chip having such multiple array electrodes, even if wire bonding is performed using the forward method or the reverse method, it is bonded to the outer electrode pad 3a as shown in FIGS. 8 and 9, for example. There is no problem with the metal wire 5a, but the metal wire 5b connected to the inner electrode pad 3b has a sufficient distance between the wires to avoid contact with the metal wire 5a bonded to the outer electrode pad 3a. Bonding must be performed by a forward method that allows a large distance between wires. For this reason, it has been difficult to reduce the wire height h from the chip surface to a certain level.
[0008]
The present invention has been made in order to solve the above-described problem, and it is possible to reduce the height of the wire from the chip surface even in the case of multiple array electrodes, and to reduce the package thickness and size. An object of the present invention is to provide a bonding method.
[0009]
[Means for Solving the Problems]
In order to achieve the above object, the present invention employs the following means.
That is, the semiconductor structure according to claim 1 is formed in a state where one or a plurality of metal bumps are stacked on the electrode pad of the semiconductor chip mounted on the substrate, and the uppermost layer of the stacked metal bumps. metal bump top and the electrode pads on the substrate or with between electrode pads of the uppermost metal bumps top surface and another semiconductor chip of the stacked metal bumps are bonded by metal wire, and the metal bump top A metal bump is further formed on the bonded metal wire, and an electrode pad of a flip chip type semiconductor chip is bonded to the metal bump .
[0010]
According to a second aspect of the present invention , there is provided a bonding method in which a metal bump is formed on an electrode pad of a semiconductor chip mounted on a substrate, and this is repeated once or a plurality of times. After forming a plurality of metal bumps in a stacked state, the upper surface of the stacked metal bumps has a secondary bonding point on the upper surface of the metal bump and a primary bonding point on an electrode pad on the substrate or another semiconductor electrode pad. These are bonded with a metal wire, then a metal bump is further formed on the metal wire bonded to the upper surface of the metal bump, and an electrode pad of a flip chip type semiconductor chip is bonded to the metal bump. It is characterized by this.
[0011]
When the semiconductor structure and bonding method as described above are employed, the wire height from the chip surface can be freely adjusted by the number of stacked metal bumps. For this reason, even in the case of multiple array electrodes, the wire height from the chip surface can be adjusted by the number of metal bumps, and the semiconductor package can be made thinner and smaller. In addition, a metal bump is further formed on the metal wire bonded to the upper surface of the metal bump, and an electrode pad of a flip chip type semiconductor is bonded to the metal bump, so that a composite having a wire bonding structure and a flip chip structure is provided. A type of semiconductor device can be easily manufactured.
[0012]
DETAILED DESCRIPTION OF THE INVENTION
First, before describing embodiments of the present invention, reference forms necessary for realizing the semiconductor structure and bonding method of the present invention will be described.
[0013]
FIG. 1 is a first reference embodiment for realizing a semiconductor structure according to the present invention. This first reference embodiment shows a basic form of a semiconductor structure necessary for realizing a semiconductor structure according to the present invention. Three metal bumps 7 are provided in three stages on an electrode pad 3 of a semiconductor chip 2. The upper surface of the three metal bumps 7 stacked in three stages is a secondary bonding point, and the electrode pad 4 on the substrate 1 is a primary bonding point. Bonded. In addition, the same code | symbol was attached | subjected and shown to the part same as the prior art example mentioned above.
[0014]
When such a semiconductor structure, by changing the number of metal bumps 7, it is possible to vary the wire height h from the chip surface freely, the electrode pads 3 of the semi-conductor chip 2 is the upper surface of the semiconductor chip 2 It is possible to minimize the wire height h from the chip surface even in the case of multiple array electrodes arranged not only in a line along the periphery but also double or triple inside. Note that the number of stacked metal bumps 7 is not limited to the three shown in the figure, but is determined according to the specifications of the semiconductor device to be manufactured.
[0015]
The ball bindings method for obtaining the semiconductor structure of FIG 1 shown in FIG. The bonding method shown in FIG. 2 can be realized by using an existing wire bonding apparatus that has been conventionally used, as described below.
[0016]
First, as shown in (a), a capillary 8 through which a metal wire 5 such as a gold wire is inserted is positioned immediately above the electrode pad 3 of the semiconductor chip 2 and protrudes from the tip of the capillary by discharge from the discharge electrode 9. A ball 6 is formed at the tip of the metal wire 5.
[0017]
Next, as shown in (b), the capillary 8 is lowered and the molten ball 6 is pressed against the electrode pad 3 to be fused, and then the metal wire 5 is clamped by a clamp (not shown) as shown in (c). The metal bumps 7 are formed on the metal pads 3 by pulling the capillaries 8 upward while being held and tearing the metal wires 5. By repeating the above operation a required number of times, for example, three times in the case of the example shown in FIG. 2, three metal bumps 7 stacked on the metal pad 3 in three stages are formed as shown in FIG.
[0018]
Next, using the electrode pad 4 on the substrate 1 as the primary bonding point and the upper surface of the uppermost metal bump 7 of the three metal bumps 7 stacked in the three steps as the secondary bonding point, the metal wire is formed by the reverse method described above. 5 is bonded.
[0019]
That is, first, as shown in (e), the capillary 8 through which the metal wire 5 is inserted is positioned immediately above the electrode pad 4 of the substrate 1, and the tip of the metal wire 5 protruding from the tip of the capillary due to the discharge from the discharge electrode 9. A ball 6 is formed on the surface.
[0020]
Next, as shown in (f), the capillary 8 is lowered, the molten ball 6 is pressed against the electrode pad 4 and fused, and then the capillary 8 is raised vertically by a predetermined distance to (g). As shown, it is moved along a predetermined locus toward the electrode pad 3 of the semiconductor chip 2 which is a secondary bonding point. Then, when it reaches directly above the electrode pad 3, the capillary 8 is lowered again, and ultrasonic waves are applied while pressing the metal wire 5 against the upper surface of the uppermost metal bump of the three metal bumps 7 with a predetermined pressure. The metal wire 5 is secondarily bonded to the upper surface of the uppermost metal bump 7 at the capillary tip position.
[0021]
Next, as shown in (h), by pulling up the capillary 8 with the metal wire 5 held by a clamp (not shown), the metal wire 5 is torn off and the secondary bonding is completed. In this way, the wire bonding structure shown in FIG. 1 is completed.
[0022]
FIG. 3 also shows a second reference form for realizing the semiconductor structure of the present invention. The second reference form shows an example in the case of a semiconductor device in which the metal pads 3a and 3b of the semiconductor chip 2 are arranged in two rows inside and outside.
[0023]
In the case of this example, the first electrode pad 3a located on the outer periphery of the upper surface of the semiconductor chip 2 and the corresponding electrode pad 4a on the substrate 1 are subjected to primary bonding as in the conventional case. On the other hand, wire bonding is performed by a reverse method using the electrode pad 3a of the semiconductor chip 2 as a secondary bonding point.
[0024]
On the other hand, with respect to the second electrode pad 3b located inside the upper surface periphery of the semiconductor chip 2 and the corresponding electrode pad 4b on the substrate 1, the metal bumps 7 are stacked on the electrode pad 3b of the semiconductor chip 2 in two stages. After the formation, the metal wire 5b was wire-bonded by the reverse method using the electrode pad 4b on the substrate 1 as a primary bonding point and the upper surface of the uppermost metal bump 7 of the metal bumps 7 stacked in the second step as the secondary bonding point. Is.
[0025]
In the case of the semiconductor structure as described above, the wire height h from the chip surface can be reduced despite the fact that the electrode pads 3a and 3b of the semiconductor chip 2 are arranged in two rows inside and outside. Compared with the semiconductor device, the package can be made thinner and smaller.
[0026]
FIG. 4 shows a third reference embodiment for realizing the semiconductor structure of the present invention. The third reference embodiment is the same as the second embodiment in the case where a high electronic component 10 is mounted between the semiconductor chip 2 and the electrode pad 4a on the substrate 1. An example is given.
[0027]
As described above, when the electronic component 10 having a high height is mounted between the semiconductor chip 2 and the electrode pad 4a on the substrate 1, the metal wire 5a contacts the electronic component 10 in the normal reverse method. However, when the structure as in the third embodiment is used, the metal bumps 7 are formed on the first electrode pads 3a located on the outer periphery of the upper surface of the semiconductor chip 2 as shown in the figure. After forming the number of steps (1 in the illustrated example), the metal wire 5a is bonded using the electrode pad 4a on the substrate 1 as the primary bonding point and the upper surface of the metal bump 7 formed on the electrode pad 3a as the secondary bonding point. do it.
[0028]
In the case of the semiconductor structure as described above , even when other electronic components are mounted between the semiconductor chip and the electrode pads on the substrate, the wire height from the chip surface is avoided while avoiding this electronic component. h can be set as low as possible.
[0029]
Next, FIG. 5 shows an embodiment of the semiconductor structure of the present invention realized on the basis of each of the above reference embodiments. In this embodiment, another semiconductor chip is flip-chip mounted on the semiconductor chip 2 wire-bonded by the bonding method illustrated in FIG. 2 using metal bumps .
[0030]
That is, the metal bumps 7 is formed on the electrode pad 3 of the semiconductor chip 2 is mounted on the base plate 1, the electrode pads 4 on the substrate 1 primary bonding point, the metal bumps 7 as a secondary bonding point after bonding the metal wires 5, further formed by stacking a metal bump 7 in two stages on the secondary bonding point of this, on the metal bumps 7 was superposed the overall 3-step, flip-chip semiconductor chip 11 is mounted in a state where the electrode pads 12 are in contact with the metal bumps 7, and the semiconductor chip 11 is flip-chip mounted on the semiconductor chip 2 by applying heat or the like in this state . In the case of such a semiconductor structure , a composite type semiconductor device having a wire bonding structure and a flip chip structure can be easily manufactured.
[0031]
In the above embodiment, the case where the electrode pads 3 of the semiconductor chip 2 and the electrode pads 4 on the substrate 1 are connected has been described as an example. However, the bonding points are not limited to these. The electrode pads of the semiconductor chips mounted on the substrate can also be connected. In this case, the electrode pads of the semiconductor chip on which the metal bumps are stacked serve as secondary bonding points, and the electrode pads of other semiconductor chips serve as primary bonding points.
[0032]
【The invention's effect】
As described above, according to the present invention, the metal bumps are formed on the electrode pads of the semiconductor chip, and the electrode wires are bonded on the metal bumps, so that the wire height from the chip surface can be freely set. Can be adjusted. For this reason, even when the electrode pads of the semiconductor chip are arranged in multiple layers, the height of the wire from the chip surface can be made as low as possible, and the semiconductor package can be made thinner and smaller. . In addition, a metal bump is further formed on the metal wire bonded to the upper surface of the metal bump, and an electrode pad of a flip chip type semiconductor is bonded to the metal bump. The composite type semiconductor device provided can be easily manufactured. Furthermore, since bonding can be performed using an existing wire bonding apparatus, the capital investment can be reduced, and the semiconductor package can be made thinner and smaller while suppressing an increase in cost.
[Brief description of the drawings]
FIG. 1 is a schematic side view showing a first reference form of a semiconductor structure necessary for realizing a semiconductor structure according to the present invention.
2A to 2H are explanatory views of a bonding method for obtaining a semiconductor structure according to the reference embodiment of FIG.
FIG. 3 is a schematic side view showing a second reference form of the semiconductor structure necessary for realizing the semiconductor structure according to the present invention.
FIG. 4 is a schematic side view showing a third embodiment of a semiconductor structure necessary for realizing a semiconductor structure according to the present invention.
FIG. 5 is a schematic side view showing an embodiment of a semiconductor structure according to the present invention.
FIG. 6 is a schematic side view showing a first example of a conventional semiconductor structure.
FIG. 7 is a schematic side view showing a second example of a conventional semiconductor structure.
FIG. 8 is a schematic side view showing a third example of a conventional semiconductor structure.
FIG. 9 is a schematic side view showing a fourth example of a conventional semiconductor structure.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 Substrate 2 Semiconductor chip 3, 3a, 3b Electrode pad of semiconductor chip 4, 4a, 4b Electrode pad of substrate 5, 5a, 5b Metal wire 6 Ball 7 Metal bump 8 Capillary 9 Discharge electrode 10 Electronic component 11 Flip chip type semiconductor Chip 12 Flip chip type semiconductor chip electrode pad

Claims (2)

One or a plurality of metal bumps are stacked on an electrode pad of a semiconductor chip mounted on a substrate, and an upper surface of the uppermost metal bump of the stacked metal bumps and an electrode pad on the substrate, or said with between electrode pads of the uppermost metal bumps top surface and another semiconductor chip are bonded with the metal wire of the stacked metal bumps, further metal bumps on the bonding metal wires to the metal bump top And a flip-chip semiconductor chip electrode pad is bonded to the metal bump . Metal bumps are formed on the electrode pads of the semiconductor chip mounted on the substrate, and one or more metal bumps are stacked on the electrode pads of the semiconductor chip by repeating this once or multiple times. After that, the upper surface of the stacked metal bumps is bonded to the upper surface of the metal bump as a secondary bonding point, and the electrode pad on the substrate or the electrode pad of another semiconductor is used as the primary bonding point. Next, a metal bump is further formed on the metal wire bonded to the upper surface of the metal bump, and an electrode pad of a flip chip type semiconductor chip is bonded to the metal bump .

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