JP3854350B2 - Semiconductor device - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor chip and a semiconductor device using the same, and more particularly to a technique effective when applied to a layout of chip electrodes formed on a semiconductor chip.
[0002]
[Prior art]
Along with the increase in functionality of semiconductor devices, the number of semiconductor chips used in the semiconductor devices has increased, and the chip sizes have also varied. If the semiconductor chips 90 and 100 are different in size when formed along the outer periphery of the chip, the layout of the chip electrodes 91 and 101 is different in both pitch and size (FIG. 9).
[0003]
Examples of the detailed description of the chip electrode layout of the semiconductor chip include, for example, published by Nikkan Kogyo Shimbun, “CMOS Device Handbook” (issued September 29, 1987), P482 to P486.
[0004]
[Problems to be solved by the invention]
As described above, since the layout of the chip electrodes varies, it is necessary to prepare many patterns for the chip connection material such as a lead frame on which the semiconductor chip is mounted. Accordingly, the types of chip connection materials increase in proportion to the increase in the types of semiconductor chips, making it difficult to standardize.
[0005]
As a result, the cost per chip connecting material increases, and as a result, the cost of the semiconductor device itself using the chip connecting material increases.
[0006]
SUMMARY OF THE INVENTION An object of the present invention is to provide a technique capable of applying a common chip connecting material to semiconductor chips having different chip sizes.
[0007]
The above and other objects and novel features of the present invention will be apparent from the description of this specification and the accompanying drawings.
[0008]
[Means for Solving the Problems]
Of the inventions disclosed in the present application, the outline of typical ones will be briefly described as follows.
[0009]
That is, the semiconductor device of the present invention is a semiconductor device having a semiconductor chip on which an integrated circuit and a plurality of chip electrodes for transferring signals between the integrated circuit and the outside through a plurality of bumps are formed, The chip electrode is formed in a chip electrode formed on another semiconductor chip having a different size from the semiconductor chip, and the same continuous grid shape and the same pitch on the basis of the center point of each semiconductor chip. The bump is formed on each of the plurality of chip electrodes, and the bump of the semiconductor chip includes a lead formed on one main surface and another main surface connected to the lead and facing the one main surface. extending is connected to the leads of the resin substrate having a through-hole wiring, the through-hole wiring, on a straight line from the one main surface of a resin substrate to said other major surface Biteori, more said other main surface of the resin substrate in which a plurality of bumps connected to said through-hole wiring is provided.
[0010]
The semiconductor chip used in the semiconductor device of the present invention can be electrically connected by flip chip connection via bumps or wire connection via bonding wires. The chip electrode can be formed of aluminum.
[0012]
According to the above-described means, since the chip electrodes formed on the semiconductor chips having different sizes are arranged in the same manner, a common chip connecting material can be applied to the semiconductor chips having different chip sizes.
[0013]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. Note that members having the same function are denoted by the same reference symbols throughout the drawings for describing the embodiments, and the repetitive description thereof will be omitted.
[0014]
(Embodiment 1)
1 is a plan view showing a semiconductor chip according to an embodiment of the present invention, FIG. 2 is a cross-sectional view showing a semiconductor device configured using the semiconductor chip of FIG. 1, and FIG. 3 is a schematic view of the semiconductor device of FIG. FIG.
[0015]
In the case shown in FIG. 1A, a (P _x1 × P _y1 ) size semiconductor chip 10 formed with a predetermined integrated circuit is provided with, for example, Al for exchanging signals between the integrated circuit and the outside. A plurality of chip electrodes 11 made of (aluminum) are formed in a grid pattern near the center. The tip electrode 11, A _1, A ₂ in the transverse direction, at a pitch of · · · A _n, the vertical direction B _1, B _2, are respectively arranged at a pitch of · · · B _n.
[0016]
On the other hand, in the case shown in FIG. 1B, the semiconductor chip 20 has a smaller size (P _x2 × P _y2 ) than that in FIG. However, the chip electrode 21 of the semiconductor chip 20 has the same arrangement as that of the semiconductor chip 10. In other words, just as the case shown in FIG. 1 (a), the tip electrode 21 are arranged in a square shape corresponding to the outer shape chip inboard, A _1, A ₂ transversely of · · · A _n, It is formed with a pitch of B ₁ , B ₂ ,... B _{n in} the vertical direction, and has the same size as the chip electrode 11. However, the electrode sizes may be different from each other.
[0017]
As described above, the chip electrode 11 of the semiconductor chip 10 and the chip electrode 21 of the semiconductor chip 20 are formed with the same layout shape and the same pitch with respect to the center point of the semiconductor chip. ) And (b), even if the chip sizes are different as shown by the two-dot chain line, the respective chip electrodes 11 and 21 are completely aligned in position.
[0018]
A semiconductor device 1a using the semiconductor chip 10 of FIG. 1A is shown in FIGS. 2A and 3A, and a semiconductor device 1b using the semiconductor chip 20 of FIG. 1B is shown in FIG. It shows in b) and FIG.3 (b), respectively. For convenience, the mold sealing portion is omitted in FIG. In the illustrated example, the BGA (Ball Grid Array) type semiconductor devices 1a and 1b are used, but other types of semiconductor devices such as a CSP (Chip Size Package) may be used.
[0019]
In the semiconductor device 1a shown in FIGS. 2A and 3A, the semiconductor chip 10 is mounted on the package substrate 3 by the adhesive resin 28 and molded and sealed with the thermosetting resin 4. The semiconductor chip 10 and the printed circuit board are electrically connected to each other through the bumps 5 provided on the substrate.
[0020]
For example, a lead (chip connecting material) 6 made of, for example, Cu (copper) is formed on one surface of the package substrate 3 made of epoxy resin, and the lead 6 is a through hole formed through the package substrate 3. 7 is electrically connected to a bump 5 made of, for example, Pb / Sn (lead / tin) provided over the entire area of the other surface via a contact metal 8 having conductivity. The semiconductor chip 2 is flip-chip connected to the above-described leads 6 by bumps 29. Therefore, when such a semiconductor device 1 a is mounted, the semiconductor chip 2 is electrically connected to the printed circuit board via the bumps 29, the leads 6, the contact metal 8 and the bumps 5. Both surfaces of the package substrate 3 are covered with insulating protective masks 15 leaving the bumps 5 to block the inside of the apparatus from the external atmosphere.
[0021]
The semiconductor device 1b of FIG. 2B and FIG. 3B in which the semiconductor chip 20 is sealed also has the same structure as the semiconductor device 1a.
[0022]
In addition, including the case shown in the second embodiment, the lead 6 as the chip connecting material is printed on the package substrate 3, but a lead frame formed by punching or etching a plate metal is applied. May be.
[0023]
Here, as described above, although the semiconductor chip 10 and the semiconductor chip 20 have different chip sizes, the chip electrodes 11 and 21 are arranged so as to coincide with the center point of the semiconductor chip as a reference. Therefore, as shown in FIGS. 3A and 3B, bumps can be connected to each other at the same position.
[0024]
As described above, the chip electrodes 11 and 21 formed on the semiconductor chips 10 and 20 having different sizes have the same layout shape and the same pitch, so that the semiconductor chips 10 and 20 having different chip sizes are the same. It is possible to perform flip chip connection. Therefore, it is not necessary to prepare the package substrate 3 in accordance with the bump positions of the semiconductor chips 10 and 20 having various specifications, and the standardization thereof can be achieved, and the cost of the semiconductor devices 1a and 1b can be reduced. .
[0025]
(Embodiment 2)
FIG. 4 is a cross-sectional view showing a semiconductor device constituted by using a semiconductor chip according to another embodiment of the present invention, and FIG. 5 is a perspective view showing a principal part of FIG.
[0026]
4A and FIG. 5A, the semiconductor chip 10 shown in FIG. 1A is shown. In FIGS. 4B and 5B, the semiconductor chip 10 shown in FIG. Each semiconductor chip 20 is mounted.
[0027]
Also in the present embodiment, the semiconductor chip 10 is mounted on the package substrate 3 and molded and sealed with the thermosetting resin 4, and the semiconductor chip 10 and the printed circuit board are electrically connected via the bumps 5. The
[0028]
The semiconductor chip 2 is connected to the leads 6 by bonding wires 9. Note that the semiconductor device 1b of FIGS. 4B and 5B in which the semiconductor chip 20 is sealed has the same structure as the semiconductor device 1a.
[0029]
As described above, when the semiconductor chip and the lead 6 are connected by wire, as shown in FIGS. 5A and 5B, the distance from the bonding position of the lead 6 to the respective chip electrodes 11 and 21 is mutual. It becomes possible to connect with each other by the same bonding pattern. When leads are directly connected like TAB, the leads used for the semiconductor chip 10 and the semiconductor chip 20 have the same shape.
[0030]
Therefore, it is possible to apply a common chip connecting material to the semiconductor chips 10 and 20 having different chip sizes, and it is not necessary to individually prepare them for the semiconductor chips 10 and 20 having various specifications. Can be achieved. As a result, the cost increase can be suppressed by minimizing the number of controllers of the chip connection material, and the costs of the semiconductor devices 1a and 1b using the chip connection material can be reduced.
[0031]
As mentioned above, the invention made by the present inventor has been specifically described based on the embodiment. However, the invention is not limited to the embodiment, and various modifications can be made without departing from the scope of the invention. Needless to say.
[0032]
For example, in the present embodiment, the chip electrodes 11 and 21 are formed near the center of the semiconductor chips 10 and 20 so as to form a quadrangle parallel to the outer shape of the chip. However, the present invention is not limited to this. That is, as shown in the semiconductor chips 30 and 40 of FIG. 6, the arrangement shape of the chip electrodes 11 and 21 is changed to 90 ° by the arrangement shape of the chip electrodes 31 and 41, or as shown in the semiconductor chips 50 and 60 of FIG. Thus, as shown in the array shape of the chip electrodes 51 and 61 with the central portion removed from the array shape of the chip electrodes 11 and 21, or the semiconductor chips 70 and 80 in FIG. An array shape may be considered.
[0033]
Further, in the above description, the case where the invention mainly made by the present inventor is applied to the BGA has been described. However, as described above, the invention can be applied to various other types of semiconductor devices. In particular, it is advantageous for standardization of small packages such as TAB, KGD, and CSP, and standardization of chip connection materials.
[0034]
【The invention's effect】
Among the inventions disclosed in the present application, effects obtained by typical ones will be briefly described as follows.
[0035]
(1) According to the present invention, when semiconductor chips are flip-chip connected, it is possible to perform the same flip-chip connection to semiconductor chips of different chip sizes. Therefore, it is not necessary to prepare a package substrate having a chip connecting material matched to the bump positions of semiconductor chips of various specifications, and standardization thereof can be achieved.
[0036]
(2) Further, according to the present invention, when semiconductor chips are wire-connected, it is possible to apply a chip connecting material having a common size to semiconductor chips having different chip sizes. Therefore, it is not necessary to prepare chip connection materials of different sizes according to semiconductor chips of various specifications, and standardization thereof can be achieved.
[0037]
(3) By the above (1) and (2), the cost increase can be suppressed by minimizing the number of controllers of the chip connection material, and the cost of the semiconductor device using the chip connection material can be reduced. Can be achieved.
[Brief description of the drawings]
1A and 1B are plan views showing a semiconductor chip according to an embodiment of the present invention.
2A and 2B are cross-sectional views illustrating a semiconductor device configured using the semiconductor chip of FIG.
3A and 3B are perspective views schematically showing the semiconductor device of FIG.
4A and 4B are cross-sectional views showing a semiconductor device according to a second embodiment of the present invention.
5 (a) and 5 (b) are perspective views showing a main part of FIG.
6A and 6B are plan views showing a semiconductor chip which is a modified example of the present invention.
7A and 7B are plan views showing a semiconductor chip according to another modification of the present invention.
8A and 8B are plan views showing a semiconductor chip which is still another modification of the present invention.
FIGS. 9A and 9B are plan views showing a semiconductor chip to be studied by the present inventors. FIG.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1a Semiconductor device 1b Semiconductor device 2 Semiconductor chip 3 Package substrate 4 Resin 5 Bump 6 Lead (chip connection material)
7 Through hole 8 Contact metal 9 Bonding wire 10 Semiconductor chip 11 Chip electrode 15 Protective mask 20 Semiconductor chip 21 Chip electrode 28 Adhesive resin 29 Bump 30 Semiconductor chip 31 Chip electrode 40 Semiconductor chip 41 Chip electrode 50 Semiconductor chip 51 Chip electrode 60 Semiconductor chip 61 chip electrode 70 semiconductor chip 71 chip electrode 80 semiconductor chip 81 chip electrode 90 semiconductor chip 91 chip electrode 100 semiconductor chip 101 chip electrode

Claims (2)

A semiconductor device having an integrated circuit and a semiconductor chip on which a plurality of chip electrodes that exchange signals between the integrated circuit and the outside via a plurality of bumps are formed, wherein the chip electrode is connected to the semiconductor chip Chip electrodes formed on other semiconductor chips having different sizes and the same continuous grid shape and the same pitch on the basis of the center point of each of the semiconductor chips are formed on each of the plurality of chip electrodes. The bump of the semiconductor chip has a lead formed on one main surface and a through-hole wiring connected to the lead and extending to another main surface facing the one main surface. connected to said leads, said through-hole wiring extends in a straight line from the one main surface of a resin substrate to said other main surface, before further of the resin substrate The semiconductor device in the other main surface, wherein a plurality of bumps connected to said through-hole wiring is provided.   2. The semiconductor device according to claim 1, wherein the chip electrode is made of aluminum.

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