JP3879944B2 - Image signal encoding method, image signal encoding device, and image signal transmission method - Google Patents

Description

による平均値演算を行い、図２（Ｂ）で示す第２階層の１画素（例えばＹ₁₁）を生成する。なお、画素Ｙ₁₃、Ｙ₃₁、……も第１階層の４画素平均により、同様に生成される。
【００１８】
同様に、平均化回路２４６は、図２（Ｂ）に示すような第２階層のブロツク内の４画素（例えばＹ₁₁、Ｙ₁₃、Ｙ₃₁、Ｙ₃₃）を用いて、次式、
【数２】

による平均値演算を行い、図２（Ｃ）で示す第３階層の１画素（例えばＺ₁₁）を生成する。なお、画素Ｚ₁₅、Ｚ₅₁、……も第２階層の４画素平均により、同様に生成される。
【００１９】
間引き回路２４２、２４５は、ブロツク化回路２４１からのブロツク化データＤ２３２及びブロツク化回路２４４からのブロツク化データＤ２３４をそれぞれ受信し、４画素で構成されるブロツク化データＤ２３２、Ｄ２３４のうち１画素を取り除き、各ブロツクにつき取り除かれた１画素を除く残り３画素で構成される間引きデータＤ２３６、Ｄ２３７を形成し、この間引きデータＤ２３６、Ｄ２３７を量子化回路２４７、２４８にそれぞれ送出する。すなわち、間引き回路２４２は、図２（Ｃ）の点線で示すような画素Ｘ₁₁、Ｘ₁₃、……を間引きにより削除し、間引き回路２４５は、図２（Ｂ）の点線で示すような画素Ｙ₁₁、Ｙ₁₅、……を間引きにより削除する。
【００２０】
従つて、第１階層の量子化回路２４７及び第２階層の量子化回路２４８の量子化対象となる画素は、図２（Ｃ）及び図２（Ｂ）の実線で示される画素Ｘ₁₂、Ｘ₂₁、Ｘ₂₂、……やＹ₁₃、Ｙ₃₁、Ｙ₃₃……であり、第１階層について見れば、第１階層の全ての画素を量子化して伝送する場合と比較して、伝送画素数を 3/4に低減できる。また、第２階層について見れば、平均演算により生成された第２階層の全ての画素を量子化して伝送する場合と比較して、伝送画素数を3/4 に低減する。
【００２１】
また、全体的に見れば、画像信号符号化装置２４０においては、第１階層画像データＤ２３１のみを圧縮して伝送する場合と比較して、等しい伝送画素数で、複数階層の画像データを伝送することができるようになされている。この結果、画像信号符号化装置２４０は、伝送情報量を増加させずに、複数階層の画像データを伝送することができる。なお、間引き回路２４２、２４５において間引かれた画素は、後述する復号側（受信側）で簡単な算術式を用いて復元することができる。
【００２２】
量子化回路２４７、２４８及び２４９は、それぞれ間引きデータＤ２３６、Ｄ２３７及び第３階層画像データＤ２３５の各画素（８ビツト）を、例えば２ビツトで再量子化して情報量を圧縮する。
【００２３】
このとき、量子化回路２４７、２４８、２４９のそれぞれは、歪み最小規範に従つて各画素を量子化するのではなく、量子化誤差の極性が正極性及び負極性の両方に振れるような２通りの量子化を行う。歪み最小規範に従つた量子化とは、後述するが、量子化誤差を最小とするために従来一般的に用いられている量子化手法である。そして、量子化回路２４７は、正極性再量子化データＤ２３８Ａ及び負極性再量子化データＤ２３８Ｂを、量子化回路２４８は、正極性再量子化データＤ２３９Ａ及び負極性再量子化データＤ２３９Ｂを、量子化回路２４９は、正極性再量子化データＤ２４０Ａ及び負極性再量子化データＤ２４０Ｂをそれぞれ生成する。そしてこれら再量子化データＤ２３８Ａ及びＤ２３８Ｂ、Ｄ２３９Ａ及びＤ２３９Ｂ、Ｄ２４０Ａ及びＤ２４０Ｂをセレクタ２５４、２５５、２５６にそれぞれ送出する。
【００２４】
セレクタ２５４、２５５、２５６には、画像信号符号化装置２４０の全体を制御するコントローラ２５７から出力される画素クロツク信号ＣＬＫ１、ＣＬＫ２、ＣＬＫ３がそれぞれ入力され、セレクタ２５４、２５５、２５６は、そのクロツク信号が入力されるタイミングで交互に正極性再量子化データＤ２３８Ａ又は負極性再量子化データＤ２３８Ｂ、正極性再量子化データＤ２３９Ａ又は負極性再量子化データＤ２３９Ｂ、正極性再量子化データＤ２４０Ａ又は負極性再量子化データＤ２４０Ｂを選択し、選択された再量子化データを再量子化データＤ２３８、Ｄ２３９、Ｄ２４０として可変長符号化回路（ＶＬＣ）２５０、２５１、２５２にそれぞれ送出する。実際上、コントローラ２５７から出力される画素クロツク信号ＣＬＫ１〜ＣＬＫ３は、下位階層から上位階層に行くに従つて、画素クロツク周波数が１／４ずつ小さくなつているので、画素クロツク信号ＣＬＫ１〜ＣＬＫ３は、画素クロツク信号ＣＬＫ１の周波数をｆとすると、画素クロツク信号ＣＬＫ２の周波数はｆ／４に、画素クロツク信号ＣＬＫ３の周波数はｆ／１６に選定されている。
【００２５】
ここで、量子化回路２４７〜２４９について、図３を用いて具体的に説明する。図３は、入力されるデータが１画素当り８ビツトのデータであり、かつ０〜２５５までのレベルをとり得る場合に、０〜６３のレベルの画素には量子化値「０」を出力し、６４〜１２７のレベルの画素には量子化値「１」を出力し、１２８〜１９１のレベルの画素には量子化値「２」を出力し、１９２〜２５５のレベルの画素には量子化値「３」を出力するような２ビツト量子化を表わすものである。これは、歪み最小規範と呼ばれ、量子化誤差を最小とするために従来一般的に用いられている手法である。
【００２６】
第１実施例の量子化回路２４７〜２４９は、この歪み最小規範を用いずに、入力される各画素について、量子化誤差が正極性及び負極性となる２通りの量子化を行う。例えば、量子化回路２４７〜２４９に入力された画素データが、図３に示されるようなＬ１のようなレベルにあつた場合、量子化回路２４７〜２４９のそれぞれは、第１に、量子化誤差が正極性となるように（図３では＋δ１）すなわち正極性再量子化データＤ２３８Ａ、Ｄ２３９Ａ、Ｄ２４０Ａとして量子化値「３」を出力し、第２に、量子化誤差が負極性となるように（図３では−δ２）すなわち負極性再量子化データＤ２３８Ｂ、Ｄ２３９Ｂ、Ｄ２４０Ｂとして量子化値「２」を出力する。
【００２７】
同様に、入力された画素データが図３で示されるようなＬ２のようなレベルにあつた場合、量子化回路２４７〜２４９のそれぞれは、正極性再量子化データＤ２３８Ａ、Ｄ２３９Ａ、Ｄ２４０Ａとして量子化値「２」を出力し、負極性再量子化データＤ２３８Ｂ、Ｄ２３９Ｂ、Ｄ２４０Ｂとして量子化値「１」を出力する。
【００２８】
また、間引き回路２４２、量子化回路２４７及びセレクタ２５４には図２（Ｃ）の各画素が点線で示すブロツク単位で順次入力される。例えばＸ₁₂、Ｘ₂₁、Ｘ₂₂、Ｘ₁₄、Ｘ₂₃、Ｘ₂₄、……の順で入力される。したがつて、セレクタ２５４は、コントローラ２５７からのクロツク信号ＣＬＫ１に基づいて、ブロツク内の画素毎に正極性の誤差を持つように量子化された再量子化データＤ２３８Ａと負極性の誤差を持つように量子化された再量子化データＤ２３８Ｂとを交互に選択して出力することになる。つまり、あるブロツクにおいては、３つの画素のうち２つが正の極性の量子化誤差をもち、１つが負の極性の量子化誤差をもつことになる。また、次のブロツクにおいては、３つの画素のうち２つが負の極性の量子化誤差をもち、１つが正の極性の量子化誤差をもつことになる。これにより、ブロツク内の３つの画素、例えば、画素Ｘ₁₂、Ｘ₂₁、Ｘ₂₂が全て同一方向の極性の量子化誤差をもつことはなくなる。したがつて、ブロツク内画素が、全て一方向の極性の量子化誤差をもつ場合に生じるブロツク歪みを回避でき、この結果視覚特性上の画質劣化を抑制できる。
【００２９】
同様に、間引き回路２４５、量子化回路２４８及びセレクタ２５５には図２（Ｂ）の各画素が点線で示すブロツク単位で順次入力される。例えばＹ₁₃、Ｙ₃₁、Ｙ₃₃、Ｙ₁₇、Ｙ₃₅、Ｙ₃₇、……の順で入力される。したがつて、セレクタ２５５は、コントローラ２５７からのクロツク信号ＣＬＫ２に基づいて、ブロツク内の画素毎に正極性の誤差を持つように量子化された再量子化データＤ２３９Ａと負極性の誤差を持つように量子化された再量子化データＤ２３９Ｂとを交互に選択して出力することになる。これにより、ブロツク内の３つの画素、例えば、画素Ｙ₁₃、Ｙ₃₁、Ｙ₃₃が全て同一方向の極性の量子化誤差をもつことはなくなる。したがつて、ブロツク内画素が、全て一方向の極性の量子化誤差をもつ場合に生じるブロツク歪みを回避でき、この結果視覚特性上の画質劣化を抑制できる。
【００３０】
さらに、量子化回路２４９及びセレクタ２５６には図２（Ａ）の各画素が点線で示すブロツク単位で順次入力される。例えばＺ₁₅、Ｚ₅₁、Ｚ₅₅、……の順で入力される。したがつて、セレクタ２５６は、コントローラ２５７からのクロツク信号ＣＬＫ３に基づいて、ブロツク内の画素毎に正極性の誤差を持つように量子化された再量子化データＤ２４０Ａと負極性の誤差を持つように量子化された再量子化データＤ２４０Ｂとを交互に選択して出力することになる。これにより、ブロツク内の３つの画素、例えば、画素Ｚ₁₅、Ｚ₅₁、Ｚ₅₅が全て同一方向の極性の量子化誤差をもつことはなくなる。したがつて、ブロツク内画素が、全て一方向の極性の量子化誤差をもつ場合に生じるブロツク歪みを回避でき、この結果視覚特性上の画質劣化を抑制できる。
【００３１】
セレクタ２５４、２５５、２５６から出力された再量子化データＤ２３８、Ｄ２３９、Ｄ２４０は、それぞれ可変長符号化回路（ＶＬＣ）２５０、２５１、２５２に供給される。可変長符号化回路２５０〜２５２は、再量子化データＤ２３８〜Ｄ２４０に対して発生度数の大きい量子化コードほど短いハフマンコードを割り当て、各再量子化データＤ２３８〜Ｄ２４０を可能な限り少ない符号量で表現した第１階層符号化データＤ２４１、第２階層符号化データＤ２４２及び第３階層符号化データＤ２４３を形成し、この第１階層符号化データＤ２４１、第２階層符号化データＤ２４２及び第３階層符号化データＤ２４３を伝送フオーマツト変換回路２５３に送出する。
【００３２】
伝送フオーマツト変換回路２５３は、第１階層符号化データＤ２４１、第２階層符号化データＤ２４２及び第３階層符号化データＤ２４３を所定の順序で配列したり、各階層符号化データの階層を識別するための識別コードを付加することにより、伝送画像データＤ２４４を形成して、この伝送画像データＤ２４４を出力する。この出力された伝送画像データＤ２４４は、その後、通信路２５８を介して受信側に供給されるか、もしくは記録伝送路を介してデイスク、テープ又は半導体メモリなどの記録媒体２５９に記録される。
【００３３】
なお、上述した第１の実施例では、各階層毎に、量子化回路から２種類の再量子化データ（すなわち、正極性の誤差を持つように量子化された再量子化データと負極性の誤差を持つように量子化された再量子化データ）をセレクタに出力し、コントローラからのクロツク信号に従つて、正極性の誤差を持つ再量子化データと負極性の誤差を持つ再量子化データとを交互に選択して出力するようになされている。しかしながら、本発明はこれに限らず、セレクタを用いない方法も考えられる。つまり、コントローラ２５７からのクロツク信号ＣＬＫ１、ＣＬＫ２、ＣＬＫ３を量子化回路２４７、２４８、２４９にそれぞれ直接供給し、量子化回路２４７、２４８、２４９のそれぞれは、クロツク信号に基づいて、正極性の誤差をもたせた量子化及び負極性をもたせた量子化を交互に行い、ブロツク内画素Ｘ₁₂、Ｘ₂₁、Ｘ₂₂をデイザ化するようにしてもよい。
【００３４】
この結果、上述した実施例と同様に、ブロツク内画素が全て一方向の極性の量子化誤差をもつ場合に生じるブロツク歪みを回避でき、この結果視覚特性上の画質劣化を抑制できる。また、この変形例においては、量子化回路において各画素に対して再量子化データを１つのみ演算し、かつセレクタも持たない構成であるため、回路規模も大幅に削減することができる。
【００３５】
このようにして形成された伝送画像データＤ２４４を復号する画像信号復号化装置２６０は、例えば、図４に示すように構成することができる。
この画像信号復号化装置２６０は、通信路２５８を介して供給されるか、もしくは再生伝送路を介して記録媒体２５９から再生される伝送画像データＤ２４４をデータ分流回路２６１に入力する。データ分流回路２６１は、図示しないスイツチング回路を有し、伝送画像データＤ２４４に含まれる各階層の識別コードを参照して伝送画像データＤ２４４を第１階層符号化データＤ２５０、第２階層符号化データＤ２５１及び第３階層符号化データＤ２５２に分流し、これら第１階層符号化データＤ２５０、第２階層符号化データＤ２５１及び第３階層符号化データＤ２５２をそれぞれ可変長復号化回路（ＩＶＬＣ）２６２、２６３、２６４に送出する。
【００３６】
可変長復号化回路２６２、２６３、２６４は、それぞれ上述した図１に示された可変長符号化回路２５０、２５１、２５２と逆の処理を実行し、ハフマン符号によつて表現されている第１階層符号化データＤ２５０、第２階層符号化データＤ２５１及び第３階層符号化データＤ２５２を再量子化コードで表現された再量子化データＤ２５３、Ｄ２５４、Ｄ２５５にそれぞれ変換する。そして、これらの再量子化データＤ２５３、Ｄ２５４、Ｄ２５５をそれぞれ逆量子化回路２６５、２６６、２６７に送出する。
【００３７】
逆量子化回路２６５は、上述した図１に示された量子化回路２４７によつて１画素当り２ビツトとされた再量子化データＤ２５３を例えば８ビツトのデータに逆量子化し、第１階層間引き復号データＤ２５６を生成する。そして、この第１階層間引き復号データＤ２５６を合成回路２６８及び画素生成回路２６９に送出する。逆量子化回路２６６は、上述した図１に示された量子化回路２４８によつて１画素当り２ビツトとされた再量子化データＤ２５４を例えば８ビツトのデータに逆量子化し、第２階層間引き復号データＤ２５７を生成する。そして、この第２階層間引き復号データＤ２５７を合成回路２７０及び画素生成回路２７１に送出する。
【００３８】
逆量子化回路２６７は、上述した図１に示された量子化回路２４９によつて１画素当り２ビツトとされた再量子化データＤ２５５を例えば８ビツトのデータに逆量子化し、第３階層復号画像データＤ２５８として出力する。そして、この第３階層復号画像データＤ２５８を例えば出力端子を介して表示画素数の少ない低解像度のテレビジヨンモニタに送出すると共に画素生成回路２７１に送出する。
【００３９】
画素生成回路２７１は、第３階層復号画像データＤ２５８と第２階層間引き復号データＤ２５７を用いて、上述した図１に示された画像信号符号化装置２４０の間引き回路２４５で間引かれた第２階層画素（すなわち図２（Ｂ）の点線で示す画素）を復元する。例えば間引きにより削除された第２階層の画素Ｙ₁₁は、次式、
【数３】

のような演算を行うことにより復元する。同様に、平均化によつて生成した上位階層画素と、上位階層画素の生成のために用いられ、かつ間引かれなかつた画素とを用いて全ての間引かれた画素を復元する。
【００４０】
合成回路２７０は、このようにして生成された第２階層の復元画素データＤ２５９を第２階層間引き復号データＤ２５７中の所定の位置に挿入して合成することにより、第２階層復号画像データＤ２６０を形成する。そして、この第２階層復号画像データＤ２６０を例えば出力端子を介して表示画素数が中程度のテレビジヨンモニタに送出すると共に画素生成回路２６９に送出する。
【００４１】
画素生成回路２６９は、第２階層復号画像データＤ２６０と第１階層間引き復号データＤ２５６を用いて、上述した図１に示された画像信号符号化装置２４０の間引き回路２４２で間引かれた第１階層画素（すなわち図２（Ｃ）の点線で示す画素）を復元する。例えば間引きにより削除された第１階層画素Ｘ₁₁は、次式、
【数４】

のような演算を行うことにより復元する。同様に、平均化によつて生成した上位階層画素と、上位階層画素の生成のために用いられ、かつ間引かれなかつた画素とを用いて全ての間引かれた画素を復元する。
【００４２】
合成回路２６８は、このようにして生成された第１階層の復元画素データＤ２６１を第１階層間引き復号データＤ２５６中の所定の位置に挿入して合成することにより、第１階層復号画像データＤ２６２を形成する。そして、この第１階層復号画像データＤ２６２を出力端子を介して例えば表示画素数が多いハイビジヨンテレビモニタに送出する。
【００４３】
以上の構成において、画像信号符号化装置２４０は、下位階層の複数画素の平均値によつて上位階層画素を生成することにより複数階層の画像データＤ２３１、Ｄ２３３、Ｄ２３５を生成する。
【００４４】
これに加えて、画像信号符号化装置２４０は、最上位階層すなわち第３階層を除いた階層画像データについて、同じ平均演算に用いた画素のうちの１画素は復号側で簡単な算術演算によつて復元できるので伝送画素から除外する。この結果、画像信号符号化装置２４０においては、階層構造に起因する伝送画素数の増加を伴わない階層符号化処理を実現することができる。
【００４５】
ところで、画像信号符号化装置２４０では、量子化回路２４７〜２４９によつて各階層画像データを再量子化することで各階層におけるデータ量を圧縮する。この結果、各再量子化データＤ２３８、Ｄ２３９、Ｄ２４０は、必然的に再量子化時の量子化誤差を含む値となる。そしてこの量子化誤差が大きくなるほど復号画像データＤ２５８、Ｄ２６０、Ｄ２６２の真値からの誤差が大きくなり、画質が劣化する。
【００４６】
そこで、画像信号符号化装置２４０及び画像信号復号化装置２６０における各階層での量子化誤差の影響について考える。ここで、各画素Ｚ₁₁、Ｙ₁₁、……の復号値をＺ₁₁′、Ｙ₁₁′、……とし、真値をＺ₁₁、Ｙ₁₁、……とし、量子化誤差をＥ（Ｚ₁₁）、Ｅ（Ｙ₁₁）……とすると、例えば逆量子化回路２６７によつて得られる第３階層の画素Ｚ₁₁の復号値Ｚ₁₁′は、次式、
【数５】

となる。また、逆量子化回路２６６によつて得られる第２階層の画素Ｙ₁₃、Ｙ₃₁、Ｙ₃₃の復号値Ｙ₁₃′、Ｙ₃₁′、Ｙ₃₃′は、次式、
【数６】

となる。
【００４７】
ところが、画素生成回路２７１によつて復元される第２階層画素Ｙ₁₁は、（３）式に基づいて生成されるので、その復号値Ｙ₁₁′は、次式、
【数７】

となり、Ｚ₁₁についての量子化誤差が４倍となつて影響する。
【００４８】
また、逆量子化回路２６５によつて得られる第１階層画素Ｘ₁₂、Ｘ₂₁、Ｘ₂₂、Ｘ₁₄、Ｘ₂₃、Ｘ₂₄の復号値Ｘ₁₂′、Ｘ₂₁′、Ｘ₂₂′、Ｘ₁₄′、Ｘ₂₃′、Ｘ₂₄′は、次式、
【数８】

となるが、画素生成回路２６９によつて復元される第１階層画素Ｘ₁₃、Ｘ₃₁、Ｘ₃₃は、（４）式に基づいて生成されるので、その復号値Ｘ₁₃′、Ｘ₃₁′、Ｘ₃₃′は、次式、
【数９】

となり、それぞれの復号値Ｘ₁₃′、Ｘ₃₁′、Ｘ₃₃′に、空間的に対応する第２階層画素Ｙ₁₃、Ｙ₃₁、Ｙ₃₃、すなわち対応する上位階層画素についての量子化誤差が４倍となつて影響する。
【００４９】
さらに、画素生成回路２７１を経て画素生成回路２６９によつて復元される第１階層画素Ｘ₁₁においては、その復号値Ｘ₁₁′は、次式、
【数１０】

で示すように、復号値Ｘ₁₁′に、第２階層画素Ｙ₁₃、Ｙ₃₁、Ｙ₃₃についての量子化誤差が４倍となつて影響するのに加えて、第３階層画素Ｚ₁₁についての量子化誤差が１６倍となつて影響する。
【００５０】
図５は、この各復号画素値Ｚ₁₁′、Ｙ₁₁′、Ｙ₁₃′、……に対する各量子化誤差Ｅ（Ｚ₁₁）、Ｅ（Ｙ₁₃）、Ｅ（Ｙ₃₁）、……の影響の大きさの様子を示している。図５を見れば明らかなように、上位階層での量子化誤差は下位階層での復号値に大きな影響を及ぼす。
【００５１】
従つて、上位階層における復号値が正極性又は負極性の方向のうち一方向に連続した量子化誤差をもつた場合、その誤差の影響は、その上位階層でブロツク状の歪みとして現れるのみならず、下位階層に対しても悪影響を及ぼす場合がある。
【００５２】
これを考慮して、この第１実施例では、各階層画像を量子化によつて圧縮する際に隣接する画素が互いに逆極性の量子化誤差をもつようにする（いわゆるデイザ化）ことにより、全階層で量子化歪みによる視覚上の画質劣化を低減させる。
【００５３】
かくして以上の構成によれば、上位階層の１画素を生成するために同じ平均値演算に用いた複数の下位階層画素のうちの１画素分の画素データＹ₁₁、Ｙ₁₅、……、Ｘ₁₁、Ｘ₁₃、……を伝送しないようにすると共に、各階層の画素データを量子化する際に、例えば、３つの量子化誤差（Ｅ（Ｘ₁₂）、Ｅ（Ｘ₂₁）、Ｅ（Ｘ₂₂））の極性が順次反転するような量子化誤差（＋Ｅ（Ｘ₁₂）、−Ｅ（Ｘ₂₁）、＋Ｅ（Ｘ₂₂））又は（−Ｅ（Ｘ₁₂）、＋Ｅ（Ｘ₂₁）、−Ｅ（Ｘ₂₂））を有する再量子化データを発生するように、量子化誤差の極性が正極性及び負極性に交互に反転するようにしたことにより、圧縮効率を向上し得ると共に量子化誤差によるブロツク歪や上位階層の影響をうける階層符号化における画質劣化を低減し得る。
【００５４】
因みに、セレクタ２５４から出力される再量子化データの極性を順次反転させる方法に代えて、例えば、すべてのブロツクで量子化誤差が（＋Ｅ（Ｘ_１２）、−Ｅ（Ｘ_２１）、＋Ｅ（Ｘ_２２））となるように、ブロツクごとに２つの再量子化データの極性が正となるような制御をコントローラ２５７で行うようにしても良い。
【００５５】
また、セレクタ２５５から出力される再量子化データの極性を順次反転させる方法に代えて、例えば、すべてのブロツクで量子化誤差が（＋Ｅ（Ｙ₁₃）、−Ｅ（Ｙ₃₁）、＋Ｅ（Ｙ₃₃））となるように、各ブロツクごとに２つの再量子化データの極性が正となるような制御をコントローラ２５７で行うようにしても良い。
【００５６】
（２）第２実施例
図６は、全体として第２実施例の画像信号符号化装置２８０を示している。第１実施例と比較して、最上位階層を除いて階層間データの残差（差分）を圧縮符号化する点を除いて、図１の画像信号符号化装置２４０と同一の構成を有する。したがつて、図１と対応する部分については同一符号を付す。
【００５７】
すなわち、第１実施例の画像信号符号化装置２４０が各画素をＰＣＭ（Pulse Code Modulation ）の形式で伝送するようになされているのに対して、この第２実施例の画像信号符号化装置２８０は、各画素をＤＰＣＭ（Differential Pulse Code Modulation）の形式で伝送するようになされている。したがつて、画像信号符号化装置２８０は、一段と伝送情報量を低減させることができる。
【００５８】
具体的に説明すると、画像信号符号化装置２８０は、第３階層画像データＤ２３５及び第２階層ブロツク化データＤ２３４を差分回路２８１に供給する。そして、差分回路２８１によつて第３階層画像データＤ２３５と第２階層ブロツク化データＤ２３４との間で空間的に対応する画素同士の差分を演算して第２階層差分データＤ２７０を形成し、この第２階層差分データＤ２７０を間引き回路２８２に送出する。このとき、差分回路２８１は、第２階層画素Ｙ₁₃、Ｙ₃₁、Ｙ₃₃の差分値ΔＹ₁₃、ΔＹ₃₁、ΔＹ₃₃を、これらの画素に対応する上位階層画素Ｚ₁₁を用いて、次式、
【数１１】

のようにして求める。
【００５９】
画像信号符号化装置２８０は、同様にして、第２階層ブロツク化データＤ２３４及び第１階層ブロツク化データＤ２３２を差分回路２８３に供給する。差分回路２８３によつて第２階層ブロツク化データＤ２３４と第１階層ブロツク化データＤ２３２との間で空間的に対応する画素同士の差分を演算して第１階層差分データＤ２７１を形成し、この第１階層差分データＤ２７１を間引き回路２８４に送出する。このとき、差分回路２８３は、第１階層画素Ｘ₁₂、Ｘ₂₁、Ｘ₂₂の差分値ΔＸ₁₂、ΔＸ₂₁、ΔＸ₂₂を、これらの画素に対応する上位階層画素Ｙ₁₁を用いて、次式、
【数１２】

のようにして求める。
【００６０】
間引き回路２８４は、上述した図１に示される間引き回路２４２と同様に、ブロツク化回路２４１からのブロツク化データＤ２３２に基づいて差分回路２８３で得られる第１階層差分データＤ２７１を受信する。また、間引き回路２８２は、上述した図１に示される間引き回路２４５と同様に、ブロツク化回路２４４からのブロツク化データＤ２３４に基づいて差分回路２８１で得られる第２階層差分データＤ２７０を受信する。
【００６１】
そして、４画素で構成されるブロツク化データＤ２３２、Ｄ２３４に対応して各ブロツクにつき４画素で構成されている第１階層及び第２階層差分データＤ２７１、Ｄ２７０の中からそれぞれ１画素を間引き、各ブロツクにつき取り除かれた１画素を除く残り３画素によつて構成される階層差分間引きデータＤ２７２、Ｄ２７３を形成し、この階層差分間引きデータＤ２７２、Ｄ２７３を量子化回路２８５、２８６に送出する。
【００６２】
ここで、各階層の量子化回路２８５、２８６、２８７は、第１実施例と同様に、入力される各画素について量子化誤差が正極性及び負極性となる２通りの量子化を行い、正極性の誤差をもつ正極性再量子化データＤ２７４Ａ、Ｄ２７５Ａ、Ｄ２７６Ａと負極性の誤差をもつ負極性再量子化データＤ２７４Ｂ、Ｄ２７５Ｂ、Ｄ２７６Ｂを対にしてそれぞれ出力する。そして、セレクタ２５４、２５５、２５６が、コントローラからのクロツク信号ＣＬＫ１、ＣＬＫ２、ＣＬＫ３に基づいて、所定位置の画素について正極性再量子化データＤ２７４Ａ、Ｄ２７５Ａ、Ｄ２７６Ａを選択した場合には、次の画素について負極性再量子化データＤ２７４Ｂ、Ｄ２７５Ｂ、Ｄ２７６Ｂを選択するというように、交互に正極性又は負極性を選択する。
【００６３】
セレクタ２５４、２５５、２５６から出力された再量子化データＤ２７４、Ｄ２７５、Ｄ２７６は可変長符号化回路（ＶＬＣ）２５０、２５１、２５２によつて可変長符号化され、第１階層、第２階層及び第３階層符号化データＤ２７７、Ｄ２７８、Ｄ２７９として出力される。そして、これらの第１階層、第２階層及び第３階層符号化データＤ２７７、Ｄ２７８、Ｄ２７９が続く伝送フオーマツト変換回路２５３に入力され、伝送フオーマツト変換回路２５３は、伝送画像データＤ２８０を形成して、それを出力する。この出力された伝送画像データＤ２８０は、その後、通信路２８８を介して受信側に供給されるか、もしくは記録伝送路を介してデイスク、テープや半導体メモリなどの記録媒体２８９に記録される。
【００６４】
また、変形例として、第１実施例にて上述したように、コントローラからのクロツク信号を直接量子化回路に供給するようにし、量子化回路において正極性の誤差を持つ再量子化データと負極性の誤差を持つ再量子化データとを交互に生成するようにしてもよい。この場合、セレクタも持たない構成となる。
このようにして形成された伝送画像データＤ２８０を復号する画像信号復号化装置２９０は、例えば、図７に示すように構成することができる。
【００６５】
画像信号復号化装置２９０において、図４に示された画像信号復号化装置２６０との対応部分に同一符号を付している。画像信号復号化装置２９０は、通信路２８８を介して供給されるか、もしくは再生伝送路を介して記録媒体２８９から再生される伝送画像データＤ２８０をデータ分流回路２６１に入力する。データ分流回路２６１は、伝送画像データＤ２８０を第１階層、第２階層及び第３階層符号化データＤ２８１、Ｄ２８２及びＤ２８３に分流し、これらの第１階層、第２階層及び第３階層符号化データＤ２８１、Ｄ２８２及びＤ２８３は、可変長復号化回路（ＩＶＬＣ）２６２、２６３及び２６４にそれぞれ供給される。
【００６６】
可変長復号化回路（ＩＶＬＣ）２６２、２６３及び２６４のそれぞれは、第１階層、第２階層及び第３階層符号化データＤ２８１、Ｄ２８２及びＤ２８３をそれぞれ可変長復号し、再量子化データＤ２８４、Ｄ２８５、Ｄ２８６を形成し、これらの再量子化データＤ２８４、Ｄ２８５、Ｄ２８６を逆量子化回路２９１、２９２及び２９３にそれぞれ送出する。なお、可変長復号化回路（ＩＶＬＣ）２６２、２６３及び２６４は、図６で示された可変長符号化回路（ＶＬＣ）２５０、２５１及び２５２にそれぞれ対応する逆処理を実行する。
【００６７】
逆量子化回路２９１、２９２及び２９３は、１画素当り２ビツトに再量子化されてなる再量子化データＤ２８４、Ｄ２８５及びＤ２８６を１画素当り８ビツトでなるデータにそれぞれ逆量子化し、第１階層及び第２階層の階層差分間引きデータＤ２８７及びＤ２８８並びに第３階層復号画像データＤ２８９をそれぞれ生成する。なお、逆量子化回路２９１、２９２及び２９３は、図６で示された量子化回路２８５、２８６及び２８７にそれぞれ対応する逆処理を実行する。
【００６８】
第３階層復号画像データＤ２８９は、そのまま低解像度のテレビジヨンモニタ等に出力されると共に、加算回路２９４及び画素生成回路２９５に送出される。加算回路２９４は、次式、
【数１３】

のような加算演算を行い、第２階層間引き復号データＤ２９０を算出する。
【００６９】
画素生成回路２９５は、第２階層差分間引きデータＤ２８８と第３階層復号画像データＤ２８９とを用いて、図６で示された間引き回路２８２で間引かれた第２階層画素Ｙ₁₁を、次式、
【数１４】

により求める。この（１４）式は、上述した（３）式と比較すると、第３階層画素Ｚ₁₁の乗算係数が（３）式では「４」であつたのに対して、この式では「１」となつていることが分かる。このことは（１４）式において、第２階層の画素値に対する第３階層の画素値の影響が（３）式と比べて小さいことを意味する。
【００７０】
合成回路２９６は、第２階層間引き復号データＤ２９０と第２階層復元画素データＤ２９１とを合成して第２階層復号画像データＤ２９２を形成し、この第２階層復号画像データＤ２９２を出力端子を介してテレビジヨンモニタ等に出力すると共に、加算回路２９７及び画素生成回路２９８に送出する。加算回路２９７は、次式、
【数１５】

のような加算演算を行い、第１階層間引き復号データＤ２９３を算出する。
【００７１】
画素生成回路２９８は、第１階層差分間引きデータＤ２９３と第２階層復号画像データＤ２９２とを用いて、図６に示された間引き回路２８４で間引かれた第１階層画素Ｘ₁₃、Ｘ₃₁、Ｘ₃₃を、次式、
【数１６】

により求める。また、画素生成回路２９８は、間引かれた第１階層画素Ｘ₁₁を、次式、
【数１７】

により求める。
【００７２】
合成回路２９９は、第１階層間引き復号データＤ２９３と第１階層復元画素データＤ２９４とを合成して、第１階層復号画像データＤ２９５を形成する。そして、この第１階層復号画像データＤ２９５を出力端子を介して、例えば高解像度のテレビジヨンモニタ等に出力する。
【００７３】
次に、第１実施例と同様に、この第２の実施例の画像信号符号化装置２８０及び画像信号復号化装置２９０における各階層での量子化誤差の影響について考える。
逆量子化回路２９３によつて得られる第３階層の画素Ｚ₁₁の復号値Ｚ₁₁′は、（５）式と同じとなる。また加算回路２９４によつて得られる第２階層の画素Ｙ₁₃、Ｙ₃₁、Ｙ₃₃の復号値Ｙ₁₃′、Ｙ₃₁′、Ｙ₃₃′は、次式、
【数１８】

で示す値となる。
【００７４】
また、画素生成回路２９５によつて復元される第２階層画素Ｙ₁₁は、（１４）式に基づいて生成されるので、その復号値Ｙ₁₁′は、次式、
【数１９】

で示す値となる。このように第２実施例の画像信号符号化装置２８０は、最上位階層データを除いて、各階層間の差分データを伝送データとして伝送しており、（１９）式を上述した（７）式と比較すると、第３階層画素Ｚ₁₁の量子化誤差Ｅ（Ｚ₁₁）の乗算係数が（７）式では「４」であつたのに対して、「２」となつていることが分かる。
【００７５】
このことは、この第２実施例の符号化復号化によれば、第３階層画素の量子化誤差が第２階層画素の復号に与える影響を半分程度に低減させることができることを意味する。つまり、第１の実施例では、（１９）式から明らかなように、階層間の差分を演算しているために、第３階層の画素Ｚ₁₁の量子化誤差は、第２階層の復号画素値Ｙ₁₁′、Ｙ₁₃′、Ｙ₃₁′、Ｙ₃₃′のすべてに反映されることになる。したがつて、第３階層画素の量子化誤差が第２階層画素の復号に与える影響を低減させることができる。
【００７６】
また加算回路２９７によつて得られる第１階層画素Ｘ₁₂、Ｘ₂₁、Ｘ₂₂、Ｘ₃₂、Ｘ₄₁、Ｘ₄₂の復号値Ｘ₁₂′、Ｘ₂₁′、Ｘ₂₂′、Ｘ₃₂′、Ｘ₄₁′、Ｘ₄₂′は、次式、
【数２０】

で示される値となり、画素生成回路２９８によつて復元される第１階層画素Ｘ₃₁の復号値Ｘ₃₁′は、次式、
【数２１】

で示される値となる。
【００７７】
さらに画素生成回路２９５を経て画素生成回路２９８によつて復元される第１階層画素Ｘ₁₁の復号値Ｘ₁₁′は、次式、
【数２２】

で示される値となり、Ｚ₁₁についての量子化誤差が４倍となつて影響し、Ｙ₁₃、Ｙ₃₁、Ｙ₃₃についての量子化誤差が２倍となつて影響する。しかしながらこの（２２）式と（１０）式を比較すれば明らかなように、Ｚ₁₁、Ｙ₁₃、Ｙ₃₁、Ｙ₃₃の量子化誤差が復号値Ｘ₁₁′に与える影響は第１実施例の場合よりも格段に低減されている。
【００７８】
つまり、第１の実施例では、例えば、（１０）式から明らかなように、第３階層の画素Ｚ₁₁の量子化誤差及び第２階層の画素Ｙ₁₃、Ｙ₃₁、Ｙ₃₃の量子化誤差は、第１階層の復号画素値Ｘ₁₁′のみに反映されており、第１階層の復号画素Ｘ₁₂′、Ｘ₂₁′、Ｘ₂₂′には反映されていない。
【００７９】
しかしながら、第２実施例では、（２２）式から明らかなように、階層間の差分を演算しているために、第３階層の画素Ｚ₁₁の量子化誤差及び第２階層の画素Ｙ₁₃、Ｙ₃₁、Ｙ₃₃の量子化誤差は、第１階層の復号画素Ｘ₁₁′、Ｘ₁₂′、Ｘ₂₁′に反映されることになる。したがつて、第３階層画素の量子化誤差及び第２階層画素の量子化誤差が第１階層画素の復号に与える影響を低減させることができる。
【００８０】
したがつて、以上の第２実施例の構成によれば、入力画像データＤ２３１から平均値演算により得された複数の階層画像データの各階層データと隣接上位階層データとの階層差分データを生成し、最上位階層データＤ２３５と複数の階層差分データＤ２７２、Ｄ２７３をそれぞれ量子化して複数の階層符号化データを生成する画像信号符号化装置２８０において、最上位階層を除く各階層の画素のうち隣接下位階層の画素及び自分の階層の画素を用いた算術演算によつて復元できる差分画素データΔＹ₁₁、ΔＹ₁₅、……、ΔＸ₁₁、ΔＸ₁₃、……を伝送しないようにすると共に、各階層の画素データを量子化する際に、量子化誤差の極性が正極性及び負極性に交互に反転するようにしたことにより、画質劣化を抑制した状態で圧縮効率を一段と向上し得る。
【００８１】
因みに、各画素データについて量子化誤差の極性が正極性及び負極性に交互に反転する方法に代えて、すべてのブロツク内において、２つの画素データの量子化誤差が正極性となり、１つの画素データの量子化誤差が負極性となるようにコントローラ２５７で制御するようにしても良い。
【００８２】
（３）第３実施例
図８は、全体として第３実施例の画像信号符号化装置５００を示している。この画像信号符号化装置５００は、第２実施例と比較して、適応予測回路５０１及び５０２を設けたことを除いて第２実施例の画像信号符号化装置２８０と同様の構成を有する。したがつて、図６と対応部分に同一符号を付して示してしている。
【００８３】
適応予測回路５０１は、第３階層画像データＤ２３５に基づいて所定の予測処理を行い、第２階層画像データＤ２３４に対応する第２階層予測データＤ５００を生成する。そして、この第２階層予測データを差分回路２８１に送出する。同様に、適応予測回路５０２は、第２階層画像データＤ２３４に基づいて所定の予測処理を行い、第１階層画像データＤ２３２に対応する第１階層予測データＤ５０１を生成する。そして、この第１階層予測データを差分回路２８３に送出する。
【００８４】
実際上、適応予測回路５０１及び５０２は、クラス分類適応処理を適用して、複数の上位階層画素から下位階層の１画素を予測する。具体的には、予測しようとする下位階層の画素をその空間的に近傍の複数の上位階層画素のレベル分布に基づいてクラス分類する。また、適応予測回路５０１及び５０２は、予め学習によつて獲得された、クラス毎に複数の予測係数あるいは１個の予測値を格納したメモリ（図示せず）を有し、上記クラス分類で決定されたクラスに対応した複数の予測係数あるいは１個の予測値をメモリから読み出す。予測値の場合は、その予測値がそのまま予測画素として使用され、予測係数の場合は、複数の予測係数と複数の画素との線形一次結合により予測値を生成する。また、予測値は正規化されている場合は、この予測値に所定の処理を施して予測画素を生成する。
【００８５】
このようなクラス分類適応処理の詳細は、例えば特願平4-155719号に開示されている。また、このようなクラス分類適応処理のアルゴリズムは、すでに知られている。また、この第３実施例の適応予測回路において、クラス分類適応処理のアルゴリズムが使用されているが、本発明はこれに限らず、現在知られている他の予測方法を使用してもよい。
【００８６】
画像信号符号化装置５００により圧縮符号化された伝送画像データＤ２８０′を復号する画像信号復号化装置２９０′の構成を図９に示す。この画像信号復号化装置２９０′は、第２実施例の画像信号復号化装置２９０と比較して、適応予測回路５０１′及び５０２′を設けたことを除いて第２実施例の画像信号復号化装置２９０と同様の構成を有する。したがつて図７との対応部分に同一符号を付して示している。
【００８７】
この第３実施例による画像信号復号化装置２９０′において、第３階層復号データＤ２８９′を入力する第１の適応予測回路５０１′は、図８に示した適応予測回路５０１に対応するクラス分類適応処理を第３階層復号データＤ２８９′に基づいて実行し、この結果得られる第２階層予測データＤ５００′を画素生成回路２９５に送出する。画素生成回路２９５は、第２階層の逆量子化回路２９２から出力される第２階層差分間引きデータＤ２８８′と第２階層予測データＤ５００′とを用いて、図８で示された間引き回路２８２で間引かれた第２階層画素を生成する。また、第３階層復号データＤ２８９′に基づいて第１の適応予測回路５０１′によつて得られた第２階層予測データＤ５００′は、第２階層の逆量子化回路２９２から出力される第２階層差分間引きデータＤ２８８′に加算される。この加算により得られる第２階層間引き復号データＤ２９０′は、画素生成回路２９５によつて生成された第２階層画素Ｄ２９１′と合成され、第２階層復号画像データＤ２９２′となる。
【００８８】
また、第２階層復号データＤ２９２′を入力する第２の適応予測回路５０２′は、図８に示した適用予測回路５０２に対応するクラス分類適応処理を第２階層復号データＤ２９２′に基づいて実行し、この結果得られる第１階層予測データＤ５０１′を画素生成回路２９８に送出する。画素生成回路２９８は、第１階層の逆量子化回路２９１から出力される第１階層差分間引きデータＤ２８７′と第１階層予測データＤ５０１′とを用いて、図８で示された間引き回路２８４で間引かれた第１階層画素を生成する。また、第２階層復号データＤ２９２′に基づいて第２の適応予測回路５０２′によつて得られた第１階層予測データＤ５０１′は、第１階層の逆量子化回路２９１から出力される第１階層差分間引きデータＤ２８７′に加算される。この加算により得られる第１階層間引き復号データＤ２９３′は、画素生成回路２９８によつて生成された第１階層画素Ｄ２９４′と合成され、第１階層復号画像データＤ２９５′となる。
【００８９】
以上、上述した第３実施例の構成によれば、第２実施例の効果に加えて、差分回路２８３及び２８１から得られる第１階層差分データＤ２７１′及び第２階層差分データＤ２７０′の残差を一段と小さくでき、伝送情報量を一段と低減し得る画像信号符号化装置５００を実現できる。
【００９０】
因みに、この実施例においても、各画素データについて量子化誤差の極性が正極性及び負極性に交互に反転する方法に代えて、すべてのブロツク内において２つの画素データの量子化誤差が正極性となり、１つの画素データの量子化誤差が負極性となるようにコントローラ２５７で制御するようにしても良い。
【００９１】
（４）他の実施例
なお、上述の第１〜第３実施例においては、全階層において、隣接する画素データの量子化誤差の極性が交互に反転するような量子化を行う場合について述べたが、本発明はこれに限らず、適宜選択した階層のみ、そのような量子化を行うようにしても良い。
【００９２】
また、上述の第１〜第３実施例において、隣接する画素データの量子化誤差の極性が交互に反転するような量子化を行う場合について述べたが、これに加えて、上位階層の量子化回路ほど量子化ビツト数を大きく（量子化幅を小さくして）細かい量子化を行うようにしてもよい。この際、上位階層の量子化誤差の下位階層への影響度を考慮して量子化ビツト数を決定すると良い。これにより、さらに一段と復号時の画質劣化を低減することができる。これは、上述したように、復号時に上位階層の量子化誤差が下位階層に影響するためである。また、上位階層の量子化誤差の下位階層に対する影響度は、最下位階層からの階層段数及び上位階層画素を生成するために使用される画素数に関係してくる。したがつて、これらに応じて量子化ビツト数もしくは量子化幅を決定してもよい。
【００９３】
また、上述の第１〜第３実施例においては、隣接する画素データの量子化誤差の極性が交互に反転するような量子化を行う場合について述べたが、本発明はこれに限らず、交互に反転させなくても、量子化誤差の極性が長く連続しないようにランダムに反転させるように制御を行うことにより、上述の実施例と同様の効果を得ることができる。
【００９４】
また、上述の実施例においては、３階層分の階層画像データＤ２３１、Ｄ２３４、Ｄ２３５を生成し、これを圧縮符号化して伝送する場合について述べたが、本発明はこれに限らず、順次平均値演算を繰り返すことにより４階層や５階層分の階層画像データを生成し、これを量子化によつて圧縮符号化して伝送する場合にも適用し得る。
【００９５】
また、上述の実施例においては、下位階層の４画素を用いた平均値演算によつて上位階層の１画素を生成する場合について述べたが、本発明はこれに限らず、例えば下位階層の６画素もしくはそれ以上の画素を用いた平均値演算によつて上位階層の１画素を生成するようにして階層画像データを生成するようにしても良い。
【００９６】
また、上述の実施例においては、下位階層の４画素のうち１つを間引く場合について述べたが、本発明はこれに限らず、すべての画素を送るようにしてもよい。この場合、伝送画素を減らすことはできないが、本発明においては、要は、量子化誤差の極性がランダムに発生するようにすればよい。
【００９７】
また、上述した実施例においては、量子化器をすべて線形量子化器として記載したが、本発明はこれに限らず、非線形量子化や適応量子化、さらには、ダイナミツクレンジに応じた適用量子化などを適用してもよい。
【００９８】
さらに、本発明の実施例は、ブロツク図を用いて示したハードウエアによつて実現しているが、本発明はこれに限らず、ＣＰＵやメモリなどを用いてソフトウエアで実現することも可能である。
【００９９】
なお、本発明の趣旨を逸脱しない範囲において、さまざまな変形や応用例が考え得る。従つて、本発明の要旨は、実施例に限定されるものではない。
【０１００】
【発明の効果】
上述のように本発明によれば、平均演算により生成した各階層画像データを量子化する際に、各階層画像データをブロツクにブロツク化し、かかるブロツクの値を、正側にシフトして行う第１の量子化及び負側にシフトして行う第２の量子化の夫々について量子化するようにして、少なくとも１つの階層の画像データについて、第１の量子化結果と第２の量子化結果とを所定の周期で交互に配置すると共に、上位の階層に係る量子化ビツト数を下位の階層に係る量子化ビツト数に比べて大きくするようにしたことにより、復号時にブロツク歪などの画質劣化が低減した階層符号化を実現することができる。
【図面の簡単な説明】
【図１】第１実施例による画像信号符号化装置の構成を示すブロツク図である。
【図２】階層化及び伝送画素の説明に供する略線図である。
【図３】最上位階層の量子化回路の量子化特性の説明に供する略線図である。
【図４】第１実施例による画像信号復号化装置の構成を示すブロツク図である。
【図５】各階層における量子化誤差が各階層の復元画素に与える影響を表わす略線図である。
【図６】第２実施例による画像信号符号化装置の構成を示すブロツク図である。
【図７】第２実施例による画像信号復号化装置の構成を示すブロツク図である。
【図８】第３実施例による画像信号符号化装置の構成を示すブロツク図である。
【図９】第３実施例による画像信号復号化装置の構成を示すブロツク図である。
【図１０】従来の階層符号化を実現する画像信号符号化装置の構成を示すブロツク図である。
【図１１】従来の階層符号化データを復号する画像信号復号化装置の構成を示すブロツク図である。
【符号の説明】
２４０、２８０、５００……画像信号符号化装置、２４３、２４６……平均化回路、２４２、２４５、２８２、２８４……間引き回路、２４７〜２４９、２８５〜２８７……量子化回路、２６０、２９０……画像信号復号化装置、２５４、２５５、２５６……セレクタ、２５７……コントローラ、５０１、５０２、５０１′、５０２′……適応予測回路、Ｄ２３１……入力画像データ、Ｄ２３３……第２階層画像データ、Ｄ２３５……第３階層画像データ、Ｄ２３７Ａ、Ｄ２３８Ａ、Ｄ２４０Ａ、Ｄ２７４Ａ、Ｄ２７５Ａ、Ｄ２７６Ａ……正極性再量子化データ、Ｄ２３７Ｂ、Ｄ２３８Ｂ、Ｄ２４０Ｂ、Ｄ２７４Ｂ、Ｄ２７５Ｂ、Ｄ２７６Ｂ……負極性再量子化データ、Ｄ２４１、Ｄ２７７、Ｄ２７７′……第１階層符号化データ、Ｄ２４２、Ｄ２７８、Ｄ２７８′……第２階層符号化データ、Ｄ２４３、Ｄ２７９、Ｄ２７９′……第３階層符号化データ、Ｄ２４４、Ｄ２８０、Ｄ２８０′……伝送画像データ、Ｄ２５８、Ｄ２８９……第３階層復号画像データ、Ｄ２６０、Ｄ２９２……第２階層復号画像データ、Ｄ２６２、Ｄ２９５……第１階層復号画像データ、Ｄ２７０、Ｄ２７０′……第２階層差分データ、Ｄ２７１、Ｄ２７１′……第１階層差分データ、Ｄ５００、Ｄ５００′……第２階層予測データ、Ｄ５０１、Ｄ５０１′……第１階層予測データ、Ｚ……第３階層画素、Ｙ……第２階層画素、Ｘ……第１階層画素。[0001]
【table of contents】
The present invention will be described in the following order.
TECHNICAL FIELD OF THE INVENTION
Conventional technology (FIGS. 10 and 11)
Problems to be solved by the invention
Means for solving the problem
BEST MODE FOR CARRYING OUT THE INVENTION
(1) 1st Example (FIGS. 1-5)
(2) Second embodiment (FIGS. 6 and 7)
(3) Third embodiment (FIGS. 8 and 9)
(4) Other embodiments
The invention's effect
[0002]
BACKGROUND OF THE INVENTION
The present invention relates to an image signal encoding method and an image signal encoding apparatus. as well as Image signal transmission method To the law In particular, when predetermined image data is divided into a plurality of layers of image data having different resolutions, and the image data of each layer is encoded to generate encoded data (that is, image data is hierarchically encoded). It is suitable for application.
[0003]
[Prior art]
Conventionally, in this type of image signal encoding apparatus, high resolution input image data is used as first layer image data, second layer data having a resolution lower than that of the first layer data, and second layer data. Third layer data having a resolution lower than that of data is sequentially formed, and the plurality of layer data is compressed and encoded. Thereby, hierarchically encoded data for a plurality of hierarchies in which the amount of information is sequentially reduced is formed, and the plurality of hierarchically encoded data can be transmitted via a communication path or a recording / reproducing path.
[0004]
The image signal decoding apparatus that decodes the plurality of hierarchically encoded data can also decode all of the plurality of hierarchically encoded data, and any one of the hierarchical codes depending on the resolution of the television monitor corresponding to each of the hierarchically encoded data. It is also possible to select and decode a desired one of the digitized data. Thus, if only desired layer data is decoded from a plurality of layered layer data, desired image data can be obtained with a minimum necessary amount of transmission data.
[0005]
Here, as shown in FIG. 10, as this hierarchical encoding, for example, the image signal encoding device 1 that realizes encoding of four layers includes thinning filters 2, 3, and 4 and an interpolation filter 5, respectively. The reduced image data D2, D3, and D4 having low resolution are sequentially formed for the input image data D1 by the thinning filters 2, 3, and 4 for the input image data D1, and the interpolation filters 5, 6, and 7 are formed. Thus, the reduced image data D2, D3, and D4 are returned to the resolution data D5, D6, and D7 before reduction, respectively.
[0006]
Outputs D2 to D4 of the thinning filters 2 to 4 and outputs D5 to D7 of the interpolation filters 5 to 7 are input to the difference circuits 8, 9, and 10, respectively, and difference data D8, D9, and D10 are generated by the difference circuits. Is done. Since the frequency distribution of the difference data D8 to D10 is concentrated near 0, the image signal In the encoding device 1, the amount of hierarchical data can be reduced, and the signal power can be reduced. In addition, the amount of data can be further reduced by using run-length encoding, Huffman encoding, or the like in a variable-length encoding circuit arranged in the subsequent stage. Here, each of the difference data D8 to D10 and the reduced image data D4 has a size of 1, 1/4, 1/16, 1/64 with respect to the input image data D1.
[0007]
The difference data D8 to D10 obtained from the respective difference circuits 8 to 10 and the reduced image data D4 obtained from the thinning filter are encoded by the encoders 11, 12, 13, and 14, respectively, and subjected to compression processing. The As a result, the first, second, third and fourth hierarchical data D11, D12, D13 and D14 having different resolutions are sent from the encoders 11, 12, 13, and 14 to the communication path in a predetermined order. It is recorded on the recording medium via the transmission path.
[0008]
The first to fourth hierarchical data D11 to D14 transmitted in this way are decoded by the image signal decoding apparatus 20 shown in FIG. That is, the first to fourth hierarchical data D11 to D14 supplied from the communication path or the recording medium via the input terminals are respectively decoded by the decoders 21, 22, 23, and 24. As a result, The decoded fourth layer data D24 is output from the decoder 24.
[0009]
The output of the decoder 23 is added to the interpolation data of the fourth hierarchical data D24 obtained from the interpolation filter 26 in the adding circuit 29, whereby the third hierarchical data D23 is restored. Similarly, the output of the decoder 22 is added to the interpolation data of the third hierarchy data D23 obtained from the interpolation filter 27 in the adder circuit 30, whereby the second hierarchy data D22 is restored. Further, the output of the decoder 21 is added to the interpolation data of the second hierarchical data D22 obtained from the interpolation filter 28 in the adding circuit 31, whereby the first hierarchical data D21 is restored.
[0010]
[Problems to be solved by the invention]
However, in the image signal encoding apparatus 1 that realizes such hierarchical encoding, the input image data D1 is divided into a plurality of hierarchical data, and each hierarchical data is encoded. The amount increases. Therefore, there is a problem that the compression efficiency is reduced as compared with a high efficiency coding method that does not use hierarchical coding.
[0011]
Further, in the image signal decoding apparatus 20, the hierarchical data D24 and D23 are sequentially moved from the upper hierarchical data to the lower hierarchical data so that the lower hierarchical data is restored based on the hierarchical data restored in the upper hierarchy. , D22, D21 are restored. Accordingly, when the encoded upper layer data D14 and D13 are decoded and an error due to compression encoding is included in the decoded data, the lower layer restored layer data D21 or the lower layer where high resolution is originally desired. A compression coding error is propagated to D22, and there is a problem that image quality deterioration based on the error appears very conspicuously in the decompression layer data of the lower layer.
[0012]
The present invention has been made in consideration of the above points. An image signal encoding method and an image signal encoding apparatus that can improve compression efficiency and reduce image quality degradation when hierarchically encoding image data. as well as Image signal transmission method The law It is what we are going to propose.
[0013]
[Means for Solving the Problems]
In order to solve such a problem, in the present invention, when each hierarchical image data generated by the average calculation is quantized, each hierarchical image data is blocked into blocks, and the value of the block is shifted to the positive side. The first quantization result and the second quantization result for at least one layer of image data are quantized for each of the first quantization and the second quantization that is shifted to the negative side. When Where Place them alternately at regular intervals In addition, the number of quantized bits related to the upper layer is made larger than the number of quantized bits related to the lower layer. By doing so, it is possible to realize hierarchical coding in which image quality deterioration such as block distortion is reduced during decoding.
[0014]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, an embodiment of the present invention will be described in detail with reference to the drawings.
[0015]
(1) First embodiment
FIG. 1 shows an image signal encoding device 240 according to the first embodiment as a whole. In the first embodiment, a case is shown in which layer data for three layers is formed, and the data for these three layers are respectively compressed and encoded. The image signal encoding device 240 divides the high-resolution input image data D231 (hereinafter referred to as first layer image data) into small blocks of 2 lines × 2 pixels in the block circuit 241 to obtain the first Hierarchical blocking data D232 is formed, and the first hierarchical blocking data D232 is sent to the thinning circuit 242 and the averaging circuit 243.
[0016]
The averaging circuit 243 averages the pixel values in each block of the block data D232 to generate the second layer image data D233 reduced to 1/4 with respect to the input image data D231, and this second layer image Data D233 is sent to the blocking circuit 244. Similar to the blocking circuit 241, the blocking circuit 244 divides the second layer image data D233 into small blocks of 2 lines × 2 pixels to form the second layer of blocking data D234. Blocking data D234 of the hierarchy of is sent to the thinning circuit 245 and the averaging circuit 246.
[0017]
Similar to the averaging circuit 243, the averaging circuit 246 averages the pixel values in each block of the block data D234 and reduces it to 1/4 of the second layer image data D233, that is, the first layer. Third layer image data D235 reduced to 1/16 of the image data D231 is generated. That is, the averaging circuit 243, as indicated by the dotted line in FIG. ₁₁ , X ₁₂ , X _{twenty one} , X _{twenty two} )
[Expression 1]

Is used to calculate the average value, and one pixel in the second hierarchy shown in FIG. ₁₁ ) Is generated. Pixel Y ₁₃ , Y ₃₁ ,... Are also generated in the same manner by averaging four pixels in the first layer.
[0018]
Similarly, the averaging circuit 246 has four pixels (for example, Y) in the second layer block as shown in FIG. ₁₁ , Y ₁₃ , Y ₃₁ , Y ₃₃ )
[Expression 2]

Is used to calculate the average value, and one pixel (for example, Z) in the third hierarchy shown in FIG. ₁₁ ) Is generated. Pixel Z ₁₅ , Z ₅₁ ,... Are also generated in the same manner by averaging four pixels in the second layer.
[0019]
The decimation circuits 242 and 245 receive the block data D232 from the block circuit 241 and the block data D234 from the block circuit 244, respectively, and select one of the block data D232 and D234 composed of four pixels. Then, thinned data D236 and D237 composed of the remaining three pixels excluding the removed one pixel are formed for each block, and the thinned data D236 and D237 are sent to the quantization circuits 247 and 248, respectively. That is, the thinning-out circuit 242 includes the pixel X as indicated by the dotted line in FIG. ₁₁ , X ₁₃ ,... Are deleted by thinning-out, and the thinning-out circuit 245 displays the pixel Y as shown by the dotted line in FIG. ₁₁ , Y ₁₅ , ... are deleted by thinning out.
[0020]
Accordingly, the pixel to be quantized by the first-level quantization circuit 247 and the second-level quantization circuit 248 is the pixel X indicated by the solid line in FIGS. 2C and 2B. ₁₂ , X _{twenty one} , X _{twenty two} ............ Y ₁₃ , Y ₃₁ , Y ₃₃ ... With regard to the first layer, the number of transmission pixels can be reduced to 3/4 compared to the case where all the pixels in the first layer are quantized and transmitted. Further, regarding the second layer, the number of transmission pixels is reduced to 3/4 compared to the case where all the pixels of the second layer generated by the average calculation are quantized and transmitted.
[0021]
Overall, the image signal encoding device 240 transmits image data of a plurality of layers with the same number of transmission pixels as compared with a case where only the first layer image data D231 is compressed and transmitted. It has been made so that it can. As a result, the image signal encoding device 240 can transmit multiple layers of image data without increasing the amount of transmission information. Note that the pixels thinned out by the thinning circuits 242 and 245 can be restored using a simple arithmetic expression on the decoding side (receiving side) described later.
[0022]
The quantization circuits 247, 248, and 249 requantize each pixel (8 bits) of the thinned data D236, D237, and the third layer image data D235, for example, by 2 bits to compress the information amount.
[0023]
At this time, each of the quantization circuits 247, 248, and 249 does not quantize each pixel in accordance with the minimum distortion norm, and the quantization error polarity varies in both a positive polarity and a negative polarity. Quantize. Quantization according to the minimum distortion criterion is a quantization method that is conventionally used to minimize the quantization error, as will be described later. The quantization circuit 247 quantizes the positive requantization data D238A and the negative requantization data D238B, and the quantization circuit 248 quantizes the positive requantization data D239A and the negative requantization data D239B. The circuit 249 generates positive requantization data D240A and negative requantization data D240B, respectively. These requantized data D238A and D238B, D239A and D239B, D240A and D240B are sent to selectors 254, 255 and 256, respectively.
[0024]
The pixel clock signals CLK1, CLK2, and CLK3 output from the controller 257 that controls the entire image signal encoding device 240 are input to the selectors 254, 255, and 256, respectively. The selectors 254, 255, and 256 receive the clock signals. Are alternately input at the timing of the positive polarity requantization data D238A or negative polarity requantization data D238B, positive polarity requantization data D239A or negative polarity requantization data D239B, positive polarity requantization data D240A or negative polarity The requantized data D240B is selected, and the selected requantized data is sent to the variable length coding circuits (VLC) 250, 251, and 252 as requantized data D238, D239, and D240, respectively. In practice, the pixel clock signals CLK1 to CLK3 output from the controller 257 have the pixel clock frequency decreased by ¼ as they go from the lower layer to the upper layer. If the frequency of the pixel clock signal CLK1 is f, the frequency of the pixel clock signal CLK2 is selected to be f / 4, and the frequency of the pixel clock signal CLK3 is selected to be f / 16.
[0025]
Here, the quantization circuits 247 to 249 will be specifically described with reference to FIG. FIG. 3 shows that when the input data is 8-bit data per pixel and can take a level from 0 to 255, a quantized value “0” is output to the pixels from 0 to 63. , The quantized value “1” is output to the pixels of 64 to 127, the quantized value “2” is output to the pixels of 128 to 191 level, and the quantized value is output to the pixels of level 192 to 255. It represents 2-bit quantization that outputs the value “3”. This is called a distortion minimum criterion, and is a method generally used in the past to minimize the quantization error.
[0026]
The quantization circuits 247 to 249 of the first embodiment perform two types of quantization in which the quantization error is positive and negative for each input pixel without using the minimum distortion norm. For example, when the pixel data input to the quantizing circuits 247 to 249 is at a level such as L1 as shown in FIG. 3, each of the quantizing circuits 247 to 249 has firstly a quantization error. 3 is output as positive polarity (+ δ1 in FIG. 3), that is, the quantization value “3” is output as positive polarity requantized data D238A, D239A, and D240A, and secondly, the quantization error is negative. (-Δ2 in FIG. 3), that is, the quantized value “2” is output as the negative polarity requantized data D238B, D239B, and D240B.
[0027]
Similarly, when the input pixel data has a level such as L2 as shown in FIG. 3, each of the quantization circuits 247 to 249 quantizes the positive requantized data D238A, D239A, and D240A. The value “2” is output, and the quantized value “1” is output as the negative polarity requantized data D238B, D239B, and D240B.
[0028]
Each pixel in FIG. 2C is sequentially input to the thinning circuit 242, the quantization circuit 247, and the selector 254 in units of blocks indicated by dotted lines. For example, X ₁₂ , X _{twenty one} , X _{twenty two} , X ₁₄ , X _{twenty three} , X _{twenty four} , ... are entered in this order. Therefore, the selector 254 has a negative error and the requantized data D238A quantized so as to have a positive error for each pixel in the block based on the clock signal CLK1 from the controller 257. The re-quantized data D238B that has been quantized to be alternately selected and output. That is, in a certain block, two of the three pixels have a positive polarity quantization error, and one has a negative polarity quantization error. In the next block, two of the three pixels have a quantization error with a negative polarity and one has a quantization error with a positive polarity. This causes the three pixels in the block, eg, pixel X ₁₂ , X _{twenty one} , X _{twenty two} Will not have quantization errors with the same polarity in the same direction. Therefore, it is possible to avoid block distortion that occurs when all the pixels in the block have a quantization error with a polarity in one direction, and as a result, it is possible to suppress image quality deterioration in visual characteristics.
[0029]
Similarly, each pixel in FIG. 2B is sequentially input to the thinning circuit 245, the quantization circuit 248, and the selector 255 in units of blocks indicated by dotted lines. For example, Y ₁₃ , Y ₃₁ , Y ₃₃ , Y ₁₇ , Y ₃₅ , Y ₃₇ , ... are entered in this order. Therefore, the selector 255 has a negative error and the requantized data D239A quantized so as to have a positive error for each pixel in the block based on the clock signal CLK2 from the controller 257. The re-quantized data D239B quantized to 1 and 2 are alternately selected and output. This causes the three pixels in the block, eg, pixel Y ₁₃ , Y ₃₁ , Y ₃₃ Will not have quantization errors with the same polarity in the same direction. Therefore, it is possible to avoid block distortion that occurs when all the pixels in the block have quantization errors with a polarity in one direction, and as a result, it is possible to suppress image quality deterioration in visual characteristics.
[0030]
Further, each pixel in FIG. 2A is sequentially input to the quantization circuit 249 and the selector 256 in units of blocks indicated by dotted lines. For example, Z ₁₅ , Z ₅₁ , Z ₅₅ , ... are entered in this order. Accordingly, the selector 256 has a negative error and the requantized data D240A quantized so as to have a positive error for each pixel in the block based on the clock signal CLK3 from the controller 257. The re-quantized data D240B that has been quantized to be alternately selected and output. This causes three pixels in the block, for example pixel Z ₁₅ , Z ₅₁ , Z ₅₅ Will not have quantization errors with the same polarity in the same direction. Therefore, it is possible to avoid block distortion that occurs when all the pixels in the block have quantization errors with a polarity in one direction, and as a result, it is possible to suppress image quality deterioration in visual characteristics.
[0031]
The requantized data D238, D239, and D240 output from the selectors 254, 255, and 256 are supplied to variable length coding circuits (VLC) 250, 251, and 252, respectively. The variable-length encoding circuits 250 to 252 assign a shorter Huffman code to the requantized data D238 to D240 as the quantized code having a higher occurrence frequency, and assign the requantized data D238 to D240 with the smallest possible code amount. The expressed first layer encoded data D241, second layer encoded data D242 and third layer encoded data D243 are formed, and this first layer encoded data D241, second layer encoded data D242 and third layer code are formed. The converted data D243 is sent to the transmission format conversion circuit 253.
[0032]
The transmission format conversion circuit 253 arranges the first layer encoded data D241, the second layer encoded data D242, and the third layer encoded data D243 in a predetermined order, and identifies the layer of each layer encoded data. Is added to form transmission image data D244, and this transmission image data D244 is output. The output transmission image data D244 is then supplied to the receiving side via the communication path 258 or recorded on a recording medium 259 such as a disk, tape, or semiconductor memory via the recording transmission path.
[0033]
In the first embodiment described above, for each layer, two types of requantized data (that is, requantized data quantized to have a positive error and negative polarity data from the quantization circuit). (Requantized data quantized to have an error) is output to the selector, and requantized data with positive polarity error and requantized data with negative polarity error according to the clock signal from the controller Are alternately selected and output. However, the present invention is not limited to this, and a method using no selector is also conceivable. That is, the clock signals CLK1, CLK2, and CLK3 from the controller 257 are directly supplied to the quantizing circuits 247, 248, and 249, respectively, and the quantizing circuits 247, 248, and 249 each have a positive error based on the clock signal. Quantization with a negative polarity and quantization with a negative polarity are alternately performed to generate a pixel X in the block. ₁₂ , X _{twenty one} , X _{twenty two} May be dithered.
[0034]
As a result, as in the above-described embodiment, block distortion that occurs when all the pixels in the block have quantization errors with a polarity in one direction can be avoided, and as a result, image quality deterioration in visual characteristics can be suppressed. Further, in this modification, since the quantization circuit calculates only one requantized data for each pixel and does not have a selector, the circuit scale can be greatly reduced.
[0035]
Image signal decoding for decoding the transmission image data D244 formed in this way Conversion The device 260 can be configured, for example, as shown in FIG.
The image signal decoding device 260 inputs the transmission image data D244 supplied from the recording medium 259 via the communication path 258 or reproduced from the recording medium 259 to the data diversion circuit 261. The data diversion circuit 261 has a switching circuit (not shown), and refers to the identification code of each layer included in the transmission image data D244, the transmission image data D244 as the first layer encoded data D250, the second layer encoded data D251. And the third layer encoded data D252. The first layer encoded data D250, the second layer encoded data D251, and the third layer encoded data D252 are respectively converted into variable length decoding circuits (IVLC) 262, 263, H.264.
[0036]
The variable-length decoding circuits 262, 263, and 264 perform processes opposite to those of the variable-length encoding circuits 250, 251, and 252 shown in FIG. 1 described above, respectively, and are expressed by Huffman codes. The layer encoded data D250, the second layer encoded data D251, and the third layer encoded data D252 are converted into requantized data D253, D254, and D255, respectively, expressed by a requantization code. These requantized data D253, D254, and D255 are sent to the inverse quantization circuits 265, 266, and 267, respectively.
[0037]
The inverse quantization circuit 265 inversely quantizes the requantized data D253, which has been converted to 2 bits per pixel by the quantization circuit 247 shown in FIG. Decoded data D256 is generated. Then, the first hierarchical thinned-out decoded data D256 is sent to the synthesis circuit 268 and the pixel generation circuit 269. The inverse quantization circuit 266 dequantizes the requantized data D254, which has been converted to 2 bits per pixel by the quantization circuit 248 shown in FIG. Decoded data D257 is generated. Then, the second hierarchical decimation data D257 is sent to the synthesis circuit 270 and the pixel generation circuit 271.
[0038]
The inverse quantization circuit 267 inversely quantizes the requantized data D255, which has been converted to 2 bits per pixel by the quantization circuit 249 shown in FIG. Output as image data D258. The third-layer decoded image data D258 is sent to a low-resolution television monitor with a small number of display pixels via an output terminal, for example, and sent to the pixel generation circuit 271.
[0039]
The pixel generation circuit 271 uses the third layer decoded image data D258 and the second layer thinned decoded data D257, and the second thinned out by the thinning circuit 245 of the image signal encoding device 240 shown in FIG. 1 described above. A hierarchical pixel (that is, a pixel indicated by a dotted line in FIG. 2B) is restored. For example, the pixel Y of the second hierarchy deleted by thinning ₁₁ Is:
[Equation 3]

It is restored by performing an operation such as Similarly, all the thinned out pixels are restored using the upper layer pixels generated by the averaging and the pixels used for the generation of the upper layer pixels and not thinned out.
[0040]
The synthesizing circuit 270 inserts the second-layer restored pixel data D259 generated in this way into a predetermined position in the second-layer thinned-out decoded data D257, and synthesizes the second-layer decoded image data D260. Form. Then, the second layer decoded image data D260 is sent to a television monitor having a medium number of display pixels via an output terminal, for example, and sent to the pixel generation circuit 269.
[0041]
The pixel generation circuit 269 uses the second-layer decoded image data D260 and the first-layer thinned-out decoded data D256, and the first thinning-out circuit 242 thinned out by the image signal encoding device 240 shown in FIG. 1 described above. A hierarchical pixel (that is, a pixel indicated by a dotted line in FIG. 2C) is restored. For example, the first layer pixel X deleted by thinning ₁₁ Is:
[Expression 4]

It is restored by performing an operation such as Similarly, all the thinned out pixels are restored using the upper layer pixels generated by the averaging and the pixels used for the generation of the upper layer pixels and not thinned out.
[0042]
The synthesizing circuit 268 inserts the first-layer restored pixel data D261 generated in this way into a predetermined position in the first-layer thinned-out decoded data D256 and synthesizes the first-layer decoded image data D262. Form. Then, the first layer decoded image data D262 is sent to the high-vision television monitor having a large number of display pixels, for example, via the output terminal.
[0043]
In the above configuration, the image signal encoding device 240 generates multiple layers of image data D231, D233, and D235 by generating upper layer pixels based on an average value of a plurality of lower layer pixels.
[0044]
In addition to this, the image signal encoding device 240 uses a simple arithmetic operation on the decoding side for one pixel among the pixels used for the same averaging operation for the hierarchical image data excluding the highest layer, that is, the third layer. Therefore, it is excluded from the transmission pixels. As a result, the image signal encoding device 240 can realize a hierarchical encoding process that does not involve an increase in the number of transmission pixels due to the hierarchical structure.
[0045]
By the way, in the image signal encoding device 240, the quantization circuit 247 to 249 requantizes each layer image data to compress the data amount in each layer. As a result, each of the requantized data D238, D239, and D240 necessarily has a value including a quantization error at the time of requantization. As the quantization error increases, the error from the true value of the decoded image data D258, D260, D262 increases, and the image quality deteriorates.
[0046]
Therefore, the influence of quantization error in each layer in the image signal encoding device 240 and the image signal decoding device 260 will be considered. Where each pixel Z ₁₁ , Y ₁₁ , ... ₁₁ ', Y ₁₁ ′,… And set the true value to Z ₁₁ , Y ₁₁ , ..., and the quantization error is E (Z ₁₁ ), E (Y ₁₁ )..., For example, the third-layer pixel Z obtained by the inverse quantization circuit 267 ₁₁ Decryption value Z of ₁₁ ′ Is the following formula:
[Equation 5]

It becomes. Further, the second-layer pixel Y obtained by the inverse quantization circuit 266 ₁₃ , Y ₃₁ , Y ₃₃ Decrypted value Y of ₁₃ ', Y ₃₁ ', Y ₃₃ ′ Is the following formula:
[Formula 6]

It becomes.
[0047]
However, the second layer pixel Y restored by the pixel generation circuit 271. ₁₁ Is generated based on the equation (3), so the decoded value Y ₁₁ ′ Is the following formula:
[Expression 7]

Z ₁₁ The quantization error with respect to increases by a factor of four.
[0048]
Further, the first hierarchical pixel X obtained by the inverse quantization circuit 265 is used. ₁₂ , X _{twenty one} , X _{twenty two} , X ₁₄ , X _{twenty three} , X _{twenty four} Decrypted value X of ₁₂ ', X _{twenty one} ', X _{twenty two} ', X ₁₄ ', X _{twenty three} ', X _{twenty four} ′ Is the following formula:
[Equation 8]

The first layer pixel X restored by the pixel generation circuit 269 ₁₃ , X ₃₁ , X ₃₃ Is generated based on the equation (4), the decoded value X ₁₃ ', X ₃₁ ', X ₃₃ ′ Is the following formula:
[Equation 9]

And each decoded value X ₁₃ ', X ₃₁ ', X ₃₃ ′, Spatially corresponding second layer pixel Y ₁₃ , Y ₃₁ , Y ₃₃ That is, the quantization error for the corresponding upper layer pixel is affected by a factor of four.
[0049]
Further, the first layer pixel X restored by the pixel generation circuit 269 via the pixel generation circuit 271. ₁₁ The decoded value X ₁₁ ′ Is the following formula:
[Expression 10]

As shown in FIG. ₁₁ ′, The second layer pixel Y ₁₃ , Y ₃₁ , Y ₃₃ In addition to the fact that the quantization error with respect to increases by a factor of 4, the third layer pixel Z ₁₁ As a result, the quantization error with respect to increases by 16 times.
[0050]
FIG. 5 shows each decoded pixel value Z ₁₁ ', Y ₁₁ ', Y ₁₃ Each quantization error E (Z ₁₁ ), E (Y ₁₃ ), E (Y ₃₁ ), ... shows the magnitude of the influence. As is apparent from FIG. 5, the quantization error in the upper layer greatly affects the decoded value in the lower layer.
[0051]
Therefore, when the decoded value in the upper layer has a quantization error continuous in one direction of positive polarity or negative polarity, the influence of the error not only appears as block-like distortion in the upper layer. In some cases, the lower hierarchy may be adversely affected.
[0052]
Considering this, in this first embodiment, when compressing each hierarchical image by quantization, adjacent pixels have quantization errors of opposite polarities (so-called dithering), Reduce visual image quality degradation due to quantization distortion at all levels.
[0053]
Thus, according to the above configuration, pixel data Y for one pixel among a plurality of lower layer pixels used for the same average value calculation to generate one pixel of the upper layer. ₁₁ , Y ₁₅ , ..., X ₁₁ , X ₁₃ ,... Are not transmitted, and when quantizing the pixel data of each layer, for example, three quantization errors (E (X ₁₂ ), E (X _{twenty one} ), E (X _{twenty two} )) In such a manner that the polarity is sequentially reversed (+ E (X ₁₂ ), -E (X _{twenty one} ), + E (X _{twenty two} )) Or (-E (X ₁₂ ), + E (X _{twenty one} ), -E (X _{twenty two} )) To generate re-quantized data, the polarity of the quantization error is alternately inverted between the positive polarity and the negative polarity, so that the compression efficiency can be improved and the block distortion caused by the quantization error can be improved. It is possible to reduce image quality degradation in hierarchical coding that is affected by higher layers.
[0054]
Incidentally, the selector 25 4 For example, the quantization error (+ E (X ₁₂ ), -E (X ₂₁ ), + E (X ₂₂ )) To be The The controller 257 may perform control such that the polarity of the two requantized data is positive for each lock.
[0055]
Further, instead of the method of sequentially reversing the polarity of the requantized data output from the selector 255, for example, the quantization error is (+ E (Y ₁₃ ), -E (Y ₃₁ ), + E (Y ₃₃ )), The controller 257 may perform control such that the polarity of the two requantized data is positive for each block.
[0056]
(2) Second embodiment
FIG. 6 shows an image signal encoding device 280 of the second embodiment as a whole. Compared with the first embodiment, it has the same configuration as that of the image signal encoding device 240 of FIG. 1 except that the residual (difference) of inter-layer data is compressed and encoded except for the highest layer. Accordingly, parts corresponding to those in FIG.
[0057]
That is, the image signal encoding device 240 according to the first embodiment transmits each pixel in the form of PCM (Pulse Code Modulation), whereas the image signal encoding device 280 according to the second embodiment. Each pixel is transmitted in a DPCM (Differential Pulse Code Modulation) format. Therefore, the image signal encoding device 280 can further reduce the amount of transmission information.
[0058]
More specifically, the image signal encoding device 280 supplies the third hierarchy image data D235 and the second hierarchy block data D234 to the difference circuit 281. Then, the difference circuit 281 calculates the difference between the spatially corresponding pixels between the third layer image data D235 and the second layer blocking data D234 to form the second layer difference data D270. The second hierarchy difference data D270 is sent to the thinning circuit 282. At this time, the difference circuit 281 generates the second layer pixel Y ₁₃ , Y ₃₁ , Y ₃₃ Difference value ΔY ₁₃ , ΔY ₃₁ , ΔY ₃₃ , The upper layer pixel Z corresponding to these pixels ₁₁ Using the following formula,
[Expression 11]

It asks like this.
[0059]
Similarly, the image signal encoding device 280 supplies the second hierarchy block data D234 and the first hierarchy block data D232 to the difference circuit 283. The difference circuit 283 calculates the difference between the spatially corresponding pixels between the second hierarchy block data D234 and the first hierarchy block data D232 to form the first hierarchy difference data D271. The one-layer difference data D271 is sent to the thinning circuit 284. At this time, the difference circuit 283 generates the first layer pixel X ₁₂ , X _{twenty one} , X _{twenty two} Difference value ΔX ₁₂ , ΔX _{twenty one} , ΔX _{twenty two} , The upper layer pixel Y corresponding to these pixels ₁₁ Using the following formula,
[Expression 12]

It asks like this.
[0060]
Similar to the thinning circuit 242 shown in FIG. 1 described above, the thinning circuit 284 receives the first hierarchical difference data D271 obtained by the difference circuit 283 based on the blocked data D232 from the blocking circuit 241. Similarly to the thinning circuit 245 shown in FIG. 1 described above, the thinning circuit 282 receives the second hierarchical difference data D270 obtained by the difference circuit 281 based on the blocked data D234 from the blocking circuit 244.
[0061]
Then, corresponding to the block data D232, D234 composed of 4 pixels, one pixel is thinned out from each of the first layer and second layer difference data D271, D270 composed of 4 pixels for each block, Hierarchical difference subtraction data D272 and D273 are formed by the remaining three pixels excluding one pixel removed per block, and the hierarchical difference subtraction data D272 and D273 are sent to the quantization circuits 285 and 286.
[0062]
Here, the quantization circuits 285, 286, and 287 in each layer perform two types of quantization in which the quantization error is positive and negative for each input pixel, as in the first embodiment. Positive polarity requantized data D274A, D275A, D276A having a positive error and negative polarity requantized data D274B, D275B, D276B having a negative error are output in pairs. Then, when the selectors 254, 255, 256 select the positive requantized data D274A, D275A, D276A for the pixel at the predetermined position based on the clock signals CLK1, CLK2, CLK3 from the controller, the next pixel The positive polarity or the negative polarity is alternately selected such that the negative polarity requantized data D274B, D275B, and D276B are selected.
[0063]
The re-quantized data D274, D275, D276 output from the selectors 254, 255, 256 are variable-length encoded by variable-length encoding circuits (VLC) 250, 251, 252, and the first hierarchy, second hierarchy, Output as third layer encoded data D277, D278, D279. Then, these first layer, second layer, and third layer encoded data D277, D278, D279 are input to the transmission format conversion circuit 253, and the transmission format conversion circuit 253 forms the transmission image data D280, Output it. The output transmission image data D280 is then supplied to the receiving side via the communication path 288, or is recorded on a recording medium 289 such as a disk, tape, or semiconductor memory via the recording transmission path.
[0064]
As a modification, as described above in the first embodiment, the clock signal from the controller is directly supplied to the quantization circuit, and the requantized data having a positive polarity error and the negative polarity in the quantization circuit. Alternatively, re-quantized data having the above error may be generated alternately. In this case, the configuration has no selector.
The image signal decoding device 290 that decodes the transmission image data D280 formed in this way can be configured as shown in FIG. 7, for example.
[0065]
In the image signal decoding device 290, the same reference numerals are given to the corresponding parts to the image signal decoding device 260 shown in FIG. The image signal decoding device 290 inputs transmission image data D280 supplied from the recording medium 289 via the communication path 288 or reproduced from the recording medium 289 to the data diversion circuit 261. The data diversion circuit 261 divides the transmission image data D280 into the first layer, the second layer, and the third layer encoded data D281, D282, and D283, and these first layer, second layer, and third layer encoded data. D281, D282, and D283 are supplied to variable length decoding circuits (IVLC) 262, 263, and 264, respectively.
[0066]
Each of the variable length decoding circuits (IVLC) 262, 263, and 264 performs variable length decoding on the first layer, second layer, and third layer encoded data D281, D282, and D283, respectively, and re-quantized data D284, D285. , D286 are formed, and these requantized data D284, D285, D286 are sent to the inverse quantization circuits 291, 292 and 293, respectively. Note that the variable length decoding circuits (IVLC) 262, 263, and 264 perform inverse processing corresponding to the variable length coding circuits (VLC) 250, 251, and 252 shown in FIG.
[0067]
Inverse quantization circuits 291, 292, and 293 dequantize requantized data D284, D285, and D286, which are requantized to 2 bits per pixel, into data of 8 bits per pixel, respectively. And second layer difference subtraction data D287 and D288 and third layer decoded image data D289 are generated. Note that the inverse quantization circuits 291, 292, and 293 execute inverse processing corresponding to the quantization circuits 285, 286, and 287 shown in FIG.
[0068]
Third-layer decoded image data D289 is output as it is to a low-resolution television monitor or the like, and is also transmitted to addition circuit 294 and pixel generation circuit 295. The adder circuit 294 has the following formula:
[Formula 13]

The second hierarchical decimation data D290 is calculated by performing the addition operation as described above.
[0069]
The pixel generation circuit 295 uses the second hierarchy difference thinning data D288 and the third hierarchy decoded image data D289, and uses the second hierarchy pixel Y thinned by the thinning circuit 282 shown in FIG. ₁₁ With the following formula:
[Expression 14]

Ask for. This expression (14) is compared with the above-described expression (3), compared with the above-described expression (3). ₁₁ It can be seen that the multiplication coefficient of (4) is “4” in the equation (3), whereas it is “1” in this equation. This means that the influence of the pixel value of the third layer on the pixel value of the second layer is smaller in the equation (14) than the equation (3).
[0070]
The synthesizing circuit 296 synthesizes the second hierarchy thinned decoded data D290 and the second hierarchy restored pixel data D291 to form second hierarchy decoded image data D292, and this second hierarchy decoded image data D292 is output via the output terminal. In addition to outputting to a television monitor or the like, the data is sent to an addition circuit 297 and a pixel generation circuit 298. The adder circuit 297 has the following formula:
[Expression 15]

The first hierarchical decimation data D293 is calculated by performing the addition operation as described above.
[0071]
The pixel generation circuit 298 uses the first layer difference subtraction data D293 and the second layer decoded image data D292, and uses the first layer pixel X thinned out by the thinning circuit 284 shown in FIG. ₁₃ , X ₃₁ , X ₃₃ With the following formula:
[Expression 16]

Ask for. In addition, the pixel generation circuit 298 includes the thinned first layer pixel X ₁₁ With the following formula:
[Expression 17]

Ask for.
[0072]
The synthesizing circuit 299 synthesizes the first layer deciphered decoded data D293 and the first layer restored pixel data D294 to form first layer decoded image data D295. Then, the first layer decoded image data D295 is output to, for example, a high-resolution television monitor via an output terminal.
[0073]
Next, similarly to the first embodiment, the influence of quantization error in each layer in the image signal encoding device 280 and the image signal decoding device 290 of the second embodiment will be considered.
Third-layer pixel Z obtained by the inverse quantization circuit 293 ₁₁ Decryption value Z of ₁₁ ′ Is the same as the equation (5). The second-layer pixel Y obtained by the adder circuit 294 ₁₃ , Y ₃₁ , Y ₃₃ Decrypted value Y of ₁₃ ', Y ₃₁ ', Y ₃₃ ′ Is the following formula:
[Formula 18]

It becomes the value shown by.
[0074]
Further, the second layer pixel Y restored by the pixel generation circuit 295 ₁₁ Is generated based on the equation (14), so the decoded value Y ₁₁ ′ Is the following formula:
[Equation 19]

It becomes the value shown by. As described above, the image signal encoding device 280 according to the second embodiment transmits the difference data between the layers as transmission data except for the highest layer data, and the equation (19) is the equation (7) described above. Compared to the third layer pixel Z ₁₁ Quantization error E (Z ₁₁ It can be seen that the multiplication coefficient of) is “2”, whereas it is “4” in the equation (7).
[0075]
This means that according to the encoding / decoding of the second embodiment, the influence of the quantization error of the third layer pixel on the decoding of the second layer pixel can be reduced to about half. That is, in the first embodiment, as apparent from the equation (19), the difference between the hierarchies is calculated. ₁₁ The quantization error of the second-order decoded pixel value Y ₁₁ ', Y ₁₃ ', Y ₃₁ ', Y ₃₃ It will be reflected in all of '. Therefore, the influence of the quantization error of the third layer pixel on the decoding of the second layer pixel can be reduced.
[0076]
Further, the first layer pixel X obtained by the adder circuit 297. ₁₂ , X _{twenty one} , X _{twenty two} , X ₃₂ , X ₄₁ , X ₄₂ Decrypted value X of ₁₂ ', X _{twenty one} ', X _{twenty two} ', X ₃₂ ', X ₄₁ ', X ₄₂ ′ Is the following formula:
[Expression 20]

And the first layer pixel X restored by the pixel generation circuit 298. ₃₁ Decrypted value X of ₃₁ ′ Is the following formula:
[Expression 21]

The value indicated by.
[0077]
Further, the first hierarchy pixel X restored by the pixel generation circuit 298 via the pixel generation circuit 295. ₁₁ Decrypted value X of ₁₁ ′ Is the following formula:
[Expression 22]

The value indicated by ₁₁ Affects the quantization error for x4, ₁₃ , Y ₃₁ , Y ₃₃ The quantization error with respect to is doubled. However, as is clear from a comparison of the equations (22) and (10), Z ₁₁ , Y ₁₃ , Y ₃₁ , Y ₃₃ Is the decoded value X ₁₁ The influence on ′ is significantly reduced as compared with the case of the first embodiment.
[0078]
That is, in the first embodiment, for example, as is apparent from the equation (10), the pixel Z in the third hierarchy is used. ₁₁ Quantization error and second layer pixel Y ₁₃ , Y ₃₁ , Y ₃₃ The quantization error of the first-layer decoded pixel value X ₁₁ ′ Only, and the decoded pixel X of the first layer ₁₂ ', X _{twenty one} ', X _{twenty two} It is not reflected in ′.
[0079]
However, in the second embodiment, as apparent from the equation (22), the difference between the hierarchies is calculated. ₁₁ Quantization error and second layer pixel Y ₁₃ , Y ₃₁ , Y ₃₃ The quantization error of the first-level decoded pixel X ₁₁ ', X ₁₂ ', X _{twenty one} It will be reflected in ′. Therefore, the influence of the quantization error of the third layer pixel and the quantization error of the second layer pixel on the decoding of the first layer pixel can be reduced.
[0080]
Therefore, according to the configuration of the second embodiment described above, hierarchical difference data between each hierarchical data of a plurality of hierarchical image data obtained by average value calculation from the input image data D231 and adjacent higher hierarchical data is generated. In the image signal encoding device 280 that quantizes the highest hierarchy data D235 and the plurality of hierarchy difference data D272 and D273, respectively, and generates a plurality of hierarchy encoded data, the adjacent lower layer among the pixels of each hierarchy excluding the highest hierarchy Difference pixel data ΔY that can be restored by an arithmetic operation using pixels in the hierarchy and pixels in the hierarchy ₁₁ , ΔY ₁₅ , ..., ΔX ₁₁ , ΔX ₁₃ ,... Are not transmitted, and when the pixel data of each layer is quantized, the polarity of the quantization error is alternately inverted between positive polarity and negative polarity, thereby suppressing image quality deterioration. The compression efficiency can be further improved in the state.
[0081]
By the way, instead of the method in which the polarity of the quantization error for each pixel data is alternately inverted to positive and negative, the quantization error of two pixel data becomes positive in all the blocks, and one pixel data The quantization error may be controlled by the controller 257 so as to have a negative polarity.
[0082]
(3) Third embodiment
FIG. 8 shows an image signal encoding apparatus 500 of the third embodiment as a whole. The image signal encoding apparatus 500 has the same configuration as that of the image signal encoding apparatus 280 of the second embodiment, except that adaptive prediction circuits 501 and 502 are provided, as compared with the second embodiment. Therefore, the same reference numerals are given to the corresponding parts in FIG.
[0083]
The adaptive prediction circuit 501 performs a predetermined prediction process based on the third layer image data D235 and generates second layer prediction data D500 corresponding to the second layer image data D234. Then, the second layer prediction data is sent to the difference circuit 281. Similarly, the adaptive prediction circuit 502 performs predetermined prediction processing based on the second hierarchy image data D234, and generates first hierarchy prediction data D501 corresponding to the first hierarchy image data D232. Then, the first layer prediction data is sent to the difference circuit 283.
[0084]
In practice, the adaptive prediction circuits 501 and 502 apply class classification adaptive processing to predict one pixel in the lower layer from a plurality of upper layer pixels. Specifically, the lower layer pixels to be predicted are classified based on the level distribution of a plurality of upper layer pixels spatially nearby. The adaptive prediction circuits 501 and 502 have a memory (not shown) that stores a plurality of prediction coefficients or one prediction value for each class, which is obtained by learning in advance, and is determined by the class classification. A plurality of prediction coefficients or one prediction value corresponding to the selected class is read from the memory. In the case of a prediction value, the prediction value is used as it is as a prediction pixel. In the case of a prediction coefficient, a prediction value is generated by linear linear combination of a plurality of prediction coefficients and a plurality of pixels. Further, when the predicted value is normalized, the predicted value is generated by performing a predetermined process on the predicted value.
[0085]
Details of such class classification adaptation processing are disclosed, for example, in Japanese Patent Application No. 4-155719. Such an algorithm for adaptive classification processing is already known. In the adaptive prediction circuit of the third embodiment, an algorithm for class classification adaptive processing is used. However, the present invention is not limited to this, and other currently known prediction methods may be used.
[0086]
FIG. 9 shows the configuration of an image signal decoding device 290 ′ that decodes transmission image data D280 ′ compression-encoded by the image signal encoding device 500. This image signal decoding device 290 ′ is different from the image signal decoding device 290 of the second embodiment in that the image signal decoding device of the second embodiment is provided except that adaptive prediction circuits 501 ′ and 502 ′ are provided. It has the same configuration as the device 290. Therefore, the same reference numerals are given to the corresponding parts to FIG.
[0087]
In the image signal decoding apparatus 290 ′ according to the third embodiment, the first adaptive prediction circuit 501 ′ to which the third layer decoded data D289 ′ is input is the class classification adaptive corresponding to the adaptive prediction circuit 501 shown in FIG. The process is executed based on the third layer decoded data D289 ′, and the second layer prediction data D500 ′ obtained as a result is sent to the pixel generation circuit 295. The pixel generation circuit 295 uses the second hierarchy difference subtraction data D288 ′ and the second hierarchy prediction data D500 ′ output from the second hierarchy inverse quantization circuit 292, and performs the decimation circuit 282 shown in FIG. A thinned second layer pixel is generated. Also, the second layer prediction data D500 ′ obtained by the first adaptive prediction circuit 501 ′ based on the third layer decoded data D289 ′ is output from the second layer inverse quantization circuit 292. It is added to the subtraction data D288 'for the hierarchical difference. The second layer deciphered decoded data D290 ′ obtained by this addition is combined with the second layer pixel D291 ′ generated by the pixel generation circuit 295 to become second layer decoded image data D292 ′.
[0088]
Also, the second adaptive prediction circuit 502 ′ to which the second layer decoded data D292 ′ is input executes the class classification adaptive process corresponding to the applied prediction circuit 502 shown in FIG. 8 based on the second layer decoded data D292 ′. Then, the first layer prediction data D501 ′ obtained as a result is sent to the pixel generation circuit 298. The pixel generation circuit 298 uses the first hierarchy difference subtraction data D287 ′ and the first hierarchy prediction data D501 ′ output from the first hierarchy inverse quantization circuit 291 to perform the decimation circuit 284 shown in FIG. A thinned first layer pixel is generated. Further, the first layer prediction data D501 ′ obtained by the second adaptive prediction circuit 502 ′ based on the second layer decoded data D292 ′ is output from the first layer inverse quantization circuit 291. It is added to the subtraction data D287 'for the hierarchical difference. The first layer deciphered decoded data D293 ′ obtained by this addition is combined with the first layer pixel D294 ′ generated by the pixel generation circuit 298 to become the first layer decoded image data D295 ′.
[0089]
As described above, according to the configuration of the third embodiment described above, in addition to the effects of the second embodiment, the residual of the first layer difference data D271 ′ and the second layer difference data D270 ′ obtained from the difference circuits 283 and 281 is obtained. Can be further reduced, and the image signal encoding device 500 that can further reduce the amount of transmission information can be realized.
[0090]
Incidentally, in this embodiment as well, instead of the method in which the polarity of the quantization error for each pixel data is alternately inverted between positive polarity and negative polarity, the quantization error of two pixel data becomes positive in all the blocks. The controller 257 may control the quantization error of one pixel data so as to have a negative polarity.
[0091]
(4) Other embodiments
In the first to third embodiments described above, the case where the quantization is performed so that the polarity of the quantization error of the adjacent pixel data is alternately inverted in all layers has been described. However, the quantization may be performed only on the hierarchy selected as appropriate.
[0092]
Further, in the first to third embodiments described above, the case where the quantization is performed so that the polarity of the quantization error of the adjacent pixel data is alternately reversed has been described. Finer quantization may be performed with a larger number of quantization bits (a smaller quantization width) for circuits. At this time, it is preferable to determine the number of quantization bits in consideration of the influence of the quantization error of the upper layer on the lower layer. As a result, image quality degradation during decoding can be further reduced. This is because, as described above, the quantization error of the upper layer affects the lower layer during decoding. Also, the degree of influence of the upper layer quantization error on the lower layer is related to the number of layers from the lowest layer and the number of pixels used to generate the upper layer pixels. Therefore, the number of quantization bits or the quantization width may be determined according to these.
[0093]
In the first to third embodiments described above, the case where the quantization is performed so that the polarity of the quantization error of the adjacent pixel data is alternately inverted has been described. Even if it is not inverted, it is possible to obtain the same effect as in the above-described embodiment by performing control so that the polarity of the quantization error is inverted randomly so as not to continue for a long time.
[0094]
In the above-described embodiment, the case has been described where hierarchical image data D231, D234, and D235 for three layers are generated and compressed and transmitted. However, the present invention is not limited to this, and the average value is sequentially calculated. The present invention can also be applied to the case where layer image data for four layers or five layers is generated by repeating the operation, and this is compressed and encoded by quantization and transmitted.
[0095]
Further, in the above-described embodiment, the case where one pixel of the upper layer is generated by the average value calculation using the four pixels of the lower layer has been described. However, the present invention is not limited to this. Hierarchical image data may be generated by generating one pixel in the upper hierarchy by an average value calculation using pixels or more pixels.
[0096]
In the above-described embodiment, the case of thinning out one of the four pixels in the lower hierarchy has been described. However, the present invention is not limited to this, and all the pixels may be sent. In this case, the number of transmission pixels cannot be reduced. However, in the present invention, in short, the polarity of the quantization error may be generated randomly.
[0097]
In the above-described embodiments, all quantizers are described as linear quantizers. However, the present invention is not limited to this, and nonlinear quantization, adaptive quantization, and applied quantum corresponding to the dynamic range. You may apply.
[0098]
Furthermore, although the embodiments of the present invention are realized by the hardware shown using the block diagram, the present invention is not limited to this, and can also be realized by software using a CPU or a memory. It is.
[0099]
Various modifications and application examples can be considered without departing from the spirit of the present invention. Therefore, the gist of the present invention is not limited to the examples.
[0100]
【The invention's effect】
As described above, according to the present invention, when each layer image data generated by the average operation is quantized, each layer image data is blocked into blocks, and the block value is shifted to the positive side. The first quantization result and the second quantization result for at least one layer of image data are quantized for each of the first quantization and the second quantization performed by shifting to the negative side. Where Place them alternately at regular intervals In addition, the number of quantized bits related to the upper layer is made larger than the number of quantized bits related to the lower layer. By doing so, it is possible to realize hierarchical coding in which image quality deterioration such as block distortion is reduced during decoding.
[Brief description of the drawings]
FIG. 1 is a block diagram showing a configuration of an image signal encoding apparatus according to a first embodiment.
FIG. 2 is a schematic diagram for explaining hierarchization and transmission pixels;
FIG. 3 is a schematic diagram for explaining a quantization characteristic of a quantization circuit in the highest layer.
FIG. 4 is a block diagram showing a configuration of an image signal decoding apparatus according to the first embodiment.
FIG. 5 is a schematic diagram showing an influence of a quantization error in each layer on a restored pixel in each layer.
FIG. 6 is a block diagram showing a configuration of an image signal encoding apparatus according to a second embodiment.
FIG. 7 is a block diagram showing a configuration of an image signal decoding apparatus according to a second embodiment.
FIG. 8 is a block diagram showing a configuration of an image signal encoding device according to a third embodiment.
FIG. 9 is a block diagram showing a configuration of an image signal decoding apparatus according to a third embodiment.
FIG. 10 is a block diagram showing a configuration of a conventional image signal encoding apparatus that realizes hierarchical encoding.
FIG. 11 is a block diagram showing the configuration of a conventional image signal decoding apparatus for decoding hierarchically encoded data.
[Explanation of symbols]
240, 280, 500... Image signal encoding device, 243, 246... Averaging circuit, 242, 245, 282, 284... Decimation circuit, 247 to 249, 285 to 287 ... Quantization circuit, 260, 290 ... Image signal decoding device, 254, 255, 256... Selector, 257... Controller, 501, 502, 501 ', 502' .... adaptive prediction circuit, D231 ... input image data, D233 ... second layer Image data, D235 ... Third layer image data, D237A, D238A, D240A, D274A, D275A, D276A ... Positive requantization data, D237B, D238B, D240B, D274B, D275B, D276B ... Negative requantization Data, D241, D277, D277 ′... First layer encoded data, D242 D278, D278 '... 2nd layer encoded data, D243, D279, D279' ... 3rd layer encoded data, D244, D280, D280 '... Transmission image data, D258, D289 ... 3rd layer decoded image Data, D260, D292 ... Second layer decoded image data, D262, D295 ... First layer decoded image data, D270, D270 '... Second layer difference data, D271, D271' ... First layer difference data, D500, D500 '... 2nd hierarchy prediction data, D501, D501' ... 1st hierarchy prediction data, Z ... 3rd hierarchy pixel, Y ... 2nd hierarchy pixel, X ... 1st hierarchy pixel.

Claims (16)

In an image signal encoding method for generating a plurality of hierarchical image data having different resolutions from input image data and encoding each hierarchical image data,
An image data generation step for averaging the plurality of pixel values of each layer image data and generating upper layer image data;
A blocking step for blocking each hierarchical image data into a block;
The value of the block of said each hierarchy image data, quantization step Toka Rannahli quantizing for each of the second quantization performed by shifting the first quantized and negative for performing shifts to the positive side,
In the quantization step, the image data of at least one hierarchy, as well as arranged alternately with the first quantization result and the second quantization result in a cycle of Jo Tokoro, the quantization of the hierarchy An image signal encoding method, wherein the number of bits is made larger than the number of quantized bits related to a lower layer . In an image signal encoding method for generating a plurality of hierarchical image data having different resolutions from input image data and encoding each hierarchical image data,
An image data generation step for averaging the plurality of pixel values of each layer image data and generating upper layer image data;
A blocking step for blocking each hierarchical image data into a block;
A difference data forming step for calculating a difference between corresponding blocks of each layer image data and adjacent upper layer image data for each layer image data except the highest layer image data having the lowest resolution to form layer difference data When,
The first quantization performed by shifting the block values of the top layer image data and the respective layer difference data excluding the top layer shifted to the positive side and the second quantization performed shifted to the negative side quantization step Toka Rannahli to quantization for each of the,
In the quantization step, for at least one layer of the pixel data or difference pixel data, the first with alternately arranging the quantization result and the second quantization result in a cycle of Jo Tokoro, a higher level An image signal encoding method characterized in that the number of quantized bits related to is larger than the number of quantized bits related to a lower layer . In an image signal encoding device that generates a plurality of hierarchical image data having different resolutions from input image data and encodes each hierarchical image data,
Image data generating means for averaging the plurality of pixel values of each layer image data and generating higher layer image data;
Blocking means for blocking each hierarchical image data into blocks;
The values of the blocks in each layer image data, quantizing means Toka Rannahli for quantizing for each of the second quantization performed by shifting the first quantized and negative for performing shifts to the positive side,
The quantization means, the image data of at least one hierarchy, as well as arranged alternately with the first quantization result and the second quantization result in a cycle of Jo Tokoro, the quantization of the hierarchy An image signal encoding apparatus characterized in that the number of bits is made larger than the number of quantized bits related to a lower layer . In claim 3,
The image signal encoding device is configured to generate one pixel among a plurality of lower layer pixels used for the same average value calculation to generate one pixel of an upper layer for each layer image data except the highest layer having the lowest resolution. Including thinned data forming means for thinning out the minute pixel data and forming thinned data formed by the remaining pixels,
The quantization means compresses and encodes the thinned data of each layer excluding the highest layer image data and the highest layer by quantization, and generates a plurality of layer encoded data. Image signal encoding device. In an image signal encoding device that generates a plurality of hierarchical image data having different resolutions from input image data and encodes each hierarchical image data,
Image data generating means for averaging a plurality of pixel values of each hierarchical image data and generating higher hierarchical image data;
Blocking means for blocking each hierarchical image data into blocks;
Difference data forming means for calculating a difference between corresponding blocks of each layer image data and adjacent upper layer image data for each layer image data excluding the highest layer image data having the lowest resolution to form layer difference data When,
The first quantization performed by shifting the block values of the top layer image data and the respective layer difference data excluding the top layer shifted to the positive side and the second quantization performed shifted to the negative side quantization means Toka Rannahli to quantization for each of the,
The quantization means, for at least one layer of the pixel data or difference pixel data, as well as arranged alternately with the first quantization result and the second quantization result in a cycle of Jo Tokoro, a higher level An image signal encoding apparatus characterized in that the number of quantized bits related to is larger than the number of quantized bits related to a lower layer . In claim 5,
In the difference data forming means for forming the hierarchy difference data, a difference between each hierarchy image data and the adjacent lower hierarchy image data predicted and generated by a predetermined prediction calculation process using the adjacent upper hierarchy image data is calculated. An image signal encoding device characterized in that the hierarchical difference data is formed. In claim 5,
The image signal encoding apparatus uses the difference data of the adjacent upper layer and the difference data of its own layer for the layer difference data of each layer formed in the difference data forming unit that forms the layer difference data. Including decimation data forming means for decimation of differential pixel data that can be restored by calculation, and forming decimation data formed by the remaining pixels;
The quantization means compresses and encodes the thinned data of each layer excluding the highest layer image data and the highest layer by quantization, and generates a plurality of layer encoded data. Image signal encoding device. In an image signal transmission method for generating a plurality of hierarchical image data having different resolutions from input image data, encoding each hierarchical image data, and transmitting the encoded data,
An image data generation step for averaging the plurality of pixel values of each layer image data and generating upper layer image data;
A blocking step for blocking each hierarchical image data into a block;
A quantization step for quantizing each of the first quantization performed by shifting the block value of each hierarchical image data to the positive side and the second quantization performed by shifting to the negative side;
Transmission step Toka Rannahli for transmitting the encoded data,
The quantization step, for the corresponding differential pixel data composed of a difference between the block of pixel data or adjacent the upper-layer image data of at least one hierarchy, the first quantization result and the second a quantization result with alternately arranged in a period of Jo Tokoro, the image signal transmission method characterized by larger than the quantization number of bits of the quantization number of bits of the hierarchy to a lower hierarchy. In claim 8,
In the image signal transmission method, one pixel among a plurality of lower layer pixels used for the same average value calculation to generate one pixel of the upper layer for each layer image data except the highest layer having the lowest resolution. A thinning data forming step for thinning out the pixel data of the minute and forming thinning data formed by the remaining pixels,
The quantization step compresses and encodes the thinned data of each layer excluding the highest layer image data and the highest layer by quantization to generate a plurality of layer encoded data. Image signal transmission method. In an image signal transmission method for generating a plurality of hierarchical image data having different resolutions from input image data, encoding each hierarchical image data, and transmitting the encoded data,
An image data generation step for averaging the plurality of pixel values of each layer image data and generating upper layer image data;
A blocking step for blocking each hierarchical image data into a block;
A difference data forming step for calculating the difference between each layer image data and adjacent upper layer image data for each layer image data excluding the highest layer image data having the lowest resolution, and forming layer difference data;
The first quantization performed by shifting the block values of the top layer image data and the respective layer difference data excluding the top layer shifted to the positive side and the second quantization performed shifted to the negative side A quantization step for quantizing each of the
Transmission step Toka Rannahli for transmitting the encoded data,
The quantization step, for at least one layer of the pixel data or difference pixel data, as well as arranged alternately with the first quantization result and the second quantization result in a cycle of Jo Tokoro, a higher level An image signal transmission method characterized in that the number of quantized bits related to is larger than the number of quantized bits related to a lower layer . In claim 10,
In the image signal transmission method, the hierarchy difference data of each hierarchy formed in the step of forming the hierarchy difference data is restored by arithmetic operation using the difference data of the adjacent upper hierarchy and the difference data of each hierarchy. Including a thinning data forming step of thinning out the difference pixel data that can be formed and forming thinning data formed by the remaining pixels;
The quantization step compresses and encodes the thinned data of each layer excluding the highest layer image data and the highest layer by quantization to generate a plurality of layer encoded data. Image signal transmission method. In an image signal encoding device that generates a plurality of hierarchical image data having different resolutions from input image data and encodes each hierarchical image data,
Image data generating means for generating data relating to the upper layer image based on the plurality of pixel values of each of the layer image data;
Blocking means for blocking each hierarchical image data into blocks;
The value of the block of data for each hierarchy, or a quantization means for quantizing for each of the second quantization performed by shifting the first quantized and negative for performing shifts to the positive side Rannahli,
The quantization means, the data related to the image of the at least one hierarchy, as well as arranged alternately with the first quantization result and the second quantization result in a cycle of Jo Tokoro, according to a hierarchy of higher quantum An image signal encoding apparatus characterized in that the number of quantized bits is made larger than the number of quantized bits related to a lower layer . In an image signal encoding device that generates a plurality of hierarchical image data having different resolutions from input image data and encodes each hierarchical image data,
Image data generating means for averaging the plurality of pixel values of each layer image data and generating higher layer image data;
The value of each hierarchical image data, a first quantization means Toka Rannahli quantization and quantization error is quantized for each of the second quantization is negative quantization error is positive value,
The quantization means, the image data of at least one hierarchy, as well as arranged alternately with the first quantization result and the second quantization result in a cycle of Jo Tokoro, the quantization of the hierarchy An image signal encoding apparatus characterized in that the number of bits is made larger than the number of quantized bits related to a lower layer . In an image signal encoding method for generating a plurality of hierarchical image data having different resolutions from input image data and encoding each hierarchical image data,
An image data generation step for averaging the plurality of pixel values of each layer image data and generating upper layer image data;
The values of each layer image data, quantization step Toka Rannahli quantizing for each of the second quantization first quantization and quantization error quantization error is positive value is a negative value,
The quantization step, for the image data of at least one hierarchy, as well as arranged alternately with the first quantization result and the second quantization result in a cycle of Jo Tokoro, the quantization of the hierarchy An image signal encoding method, wherein the number of bits is made larger than the number of quantized bits related to a lower layer . In an image signal encoding device that generates a plurality of hierarchical image data having different resolutions from input image data and encodes each hierarchical image data,
Image data generating means for averaging the plurality of pixel values of each layer image data and generating higher layer image data;
Difference data forming means for calculating a difference between each layer image data and adjacent upper layer image data for each layer image data excluding the highest layer image data having the lowest resolution, and forming layer difference data;
The values of the highest-order hierarchical image data and the hierarchical difference data excluding the highest-order hierarchy are the first quantization in which the quantization error is positive and the second quantization in which the quantization error is negative. quantization means Toka Rannahli to quantization for each,
The quantization means, for at least one layer of the pixel data or difference pixel data, as well as arranged alternately with the first quantization result and the second quantization result in a cycle of Jo Tokoro, a higher level An image signal encoding apparatus characterized in that the number of quantized bits related to is larger than the number of quantized bits related to a lower layer . In an image signal encoding method for generating a plurality of hierarchical image data having different resolutions from input image data and encoding each hierarchical image data,
An image data generation step for averaging the plurality of pixel values of each layer image data and generating upper layer image data;
A difference data forming step for calculating the difference between each layer image data and adjacent upper layer image data for each layer image data excluding the highest layer image data having the lowest resolution, and forming layer difference data;
The values of the highest-order hierarchical image data and the hierarchical difference data excluding the highest-order hierarchy are the first quantization in which the quantization error is positive and the second quantization in which the quantization error is negative. and the quantization step to quantization for each
Or Rannahli,
The quantization step, for at least one layer of the pixel data or difference pixel data, as well as arranged alternately with the first quantization result and the second quantization result in a cycle of Jo Tokoro, a higher level An image signal encoding method characterized in that the number of quantized bits related to is larger than the number of quantized bits related to a lower layer .

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