JP3902390B2 - Video signal processing circuit - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a video signal processing circuit in which a level for limiting a large signal such as noise included in the white side of a video signal in a TV receiver can be changed by APL of the video signal.
[0002]
[Prior art]
In a TV receiver, in order to cause blooming when there is noise on the white side of the luminance signal, a limiter that clips the peak of the white side signal at a certain level is usually included.
[0003]
That is, FIG. 6 is a block diagram of a television signal processing. Radio waves transmitted from a television transmitter and received by a tuner (not shown) are subjected to video intermediate frequency amplification and video detection, and a video signal is extracted. The extracted video signal passes through the chroma band pass filter 1 and is added to the chroma demodulation circuit 2 to demodulate the color signals RY, GY and BY. The color signals R-Y, G-Y, and BY are added to the matrix circuit 3.
[0004]
On the other hand, a part of the video signal is also applied to the chromato wrap circuit 4 and a luminance signal (Y signal) is taken out. Then, after being delayed by the delay circuit 5, it is applied to a circuit 6 that performs black expansion, DC reproduction, and white peak limit. Luminance signals applied to these circuits 6 are first black expanded and DC-reproduced, and then blooming occurs if there is noise in the white level of the luminance signal. Therefore, the white level of the luminance signal at the white peak limit. The peak of is clipped at a constant value.
[0005]
The luminance signal thus processed is added to the matrix circuit 3 and is matrixed with the color signals R-Y, G-Y and BY, and the R, G and B signals are taken out and added to the cathode ray tube. Project the image.
[0006]
[Problems to be solved by the invention]
In order to cause blooming when there is noise on the white side of the luminance signal, conventionally, a circuit for performing white peak limit is provided, and the white signal is peak clipped at a certain level. The peak clipping level is more effective against noise, but if it is too low, it affects the video signal and cannot be lowered. Conventionally, some noise is allowed.
[0007]
[Means for Solving the Problems]
The present invention makes it possible to vary the white peak limit level of the white peak limit variable circuit to which the luminance signal from the input terminal is added according to the APL detection value of the video signal, and when the APL of the video signal is low, the level of the white peak limit When the APL is high, the white peak limit level is increased so as not to affect the video signal.
[0008]
Further, when detecting the APL, because of the black expansion of the luminance signal, the white signal is detected by the APL without increasing the number of pins of the integrated circuit by using the black peak detection filter connected to the pin of the black peak detection circuit. The present invention relates to a video signal processing circuit capable of varying a peak limit level.
[0009]
DETAILED DESCRIPTION OF THE INVENTION
FIG. 1 is a detailed block diagram of the black extension, DC reproduction and white peak limit circuit 6 shown in FIG. 6 in the video signal processing circuit of the present invention. The black extension is performed according to the black extension circuit 10 and the APL. The DC regeneration rate variable circuit 11 and the white peak limit variable circuit 12 for varying the DC regeneration rate.
[0010]
The black extension circuit 10 includes a pedestal clamp circuit 13 for clamping a pedestal portion of the luminance signal applied to the input terminal IN via the chromato wrap circuit 4 and the delay 5 of FIG. 6 to a reference voltage 1/2 Vcc which is a pedestal level, Non-linear amplifier circuit 14 that extends the black signal of the clamped luminance signal, HV blanking circuit 15 that removes a synchronization signal and a pedestal part that interfere with detection of a black peak, and the synchronization signal and pedestal part are removed. A black peak hold circuit 16 for detecting and holding a black peak from the luminance signal component, and a comparison for comparing the pedestal level value clamped by the pedestal clamp circuit 13 with the black peak value detected by the black peak hold circuit 16 The non-linear type according to the result of comparison in the circuit 17 and the comparison circuit 17 And a start point setting circuit 18 for changing the start point of the amplifier circuit 14.
[0011]
The black expansion circuit 10, the DC reproduction variable circuit 11 and the white peak limit variable circuit 12 are integrated, and the black peak hold circuit 16, the DC reproduction rate variable circuit 11 and the white peak limit variable circuit of the black expansion circuit 10 are integrated. 12 is provided in common.
[0012]
The commonly connected pin 20 is connected to a dual-purpose filter 23 composed of a capacitor 21 and a resistor 22 for both black peak detection and APL detection.
[0013]
Next, the operation will be described. The luminance signal applied to the input terminal IN clamps the pedestal portion to the reference voltage 1/2 Vcc by the pedestal clamp circuit 13. The clamped luminance signal is applied to the nonlinear amplifier circuit 14.
[0014]
On the other hand, the H (horizontal blanking) and V (vertical blanking) signals applied to the HV blanking circuit 15 are removed from the sync signal and the pedestal portion to become only the luminance signal component, and are applied to the black peak hold circuit 16 to be black The peak is held. The value of the black peak held by the black peak hold circuit 16 is added to the comparison circuit 17, where it is compared with the value of the pedestal clamped by the pedestal clamp circuit 13, and if the black peak is above the pedestal. The start point goes up, the black peak goes down, and the blackness of the luminance signal is expanded.
[0015]
As shown in FIG. 2, the gain (slope) of the luminance signal below the start point is not changed, and only the start point is translated to perform black expansion.
[0016]
As shown in FIG. 3, by changing the start point according to the value of the black peak hold circuit 16, it can be varied from 0 IRE to 100 IRE, for example.
[0017]
The luminance signal applied to the input terminal IN as described above clamps the pedestal portion to the reference voltage 1/2 Vcc by the pedestal clamp circuit 13. The clamped luminance signal is applied to the non-linear amplifier circuit 13 and is black-expanded, and then applied to the DC reproduction rate variable circuit 11.
[0018]
Further, a signal corresponding to the black peak is detected by a dual-purpose filter 23 comprising a capacitor 21 and a resistor 22 provided on the pin 20. Here, since the time constant of the combined filter 23 is as large as about 1 μF for the capacitor 21 and about 680 KΩ, the signal corresponding to the black peak can be used as an APL signal for a white peak limiter described later. Thus, APL detection is not actually performed, and the voltage value of the dual-purpose filter 23 is used as a substitute for the APL signal. However, for the sake of convenience, a signal corresponding to this black peak is referred to as an APL signal.
[0019]
Thus, the APL signal detected by the dual-purpose filter 23 (black peak filter) is applied to the DC regeneration rate variable circuit 11, and after the DC component corresponding to the APL is reproduced from the luminance signal, it is applied to the white peak limit variable circuit 12. The APL signal detected by the dual-purpose filter 23 is also added to the white peak limit variable circuit 12 together with the luminance signal.
[0020]
As shown in FIG. 4, the white peak limit variable circuit 12 changes the level of the white peak limit according to the APL of the video signal. That is, when the APL of the video signal is low, the white peak limit level is lowered to effectively suppress noise. Since the video signal is dark at this time, the video signal is not affected even if the white peak limit level is lowered. Conversely, when the APL of the detected video signal is high, the white peak limit level of the white peak limit variable circuit 12 is increased so as not to affect the video signal.
[0021]
FIG. 5 is a specific circuit diagram of the white peak limit variable circuit 12. Reference numeral 25 denotes a buffer transistor to which a luminance signal from the DC reproduction rate variable circuit 11 is added, and a limited video signal is output from the emitter. Reference numeral 26 denotes a limit transistor that performs white peak limit. The emitter is supplied with a power supply voltage Vcc via a constant current circuit 27, and the collector is grounded.
[0022]
28 is a level setting transistor for determining the minimum level of the white peak limit of the limit transistor 26. A battery 24 having a voltage A for determining the value of the minimum level of the white peak limit is connected to the base, and the collector Is supplied with a power supply Vcc, and the emitter is connected to the base of the first transistor 26 via a resistor 29.
[0023]
Reference numeral 30 denotes a first transistor, and an emitter is connected to a power source Vcc. Reference numerals 31, 32, 33, and 34 denote second, third, fourth, and fifth transistors constituting a current mirror circuit, respectively. The collector of the second transistor 31 is connected to the collector of the first transistor 30. The collector of the third transistor 32 is connected to the collector of the fourth transistor 33.
[0024]
Reference numeral 35 denotes a control first transistor connected to the pin 20 provided in the black peak hold circuit 16, and reference numeral 36 denotes a control second transistor connected to a battery 37 defining a pedestal level of 1/2 Vcc. Yes. The emitters of the first transistor 35 and the second transistor 36 for control are coupled via a resistor 38 and a resistor 39, and are grounded via a constant current circuit 40. The collector of the first transistor 35 for control is diode-connected. The power supply voltage Vcc is supplied through the transistor 42. Further, the collector of the control second transistor 36 is connected to the collector of the fifth transistor 34 constituting the current mirror circuit.
[0025]
As described above, the luminance signal added to the input terminal IN and clamped to the pedestal level by the pedestal clamp circuit 13 is the peak value held by the non-linear amplifier 14 and the black peak hold circuit 16. The compared value is compared with the comparison circuit 18, and the luminance signal is black expanded.
[0026]
The black expanded luminance signal is regenerated by the direct current reproduction rate variable circuit 11 according to the APL and applied to the base of the buffer transistor 25 of the white peak limit variable circuit 12.
[0027]
On the other hand, a signal corresponding to the APL detected by the dual-purpose filter 23 is applied to the base of the first transistor 35 for control of the white peak limit variable circuit 12. By the way, since the signal detected when the luminance signal is bright is higher than Vcc / 2, the current flowing between the collector and the emitter of the second transistor 36 flows because the first transistor 35 becomes more conductive and the current flowing between the collector and the emitter increases. The current decreases.
[0028]
When the current flowing between the collector and emitter of the control second transistor 36 decreases, the current flowing through the fifth transistor 34 constituting the mirror circuit decreases. As a result, the current flowing between the collector and the emitter of the second transistor 31 decreases, and the current flowing through the first transistor 30 increases.
[0029]
Then, the difference between the currents flowing in the first transistor 30 and the second transistor 31 flows in the resistor 29, the base voltage of the limit transistor 26 is increased, the peak level of the white peak limit is increased, and the buffer transistor 25 The white side peak of the luminance signal extracted by the emitter is output without much limitation.
[0030]
Conversely, since the signal detected when the luminance signal is dark approaches Vcc / 2, the current flowing through the control first transistor 35 and the second transistor 36 is balanced, and the current does not flow through the resistor 29. The emitter voltage (limit voltage) of the transistor 26 approaches a level determined by the battery 24 and sufficiently limits the signal peak on the white side.
[0031]
Thus, according to the above-described white peak limit variable circuit 12, the level of the white peak limit of the luminance signal can be made variable by the APL of the video signal.
[0032]
【The invention's effect】
In the video signal processing circuit of the present invention, the clip level of the white peak limit variable circuit to which the luminance signal is applied from the input terminal can be varied by the APL of the video signal. Therefore, when the APL of the video signal is low and the video signal is dark, the white peak limit level can be lowered to sufficiently remove noise without affecting the video signal. Conversely, when the APL of the video signal is high, the level of the white peak limit can be increased so as not to affect the video signal.
[0033]
Since the APL of the video signal can be used as a black peak detection filter as it is, it is not necessary to add a pin for detecting the APL to the integrated circuit.
[0034]
In addition, since the level setting transistor that determines the minimum level of the white peak limit is connected to the limit transistor that performs the white peak limit, the minimum white peak limit necessary to limit the noise even when the video signal is bright and the APL is low. The level is retained.
[Brief description of the drawings]
FIG. 1 is a block diagram of a video processing circuit of the present invention.
FIG. 2 is a characteristic diagram showing the start of black expansion in the video processing circuit of the present invention.
FIG. 3 is a waveform diagram for explaining black expansion of the video processing circuit of the present invention.
FIG. 4 is a characteristic diagram of white peak limit of the video processing circuit of the present invention.
FIG. 5 is a circuit diagram showing an embodiment of a variable white peak limit circuit of the video processing circuit according to the present invention.
FIG. 6 is a block diagram of a television signal processing circuit using the video processing circuit of the present invention.
[Explanation of symbols]
6 Black extension DC regeneration white peak limit circuit 10 Black extension circuit 11 DC regeneration rate variable circuit 12 White peak limit variable circuit 13 Pedestal clamp circuit 14 Non-linear amplification circuit 16 Black peak hold circuit 17 Comparison circuit 18 Start point setting circuit 20 Pin 23 Combined filter 25 Buffer transistor 26 Limit transistor 28 Minimum limit level setting transistor 35 Control first transistor 36 Control second transistor

Claims (4)

A combined filter consisting of a resistor and a capacitor connected in parallel to detect the APL of the video signal together with the black peak of the luminance signal;
A white peak limit variable circuit that varies the level of the white peak limit of the luminance signal in accordance with the detection result of the APL of the dual-purpose filter;
A video signal processing circuit comprising the. According to the detection result of the black peak of the dual-purpose filter, further comprising a black expansion circuit for black expansion of the luminance signal,
The video signal processing circuit according to claim 1 , wherein the luminance signal input to the white peak limit variable circuit is a luminance signal black expanded by the black expansion circuit. The black expansion circuit includes
A pedestal clamp circuit that clamps the pedestal level of the luminance signal to a level determined by a reference voltage ;
A non-linear amplifier circuit that expands the black signal of the luminance signal clamped by the pedestal clamp circuit ;
In accordance with the detection result of the black peak of the dual-purpose filter, a black peak hold circuit that holds the black peak of the luminance signal that has been black-stretched by the nonlinear amplifier circuit ;
A comparison circuit that compares the value of the pedestal level clamped by the pedestal clamp circuit with the value of the black peak held by the black peak hold circuit;
Depending on the comparison result of the comparison circuit, a start point setting circuit for changing the start point of the non-linear amplifier circuit,
The video signal processing circuit according to claim 2, wherein a. The white peak limit variable circuit is :
A buffer transistor to which a luminance signal is input ;
A transistor for limiting to limit the white peak of the luminance signal output from the transistor for said buffer,
Said transistor for level setting for setting a level minimum value of the white peak limit for the transistor for pre SL Limit,
A resistor connected between the output of the level setting transistor and the input of the limit transistor;
A control transistor that varies a current flowing through the resistor according to a detection result of the APL of the dual-purpose filter ,
2. The video signal processing circuit according to claim 1, wherein the limit transistor makes the level of the white peak limit variable in accordance with a magnitude of a current flowing through the resistor .

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