JP3948142B2 - High-efficiency encoding device and high-efficiency decoding device - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a high-efficiency encoding apparatus and decoding apparatus for image signals. The present invention also relates to a high-efficiency encoding apparatus and decoding system used for a system for recording / reproducing a signal encoded on a recording medium, or a system for distributing / receiving a signal encoded using a transmission path, etc. It relates to the device.
[0002]
[Prior art]
In recent years, information signals that have been digitized image signals compressed by high-efficiency coding are used to distribute information over transmission lines such as satellite waves, terrestrial waves, and telephone lines, and to media such as optical disks and magnetic media. A recording / reproducing system has been developed and put into practical use. As a high-efficiency encoding method for moving images used in such a system, there is MPEG2 which is an international standard.
MPEG2 is an encoding method that compresses the amount of information of an image signal by using the correlation between adjacent pixels (spatial direction) of the image signal and the correlation of a frame or field (time direction).
[0003]
First, temporally continuous image frames are divided into a reference frame and a prediction frame. The reference frame is periodically inserted, and the image can be restored only with the encoded data of the frame by using only the spatial direction correlation. The prediction frame is encoded by using both the correlation in the time direction and the correlation in the spatial direction from the reference frame, and the encoding efficiency can be higher than that of the reference frame. The predicted frame is restored by the decoded reference frame and encoded data.
[0004]
An apparatus configured as shown in FIG. 4 is known as an MPEG2 standard encoding apparatus that realizes high-efficiency encoding using such prediction processing between image frames.
In the apparatus shown in FIG. 4, the input digital image signal is recorded in a frame memory (input image memory), and is delayed because it is rearranged in the order of encoding according to the encoding syntax. In the MPEG2 standard, the 8-bit precision signal of CCIR Recommendation 601 (Rec601) is specified as the input / output format of the image signal. Therefore, when a signal with higher precision than 8 bits is input, the lower 2 bits are rounded. Thus, it is stored as an 8-bit precision image signal in the input image memory.
[0005]
The digital signal output from the input image memory is converted into a two-dimensional block of N pixels in the vertical direction and M pixels in the horizontal direction (usually N and M are 8) by the two-dimensional block conversion circuit in the reference frame. The transformed data is subjected to DCT transformation in an orthogonal transformation circuit and sent to a quantization circuit. The DCT transform coefficient quantized in the quantization circuit is variable by referring to the address corresponding to the coefficient in the coding table in the coding circuit for each unit (macroblock) in which a plurality of the two-dimensional blocks are collected. Long or fixed length encoding is performed. The encoded data output from the encoding circuit is multiplexed with additional information indicating the location of the macroblock in the screen by the multiplexer and output as a bit stream.
[0006]
In addition, the DCT transform coefficient quantized in the quantization circuit is subjected to inverse quantization and inverse DCT transform in the inverse quantization circuit and the inverse orthogonal transform circuit, and the signal obtained by decoding the encoded bit stream has an 8-bit accuracy. It is rounded and stored in the reference image memory as a predicted reference image (hereinafter referred to as a reference image). This processing is called local decoding processing, and an inverse quantization circuit, an inverse orthogonal transform circuit, a deblocking circuit, an adder, and a reference image memory form a local decoding processing unit.
[0007]
Subsequently, in the prediction frame, the image of the frame to be encoded and the original image of the frame to be the reference image are respectively supplied from the input image memory to the motion vector detection circuit, and a motion vector between the two images is obtained. The motion vector detection circuit generally obtains a motion vector by block matching. The image to be encoded and the original image of the frame serving as the reference image are each made into a two-dimensional block, and the motion component in the screen for the block having the smallest difference absolute value sum (or difference sum of squares) for each pixel is output as a motion vector. . The motion vector detection circuit determines which prediction mode is used for encoding, and also outputs a prediction mode signal.
[0008]
The prediction block (reference image block) is subtracted from the input image block to be encoded by a subtracter. The subtraction operation is performed according to the prediction mode signal from the motion vector detection circuit. The prediction block (reference image block) supplied to the subtracter is a signal that is cut out from the reference image memory and subjected to motion compensation according to the motion vector by the motion compensation prediction circuit.
The difference signal that is the output signal of the subtracter is a 9-bit precision signal because the input image and the reference image are each 8-bit signals. This difference signal is input to an orthogonal transform circuit that performs discrete cosine transform (DCT) via a two-dimensional block transform circuit. Then, the same processing as each block of the reference frame is performed, and the DCT transform coefficient is quantized and output as a bit stream together with the motion vector and the prediction mode.
[0009]
Regarding the control of the code amount, the code amount of the output stream is compared with the target code amount in the rate control circuit, and in order to approach the target code amount, the quantization level of the quantization circuit (quantization) Control). In the case of MPEG2, there are three types of picture types with different information amounts: a reference frame (I picture) and two types of prediction frames (P picture: unidirectional prediction, B picture: bidirectional prediction). The target code amount for each frame is calculated using the properties and appearance frequency of the three picture types with respect to the conversion rate. Further, the target code amount is limited so that the overflow / underflow of the buffer does not occur by virtually simulating the stream buffer of the decoding device. The quantization scale calculates the quantization scale value for the target code amount for each picture type by using the fact that the scale and the output code amount are generally inversely proportional, and performs quantization processing.
[0010]
By varying the quantization scale in a direction approaching the target code amount for each block, the encoded bit stream is suppressed within the target code amount. In the case of fixed transfer rate encoding, if the amount of the encoded stream is less than the set encoding rate even if a fine quantization scale is used, a code that is insufficient before the header code indicating the delimiter of one picture By stuffing an amount of stuffing bits, it matches the set coding rate.
[0011]
[Problems to be solved by the invention]
In the case of MPEG2, the input signal is limited to 8-bit precision. Therefore, in the above-described image encoding apparatus and decoding apparatus that decodes encoded data, the motion vector detection circuit and the motion compensation prediction circuit are signals with an 8-bit precision. It is configured on the assumption. However, with the improvement of digital signal processing performance, there are cases where image data has an accuracy of 8 bits or more. For example, when converting a movie film into digital data, conversion is performed with 10-bit accuracy, or an image signal with 10-bit accuracy is sometimes used for transmission of video material at a broadcasting station or the like.
However, due to limitations of the MPEG2 standard, signal components with an accuracy of 8 bits or more are truncated in the process before encoding, and it is not possible to encode an image signal with 10 bits of accuracy while maintaining accuracy. It was.
[0012]
The present invention is a high-efficiency encoding device and a high-efficiency decoding device that encodes and decodes an MPEG standard-compatible encoded stream, and complies with the standard for an image signal having an input accuracy equal to or higher than the MPEG standard, and An object of the present invention is to provide a high-efficiency encoding device and a high-efficiency decoding device that can perform high-quality encoding / decoding.
[0013]
[Means for Solving the Problems]
In order to solve the above problems, the present invention
(1) In a high-efficiency encoding device conforming to the MPEG standard, in which an n-bit precision signal is defined as an input / output format of an image signal,
a reference image memory for storing a predicted reference image of n-bit accuracy;
an input image memory of m bit accuracy (m = n + α: α is an integer of 1 or more) for storing an input image signal of m bit accuracy;
The m-bit output signal of the input image memory is expressed as m. a signal conversion circuit for converting the signal into an α-bit format signal;
Calculating a motion vector between an encoding target image stored in the input image memory and an image stored in the input image memory corresponding to an image serving as a prediction reference image of the encoding target image, or An m-bit vs. m-bit motion vector detection circuit for calculating a motion vector between the encoding target image stored in the input image memory and the predicted reference image stored in the reference image memory;
A motion compensated prediction circuit that performs motion compensation on an n-bit precision predicted reference image read from the reference image memory according to the motion vector;
M. Of the signal conversion circuit. Subtracting an n-bit precision prediction reference image motion-compensated by the motion compensation prediction circuit from the α-bit output signal (m + 1). a subtractor that outputs an α-bit difference signal;
Output from the subtracter (m + 1). an orthogonal transformation circuit that performs orthogonal transformation by inputting an upper n + 1 bit signal in an α-bit difference signal as an integer part and a lower α-bit signal as a decimal part;
A quantization / encoding circuit that quantizes and encodes the orthogonal transform coefficient signal output from the orthogonal transform circuit;
A high-efficiency encoding device that encodes the m-bit precision input image signal.
As well as providing
[0014]
(2) In a high-efficiency decoding device compliant with the MPEG standard in which an n-bit precision signal is defined as an input / output format of an image signal,
an n-bit precision reference image memory;
an output image memory with m-bit accuracy (m = n + α, where α is an integer of 1 or more);
Inverse orthogonal transform is performed on the orthogonal transform coefficient signal restored by inverse quantization of the quantized orthogonal transform coefficient signal obtained by decoding the input encoded image signal, and the integer part of the upper n + 1 bit signal and the lower α bit signal Decimal part (m + 1). an inverse orthogonal transform circuit that outputs an α-bit decoded signal;
Output from the inverse orthogonal transform circuit (m + 1). The α-bit decoded signal is converted into an m + 1-bit format and output as an m + 1-bit decoded signal, and the (m + 1). a signal conversion circuit for converting an α-bit decoded signal into an n + 1-bit format and outputting it as an n + 1-bit decoded signal;
A motion compensated prediction circuit that performs motion compensation of a predicted reference image with n-bit accuracy read from the reference image memory in accordance with a motion vector decoded from the input encoded image signal;
A first adder that supplies an m-bit decoded image signal obtained by adding the n + 1-bit predicted reference image motion-compensated by the motion-compensated prediction circuit and the m + 1-bit decoded signal to the output image memory;
A second adder for supplying an n-bit decoded image signal obtained by adding the n-bit-accurate predicted reference image motion-compensated by the motion-compensated prediction circuit and the n + 1-bit decoded signal to the reference image memory; Prepared,
High performance Ritsufuku Goka apparatus characterized by decoding the high-efficiency encoding input encoded image signal.
Is to provide.
[0015]
DETAILED DESCRIPTION OF THE INVENTION
The present invention complies with the standard by, for example, making a 10-bit precision image signal encoding process and decoding process compatible with an MPEG2 encoding system while supporting a 10-bit precision signal, and A high-efficiency encoding device and a high-efficiency decoding device that can perform high-quality encoding / decoding.
[0016]
FIG. 1 shows and describes a first embodiment of a high-efficiency encoding apparatus according to the present invention. The input image signal is an image signal (here, 10 bits) having higher accuracy than the 8-bit accuracy of the MPEG standard.
The input image signal is stored in an input image memory capable of recording 10-bit precision image data. The 10-bit vs. 10-bit motion vector detection circuit receives 10-bit image data stored in an input image memory as an input, and generates an image of a frame to be encoded and a source of a frame to be a reference image (predicted reference image). Each image is cut out from the input image memory as a two-dimensional block, and pattern matching processing is performed between both images. Then, the motion vector detection circuit detects a motion vector.
[0017]
This motion vector detection circuit can also perform detection processing using a locally decoded image stored in a reference image memory (8-bit precision) as a reference image. In this case, the input image data is 10 Since the reference image is 8 bits compared to the bits, the image accuracy of motion vector detection is 8 bits. (The lower 2 bits of the input image are discarded and invalidated when a motion vector is detected.)
The input image signal for which a motion vector has been calculated with respect to the reference image is signal-converted to 10.2 bits (2 bits after the decimal point in 10-bit accuracy) by a signal conversion circuit.
Actually, the upper 8 bits of the 10-bit signal are used as an integer signal, and the lower 2 bits are used as a signal after the decimal point.
[0018]
The 10.2-bit input signal output from the signal conversion circuit is subtracted from the 8-bit reference image signal (8-bit prediction signal) by the subtractor. The subtraction operation is performed according to the prediction mode signal from the motion vector detection circuit. An 8-bit reference image signal (8-bit prediction signal) supplied to the subtracter is a signal that is cut out from the reference image memory and subjected to motion compensation in accordance with the motion vector by the motion compensation prediction circuit.
The output signal of the subtracter is input to an orthogonal transform circuit that performs discrete cosine transform (DCT) via a two-dimensional block transform circuit. The accuracy of the image at this time is 11.2 bits (2 bits after the decimal point in the 11-bit accuracy).
[0019]
The orthogonal transform circuit normally has an input of 9 bits in an MPEG2 standard compliant encoding device, and is converted to an accuracy of 16 bits or more in order to maintain accuracy in DCT calculation internally. In this case, 0 is input to the part after the decimal point to perform DCT calculation. In this embodiment, the input to the orthogonal transform circuit is performed with 11.2 bits, so that an input is also given to the portion below the decimal point of the DCT input. The orthogonal transform circuit performs DCT calculation processing similar to the MPEG2 standard, and inputs the resulting DCT coefficient to the quantization circuit. The coefficients quantized by the quantization circuit are output as a bit stream together with the motion vector and the prediction mode by the encoding circuit, the encoding table, the rate control circuit, and the multiplexer in the same manner as in the MPEG2 standard.
[0020]
In the local decoding processing unit formed by the inverse quantization circuit, the inverse orthogonal transformation circuit, the deblocking circuit, the adder, and the reference image memory, the same processing as the MPEG2 standard is performed, and the MPEG2 standard compliant decoding device To ensure consistency. Therefore, the decoded differential image that has been subjected to inverse quantization and IDCT (inverse discrete cosine transform) processing is rounded to 9-bit accuracy, added to the predicted image output from the motion compensation circuit, and rounded to 8-bit accuracy. And recorded in the reference image memory.
When it is desired to output a decoded image of the encoded image signal in the encoding device, the decoded image signal subjected to the above dequantization and IDCT is held with data rounded with 11.2 bit precision and predicted. This can be achieved by rounding the result added to the image to 10-bit precision, sequentially storing it in the output image memory, and outputting it.
[0021]
Next, an embodiment of a high-efficiency decoding device for decoding an image signal with 10-bit accuracy encoded with the high-efficiency encoding device with 10-bit accuracy will be described with reference to FIG.
In the decoding device, the input bit stream via the demultiplexer is separated into a motion vector, a prediction mode, information indicating the position of the image, and the like by the stream decoding circuit and the quantized DCT coefficient signal, The decoded signal is decoded. The decoded quantized DCT coefficient is restored to the DCT coefficient in the inverse quantization circuit, and the DCT coefficient is restored to the image signal (difference image signal in the case of the predicted frame) in the inverse orthogonal transform circuit (IDCT processing). The
[0022]
At the output of the inverse orthogonal transform circuit, rounding is performed with an accuracy of 11.2 bits for a predicted frame and 10.2 bits for a reference frame. First, when the output of the inverse orthogonal transform circuit is a prediction frame, the signal conversion circuit performs conversion from 11.2 bits to 11 bits. The signal converted to 11 bits is added to the predicted reference image (8-bit precision) by an adder. This prediction reference image is cut out from an 8-bit precision reference image memory, and motion-compensated based on a motion vector by a motion compensation prediction circuit. The addition result (the signal rounded to 10 precision) output from the adder is recorded in the 10-bit precision output image memory as a 10-bit precision image signal.
[0023]
On the other hand, when the output of the inverse orthogonal transform circuit is a reference frame, the signal conversion circuit performs conversion from 10.2 bits to 10 bits. Then, the signal converted to 10 bits by the signal conversion circuit is recorded in the output image memory with 10-bit accuracy as it is without being added by the adder as an image signal with 10-bit accuracy. By reading a signal from the output image memory, a 10-bit precision image signal can be restored.
[0024]
In addition, in the case of a frame that can be a reference image (in the case of an I frame or P frame) separately from the above signal from the signal conversion circuit, the bit precision adapted to the MPEG2 standard, that is, the predicted frame (P frame) is 9 bits. An image signal (difference image signal in the case of a prediction frame) rounded to accuracy and a reference frame (I frame) with an 8-bit accuracy is output. In the case of a prediction frame, addition with an 8-bit accuracy prediction reference image cut out from the reference image memory is performed, and the addition result (a signal rounded to 8-bit accuracy) is predicted in the reference image memory. Recorded as a reference image. In the reference frame, the image signal rounded to 8-bit accuracy output from the signal conversion circuit is recorded in the reference image memory as it is. The recorded image data of the reference image memory is used as a prediction reference image signal (prediction signal) of a subsequent prediction frame.
[0025]
As described above, the encoding apparatus of the embodiment shown in FIG. 1 and the decoding apparatus shown in FIG. 2 perform processing in accordance with the MPEG2 standard, with the bit accuracy of the reference image and the accuracy of the system that performs motion prediction processing, From the image input to the DCT input of the encoding device and from the IDCT output to the image output of the decoding device are processed with 10-bit accuracy. Therefore, the bit stream encoded by the encoding apparatus of the embodiment shown in FIG. 1 can be decoded with 8-bit accuracy by the conventional MPEG2 standard decoding apparatus, and compatibility is maintained. In addition, if the bit stream encoded by the encoding apparatus of this embodiment is decoded using the decoding apparatus of the embodiment shown in FIG. 2, a high-quality image signal with 10-bit accuracy can be restored.
[0026]
In addition, when a bitstream encoded by a conventional MPEG2 standard encoding device is decoded using the decoding device of this embodiment, compatibility is maintained and subtle gradation parts and the like are maintained. In the portion where the signal changes, the pseudo 10-bit accuracy allows filtering of unnatural signal boundaries, and enables high-quality decoding processing.
[0027]
Next, a second embodiment of the high-efficiency encoding apparatus of the present invention will be described with reference to FIG. In this embodiment, an 8-bit input image signal is filtered in the spatial and temporal directions by a filtering circuit. The output of the filtering circuit is output with 10 bits, and the subsequent circuits are configured in the same manner as in the first embodiment.
[0028]
If the input image signal is an n-bit precision input signal, a filtering circuit that inputs a plurality of pixels in the spatial direction or the time direction and outputs a signal of m-bit precision (m = n + α where α is an integer of 1 or more) is provided. Try to provide it.
This filtering circuit performs noise removal, resolution conversion in accordance with the encoding rate, etc., and records the output with an accuracy of 8 bits or more, thereby encoding an image signal with higher accuracy than the conventional encoding device. can do.
[0029]
【The invention's effect】
As described above, the high-efficiency encoding device and the high-efficiency decoding device according to the present invention include the high-efficiency encoding device from image input to orthogonal transform input (up to DCT input) and the high-efficiency decoding device inverse orthogonal transform output. (IDCT output) to image output are each provided with an accuracy higher than the MPEG standard, so image signals with an input accuracy higher than the MPEG standard comply with the standard and have high image quality encoding.・ Decoding is possible.
[0030]
Furthermore, the conventional MPEG standard decoding device can decode the bitstream encoded by the high efficiency encoding device of the present invention with the same accuracy as the conventional one. Compatibility with other devices can be maintained.
In addition, when a bit stream encoded by a conventional MPEG standard encoding device is decoded using the high-efficiency decoding device of the present invention, the high-efficiency decoding device of the present invention Decoding can be performed while maintaining compatibility with the standard, and unnatural signal boundaries can be filtered in areas where the signal changes slightly, such as gradations, enabling higher-quality decoding processing .
[Brief description of the drawings]
FIG. 1 is a configuration diagram showing a first embodiment of a high-efficiency encoding apparatus according to the present invention.
FIG. 2 is a block diagram showing an embodiment of the high efficiency decoding device of the present invention.
FIG. 3 is a block diagram showing a second embodiment of the high-efficiency encoding apparatus of the present invention.
FIG. 4 is a configuration diagram showing a conventional high-efficiency encoding process.

Claims (2)

In a high-efficiency encoding device compliant with the MPEG standard, in which an n-bit precision signal is defined as an input / output format of an image signal,
a reference image memory for storing a predicted reference image of n-bit accuracy;
an input image memory of m bit accuracy (m = n + α: α is an integer of 1 or more) for storing an input image signal of m bit accuracy;
The m-bit output signal of the input image memory is expressed as m. a signal conversion circuit for converting the signal into an α-bit format signal;
Calculating a motion vector between an encoding target image stored in the input image memory and an image stored in the input image memory corresponding to an image serving as a prediction reference image of the encoding target image, or An m-bit vs. m-bit motion vector detection circuit for calculating a motion vector between the encoding target image stored in the input image memory and the predicted reference image stored in the reference image memory;
A motion compensated prediction circuit that performs motion compensation on an n-bit precision predicted reference image read from the reference image memory according to the motion vector;
M. Of the signal conversion circuit. Subtracting an n-bit precision prediction reference image motion-compensated by the motion compensation prediction circuit from the α-bit output signal (m + 1). a subtractor that outputs an α-bit difference signal;
Output from the subtracter (m + 1). an orthogonal transformation circuit that performs orthogonal transformation by inputting an upper n + 1 bit signal in an α-bit difference signal as an integer part and a lower α-bit signal as a decimal part;
A quantization / encoding circuit that quantizes and encodes the orthogonal transform coefficient signal output from the orthogonal transform circuit;
A high-efficiency encoding device that encodes the m-bit precision input image signal. In a high-efficiency decoding device compliant with the MPEG standard in which an n-bit precision signal is defined as an input / output format of an image signal,
an n-bit precision reference image memory;
an output image memory with m-bit accuracy (m = n + α, where α is an integer of 1 or more);
Inverse orthogonal transform is performed on the orthogonal transform coefficient signal restored by inverse quantization of the quantized orthogonal transform coefficient signal obtained by decoding the input encoded image signal, and the integer part of the upper n + 1 bit signal and the lower α bit signal Decimal part (m + 1). an inverse orthogonal transform circuit that outputs an α-bit decoded signal;
Output from the inverse orthogonal transform circuit (m + 1). The α-bit decoded signal is converted into an m + 1-bit format and output as an m + 1-bit decoded signal, and the (m + 1). a signal conversion circuit for converting an α-bit decoded signal into an n + 1-bit format and outputting it as an n + 1-bit decoded signal;
A motion compensated prediction circuit that performs motion compensation of a predicted reference image with n-bit accuracy read from the reference image memory in accordance with a motion vector decoded from the input encoded image signal;
A first adder that supplies an m-bit decoded image signal obtained by adding the n + 1-bit predicted reference image motion-compensated by the motion-compensated prediction circuit and the m + 1-bit decoded signal to the output image memory;
A second adder for supplying an n-bit decoded image signal obtained by adding the n-bit-accurate predicted reference image motion-compensated by the motion-compensated prediction circuit and the n + 1-bit decoded signal to the reference image memory; Prepared,
High performance Ritsufuku Goka apparatus characterized by decoding the high-efficiency encoding input encoded image signal.

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