JP3975862B2 - Power module substrate and manufacturing method thereof - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a power module substrate used in a semiconductor device that controls a large voltage and a large current, such as an electric vehicle and an electric vehicle.
[0002]
[Prior art]
In general, this type of power module substrate includes a substrate and a heat sink, and the substrate includes a circuit layer and a metal layer on the front surface side and the back surface side, respectively. Here, the heat sink is generally formed of an Al alloy or the like, and the insulating substrate is formed of AlN or the like. In order to laminate and bond the heat sink and the substrate, it is common to form a solder layer between the heat sink and the insulating substrate, and to melt and cure the solder layer through a reflow process. At this time, the heat sink is warped due to the difference in thermal expansion coefficient between the heat sink and the insulating substrate and the shrinkage behavior when the solder layer interposed between the heat sink and the insulating substrate is cured. As a result, the insulating substrate is cracked, resulting in poor insulation, and the circuit layer formed on the insulating substrate is broken.
[0003]
As means for solving this problem, Japanese Patent Application Laid-Open No. 5-144969 discloses a semiconductor device in which a slit is formed on the front and back surfaces of an insulating substrate, and a circuit layer is formed only on a non-slit portion of the surface of the insulating substrate. Has been. In this case, even if the heat sink described above is warped and the insulating substrate is cracked, this portion can be limited to the slit, so that an insulation failure and a circuit layer breakage can occur. It can be suppressed.
[0004]
[Problems to be solved by the invention]
However, in the power module substrate according to the above solution, since the circuit layer is limitedly formed in the slit non-forming portion, the size of the circuit layer formed on the surface of the insulating substrate, that is, in circuit design. You will be restricted. In order to avoid this restriction on circuit design, when a circuit layer is formed on the entire surface of the insulating substrate with slits, when the heat sink is warped, the slits of the insulating substrate are cracked. However, there is a problem in that an insulation failure may occur because the circuit layer is provided on the top surface of the cracked portion. In addition, there is a problem that peeling may occur at the contact interface between the insulating substrate and the circuit layer due to warpage of the heat sink, or a crack may occur in the insulating substrate and the crack may extend in the horizontal direction of the insulating substrate. It was.
[0005]
The present invention has been made in consideration of such circumstances, and a substrate for a power module capable of suppressing the occurrence of cracking, insulation failure, and circuit layer breakage due to warpage of a heat sink and its circuit layer. An object is to provide a manufacturing method.
[0006]
[Means for Solving the Problems]
In order to solve the above problems and achieve such an object, the present invention proposes the following means.
The power module substrate of the present invention comprises a heat sink and a substrate provided on the surface of the heat sink,
The substrate is a power module substrate having a circuit layer and a metal layer on the front surface side and the back surface side of the insulating substrate, respectively, and the insulating substrate is divided into a plurality of parts, and the divided insulating substrates are separated from each other. A first gap is provided therebetween, and the circuit layer is continuously arranged on the surface side of the plurality of divided insulating substrates .
[0007]
In this power module substrate, the insulating substrate is divided into a plurality of parts, and the first gap is provided between the divided insulating substrates. In doing so, the solder layer or the brazing foil interposed between them is caused by the shrinkage behavior when the brazing foil is cured and the warpage of the heat sink caused by the difference in the thermal expansion coefficient between the heat sink and the insulating substrate. Breakage of the circuit layer can be suppressed. That is, even if the heat sink is warped due to the above-mentioned factors, the amount of deformation of each insulating substrate accompanying this can be suppressed to the minimum, and the occurrence of cracking of the insulating substrate can be suppressed. Can be suppressed.
[0008]
Further, the power module substrate of the present invention is characterized in that a groove portion is formed on the surface of the heat radiating plate corresponding to the position of the first gap.
[0009]
In this power module substrate, since a groove portion is formed on the surface of the heat radiating plate corresponding to the position of the first gap, the occurrence of poor insulation between the circuit layer and the heat radiating plate is suppressed. Can do. That is, in a configuration in which a gap is provided between each of the divided insulating substrates, and a circuit layer is integrally provided on the surface of these insulating substrates, a circuit layer disposed on the gap, a heat sink, Only a space is provided between them, and no insulating material is provided. However, since a groove is formed on the surface of the heat radiating plate facing the space, corresponding to the position of the first gap, the distance between the circuit layer surface and the surface of the heat radiating plate is set to the distance between the circuit layer and the heat radiating plate. It can be set as the structure which can ensure insulation with a board. Thereby, the fall of the allowable additional voltage value to the circuit layer which can ensure the said insulation can be suppressed to the minimum, and there can exist the above-mentioned circuit layer fracture | rupture generation | occurrence | production suppression suppression effect.
[0010]
In the power module substrate of the present invention, the insulating substrate is made of AlN or Si ₃ N ₄ alumina, and the metal layer is made of Al or an Al alloy.
[0011]
The method for manufacturing a power module substrate of the present invention includes a heat sink and a substrate provided on the surface of the heat sink, and the substrate includes a circuit layer and a metal layer on the front surface side and the back surface side of the insulating substrate, respectively. A power module substrate manufacturing method comprising: forming the substrate so that the insulating substrate is divided into a plurality of portions, and a first gap is provided between the divided insulating substrates. When placing the substrate on the surface side of the heat sink and heat-bonding them, the width of the first gap, the width of each insulating substrate, and the bonding temperature at the time of heat-bonding are expressed by the following equation:
t ≧ w ・ (α1 + α2) ・ T
However,
t: width of the first gap w: width of the insulating substrate (however, when the bending strength is 500 MPa or less, 30 mm or less, and when it exceeds 500 MPa, 50 mm or less)
α1: Thermal expansion coefficient of the heat sink α2: Thermal expansion coefficient of the insulating substrate T: Joining temperature is satisfied , and the circuit layer is continuously arranged on the surface side of the divided insulating substrate. And
[0012]
In the method for manufacturing a power module substrate, when the heat bonding is performed, the width of the first gap, that is, the width of the gap between the insulating substrates, the width of the insulating substrates, and the bonding temperature satisfy the relationship. In this case, even if the insulating substrate is heated and the divided insulating substrates are stretched, they can be prevented from interfering with each other, and the occurrence of problems in manufacturing can be suppressed. Furthermore, since the width w of the insulating substrate is set as described above, it is possible to reliably suppress the occurrence of peeling and the cracking of the insulating substrate at the contact interface between the insulating substrate and the metal layer.
[0013]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, an embodiment of a power module substrate and a manufacturing method thereof according to the present invention will be described with reference to FIG.
[0014]
As shown in FIG. 1, the power module substrate 1 includes a heat sink 2 and a substrate 8 provided on the surface of the heat sink 2. The substrate 8 insulates the circuit layer 4 on the surface of the insulating substrate 3. Each of the metal layers 5 is laminated and bonded to the back surface of the substrate 3 via a brazing foil (not shown) such as an Al-Si foil. In this configuration, the substrate 8 is provided on the surface of the heat sink 2 via the metal layer 5. Here, the heat sink 2 is made of Al or the like, and has a thermal expansion coefficient of about 10.5 × 10 ⁻⁶ / ° C. or more and about 25.0 × 10 ⁻⁶ / ° C. or less, and the insulating substrate 3 is made of AlN or Si _3. N ₄ , the thermal expansion coefficient is about 2.8 × 10 ⁻⁶ / ° C. or more and about 7.3 × 10 ⁻⁶ / ° C. or less, and the circuit layer 4 and the metal layer 5 are made of Al or Al alloy. ing.
[0015]
Two grooves 11 are formed in parallel on the surface of the heat sink 2 on which the substrate 8 is provided, and these grooves 11 are formed to extend in the width direction as shown in FIG. Here, as shown in FIG. 1, the metal layer 5 constituting the substrate 8 is divided into a plurality of portions, and a second gap A is provided between the divided metal layers 5. Each of these metal layers 5 has a configuration in which the groove 11 is not formed on the surface of the heat radiating plate 2 via a solder layer (not shown).
[0016]
Further, the insulating substrate 3 is divided into a plurality of parts, and a first gap B is provided between the divided insulating substrates 3, and each of these insulating substrates 3 is for brazing (not shown) on each surface of the metal layer 5. It is the structure provided separately through foil. Further, a circuit layer 4 is continuously provided on the surface of each of the insulating substrates 3 via a brazing foil (not shown), and a semiconductor chip 7 is provided on the surface of the circuit layer 4 via a solder layer 6. . In the above configuration, the arrangement positions along the surface of the power module 1 of the groove 11 of the heat sink 2, the second gap A of the metal layer 5, and the first gap B of the insulating substrate 3 are substantially the same. It has become.
[0017]
A method for manufacturing the power module substrate 1 configured as described above will be described. First, a circuit layer 4 and a metal layer 5 are laminated on a front surface and a back surface of an insulating substrate 3 divided into a plurality of portions and provided with a first gap B, respectively, via brazing foils (not shown), By heating, the brazing foil is melt-cured to form a substrate 8 on which the circuit layer 4 and the metal layer 5 are bonded to the front and back sides of the insulating substrate 3, respectively. At this time, the circuit layer 4 is continuously arranged on the surface side of each insulating substrate 3, and the metal layer 5 corresponds to the first gap B provided between the insulating substrates 3. A second gap A is provided on the back side.
[0018]
Here, the groove portion 11 is formed on one surface of the heat radiating plate 2, and a solder layer is formed on the non-formed portion of the groove portion 11 on the one surface of the heat radiating plate 2. The substrate 8 is placed on the one surface of the heat sink 2 such that the metal layers 5 constituting the substrate 8 are respectively disposed. And these are heated, a solder layer is melt-hardened, the heat sink 2 and the board | substrate 8 are laminated | stacked, and the laminated substrate 9 is formed.
[0019]
Here, when the heat sink 2 and the substrate 8 are laminated and bonded to form the laminated substrate 9, the width t of the first gap (the gap between the insulating substrates 3) B, the width w of each insulating substrate, and the heating Set the joining temperature T when joining so as to satisfy the following formula [I think this expression is more appropriate because it explains the manufacturing method].
t ≧ w ・ (α1 + α2) ・ T
For example, the width t of the first gap B is 0.5 mm, the width w of each insulating substrate is 20 mm, the thermal expansion coefficient α1 of the heat sink 2 is 23.5 × 10 ⁻⁶ / ° C., and the thermal expansion coefficient of the insulating substrate 3. α2 is 4.6 × 10 ⁻⁶ / ° C., and the junction temperature T is 600 ° C. Here, the width w of the insulating substrate is set to 30 mm or less when the bending strength is 500 MPa or less, and to 50 mm or less when the bending strength exceeds 500 MPa.
[0020]
Then, after a circuit having a predetermined pattern is formed on the circuit layer 4 of the multilayer substrate 9 by an etching method, a semiconductor chip 7 is adhered to the circuit layer 4 of the multilayer substrate 9 via the solder layer 6, and a power module substrate. 1 is formed.
[0021]
As described above, according to the power module substrate according to the present embodiment, the insulating substrate 3 is divided into a plurality of portions, and the first gap B is provided between the divided insulating substrates 3. Therefore, when the heat sink 2 and the substrate 8 are laminated and bonded, the shrinkage behavior when the solder layer interposed between them is cured and the heat of the heat sink 2 and the insulating substrate 3 are obtained. The occurrence of breakage of the circuit layer 4 due to the warp of the heat sink 2 caused by the difference in expansion coefficient can be suppressed. That is, even if the heat sink 2 is warped due to the above-described factors, the insulating substrate 3 is divided and disposed, so that the deformation amount of each insulating substrate 3 due to the warp of the heat sink 2 is minimized. Thus, the occurrence of cracks in the insulating substrate 3 can be suppressed, and the occurrence of breakage in the circuit layer 4 can be suppressed.
[0022]
Further, on the surface of the heat sink 2, grooves 11 are formed corresponding to the positions of the first gaps B provided on the insulating substrate 3, and the metal layer 5 corresponds to the positions of these grooves 11. In addition, since the second gap A is provided between the divided metal layers 5, the insulation failure between the circuit layer 4 and the heat sink 2 is caused. Can be suppressed. That is, a first gap B is provided between the divided insulating substrates 3, and the circuit layer 5 integrally provided on the surface side of these insulating substrates 3 is on the first gap B. The disposed portion is configured such that only a space is disposed and no insulating material is disposed. However, since the groove 11 is formed on the surface of the heat radiating plate 2 facing the space corresponding to the position of the first gap B provided in the insulating substrate 3, the surface of the circuit layer 4 and the heat radiating plate are formed. The distance between the two surfaces can be configured to be sufficient to ensure the insulation between the circuit layer 4 and the heat sink 2. Thereby, the fall of the allowable additional voltage value to the circuit layer 4 which can ensure the said insulation can be suppressed to the minimum, and there can exist the above-mentioned circuit layer 4 fracture | rupture generation | occurrence | production suppression effect.
[0023]
Further, when the heat sink 2 and the substrate 8 are laminated and bonded to form the laminated substrate 9, the width t of the first gap (gap between the insulating substrates 3) B, the width w of each insulating substrate, and the bonding temperature T Is set so as to satisfy the previous equation, it is possible to prevent the insulating substrates 3 from being heated and interfering with each other even if the divided insulating substrates 3 are stretched. Can be suppressed. Furthermore, since the width w of the insulating substrate 3 is set as described above, it is possible to reliably suppress the occurrence of peeling and the cracking of the insulating substrate 3 at the contact interface between the insulating substrate 3 and the metal layer 5.
[0024]
The technical scope of the present invention is not limited to the above embodiment, and various modifications can be made without departing from the spirit of the present invention. For example, in the present embodiment, after the substrate 8 is formed, the substrate 8 and the radiator plate 2 are laminated and bonded via a solder layer to form the laminated substrate 9, but the radiator plate 2, the brazing foil Alternatively, the metal layer 5, the brazing foil, the insulating substrate 3, the brazing foil, and the circuit layer 4 may be heated in a state of being sequentially placed, and these may be laminated and bonded to form the laminated substrate 9. At this time, if the above-described equation is satisfied, the above-described effect can be obtained similarly.
[0025]
【The invention's effect】
As is clear from the above description, according to the power module substrate and the manufacturing method thereof according to the present invention, when the heat sink and the substrate are laminated and bonded, the solder layer interposed therebetween is cured. Even if the heat sink is warped due to the shrinkage behavior at the time and the difference in thermal expansion coefficient between the heat sink and the insulating substrate, the insulating substrate is divided so that the heat sink is warped. The amount of deformation of each insulating substrate can be minimized. Thereby, generation | occurrence | production of the crack of an insulated substrate can be suppressed and generation | occurrence | production of the fracture | rupture of a circuit layer can be suppressed.
[Brief description of the drawings]
FIG. 1 is a side cross-sectional view showing a power module substrate shown as an embodiment of the present invention.
2 is a cross-sectional view taken along line X1-X1 of the power module substrate shown in FIG. 1;
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 Power module substrate 2 Heat sink 3 Insulating substrate 4 Circuit layer 5 Metal layer 8 Substrate 11 Groove A Second gap B First gap t Width of gap between insulating substrates (width of first gap)
w Width of insulating substrate T Junction temperature α1 Thermal expansion coefficient of heat sink α2 Thermal expansion coefficient of insulating substrate

Claims (4)

A heat sink, and a substrate provided on the surface of the heat sink,
The substrate is a power module substrate comprising a circuit layer and a metal layer on the front surface side and the back surface side of the insulating substrate, respectively.
The insulating substrate is divided into a plurality of portions, a first gap is provided between the divided insulating substrates, and the circuit layer is continuous with the surface side of the divided insulating substrate. Power module substrate characterized by being arranged . The power module substrate according to claim 1,
A substrate for a power module, wherein a groove is formed on the surface of the heat radiating plate corresponding to the position of the first gap. The power module substrate according to claim 1,
The power module substrate, wherein the insulating substrate is made of AlN or Si ₃ N ₄ , and the metal layer is made of Al or an Al alloy. A heat sink, and a substrate provided on the surface of the heat sink,
The substrate is a method for manufacturing a power module substrate comprising a circuit layer and a metal layer on the front side and the back side of an insulating substrate, respectively.
The substrate is formed such that the insulating substrate is divided into a plurality, and a first gap is provided between the divided insulating substrates,
When the substrates are placed on the surface side of the heat sink and are heat-bonded, the width of the first gap, the width of each insulating substrate, and the bonding temperature at the time of heat-bonding are expressed by the following equation: t ≧ w · (α1 + α2) · T where t: width of the first gap w: width of the insulating substrate (however, if the bending strength is 500 MPa or less, 30 mm or less, if it exceeds 500 MPa, 50 mm or less) α1: Thermal expansion coefficient α2 of the heat sink: Thermal expansion coefficient T of the insulating substrate T: While satisfying the junction temperature ,
The method for manufacturing a power module substrate, wherein the circuit layer is continuously arranged on a surface side of the plurality of divided insulating substrates .

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