JP3985288B2 - Semiconductor crystal growth method - Google Patents
Semiconductor crystal growth method Download PDFInfo
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- JP3985288B2 JP3985288B2 JP8232097A JP8232097A JP3985288B2 JP 3985288 B2 JP3985288 B2 JP 3985288B2 JP 8232097 A JP8232097 A JP 8232097A JP 8232097 A JP8232097 A JP 8232097A JP 3985288 B2 JP3985288 B2 JP 3985288B2
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Description
【0001】
【発明の属する技術分野】
本発明は、半導体結晶薄膜の気相成長法に関するものであり、特にヘテロエピタキシャルの成長方法に関するものである。
【0002】
【従来の技術】
近年、青色LED用材料としてGaN系化合物半導体薄膜が実用化されている。現在のところ、基板となるGaNバルク結晶の成長が困難であるため、通常格子定数が近いサファイア基板上にGaN系化合物半導体薄膜を成長させる。この場合、GaNとサファイアの格子定数を緩和するため低温成長させたGaN層をアニールして形成したバッファ層上にGaN系エピタキシャル層を成長させている。
【0003】
一方、サファイア基板は絶縁性であるので、LED構造を作製するためにはGaN系エピタキシャル層をエッチングして電極を形成する必要がある。このため、プロセスが煩雑になり、コストが増大する。そこで、GaAs半導体基板のような導電性基板上に、上記のようにGaNバッファ層、GaN系エピタキシャル層を形成して基板裏面に電極を形成することでプロセスの低コスト化を検討している例もある。
【0004】
また、化合物半導体として多用されているGaAs基板は大口径化が困難でコストも高いため、大口径化が容易でコストも安いSi基板上にGaAs層を形成することが検討されている。この場合も低温で形成したGaAs層をアニールしてバッファ層を形成し、その上にGaAsエピタキシャル層を成長させることで格子定数の違いを緩和している。
【0005】
【発明が解決しようとする課題】
上記のように、従来、格子定数が異なる基板上に半導体結晶薄膜を形成する場合、格子定数の差を緩和するため、低温で形成したバッファ層を基板とエピタキシャル層の間に挿入していた。しかしながら、このようにして形成したエピタキシャル層の結晶性は完璧ではない場合が多かった。特に、GaNとGaAsのように格子定数差が大きい場合は、エピタキシャル層の結晶性に問題があった。
【0006】
そこで、本発明の目的は、上記従来技術の問題点を解決し、格子定数の異なる基板上に高品質の半導体エピタキシャル層を製造する方法を提供することにある。
【0007】
【課題を解決するための手段】
本発明に従うと、半導体結晶薄膜を格子定数の異なる基板上に気相成長法により成長させる方法において、前記半導体の結晶性の薄膜がエピタキシャル成長する温度よりも低い温度で前記半導体と等しい材料で基板上にアモルファス層を気相成長法により形成する工程と、このアモルファス層を形成した基板の温度をアモルファス層が結晶化する温度まで昇温する工程とを少なくとも2回連続繰り返して形成したバッファ層上に前記半導体の結晶性の薄膜をエピタキシャル成長させることを特徴とする半導体結晶成長方法が提供される。本発明の方法においては、前記半導体が、GaAs、GaP、InAsまたはInPであり、前記基板が、Si基板であるか、前記半導体が、GaN、InNまたはAlNであり、前記基板が、サファイア基板またはGaAs基板であることが好ましい。また、GaAs基板は、GaAs(111) A面、B面が好ましい。
【0008】
【発明の実施の形態】
本発明の方法では、従来、1層で形成していたバッファ層を同じ工程を繰り返して2層以上で形成するところにその主要な特徴がある。このバッファ層は、エピタキシャル成長させる半導体と等しい材料で、半導体がエピタキシャル成長するよりも低い成長温度で形成したアモルファス層をアニール処理することで得られる。アモルファス層がアニール処理により結晶化するが、その際、基板の結晶構造に配向するように結晶化する。これが、基板と上層のエピタキシャル層の間の格子定数の差を緩和する。本発明では、このバッファ層を2層以上で形成し、結晶性を改善させる。
【0009】
従来の方法ではバッファ層を1層しか挿入しないので、格子定数の緩和が充分ではなかった。バッファ層表面は、下層の結晶の格子定数と上層の結晶の格子定数の中間の格子定数になると考えられる。従って、バッファ層を多層で形成することによりバッファ層の表面の格子定数が、よりエピタキシャル層に近づいていく。なお、1回の工程で形成可能なバッファ層の厚さには限度があるため、複数回分の層厚を有するバッファ層を用いても同じ効果は得られない。また、従来1層で形成した厚さのバッファ層を、本発明の方法により2層以上で形成しても本発明の効果は得られる。例えば、本願発明の方法では、1回の工程で形成するバッファ層の厚さを10〜100 nmとすることが好ましい。
【0010】
さらに、一般に基板上に格子定数の異なる半導体層をエピタキシャル成長させるためには、成長温度(基板温度)を高温にしなければならないが、GaAs基板、InP基板などのように揮発性の物質を含む基板の場合、As、P等蒸気圧の高い揮発性成分が蒸発するという問題がある。本発明の方法では、低温で形成するバッファ層を多層にして全体の厚さを厚くすることでこの問題も解決することができる。
【0011】
【実施例】
実施例1
図1に、本発明による化合物半導体成長方法を用いて作製したエピタキシャルウェハの断面構造を示す。図1のエピタキシャルウェハは、GaAs(111) B面基板1と、GaAs(111) B面基板1上に形成された厚さ20nmの第1のGaN層21および厚さ20nmの第2のGaN層22を備えるバッファ層2と、バッファ層2上に形成された厚さ1μmのGaNエピタキシャル層3とを備える。バッファ層2およびGaNエピタキシャル層3はいずれもMOC−VPE法で形成した。第1のGaN層21は、成長温度 550℃、成長時間30分で形成した後、 850℃に昇温し10分間アニールして形成した。第2のGaN層22は、第1のGaN層21をアニールした後、温度を 500℃に下げ、成長時間30分で形成した後、 850℃に昇温し10分間アニールした。この後、GaNエピタキシャル層3を成長温度 850℃で60分間成長した。
【0012】
得られたGaNエピタキシャル層3は、バッファ層が1層の場合にくらべX線回折のピーク半値幅が半分に減少し、結晶性の改善が確認された。また、表面平坦性も改善され、基板とエピタキシャル界面にみられたAs抜けによる空孔も無くなった。
【0013】
【発明の効果】
以上詳述のように、本発明によれば、従来よりも結晶性、表面平坦性に優れたエピタキシャルウェハが得られる。本発明の方法は、特に、GaAs基板上にGaNエピタキシャル層を形成する場合に有効である。
【図面の簡単な説明】
【図1】 本発明の方法で作製したエピタキシャルウェハの一例の断面図である。
【符号の説明】
1 GaAs(111) B面基板
2 バッファ層
3 GaNエピタキシャル層[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a vapor phase growth method of a semiconductor crystal thin film, and more particularly to a heteroepitaxial growth method.
[0002]
[Prior art]
In recent years, GaN-based compound semiconductor thin films have been put into practical use as blue LED materials. At present, since it is difficult to grow a GaN bulk crystal serving as a substrate, a GaN-based compound semiconductor thin film is grown on a sapphire substrate having a normal lattice constant. In this case, a GaN epitaxial layer is grown on a buffer layer formed by annealing a GaN layer grown at a low temperature in order to relax the lattice constant of GaN and sapphire.
[0003]
On the other hand, since a sapphire substrate is insulative, it is necessary to form an electrode by etching a GaN-based epitaxial layer in order to produce an LED structure. For this reason, a process becomes complicated and cost increases. Therefore, an example of investigating cost reduction of the process by forming a GaN buffer layer and a GaN-based epitaxial layer on a conductive substrate such as a GaAs semiconductor substrate and forming electrodes on the back surface of the substrate as described above. There is also.
[0004]
In addition, since a GaAs substrate that is frequently used as a compound semiconductor is difficult to increase in diameter and is expensive, it has been studied to form a GaAs layer on a Si substrate that is easy to increase in diameter and is inexpensive. Also in this case, the difference in lattice constant is mitigated by annealing a GaAs layer formed at a low temperature to form a buffer layer and growing a GaAs epitaxial layer thereon.
[0005]
[Problems to be solved by the invention]
As described above, conventionally, when forming a semiconductor crystal thin film on a substrate having a different lattice constant, a buffer layer formed at a low temperature has been inserted between the substrate and the epitaxial layer in order to alleviate the difference in lattice constant. However, the crystallinity of the epitaxial layer thus formed is often not perfect. In particular, when the lattice constant difference is large, such as GaN and GaAs, there is a problem in the crystallinity of the epitaxial layer.
[0006]
Accordingly, an object of the present invention is to solve the above-mentioned problems of the prior art and provide a method for producing a high-quality semiconductor epitaxial layer on a substrate having a different lattice constant.
[0007]
[Means for Solving the Problems]
According to the present invention, in a method of growing a semiconductor crystal thin film on a substrate having a different lattice constant by a vapor deposition method, the semiconductor crystalline thin film is formed on the substrate with a material equal to the semiconductor at a temperature lower than a temperature at which the crystalline thin film of the semiconductor is epitaxially grown. The step of forming an amorphous layer by vapor deposition and the step of raising the temperature of the substrate on which the amorphous layer is formed to a temperature at which the amorphous layer crystallizes are continuously repeated at least twice on the buffer layer formed. There is provided a semiconductor crystal growth method characterized by epitaxially growing the crystalline thin film of the semiconductor. In the method of the present invention, the semiconductor is GaAs, GaP, InAs, or InP, the substrate is a Si substrate, or the semiconductor is GaN, InN, or AlN, and the substrate is a sapphire substrate or A GaAs substrate is preferred. The GaAs substrate is preferably a GaAs (111) A surface or B surface.
[0008]
DETAILED DESCRIPTION OF THE INVENTION
The main feature of the method of the present invention is that the buffer layer, which has conventionally been formed of one layer, is formed of two or more layers by repeating the same process. This buffer layer is obtained by annealing an amorphous layer made of the same material as that of the semiconductor to be epitaxially grown and at a lower growth temperature than the semiconductor is epitaxially grown. The amorphous layer is crystallized by annealing, and at that time, the amorphous layer is crystallized so as to be oriented in the crystal structure of the substrate. This alleviates the difference in lattice constant between the substrate and the upper epitaxial layer. In the present invention, two or more buffer layers are formed to improve crystallinity.
[0009]
In the conventional method, since only one buffer layer is inserted, the lattice constant is not sufficiently relaxed. It is considered that the buffer layer surface has a lattice constant intermediate between the lattice constant of the lower layer crystal and the lattice constant of the upper layer crystal. Therefore, by forming the buffer layer in multiple layers, the lattice constant of the surface of the buffer layer becomes closer to the epitaxial layer. In addition, since there is a limit to the thickness of the buffer layer that can be formed in one step, the same effect cannot be obtained even if a buffer layer having a plurality of layer thicknesses is used. In addition, the effect of the present invention can be obtained even when the buffer layer having a thickness of one layer conventionally formed by two or more layers by the method of the present invention. For example, in the method of the present invention, the thickness of the buffer layer formed in one step is preferably 10 to 100 nm.
[0010]
Further, in general, in order to epitaxially grow semiconductor layers having different lattice constants on a substrate, the growth temperature (substrate temperature) must be increased. However, a substrate containing a volatile substance such as a GaAs substrate or InP substrate can be used. In this case, there is a problem that volatile components having a high vapor pressure such as As and P evaporate. In the method of the present invention, this problem can also be solved by increasing the overall thickness of the buffer layer formed at a low temperature to be a multilayer.
[0011]
【Example】
Example 1
FIG. 1 shows a cross-sectional structure of an epitaxial wafer produced by using the compound semiconductor growth method according to the present invention. The epitaxial wafer of FIG. 1 includes a GaAs (111) B surface substrate 1, a
[0012]
In the obtained GaN epitaxial layer 3, the peak half-value width of X-ray diffraction was reduced by half compared to the case where the buffer layer was one layer, and improvement in crystallinity was confirmed. In addition, the surface flatness was improved, and there were no vacancies due to As missing at the substrate and epitaxial interface.
[0013]
【The invention's effect】
As described above in detail, according to the present invention, an epitaxial wafer having better crystallinity and surface flatness than the conventional one can be obtained. The method of the present invention is particularly effective when a GaN epitaxial layer is formed on a GaAs substrate.
[Brief description of the drawings]
FIG. 1 is a cross-sectional view of an example of an epitaxial wafer produced by the method of the present invention.
[Explanation of symbols]
1 GaAs (111) B-side substrate 2 Buffer layer 3 GaN epitaxial layer
Claims (5)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8232097A JP3985288B2 (en) | 1997-03-14 | 1997-03-14 | Semiconductor crystal growth method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8232097A JP3985288B2 (en) | 1997-03-14 | 1997-03-14 | Semiconductor crystal growth method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH10259090A JPH10259090A (en) | 1998-09-29 |
| JP3985288B2 true JP3985288B2 (en) | 2007-10-03 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP8232097A Expired - Fee Related JP3985288B2 (en) | 1997-03-14 | 1997-03-14 | Semiconductor crystal growth method |
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| JP (1) | JP3985288B2 (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3952357B2 (en) * | 2001-02-28 | 2007-08-01 | 信越半導体株式会社 | Method for manufacturing light emitting device |
| EP1424409A4 (en) | 2001-09-06 | 2009-04-15 | Covalent Materials Corp | SEMICONDUCTOR WAFER AND PRODUCTION THEREOF |
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- 1997-03-14 JP JP8232097A patent/JP3985288B2/en not_active Expired - Fee Related
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| Publication number | Publication date |
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| JPH10259090A (en) | 1998-09-29 |
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