JP3989615B2 - Solid-state imaging device - Google Patents

Description

【００７４】
ここで、Ｃｒ、Ｃｂはそれぞれ赤方向、青方向の色の変調成分を表す。また、ｋ１、ｋ２は、任意の定数で、色分離フィルタの分光特性によって決まるが、例えば、ｋ１、ｋ２ともに０．２という値が用いられる。
【００７５】
このようにして得られた輝度信号Ｙはアパーチャ補正回路２３でフィルタ処理により輪郭補正され、γ補正回路２４ａでγ補正処理されてＹoutとして出力される。同時に色信号Ｒ、Ｇ、Ｂは、積分回路７ｐに入力され、それぞれ１フィールド期間積分されて、積分値ＳＲ、ＳＧ、ＳＢがマイクロコンピュータ８ｄに入力される。
【００７６】
マイクロコンピュータ８ｄでは、入力した積分値ＳＲ、ＳＧ、ＳＢからホワイトバランスのゲインＡＲ、ＡＢをＡＲ＝ＳＧ／ＳＲ、ＡＢ＝ＳＧ／ＳＢによって求め、ホワイトバランス補正回路２５において、Ｒ信号に対してはゲインＡＲで増幅し、Ｂ信号に対してはゲインＡＢで増幅する事によってホワイトバランス補正を施す。次にγ補正回路２４ｂではホワイトバランス回路２５から出力された各原色信号に対してγ補正処理し、マトリクス回路２６において所定のマトリクス処理を施し、色差信号Ｒ−Ｙ、Ｂ−Ｙとして出力する。
【００７７】
また、マイクロコンピュータ８ｄは、積分値ΣＲ、ΣＧ、ΣＢをマイクロコンピュータ８ｂに転送する。
【００７８】
マイクロコンピュータ８ｂは積分回路７ｋ、７ｌ、７ｍ、７ｎの積分値SMY1、SMC1、SGY1、SGC1とマイクロコンピュータ８ｄから出力されるＳＲ、ＳＧ、ＳＢを入力し、以下に示す（数５）によってホワイトバランスの検出のためのデータを抽出する。
【００７９】
【数５】

【００８０】
ここで、ＳＣｒ、ＳＣｂは、赤方向、青方向の色差変調成分を輝度信号成分で規格化したものと同等となり、明るさの変化の影響を受けない色座標を与える。また、ＳＲＧ、ＳＢＧは、赤、青の原色信号成分を緑信号で規格化したものであり、やはり、明るさの変化の影響を受けない色座標を与える。
【００８１】
図１１にホワイトバランスのための色座標空間を示す。図１１（ａ）は縦軸にＳＣｒ、横軸にＳＣｂをとったものであり、図１１（ｂ）は縦軸にＳＲＧ、横軸にＳＢＧをとったものであり、いずれの色座標空間においても、各種光源の色座標は、例えば、色温度の低い光源の場合はＴ１に、色温度が高い光源の場合はＴ５にという具合に図の中央部Ｔ３を通る曲線の付近の長方形で表した領域に分布する。
【００８２】
ここで、図１１（ａ）に示す色温度座標空間は、短時間露光信号Sshortから得られた、いわば高輝度領域の色温度を表し、図１１（ｂ）に示す色温度座標空間は、画像合成後の信号Smixから得られた合成後の色温度を表す。この２つの座標に（数５）で得られる各信号に対する光源の色温度座標を配置した場合に、同じ光源を表す領域に分布する場合はよいが、異なる光源を表す領域に分布する場合は、高輝度領域と低輝度領域で光源が異なると考えられる。そこで、マイクロコンピュータ８ｂでは、２つの色温度座標における光源の分布がおおむね同一の位置に分布するようなゲインを算出する。
【００８３】
例えば、Sshortから検出した光源の座標が屋外を表すＴ５であり、Smixから検出した光源の座標が屋内を表すＴ３である場合について説明する。
【００８４】
（表１）に図１１における５つの光源の色温度座標と各色フィルタの出力信号レベル比を示す。なお、この値は固体撮像素子の色フィルタ等の分光特性によって変化する。
【００８５】
【表１】

【００８６】
検出した色温度Ｔ５をＴ３になる様に補正するために、マイクロコンピュータ８ｂでは、Ｔ３の各色フィルタのレベル比( MY , MC , GY , GC )_T3 = ( 1.0 , 1.0 , 1.0 , 1.0 )をＴ５の各色フィルタのレベル比( MY , MC , GY , GC )_T5 = ( 1.0 , 1.3 , 0.9 , 1.2 )で割ることで得られるゲイン( AwMY , AwMC , AwGY , AwGC ) = ( 1.0 , 0.77 , 1.11 , 0.83 ) = ( MY , MC , GY , GC )_T3／( MY , MC , GY , GC )_T5を得る。Sshortの各色フィルタごとの信号にこのゲインをかければ、ホワイトバランスをほぼ一致させることができる。
【００８７】
マイクロコンピュータ８ｂでは実施の形態４と同様に検出したフリッカ補正ゲイン( AMY , AMC , AGY , AGC )と以上のようにして求めたホワイトバランスゲイン( AwMY , AwMC , AwGY , AwGC )をそれぞれ掛け合わせて新たに( AMY , AMC , AGY , AGC )として出力する。
【００８８】
第２のフリッカ抑圧手段５ではマイクロコンピュータ８ｂから出力された４種類のゲインＡMY、ＡMC、ＡGY、ＡGCを入力し、それぞれレジスタ１９ａ、１９ｂ、１９ｃ、１９ｄに格納する。そして、SS1を積分したフィールドから２フィールド後のタイミングで、Sshortに対しセレクタ１８ｃによりMY、MC、GY、GCそれぞれの色信号に対応したゲインＡMY、ＡMC、ＡGY、ＡGCを選択し増幅回路９ａでゲイン補正を行い、フリッカの抑圧されたSshort'として出力する。
【００８９】
画像合成手段６では実施の形態４と同様に合成処理し、ダイナミックレンジが拡大されると共にフリッカ抑圧され、しかも高輝度部と低輝度部のホワイトバランスが一致した合成画像信号Smixとして出力する。
【００９０】
なお、本実施の形態では、光源の座標と各色フィルタごとのゲインを表で与え、マイクロコンピュータ８ｂ内に記憶した状態で処理を行っているが、光源の座標と各色フィルタごとのゲインは（数４）、（数５）の関係を用いて演算によって求めることもできる。この場合はマイクロコンピュータ８ｂの演算量は増えるが、メモリ容量を減らすことができる。
【００９１】
また、本実施の形態ではマイクロコンピュータを８ｂと８ｄの２種類用いたが、１つのマイクロコンピュータを時分割で用いても同様の効果が実現できる。
【００９２】
（実施の形態６）
本発明の固体撮像装置は、ダイナミックレンジの拡大された信号を出力することができるために、屋外と屋内という様な光源の異なる被写体を撮像する場合がある。このような場合に、屋内は蛍光灯のためにフリッカが発生し、屋外は太陽光のためにフリッカが発生しないために、画面に対して均一なフリッカ抑圧処理を施すと画面の一部においてフリッカが抑圧できない場合が発生する。
【００９３】
本発明の目的は、画面を複数のブロックに分割し、各ブロックごとにフリッカ補正を施すことにより、複数の光源が存在するような場合でも、画面全体にわたってフリッカの抑圧された信号が得られるようにするというものである。
【００９４】
図１２は本発明の実施の形態６の固体撮像装置の構成を示す構成図である。図１２において、１は撮像手段としての固体撮像素子、２は第１のフリッカ検出手段、３は第１のフリッカ抑圧手段、４は第２のフリッカ検出手段、５は第２のフリッカ抑圧手段、６は画像合成手段である。また、図１３および図１４に第１のフリッカ検出手段２および第２のフリッカ検出手段４の構成を示す。
【００９５】
固体撮像素子１から出力された長時間露光信号Slongと短時間露光信号Sshortは画像合成手段６における加算器１０で加算処理されて、合成画像信号Smixとして出力される。
【００９６】
第１のフリッカ検出手段２では、実施の形態３と同様に合成画像信号Smixを入力し、ブロック積分手段１６により、１フィールド期間後に４８ブロックのブロック積分値SB1からSB48がマイクロコンピュータ８ｃに入力される。
【００９７】
マイクロコンピュータ８ｃでは、実施の形態３と同様にフリッカを検出し、第１のフリッカ抑圧手段３により長時間露光信号Slongのフリッカを抑圧する。
【００９８】
また、第２のフリッカ検出手段４は実施の形態２と同様に短時間露光信号Sshortを入力する。入力した短時間露光信号Sshortは、第２のフリッカ検出手段４のブロック積分手段１６ｂに入力される。ブロック積分手段１６ｂではマルチプレクサ１７ｂが実施の形態３における第１のフリッカ検出手段２と同様に図５のように画面を横８縦６の４８ブロックに分けた４８ブロックのブロック積分値SB1(1)からSB1(48)がマイクロコンピュータ８ｄに入力される。
【００９９】
マイクロコンピュータ８ｄでは、各ブロックごとの積分値SB1(1)からSB1(48)と過去５フィールド分のブロックごとの積分値を用いて、フリッカを検出する。
【０１００】
さらに、マイクロコンピュータ８ｄでは、Sshortのブロックごとの積分値SB1(n)、SB2(n)、SB3(n)を用いて、蛍光灯フリッカの周期のうち SB2(n) と同じ位相の信号が SB1(n),SB2(n),SB(3) の積分値の平均値となるようなゲインＡMYブロックごとのフリッカ補正ゲインＡ(n)を算出し出力する。
【０１０２】
このブロックごとのフリッカ補正ゲインによって第２のフリッカ抑圧手段５においてフリッカ抑圧すれば、画面各部でフリッカが抑圧された信号が得られるが、フリッカ補正のゲインが隣のブロックのゲインと異なる場合には、ブロックの変わり目で補正量の不連続が発生する。
【０１０３】
第２のフリッカ抑圧手段５では第２のフリッカ検出手段４から出力されたゲインＡを入力し、各ブロックのゲインＡ（ｎ）を補間回路２７に入力し、画素ごとのゲインＡpixelを求める。Ａpixelは、ゲイン補正を行う画素のブロックおよびそのブロックの周囲のブロックのゲインの画素位置による重み付け処理で求められる。
【０１０４】
増幅回路９では、補間回路２７から入力した画素ごとのゲインＡpixelを用いてSB1を積分したフィールドから２フィールド後のタイミングで、Sshortに対しゲイン補正を行い、フリッカの抑圧されたSshort'として出力する。
【０１０５】
第２のフリッカ検出手段４において、画面を複数のブロックに分割し、第２のフリッカ抑圧手段５において各ブロックごとにフリッカ補正を施すことにより、複数の光源が存在するような場合でも、画面全体にわたってフリッカの抑圧された信号が得ることができる。
【０１０６】
なお、本実施の形態ではマイクロコンピュータを８ｃと８ｄの２種類用いているが、１つのマイクロコンピュータを時分割で用いても同様の効果を得ることができる。
【０１０７】
また、本実施の形態では、第１のフリッカ抑圧手段３を撮像素子のシャッタスピードの調整で得たが、第２のフリッカ抑圧手段５と同様にブロックごとのゲイン補正によって得ても良い。
【０１０８】
（実施の形態７）
本発明の固体撮像装置は、露光量の異なる信号を合成してダイナミックレンジの拡大された信号を得るものであるが、ダイナミックレンジの拡大された信号の階調性を自然なものにするには、階調補正回路が必要となる。
【０１０９】
本発明の目的は、階調補正回路でフリッカ抑圧を施すことにより、回路の簡略化を行うというものである。
【０１１０】
図１５は本発明の実施の形態７の固体撮像装置の構成を表す構成図である。図１５において、１は撮像手段としての固体撮像素子、２は第１のフリッカ検出手段、３は第１のフリッカ抑圧手段、４は第２のフリッカ検出手段、５は第２のフリッカ抑圧手段、６は画像合成手段、７ａ，７ｂは積分回路、８ａ，８ｂはマイクロコンピュータ、１０は加算回路、２８は階調補正回路、２９は階調特性変更手段である。
【０１１１】
固体撮像素子１、第１のフリッカ検出手段２、第１のフリッカ抑圧手段３および画像合成手段６の動作は、実施の形態３に準じるのでここでは省略する。
【０１１２】
つぎに、第２のフリッカ検出手段４は画像合成手段６の出力信号Smixを入力し、図４に示す実施の形態３と同様な構成により画面を複数の領域に分割したブロック積分値がマイクロコンピュータ８ｃに入力される。
【０１１３】
マイクロコンピュータ８ｃでは、入力した４８ブロックのブロック積分値のうち一定値以上のブロックの積分値を抽出し、その平均値からフィールドを代表する高輝度部の積分値SM1を得る。次にマイクロコンピュータ８ｃではSM1と過去５フィールド分のSmixの代表の積分値SM2、SM3、SM4、SM5、SM6を用いて、実施の形態２と同様にフリッカを検出する。
【０１１４】
階調特性変更手段２９では第２のフリッカ検出手段４で検出したフリッカ補正ゲインに応じて、フィールド毎に高輝度部のみの階調特性を変更する。階調補正回路２８は、階調特性変更手段２９から与えられた階調特性に応じて、合成信号Smixの階調補正を行う。
【０１１５】
図１６にフリッカ補正を施した場合の階調特性変更手段から出力される階調特性を示す。図１６に示すように、第２のフリッカ抑圧手段５で抑圧すべき高輝度部の信号のみにフリッカ補正のゲインAH0,AH1,AH2をかけることができる。
【０１１６】
ここで、図１６に示したように階調特性でフリッカ補正をかける場合には、高輝度部ほどフリッカゲインを大きくとる必要があるので、階調特性変更手段２９に与える階調特性は、高輝度部ほどフィールド間の変化が大きくなるように調整する。
【０１１７】
ここで、階調補正回路２８としては、ランダムアクセスメモリに階調補正カーブを記憶させるものや、折れ線近似により実現するものがあるが、前者の場合は、メモリに書き込むカーブの情報、後者の場合は折れ線の傾きやオフセットの値を変更することで、階調特性を変更することができる。
【０１１８】
これにより、実施の形態３で用いていた増幅回路９を省略することができる。
以上のように本実施の形態によれば、画像合成手段６で合成された信号に対して階調補正を施す階調補正回路５と、階調補正回路５の階調特性を順次変更する階調特性変更手段２９を有し、複数のフリッカ検出手段の内少なくとも一つは、画像合成手段６で合成された信号からフリッカ成分を検出し、複数のフリッカ抑圧手段の内少なくとも一つは、階調補正回路５の階調特性を調整することによって得ることにより、回路の簡略化を行うことができるというものである。
【０１１９】
（実施の形態８）
実施の形態７では、第２のフリッカ補正手段として、高輝度部のみに階調補正によるフリッカ補正を施したが、同様の構成で、低輝度部に対しても、フリッカ補正を施すことができる。
【０１２０】
本発明の目的は、階調補正回路の高輝度部と低輝度部にそれぞれ別々のゲインを与えることによって、第１のフリッカ抑圧手段と第２のフリッカ抑圧手段を共用しようというものである。
【０１２１】
図１７は、本発明の実施の形態８の固体撮像装置の構成図である。図１７に示した構成は、図１５の構成から第１のフリッカ検出手段２と第１のフリッカ抑圧手段３を取り除いたものである。図１７において、固体撮像素子１、画像合成手段６の動作は実施の形態７に準じるので省略する。
【０１２２】
第２のフリッカ検出手段４は、画像合成手段６の出力信号Smixを入力し、図４に示す実施の形態３と同様な画面を複数の領域に分割したブロック積分値がマイクロコンピュータ８ｃに入力される。
【０１２３】
マイクロコンピュータ８ｃでは、入力した４８ブロックのブロック積分値のうち一定値以上のブロックの積分値を抽出し、その平均値からフィールドを代表する高輝度部の積分値SH1を得る。次にマイクロコンピュータ８ｃではSH1と過去５フィールド分のSmixの代表の積分値SH2、SH3、SH4、SH5、SH6を用いて、実施の形態７と同様に高輝度部のフリッカを検出する。
【０１２４】
また、マイクロコンピュータ８ｃでは、入力した４８ブロックのブロック積分値のうち一定値以下のブロックの積分値を抽出し、その平均値からフィールドを代表する低輝度部の積分値SL1を得る。次にマイクロコンピュータ８ｃではSL1と過去５フィールド分のSmixの代表の積分値SL2、SL3、SL4、SL5、SL6を用いて、今度は低輝度部のフリッカを検出する。
【０１２５】
階調特性変更手段２９では、第２のフリッカ検出手段４で検出したフリッカ補正ゲインに応じて、フィールド毎に高輝度部および低輝度部の階調特性を変更する。階調補正回路２８は、階調特性変更手段２９から与えられた階調特性に応じて、合成信号Smixの階調補正を行う。
【０１２６】
図１８にフリッカ補正を施した場合の階調特性変更手段２９から出力される階調特性を示す。図１８に示すように、第１、第２のフリッカ抑圧手段で抑圧すべき低輝度部及び高輝度部の信号に独立にフリッカ補正のゲインAL0,AL1,AL2および、AH0,AH1,AH2,をかけることができる。
【０１２７】
これにより、実施の形態７で用いていた第１のフリッカ検出手段２及び第１のフリッカ抑圧手段３を省略することができる。
【０１２８】
本実施の形態によれば、画像合成手段６で合成された信号に対して階調補正を施す階調補正回路２８と、階調補正回路２８の階調特性を順次変更する階調特性変更手段２９を有し、複数のフリッカ検出手段の内少なくとも一つは、画像合成手段６で合成された信号からフリッカ成分を検出し、複数のフリッカ抑圧手段の内少なくとも一つは、階調補正回路２８の階調特性を調整することによって得ることにより、回路の簡略化を行うことができるというものである。
【０１２９】
（実施の形態９）
実施の形態１から８では第２のフリッカ抑圧手段において、短時間露光信号Sshortの３フィールドの信号レベルの平均値が一定となるように補正していた。この場合、長時間露光信号Slongと短時間露光信号Sshortは独立に補正が施されているために、フリッカ補正後のSlongとSshortの比が変動する場合がある。このような場合、特に画像合成手段でSshortの増幅率を調整して画像合成処理を行う場合に、信号がうまくつながらなくなり階調特性が不連続となる。
【０１３０】
図２１に露光量の比が想定した値からずれた場合のSlong',Sshort',Smixの関係を示す。図２１において、Slong',Sshort'は実線で、Sshort'に想定したゲインAoをかけたものを破線で、Smixは太線で示した。図２１でSmixは光量L1の付近で階調特性が不連続になっている。
【０１３１】
本発明の目的は、露光量の異なる複数の出力信号の平均信号レベルを検出する複数の信号レベル検出回路と前記複数の信号レベル検出回路の出力信号からフリッカ補正後の露光量の比を算出する演算手段とフリッカ補正のゲインを算出するゲイン算出手段を有し、演算手段では、フリッカ補正後の露光量の比が所定の値になるようなゲインを算出することにより、安定した階調特性を得ようというものである。
【０１３２】
図１９は実施の形態９の固体撮像装置の構成を示す構成図である。図１９において、１は撮像手段としての固体撮像素子、２は第１のフリッカ検出手段、３は第１のフリッカ抑圧手段、４は第２のフリッカ検出手段、５は第２のフリッカ抑圧手段、６は画像合成手段、７ａ，７ｂは積分回路、８ａ，８ｂはマイクロコンピュータ、９ａ，９ｂは増幅回路、１８ｄはセレクタ、２０は比較器、３０ａ，３０ｂは信号レベル検出回路、３１は演算手段である。
【０１３３】
第１のフリッカ検出手段３は、長時間露光信号Slongから低輝度部のフリッカ補正ゲインを算出し、第１のフリッカ抑圧手段３は増幅器９ａによりSlongのフリッカ成分を抑圧した信号Slong'を出力する。
【０１３４】
第２のフリッカ検出手段４は、短時間露光信号Sshortから高輝度部のフリッカ補正ゲインを算出し、第２のフリッカ抑圧手段５は増幅器９ｂによりSshortのフリッカ成分を抑圧した信号Sshort'を出力する。
【０１３５】
信号レベル検出回路３０ａはフリッカ補正された長時間露光信号信号Slong'を入力し、１フィールド期間の平均の信号レベルSlm1を演算手段３１としてのマイクロコンピュータに出力する。また、信号レベル検出回路３０ｂはフリッカ補正された短時間露光信号信号Sshort'を入力し、１フィールド期間の平均の信号レベルSsm1を演算手段３１としてのマイクロコンピュータに出力する。
【０１３６】
演算手段３１では、信号レベル検出回路３０ａ，３０ｂから得た長時間露光信号Slong'と短時間露光信号Sshort'の平均値の３フィールド分の平均値Slm3、Ssm3から補正ゲインAcを求める。この時補正ゲインは当初設定した露光量の比をAoとすると、Ac＝Ao・Ssm3/Slm3で表される。
【０１３７】
第２のフリッカ検出手段４におけるマイクロコンピュータ８ｂは短時間露光信号Sshortに対するフリッカゲインAsに対して、補正ゲインAcをかけたものを新たなフリッカゲインAs'として第２のフリッカ抑圧手段５に転送し、フリッカの抑圧を施す。
【０１３８】
これによって、長時間露光信号Slong及び短時間露光信号Sshortに対してフリッカ補正を施してもフリッカ補正後のSlong'とSshort'の比が所定の値となり、画像合成手段６において連続した階調特性の出力信号を得ることができる。
【０１３９】
図２１にゲインを補正した場合のSmixの特性を細線で示す。ゲイン補正により、光量Ｌ１における階調特性の不連続は改善される。
【０１４０】
本実施の形態によれば、露光量の異なる複数の出力信号の平均信号レベルを検出する複数の信号レベル検出回路３０ａ，３０ｂと前記複数の信号レベル検出回路の出力信号からフリッカ補正後の露光量の比を算出する演算手段３１とフリッカ補正のゲインを算出するゲイン算出手段を有し、ゲイン算出手段では、フリッカ補正後の露光量の比が所定の値になるようにすることにより、安定した階調特性を得ることができるというものである。
【０１４１】
なお、本実施の形態では、演算手段３１で算出した補正ゲインAcを第２のフリッカ抑圧手段５の増幅器９ｂで与えているが、図２０に示すように補正ゲインAcを画像合成手段６の増幅回路９ｃで与えても同様の効果を得ることができる。
【０１４２】
（実施の形態１０）
実施の形態１０は、短時間露光信号のホワイトバランスに関して、実施の形態５に対して別の形態をとったものである。
【０１４３】
本発明の目的は、露光量の異なる複数の出力信号の色温度を検出する複数の色温度検出手段と、色温度補正のためのゲインとフリッカ補正のためのゲインと前記２つのゲインを合成したゲインを算出するゲイン算出手段を有し、前記ゲイン算出手段で算出されたゲインを用いてフリッカ抑圧手段におけるフリッカ補正のゲインおよびホワイトバランスを調整することである。
【０１４４】
図２２は実施の形態１０の固体撮像装置の構成を示す構成図である。図２２において、１は撮像手段としての固体撮像素子、２は第１のフリッカ検出手段、３は第１のフリッカ抑圧手段、４は第２のフリッカ検出手段、５は第２のフリッカ抑圧手段、６は画像合成手段、７ａ，７ｂは積分回路、８ａ，８ｂはマイクロコンピュータ、９ａ，９ｂ，９ｃは増幅回路、１８ｃ，１８ｄはセレクタ、１９ａ〜１９ｄはレジスタ、２０は比較器、３１は演算手段、３２ａ，３２ｂはホワイトバランス検出手段である。
【０１４５】
図２２において、第１のフリッカ検出手段２は長時間露光信号Slongから低輝度部の輝度信号成分のフリッカ補正ゲインを算出し、第１のフリッカ抑圧手段３は増幅器９ａによりSlongのフリッカ成分を抑圧した信号Slong'を出力する。
【０１４６】
第２のフリッカ検出手段４は短時間露光信号Sshortから高輝度部の輝度信号成分のフリッカ補正ゲインを算出し、第２のフリッカ抑圧手段５は増幅器９ｂによりSshortのフリッカ成分を抑圧した信号Sshort'を出力する。
【０１４７】
フリッカ補正が施された長時間露光信号Slong'はホワイトバランス検出回路３２ａに入力される。このホワイトバランス検出回路の構成は実施の形態５における第２のフリッカ検出手段４と同様の構成で実現できる。ホワイトバランス検出回路３２ａからは、図１１（ａ）に示されるような色温度情報（ＳＣｒｌ，ＳＣｂｌ）が得られる。同様にフリッカ補正が施された短時間露光信号Sshort'がホワイトバランス検出回路３２ｂに入力され、長時間露光信号と同様に図１１（ａ）に示されるような色温度情報（ＳＣｒｓ，ＳＣｂｓ）が得られる。演算手段３０としてのマイクロコンピュータはホワイトバランス検出回路３２ａ、３２ｂで検出された２つの色温度情報を入力し、短時間露光信号の色温度情報（ＳＣｒｓ，ＳＣｂｓ）が長時間露光信号の色温度情報（ＳＣｒｌ，ＳＣｂｌ）に近づくように固体撮像素子１の色フィルタ毎のゲインを算出する。具体的には、ＳＣｒｓを大きくしたい場合は、ＡＭＹを大きくし、ＡＧＣを小さくする。小さくしたい場合はその逆に制御する。また、ＳＣｂｓを大きくしたい場合はＡＭＣを大きくし、ＡＧＹを小さくする。
【０１４８】
このような動作により、第２のフリッカ抑圧手段５から出力される短時間露光信号Sshort'の色温度情報を長時間露光信号Slong'の色温度情報と一致させることができる。
【０１４９】
この後、図示していないが画像合成手段６の出力信号であるSmixをカメラ信号処理において通常のホワイトバランス処理することによって、高輝度部から低輝度部まで最適なホワイトバランス調整を行うことができる。
【０１５０】
本実施の形態によれば、露光量の異なる複数の出力信号の色温度を検出する複数の色温度検出手段と、色温度補正のためのゲインとフリッカ補正のためのゲインと前記２つのゲインを合成したゲインを算出するゲイン算出手段を有し、前記ゲイン算出手段で算出されたゲインを用いてフリッカ抑圧手段におけるフリッカ補正のゲインおよびホワイトバランスを調整することができるというものである。
【０１５１】
（実施の形態１１）
実施の形態１０では、第１のフリッカ検出手段２で低輝度部の輝度フリッカを検出し、第１のフリッカ抑圧手段３で低輝度部のフリッカを抑圧し、第２のフリッカ検出手段４で高輝度部の輝度フリッカ成分を検出し、第２のフリッカ抑圧手段５では、第２のフリッカ検出手段４で検出されるフリッカゲインとホワイトバランス検出手段３２ａ，３２ｂおよび演算手段３１で算出されたを合成してフリッカ補正と同時に高輝度部のホワイトバランス補正を実現している。しかしながら、実施の形態１０の構成では、高輝度部の色フリッカに対応していないので、フリッカのある被写体では色成分のみがフリッカを起こすという現象が生じる。
【０１５２】
本発明の目的は、複数の色温度検出手段のうち少なくとも一つは、フリッカ周期に対応した複数の色温度情報を検出し、フリッカ抑圧手段のうち少なくとも一つは、フリッカ周期に対応した色温度の変化を抑圧することにより、色フリッカ成分を抑圧するというものである。
【０１５３】
図２３は本発明の実施の形態１１の固体撮像装置の構成を示す構成図である。図２３において、１は撮像手段としての固体撮像素子、２は第１のフリッカ検出手段、３は第１のフリッカ抑圧手段、４は第２のフリッカ検出手段、５は第２のフリッカ抑圧手段、６は画像合成手段、７ａ，７ｂは積分回路、８ａ，８ｂはマイクロコンピュータ、９ａ〜９ｃは増幅回路、１８ｃ〜１８ｄはセレクタ、１９ａ〜１９ｄはレジスタ、２０は比較器、３１は演算手段、３２ａ〜３２ｄはホワイトバランス検出手段である。
【０１５４】
実施の形態１１の固体撮像装置の構成は実施の形態１０の固体撮像装置の構成に対し、短時間露光信号Sshortに対するホワイトバランス検出回路３２ｂ，３２ｃ，３２ｄの構成が異なっている。
【０１５５】
図２３で、第１のフリッカ検出手段２は、長時間露光信号Slongから低輝度部の輝度信号成分のフリッカ補正ゲインを算出し、第１のフリッカ抑圧手段３は増幅器９ａによりSlongのフリッカ成分を抑圧した信号Slong'を出力する。
【０１５６】
第２のフリッカ検出手段４は、短時間露光信号Sshortから高輝度部の輝度信号成分のフリッカ補正ゲインを算出し、第２のフリッカ抑圧手段５は増幅器９ｂによりSshortのフリッカ成分を抑圧した信号Sshort'を出力する。
【０１５７】
短時間露光信号Sshort'はセレクタ１８ｅに入力され、フィールド毎にホワイトバランス検出手段３２ｂ，３２ｃ，３２ｄに入力される。すなわち各ホワイトバランス検出手段３２ｂ〜３２ｄは、３フィールド毎に色温度情報を得ることになる。このようにして得られた３フィールド毎の色温度情報と長時間露光信号Slong'から得られる色温度情報との関係から演算手段３１としてのマイクロコンピュータで３フィールド毎のホワイトバランスゲインが算出される。
【０１５８】
第２のフリッカ検出手段４では短時間露光信号の輝度フリッカ補正ゲインと、３フィールド毎のホワイトバランス補正ゲインが合成されて、第２のフリッカ抑圧手段５によりゲイン調整され、輝度フリッカと共に色フリッカも抑圧された出力信号を得ることができる。
【０１５９】
本実施の形態によれば、複数の色温度検出手段のうち少なくとも一つは、フリッカ周期に対応した複数の色温度情報を検出し、フリッカ抑圧手段のうち少なくとも一つは、フリッカ周期に対応した色温度の変化を抑圧することにより、色フリッカ成分を抑圧することができるというものである。
【０１６０】
なお、実施の形態１〜１１において、マイクロコンピュータが複数使用されている場合があるが、実際には全て１つのマイクロコンピュータで実現できることは、言うまでもない。
【０１６１】
【発明の効果】
以上のように本発明によれば、ダイナミックレンジを拡大しつつ高輝度部でも低輝度部でもフリッカを抑圧することができるというものである。
【０１６２】
また、本発明の別の効果は、各色信号ごとにフリッカ補正の処理を施しているために、これらのばらつきは抑圧され、輝度信号と共に色信号のフリッカも抑圧された出力信号を得ることができるというものである。
【０１６３】
本発明のさらに別の効果は、フリッカ抑圧手段における増幅回路を利用して、高輝度部のホワイトバランス補正を行うことにより、高輝度部も低輝度部もホワイトバランスのとれた画像を得ることができるというものである。
【０１６４】
本発明のさらに別の効果は、画面を複数のブロックに分割し、各ブロックごとにフリッカ補正を施すことにより、複数の光源が存在するような場合でも、画面全体にわたってフリッカの抑圧された信号を得ることができるというものである。
【０１６５】
本発明のさらに別の効果は、複数のフリッカ検出手段の内少なくとも一つは、画像合成手段で合成された信号からフリッカ成分を検出し、複数のフリッカ抑圧手段の内少なくとも一つは、前記階調補正回路の階調特性を調整することによって得ることにより、回路の簡略化を行うことができるというものである。
【０１６６】
本発明のさらに別の効果は、露光量の異なる複数の出力信号の平均信号レベルを検出する複数の信号レベル検出回路と前記複数の信号レベル検出回路の出力信号からフリッカ補正後の露光量の比を算出する演算手段とフリッカ補正のゲインを算出するゲイン算出手段を有し、ゲイン算出手段では、フリッカ補正後の露光量の比が所定の値になるようにすることにより、安定した階調特性を得ることができるというものである。
【０１６７】
本発明のさらに別の効果は、露光量の異なる複数の出力信号の色温度を検出する複数の色温度検出手段と、色温度補正のためのゲインとフリッカ補正のためのゲインと前記２つのゲインを合成したゲインを算出するゲイン算出手段を有し、前記ゲイン算出手段で算出されたゲインを用いてフリッカ抑圧手段におけるフリッカ補正のゲインおよびホワイトバランスを調整することができるというものである。
【０１６８】
本発明のさらに別の効果は、複数の色温度検出手段のうち少なくとも一つは、フリッカ周期に対応した複数の色温度情報を検出し、フリッカ抑圧手段のうち少なくとも一つは、フリッカ周期に対応した色温度の変化を抑圧することにより、色フリッカ成分を抑圧することができるというものである。
【図面の簡単な説明】
【図１】本発明の実施の形態１による固体撮像装置の構成を表す構成図
【図２】同固体撮像装置の全画素読み出し型の固体撮像素子の構成図
【図３】本発明の実施の形態２による固体撮像装置の構成を表す構成図
【図４】同実施の形態３の固体撮像装置の第１のフリッカ検出手段の構成を示す構成図
【図５】同固体撮像装置のブロック積分手段における画面分割の様子を示す模式図
【図６】本発明の実施の形態４による固体撮像装置の構成を表す構成図
【図７】同固体撮像装置の撮像手段としての固体撮像素子の構成を表す構成図
【図８】同固体撮像装置の画像合成手段の各部における信号の入射光量と信号レベルの関係を示す波形図
【図９】（ａ）同固体撮像装置の各色の明るさの波形を示す波形図
（ｂ）同固体撮像装置のＡ、Ｂ、Ｃ、Ｄのタイミングで短時間露光を行った場合のMY、MC、GY、GCの各画素の平均の出力値を示す波形図
【図１０】本発明の実施の形態５による固体撮像装置の構成図
【図１１】同実施の形態５の固体撮像装置のホワイトバランスのための色座標空間図
【図１２】同実施の形態６の固体撮像装置の構成を示す構成図
【図１３】同実施の形態６の固体撮像装置の第１のフリッカ検出手段の構成図
【図１４】同実施の形態６の固体撮像装置の第２のフリッカ検出手段の構成図
【図１５】同実施の形態７の固体撮像装置の構成を示す構成図
【図１６】同実施の形態７の階調補正回路の階調特性図
【図１７】同実施の形態８の固体撮像装置の構成図
【図１８】同実施の形態８の階調補正回路の階調特性図
【図１９】同実施の形態９の固体撮像装置の構成図
【図２０】同実施の形態９の固体撮像装置の構成図
【図２１】同実施の形態９の固体撮像装置のSlong,Sshort,Smixの関係を示す光電変換図
【図２２】同実施の形態１０の固体撮像装置の構成図
【図２３】同実施の形態１１の固体撮像装置の構成図
【図２４】従来の固体撮像装置の構成を示す構成図
【図２５】従来の固体撮像装置のSlong、Sshort、Smixの関係を示す光電変換図
【符号の説明】
１ 固体撮像素子
２ 第１のフリッカ検出手段
３ 第１のフリッカ抑圧手段
４ 第２のフリッカ検出手段
５ 第２のフリッカ抑圧手段
６ 画像合成手段
７ａ，７ｂ 積分回路
８ａ，８ｂ マイクロコンピュータ
９ 増幅回路
１０ 加算回路[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a solid-state imaging device used for a video camera or the like.
[0002]
[Prior art]
As a solid-state imaging device for synthesizing images with different exposure amounts to obtain a video signal with a high dynamic range, a device described in Japanese Patent Application Laid-Open No. 7-322147 has been known.
[0003]
A conventional solid-state imaging device will be described below with reference to the drawings. FIG. 24 is a configuration diagram showing a configuration of a conventional solid-state imaging device. In FIG. 24, 1 is an image pickup means, and 200 is an image composition means. As the imaging means 1, for example, an all-pixel readout type solid-state imaging device capable of outputting a signal having twice the number of scanning lines as compared with a normal solid-state imaging device is used, and exposure of pixels corresponding to one scanning line is performed. The normal signal Slong and the electronic shutter signal Sshort are obtained by making the amount smaller than usual by the electronic shutter operation, and the image synthesizing unit 200 outputs the output signals Slong and Sshort having different exposure amounts output from the imaging unit 1. Are simply added to obtain a composite image signal Smix. FIG. 25 shows the relationship between Slong, Sshort, and Smix when the incident light quantity L is taken on the horizontal axis and the signal level S is taken on the vertical axis.
[0004]
[Problems to be solved by the invention]
In this solid-state imaging device, an electronic shutter operation is used to obtain signals with different exposure amounts. However, under a light source whose brightness varies with a period of about 50 Hz as in a fluorescent lamp, signals with different exposure amounts are used. Since the flicker components are different for each image, different flickers are generated in the low luminance portion due to the normal signal Slong and the high luminance portion due to the electronic shutter signal Sshort when the images are combined.
[0005]
An object of the present invention is to obtain a solid-state imaging device in which flicker is suppressed in both a high luminance part and a low luminance part.
[0006]
[Means for Solving the Problems]
In order to solve this problem, the present invention detects and suppresses a flicker component for each signal having a different exposure amount by a plurality of flicker detection means and a plurality of flicker suppression means under a light source whose brightness varies, and an image composition means The composition is configured to be combined.
[0007]
Thereby, it is possible to obtain a solid-state imaging device in which flicker is suppressed in both the high luminance portion and the low luminance portion.
[0008]
DETAILED DESCRIPTION OF THE INVENTION
The first aspect of the present invention comprises an image pickup means, a plurality of flicker detection means, a plurality of flicker suppression means, and an image composition means. The image pickup means outputs a plurality of output signals having different exposure amounts, and detects a plurality of flickers. The means detects flickers of a plurality of output signals having different exposure amounts, the plurality of flicker suppressing means suppresses the flickers of the plurality of output signals, and the image synthesizing means has an operation of combining signals having different exposure amounts.
[0009]
Hereinafter, embodiments of the present invention will be described with reference to the drawings.
(Embodiment 1)
An object of the present invention is to suppress flicker in both a high luminance part and a low luminance part.
[0010]
FIG. 1 is a configuration diagram showing the configuration of the solid-state imaging device according to the first embodiment of the present invention. In FIG. 1, reference numeral 1 denotes a solid-state imaging device as imaging means, 2 denotes first flicker detection means, 3 denotes a solid-state imaging device driving circuit as first flicker suppression means, 4 denotes second flicker detection means, 5 Is a second flicker suppression means, 6 is an image composition means, 7a and 7b are integration circuits, 8a and 8b are microcomputers, 9 is an amplification circuit, and 10 is an addition circuit.
[0011]
The solid-state imaging device 1 uses an all-pixel readout type solid-state imaging device that can output a signal having twice as many scanning lines as a normal solid-state imaging device. FIG. 2 shows a configuration diagram of an example of an all-pixel readout type solid-state imaging device. In FIG. 2, 11 is a photoelectric conversion unit, 12 is a vertical transfer unit, 13a and 13b are horizontal transfer units, 14a and 14b are output amplifiers, and 15a and 15b are output terminals. The example shown in FIG. 2 is configured with four horizontal pixels and six vertical pixels as the number of pixels. Actually, however, the number of pixels represented by, for example, VGA (Video Graphics Array) is 640 pixels wide and 480 pixels vertical. The configuration of pixels is taken.
[0012]
A long exposure signal Slong (indicated by a mark ● in FIG. 2) obtained by performing photoelectric conversion in the vertical effective period of about 1/60 second out of one field period in the television system by the photoelectric conversion unit 11 is a vertical blanking period. Is read out by the vertical transfer unit 12. Further, a short exposure signal Sshort (indicated by a circle in FIG. 2) obtained by photoelectric conversion for about 1/1000 second in the vertical blanking period is the vertical transfer section 12 independently of Slong in the same vertical blanking period. Is read out. The signals Slong and Sshort thus obtained are independently transferred sequentially from the vertical transfer unit 12 to the horizontal transfer units 13a and 13b, and output amplifiers 14a and 14b, output terminal 15a and It is output through 15b.
[0013]
FIG. 25 is a graph showing the relationship between Slong and Sshort when the incident light quantity L is taken on the horizontal axis and the signal level (signal quantity) S is taken on the vertical axis. There is a correlation between the signal amount of the image sensor and S / N, and noise is noticeable when the signal amount is small. In FIG. 25, Slong is saturated with the incident light quantity A, but a signal with a good S / N can be obtained with an incident light quantity less than that. Sshort has a signal amount smaller than A but small S / N, but can reproduce a signal with a light quantity greater than A. By combining these two signals, a signal having a good S / N and a high dynamic range can be obtained.
[0014]
  The long exposure signal Slong output from the solid-state imaging device 1 is input to the first flicker detection means 2. In the first flicker detection means 2, the long exposure signal Slong is input to the integrating circuit 7a, Slong is integrated for one field period, and the integration result is input to the microcomputer (μ-com) 8a as SL1. The flicker component is generated at a cycle of 20 Hz because of the relationship between the fluorescent lamp cycle of 50 Hz and the television system field cycle of 60 Hz. Therefore, in the microcomputer 8a, the input SL1 and the past6Slong integral value SL2, SL3, SL4, SL5, SL6 for fieldSL7Using,Bandpass filter processingThus, the 20 Hz component is detected.
[0016]
Since flicker is detected by the bandpass filter as described above, erroneous detection temporarily occurs in the case of a sudden luminance change. In order to cope with such erroneous detection, the microcomputer 8a determines that there is flicker when the absolute value of the detected 20 Hz component exceeds a predetermined value for six consecutive fields, and outputs a signal indicating flicker. .
[0017]
In the driving circuit 3 of the solid-state imaging device 1 as the first flicker suppressing unit, when a signal indicating the presence of flicker is input from the first flicker detecting unit 2, the exposure time of the long-time exposure signal in the solid-state imaging device 1 is reduced to 1/100. The solid-state imaging device 1 is driven at the second.
[0018]
Since 1/100 second corresponds to ½ of the period of 50 Hz of the fluorescent lamp, flickering of the long exposure signal Slong is thereby suppressed.
[0019]
Next, the short exposure signal Sshort output from the solid-state imaging device 1 is input to the second flicker detection means 4. In the second flicker detection means 4, as in the first flicker detection circuit 2, SS1 obtained by integrating Sshort in the integration circuit 7b for one field period is input to the microcomputer 8b, and SS1 and Sshort for the past five fields are input. Flicker is detected using the integrated values SS2, SS3, SS4, SS5, and SS6.
[0020]
  Further, the microcomputer 8b uses the integral values SS1, SS2, SS3 of Sshort,Of fluorescent light flicker cycle, SS2 The signal with the same phase as SS1 From SS3 Is the average of the integral values ofGain A is calculated and output.
[0022]
In the second flicker suppressing means 5, when the second flicker detecting means 4 detects flicker, the gain A output from the second flicker detecting means 4 is input and two fields after the field obtained by integrating SS1. At this timing, the amplifier circuit 9 performs gain correction on Sshort and outputs it as Sshort ′ in which flicker is suppressed.
[0023]
In the image synthesizing means 6, the long exposure signal Slong in which flicker is suppressed and the short exposure signal Sshort in which flicker is suppressed are input and added by the adder circuit 10 to output a composite image signal Smix.
[0024]
Here, the release of the flicker suppressing means will be described. The long-time exposure signal in which flicker is suppressed is output as Slong from the solid-state imaging device 1 by the first flicker suppressing unit 3, and flicker is not detected by the first flicker detecting unit 2. However, if flicker suppression is canceled at this point, flicker occurs again. In such a case, in the microcomputer 8a, the exposure time of the long exposure signal is held at 1/100 second, and the integration value SL1 output from the integration circuit 7a greatly varies from the integration value of the past field. In this case, it is determined that the shooting scene has changed, the flicker suppression operation is canceled, and the exposure time of the long exposure signal is changed to 1/60 seconds.
[0025]
Further, in the case of a subject without flicker, the second flicker detection means 4 reduces the output of the bandpass filter calculated from the integral value, so that the flicker suppression operation is canceled from that condition.
[0026]
With the configuration as described above, the solid-state imaging device according to the present embodiment can suppress flicker in both the high luminance portion and the low luminance portion while expanding the dynamic range.
[0027]
In the present embodiment, the first flicker detection means 2 and the second flicker detection means 4 use the microcomputer 8a and the microcomputer 8b, but the same microcomputer may be used in a time-sharing manner. The effect of can be obtained.
[0028]
The same result can be obtained even if the flicker detection determination by the second flicker detection unit 4 is performed based on the detection result of the first flicker detection unit 2. In this case, the flicker detection process of the second flicker detection means 4 can be omitted. However, the calculation of the correction gain for gain correction in the second flicker suppressing means 5 cannot be omitted.
[0029]
Further, as the first flicker suppressing means 3, the flicker is suppressed by adjusting the exposure time by driving the solid-state imaging device 1. Like the second flicker suppressing means 5, the flicker is suppressed by adjusting the gain for the signal. The same effect can be obtained even if the above process is performed.
[0030]
Further, in the present embodiment, the flicker suppression is canceled independently by the first flicker suppression means 3 and the second flicker suppression means 5, but both flicker suppressions are canceled by one of the operations. May be.
[0031]
(Embodiment 2)
In a normal solid-state imaging device that does not perform dynamic range expansion, an output signal of an imaging unit is input, and camera signal processing such as γ correction and aperture correction is performed and output as an output signal.
[0032]
  An object of the present invention is to provide a configuration in which a circuit can be shared with normal camera signal processing by inputting a composite image signal Smix to the flicker detection means and the flicker suppression means.
[0033]
FIG. 3 is a configuration diagram showing the configuration of the solid-state imaging device according to the second embodiment of the present invention. In FIG. 3, reference numeral 1 denotes a solid-state imaging device as imaging means, 2 denotes first flicker detection means, 3 denotes a driving circuit of the solid-state imaging device as first flicker suppression means, 4 denotes second flicker detection means, 5 Is a second flicker suppression means, 6 is an image composition means, 7a and 7b are integration circuits, 8a and 8b are microcomputers, 9 is an amplification circuit, and 10 is an addition circuit.
[0034]
Since the operation of the solid-state imaging device 1 as the imaging unit conforms to the first embodiment, the description thereof is omitted here. The operations of the second flicker detection means 4 and the second flicker suppression means 5 are also the same as in the first embodiment, and thus the description thereof is omitted here.
[0035]
As a result, the long-time exposure signal Slong output from the solid-state imaging device 1 and the short-time exposure signal Sshort ′ with flicker suppressed are input to the image synthesizing means 6, and both signals are added in the adder circuit 10 to be the combined image signal Smix Is output as Since the long exposure signal Slong is not subjected to flicker suppression in the composite image signal Smix obtained in this way, flicker occurs in a portion in the screen where the long exposure signal Slong is not saturated.
[0036]
Next, the first flicker detection means 2 receives the composite image signal Smix output from the image composition means 6, detects flicker as in the first embodiment, and indicates that flicker is present when flicker occurs. Output a signal. The solid-state image sensor driving circuit 3 serving as the first flicker suppressing means sets the exposure time of the long-time exposure signal Slong of the solid-state image sensor 1 to 1/100 second when detecting a signal indicating the presence of flicker. To do.
[0037]
However, the cancellation of flicker suppression is omitted here in accordance with the first embodiment.
[0038]
By the operation as described above, the long exposure signal Slong and the short exposure signal Sshort are each suppressed in flicker, and the combined image signal Smix in which the dynamic range is expanded and the flicker is suppressed in both the high luminance portion and the low luminance portion is obtained. be able to.
[0039]
In the present embodiment, the first flicker detection means 2 and the second flicker detection means 4 use the microcomputer 8a and the microcomputer 8b, but the same microcomputer may be used in a time-sharing manner. The effect of can be obtained.
[0040]
The same result can be obtained even if the flicker detection determination by the second flicker detection unit 4 is performed based on the detection result of the first flicker detection unit 2. In this case, the flicker detection process of the second flicker detection means 4 can be omitted. However, the calculation of the correction gain for gain correction in the second flicker suppressing means 5 cannot be omitted.
[0041]
Further, as the first flicker suppressing unit 3, flicker is suppressed by adjusting the exposure time by driving the solid-state imaging device 1, but, similar to the second flicker suppressing unit 9, flicker suppression is performed by adjusting the gain for the signal. The same effect can be obtained even if the above process is performed. However, although flicker detection is performed from the composite image signal Smix, it is desirable that flicker suppression be performed on the long-time exposure signal Slong.
[0042]
Further, in the present embodiment, the flicker suppression is canceled independently by the first flicker suppression means 3 and the second flicker suppression means 4, but both flicker suppressions are canceled by one of the operations. May be.
[0043]
(Embodiment 3)
In the second embodiment, flicker detection for the long-time exposure signal is performed from the composite image signal Smix by the first flicker detection means 2, but from the composite image signal Smix, the flicker is suppressed at Sshort 'in the high luminance portion. The influence is large and it is difficult to detect flicker accurately. An object of the present invention is to perform more accurate flicker detection even from the composite image signal Smix.
[0044]
Since the configuration and operation of the solid-state imaging device of the present embodiment are the same as those of the second embodiment except for the first flicker detection means 2, they are omitted here.
[0045]
FIG. 4 is a configuration diagram showing the configuration of the first flicker detection means 2 of the solid-state imaging device according to Embodiment 3 of the present invention. In FIG. 4, 7c to 7j are integration circuits, 16 is a block integration means, 17 is a multiplexer, 18 is a selector, and 8c is a microcomputer (μ-com) as flicker determination means. FIG. 5 is a schematic diagram showing a state of screen division in the block integration means 16.
[0046]
The first flicker detection means 2 receives the composite image signal Smix as in the second embodiment. The input composite image signal Smix is input to the block integration means 16 of the first flicker detection means 2. In the block integration means 16, the multiplexer 17 integrates signals from the first block to the eighth block at the left end of the screen in accordance with the division timing of the screen divided into a total of 48 blocks of 8 by 6 as shown in FIG. The integration value in the first column is integrated by switching from 7c to 7j and integrating. Next, at the timing when the composite image signal Smix moves from the eighth block to the ninth block, the selector 18 selects the integration circuits 17c to 17j, and outputs eight block integration values SB1 to SB8, which are output to the microcomputer 8c. Entered. By a similar operation, block integration values SB1 to SB48 of 48 blocks are input to the microcomputer 8c after one field period.
[0047]
In the microcomputer 8c, the integral value of a block equal to or smaller than a certain value is extracted from the block integral values of the input 48 blocks, and the integral value SM1 representing the field is obtained from the average value. Next, the microcomputer 8c detects flicker using the integrated values SM2, SM3, SM4, SM5, and SM6 of SM1 and Smix for the past five fields in the same manner as in the second embodiment.
[0048]
Since the operation after the first flicker suppressing means 3 is the same as that of the second embodiment, the description thereof is omitted.
According to the present invention, the first flicker detection means 2 is composed of a block integration means and a microcomputer as a flicker determination means, and the flicker detection is performed by using only the block integration value having a low level, thereby synthesizing. Flicker is detected from the Slong signal with flicker without using as much as possible the signal Sshort on the high luminance side of the image signal Smix where flicker is suppressed, and more accurate flicker suppression is possible.
[0049]
In the present embodiment, the number of block divisions is 48 blocks, but the number of divisions is not necessarily 48 blocks. Although it can be considered that the maximum number of divisions is the number of pixels of the image sensor 1, it is difficult to transfer data for the number of pixels to the microcomputer 8c. In such a case, the first flicker detection is performed. It is conceivable that the means is constituted by a circuit. However, even with such a configuration, the same effect as in the present embodiment can be obtained.
[0050]
(Embodiment 4)
In the first to third embodiments, a black and white solid-state imaging device is assumed as an imaging unit for the basic operation description. As imaging means using a solid-state imaging device, there are a three-plate method for color separation by a color separation prism and a colorization method by a single-plate method in which color filters having different spectral characteristics are arranged for each pixel.
[0051]
The flicker of the image pickup means can be largely suppressed even with the configuration as in the first to third embodiments, but the phase of the variation in the brightness of the fluorescent lamp differs for each color component. For this reason, it is difficult to suppress variations in color components, that is, color flicker, only by suppressing luminance components.
[0052]
An object of the present invention is to realize a solid-state imaging device that suppresses not only a luminance component but also a flicker of a color component.
[0053]
FIG. 6 is a block diagram showing the configuration of the solid-state imaging device according to Embodiment 4 of the present invention. In FIG. 6, 1 is a solid-state imaging device as an imaging unit, 2 is a first flicker detection unit, 3 is a first flicker suppression unit, 4 is a second flicker detection unit, 5 is a second flicker suppression unit, 6 is an image synthesis means, 7k to 7n are integration circuits, 8b is a microcomputer, 9a and 9b are amplification circuits, 17b is a multiplexer, 18b to 18d are selectors, 19a to 19d are registers, and 20 is a comparator.
[0054]
FIG. 7 is a configuration diagram showing the configuration of the solid-state imaging device 1 as the imaging means of the solid-state imaging device according to Embodiment 4 of the present invention. 7 has four different spectral characteristics of magenta (Mg), green (Gr), yellow (Ye), and cyan (Cy) on the photoelectric conversion unit 11 of the solid-state image sensor in the first embodiment. The color filter is provided for each pixel, and the operation is exactly the same as in the first embodiment. However, as the output signal, four kinds of signals of magenta + yellow (MY), magenta + cyan (MC), green + yellow (GY), and green + cyan (GC) are generated by the pixel mixing operation of the solid-state imaging device 1. The long exposure signal Slong and the short exposure signal Sshort are output.
[0055]
Depending on the arrangement of the color filters, signals with MY and GC as one set and MC and GY as one set are output alternately for each line, and MY and GC, MC and GY are output alternately for each pixel. Is done. The spectral characteristics of each color filter are designed so that the sum of MY and GC and the sum of MC and GY become the spectral characteristics of the luminance signal Y. Therefore, the signal sequences of MY and GC and MC and GY are output as signals in which the color signal components Cr and Cb are modulated and superimposed on the luminance signal component Y.
[0056]
FIG. 8 shows the photoelectric characteristics of Slong and Sshort when the horizontal axis represents the incident light amount L and the vertical axis represents the signal level S. The characteristic shown in FIG. 8 has a shape in which a modulation component is superimposed on the characteristic shown in FIG.
[0057]
FIG. 9A shows waveforms when the horizontal axis represents time t and the vertical axis represents the brightness of each color. FIG. 9B shows average output values of the MY, MC, GY, and GC pixels when short-time exposure is performed at the timings A, B, C, and D in FIG. 9A. . In FIG. 9B, the output value of each pixel is almost constant at the timings A and D, but at the timings B and C, a difference occurs in the output level due to the phase shift of the brightness change for each color. is doing. In the first to third embodiments, since a constant gain is given to each pixel, this variation ratio remains, and flicker occurs with respect to the color signal component.
[0058]
The long exposure signal Slong output from the solid-state imaging device 1 is input to the first flicker detection means 2. Here, the operations of the first flicker detection means 2 and the first flicker suppression means 3 are the same as those in the first embodiment, and are therefore omitted here. The first flicker suppression operation is realized by setting the exposure time of the long exposure signal to 1/100 second, which is ½ of the cycle of the fluorescent lamp, so that the influence of the fluctuation of the color component of the fluorescent lamp is almost not affected. I do not receive it.
[0059]
Next, the short exposure signal Sshort output from the solid-state imaging device 1 is input to the second flicker detection means 4. The short-time exposure signal Sshort input to the flicker detection means 4 is distributed by the multiplexer 17b for each of the four types of color output signals MY, MC, GY, GC and input to the integration circuits 7k, 7l, 7m, 7n. After the field period integration, SMY1, SMC1, SGY1, and SGC1 are sequentially input to the microcomputer 8b through the selector 18b. In the microcomputer 8b, flicker is detected in the same manner as in the first embodiment, with SS1 being the sum of the input SMY1, SMC1, SGY1, and SGC1.
[0060]
  Further, in the microcomputer 8b, the integrated values SMY1, SMC1, SGY1, SGC1 of Sshort for each detected color signal and the integrated values SMY2, SMC2, SGY2, SGC2, SMY3, SMC3, SGY3, SGC3 detected between the past two fields are obtained. make use of,Out of the cycle of fluorescent flicker SMY2 The signal with the same phase as SMY1, SMY2, SMY3 Is the average of the integral values ofGain AMY,SMC2 The signal with the same phase as SMC1, SMC2, SMC3 Gain that is the average of the integral values ofAMC,SGY2 The signal with the same phase as SGY1, SGY2, SGY3 Gain that is the average of the integral values ofAgy,SGC2 The signal with the same phase as SGC1, SGC2, SGC3 Gain that is the average of the integral values ofCalculate and output AGC.
[0062]
The second flicker suppressing means 5 inputs the four types of gains AMY, AMC, AGY, AGC output from the second flicker detecting means 4, and stores them in the registers 19a, 19b, 19c, 19d, respectively. Then, at the timing two fields after the field obtained by integrating SS1, the selector 18c selects gains AMY, AMC, AGY, AGC corresponding to the respective color signals of MY, MC, GY, GC with respect to Sshort, and the amplifier circuit 9a Perform gain correction and output as Sshort 'with flicker suppressed.
[0063]
The image synthesizing means 6 inputs the long exposure signal Slong with flicker suppressed and the short exposure signal Sshort ′ with flicker suppressed. The short-time exposure signal Sshort ′ is amplified by the amplifier circuit 9b with a gain corresponding to the light amount ratio between the long-time exposure signal and the short-time exposure signal in order to preserve the gradation of the color signal. Here, since the exposure time of the long exposure signal is 1/100 second and the exposure time of the short exposure signal is 1/1000 second, the gain is 10 times.
[0064]
Next, the image synthesizing means 6 compares the input long exposure signal Slong with the saturation signal level Ssat of the image pickup device 1 in the comparator 20, and if Slong is saturated in the selector 18d, the gain-up Sshort 'is obtained. If not saturated, Slong is output as a composite image signal Smix.
[0065]
FIG. 8 shows the relationship between the signal incident light quantity L and the signal level S in each part of the image composition means 6. In FIG. 8, the envelope of the long exposure signal Slong having a color modulation component is represented by triangles O, L1, and L2. The envelope of the short exposure signal Sshort is represented by triangles O, S1, and S2. Further, the envelope of the composite image signal Smix is represented by triangles O, M1, and M2.
[0066]
The configuration of the image synthesizing means 6 in the present embodiment is different from those in the first to third embodiments because the output signal of the solid-state imaging device 1 has a modulation component due to a color signal. There is no direct relationship with the flicker suppression operation.
[0067]
In this embodiment, since the flicker correction process is performed for each color signal, these variations are suppressed, and an output signal in which the flicker of the color signal is suppressed together with the luminance signal can be obtained.
[0068]
(Embodiment 5)
In a solid-state imaging device that performs shooting with an expanded dynamic range, there are cases where indoors and outdoors are simultaneously shot as subjects. In this case, since the color temperature of the light source is different between indoor and outdoor, it is desirable to perform white balance correction separately for the indoor subject and the outdoor subject. In general, an indoor subject is dark and an outdoor subject is bright. Therefore, in a solid-state imaging device that expands the dynamic range as in the present invention, white balance correction processing can be performed separately for the high-luminance part and the low-luminance part. As a result, an image with white balance can be obtained on the entire screen.
[0069]
An object of the present invention is to perform white balance correction of a high luminance part using an amplifier circuit in a flicker suppressing means, thereby obtaining an image in which white balance is achieved in both a high luminance part and a low luminance part.
[0070]
FIG. 10 shows a configuration diagram of a solid-state imaging apparatus according to Embodiment 5 of the present invention. In FIG. 10, 1 is a solid-state imaging device as an imaging unit, 2 is a first flicker detection unit, 3 is a first flicker suppression unit, 4 is a second flicker detection unit, 5 is a second flicker suppression unit, 6 is an image synthesis means, 7k to 7n and 7p are integration circuits, 8b and 8d are microcomputers, 9a and 9b are amplification circuits, 17b is a multiplexer, 18b to 18d are selectors, 19a to 19d are registers, 20 is a comparator, Reference numeral 21 denotes a camera signal processing circuit, 22 denotes a luminance / color separation circuit, 23 denotes an aperture correction circuit, 24a and 24b denote γ correction circuits, 25 denotes a white balance correction circuit, and 26 denotes a matrix circuit.
[0071]
The operations of the solid-state imaging device 1, the first flicker detection unit 2, the first flicker suppression unit 3, the second flicker detection unit 4, the second flicker suppression unit 5, and the image composition unit 6 are described in the fourth embodiment. On the other hand, except for the microcomputer 8b in the second flicker detection means 4, it is the same, and is omitted here, and the operation of the microcomputer 8b will be described later.
[0072]
The operation of the camera signal processing circuit 21 is the same as that of a normal camera. First, a composite image signal Smix is input from the image composition means 6. The luminance color separation circuit 22 separates the synthesized image signal Smix composed of MY, MC, GY, and GC into a luminance signal Y and color signals R, G, and B according to the following (Equation 4).
[0073]
[Expression 4]

[0074]
Here, Cr and Cb represent red and blue color modulation components, respectively. K1 and k2 are arbitrary constants and are determined by the spectral characteristics of the color separation filter. For example, a value of 0.2 is used for both k1 and k2.
[0075]
The luminance signal Y obtained in this way is contour-corrected by filter processing in the aperture correction circuit 23, γ-corrected by the γ correction circuit 24a, and output as Yout. At the same time, the color signals R, G, and B are input to the integrating circuit 7p, integrated for one field period, and the integrated values SR, SG, and SB are input to the microcomputer 8d.
[0076]
In the microcomputer 8d, the white balance gains AR and AB are obtained from the input integral values SR, SG and SB by AR = SG / SR and AB = SG / SB. In the white balance correction circuit 25, the R signal is obtained. White balance correction is performed by amplifying with the gain AR and amplifying the B signal with the gain AB. Next, the γ correction circuit 24b performs γ correction processing on each primary color signal output from the white balance circuit 25, performs predetermined matrix processing in the matrix circuit 26, and outputs the result as color difference signals RY and BY.
[0077]
Further, the microcomputer 8d transfers the integral values ΣR, ΣG, and ΣB to the microcomputer 8b.
[0078]
The microcomputer 8b inputs the integration values SMY1, SMC1, SGY1, SGC1 of the integration circuits 7k, 7l, 7m, and 7n and the SR, SG, and SB output from the microcomputer 8d, and performs white balance according to the following (Equation 5). Extract data for detection.
[0079]
[Equation 5]

[0080]
Here, SCr and SCb are equivalent to those obtained by standardizing the color difference modulation component in the red direction and the blue direction with the luminance signal component, and give color coordinates that are not affected by the change in brightness. SRG and SBG are obtained by standardizing red and blue primary color signal components with a green signal, and give color coordinates that are not affected by changes in brightness.
[0081]
FIG. 11 shows a color coordinate space for white balance. FIG. 11A shows SCr on the vertical axis and SCb on the horizontal axis, and FIG. 11B shows SRG on the vertical axis and SBG on the horizontal axis. In any color coordinate space, FIG. In addition, the color coordinates of various light sources are represented by rectangles near the curve passing through the center T3 in the figure, for example, T1 for a light source with a low color temperature, T5 for a light source with a high color temperature, Distributed in the area.
[0082]
Here, the color temperature coordinate space shown in FIG. 11A represents the color temperature of the high luminance region obtained from the short-time exposure signal Sshort, and the color temperature coordinate space shown in FIG. This represents the color temperature after synthesis obtained from the signal Smix after synthesis. When the color temperature coordinates of the light source for each signal obtained by (Equation 5) are arranged in these two coordinates, it may be distributed in a region representing the same light source, but when distributed in a region representing a different light source, The light source is considered to be different between the high luminance region and the low luminance region. Therefore, the microcomputer 8b calculates a gain such that the distribution of the light sources at the two color temperature coordinates is distributed at substantially the same position.
[0083]
For example, a case where the coordinates of the light source detected from Sshort is T5 representing the outdoors and the coordinates of the light source detected from Smix is T3 representing the indoors will be described.
[0084]
Table 1 shows the color temperature coordinates of the five light sources in FIG. 11 and the output signal level ratio of each color filter. This value varies depending on the spectral characteristics such as the color filter of the solid-state image sensor.
[0085]
[Table 1]

[0086]
In order to correct the detected color temperature T5 to T3, the microcomputer 8b sets the level ratio (MY, MC, GY, GC) _T3 = (1.0, 1.0, 1.0, 1.0) of each color filter of T3 to T5. Gain ratio (AwMY, AwMC, AwGY, AwGC) = (1.0, 0.77, 1.11,) 0.83) = (MY, MC, GY, GC) _T3 / (MY, MC, GY, GC) _T5. If this gain is applied to the signal for each color filter of Sshort, the white balance can be substantially matched.
[0087]
The microcomputer 8b multiplies the flicker correction gain (AMY, AMC, AGY, AGC) detected in the same manner as in the fourth embodiment and the white balance gain (AwMY, AwMC, AwGY, AwGC) obtained as described above. New output (AMY, AMC, AGY, AGC).
[0088]
The second flicker suppressing means 5 inputs the four types of gains AMY, AMC, AGY, AGC output from the microcomputer 8b and stores them in the registers 19a, 19b, 19c, 19d, respectively. Then, at the timing two fields after the field obtained by integrating SS1, the selector 18c selects gains AMY, AMC, AGY, AGC corresponding to the respective color signals of MY, MC, GY, GC with respect to Sshort, and the amplifier circuit 9a Perform gain correction and output as Sshort 'with flicker suppressed.
[0089]
The image synthesizing means 6 performs the synthesizing process similarly to the fourth embodiment, and outputs the synthesized image signal Smix in which the dynamic range is expanded and the flicker is suppressed, and the white balance of the high luminance part and the low luminance part is matched.
[0090]
In the present embodiment, the coordinates of the light source and the gain for each color filter are given as a table, and the processing is performed in the state stored in the microcomputer 8b. However, the coordinates of the light source and the gain for each color filter are (several 4) and can be obtained by calculation using the relationship of (Equation 5). In this case, the calculation amount of the microcomputer 8b increases, but the memory capacity can be reduced.
[0091]
In this embodiment, two types of microcomputers 8b and 8d are used, but the same effect can be realized even if one microcomputer is used in a time-sharing manner.
[0092]
(Embodiment 6)
Since the solid-state imaging device of the present invention can output a signal with an extended dynamic range, there are cases in which subjects with different light sources, such as outdoors and indoors, are imaged. In such a case, flicker occurs due to fluorescent lamps indoors, and flicker does not occur due to sunlight outdoors. Therefore, if a uniform flicker suppression process is performed on the screen, flicker occurs in a part of the screen. May not be suppressed.
[0093]
An object of the present invention is to divide a screen into a plurality of blocks and perform flicker correction for each block so that a signal with suppressed flicker can be obtained over the entire screen even when there are a plurality of light sources. It is to make.
[0094]
FIG. 12 is a block diagram showing the configuration of the solid-state imaging device according to Embodiment 6 of the present invention. In FIG. 12, 1 is a solid-state imaging device as imaging means, 2 is first flicker detection means, 3 is first flicker suppression means, 4 is second flicker detection means, 5 is second flicker suppression means, Reference numeral 6 denotes image composition means. FIGS. 13 and 14 show the configuration of the first flicker detection means 2 and the second flicker detection means 4.
[0095]
The long-time exposure signal Slong and the short-time exposure signal Sshort output from the solid-state imaging device 1 are added by the adder 10 in the image combining means 6 and output as a combined image signal Smix.
[0096]
In the first flicker detection means 2, the composite image signal Smix is input as in the third embodiment, and the block integration values SB1 to SB48 of 48 blocks are input to the microcomputer 8c after one field period by the block integration means 16. The
[0097]
In the microcomputer 8c, flicker is detected in the same manner as in the third embodiment, and the flicker of the long exposure signal Slong is suppressed by the first flicker suppressing means 3.
[0098]
The second flicker detection means 4 receives the short exposure signal Sshort as in the second embodiment. The inputted short exposure signal Sshort is inputted to the block integration means 16b of the second flicker detection means 4. In the block integration means 16b, the multiplexer 17b, like the first flicker detection means 2 in the third embodiment, has a block integration value SB1 (1) of 48 blocks obtained by dividing the screen into 48 blocks of 8 by 6 as shown in FIG. To SB1 (48) are input to the microcomputer 8d.
[0099]
The microcomputer 8d detects flicker using the integral values SB1 (1) to SB1 (48) for each block and the integral values for each block for the past five fields.
[0100]
  Further, the microcomputer 8d uses the integral values SB1 (n), SB2 (n), and SB3 (n) for each block of Sshort,Out of the cycle of fluorescent flicker SB2 (n) The signal with the same phase as SB1 (n), SB2 (n), SB (3) Is the average of the integral values ofThe flicker correction gain A (n) for each gain AMY block is calculated and output.
[0102]
If flicker suppression is performed in the second flicker suppression means 5 by the flicker correction gain for each block, a signal in which flicker is suppressed in each part of the screen can be obtained, but if the gain for flicker correction is different from the gain of the adjacent block , Discontinuity of correction amount occurs at the change of block.
[0103]
The second flicker suppressing means 5 inputs the gain A output from the second flicker detecting means 4 and inputs the gain A (n) of each block to the interpolation circuit 27 to obtain the gain Apixel for each pixel. Apixel is obtained by a weighting process based on pixel positions of gains of a pixel block for which gain correction is performed and blocks around the block.
[0104]
The amplifying circuit 9 performs gain correction on Sshort at a timing two fields after the field obtained by integrating SB1 using the gain Apixel for each pixel input from the interpolation circuit 27, and outputs the result as Sshort 'in which flicker is suppressed. .
[0105]
The second flicker detection unit 4 divides the screen into a plurality of blocks, and the second flicker suppression unit 5 performs flicker correction for each block, so that the entire screen can be obtained even when there are a plurality of light sources. A signal with suppressed flicker can be obtained.
[0106]
In this embodiment, two types of microcomputers 8c and 8d are used, but the same effect can be obtained even if one microcomputer is used in a time-sharing manner.
[0107]
Further, in the present embodiment, the first flicker suppressing unit 3 is obtained by adjusting the shutter speed of the image pickup device. However, similar to the second flicker suppressing unit 5, the first flicker suppressing unit 3 may be obtained by gain correction for each block.
[0108]
(Embodiment 7)
The solid-state imaging device of the present invention combines signals with different exposure amounts to obtain a signal with an expanded dynamic range. To make the gradation of a signal with an expanded dynamic range natural. Therefore, a gradation correction circuit is required.
[0109]
An object of the present invention is to simplify the circuit by performing flicker suppression in the gradation correction circuit.
[0110]
FIG. 15 is a configuration diagram showing the configuration of the solid-state imaging device according to the seventh embodiment of the present invention. In FIG. 15, 1 is a solid-state imaging device as an imaging means, 2 is a first flicker detection means, 3 is a first flicker suppression means, 4 is a second flicker detection means, 5 is a second flicker suppression means, 6 is an image synthesis means, 7a and 7b are integration circuits, 8a and 8b are microcomputers, 10 is an addition circuit, 28 is a gradation correction circuit, and 29 is a gradation characteristic changing means.
[0111]
The operations of the solid-state imaging device 1, the first flicker detection means 2, the first flicker suppression means 3 and the image composition means 6 are the same as those in Embodiment 3, and are omitted here.
[0112]
Next, the second flicker detection means 4 receives the output signal Smix of the image synthesis means 6, and a block integral value obtained by dividing the screen into a plurality of areas by the same configuration as in the third embodiment shown in FIG. It is input to 8c.
[0113]
In the microcomputer 8c, an integral value of a block exceeding a certain value is extracted from the block integral values of the input 48 blocks, and an integral value SM1 of the high luminance portion representing the field is obtained from the average value. Next, the microcomputer 8c detects flicker using the integrated values SM2, SM3, SM4, SM5, and SM6 of SM1 and Smix for the past five fields in the same manner as in the second embodiment.
[0114]
The gradation characteristic changing unit 29 changes the gradation characteristic of only the high luminance portion for each field in accordance with the flicker correction gain detected by the second flicker detection unit 4. The gradation correction circuit 28 performs gradation correction of the combined signal Smix according to the gradation characteristics given from the gradation characteristic changing means 29.
[0115]
FIG. 16 shows gradation characteristics output from the gradation characteristic changing means when flicker correction is performed. As shown in FIG. 16, the flicker correction gains AH0, AH1, and AH2 can be applied only to the signal of the high luminance part to be suppressed by the second flicker suppression means 5.
[0116]
  Here, as shown in FIG. 16, when the flicker correction is applied with the gradation characteristic, the flicker gain is increased in the higher luminance portion.TakeSince it is necessary, the gradation characteristic given to the gradation characteristic changing means 29 is adjusted so that the change between the fields becomes larger as the high luminance portion.
[0117]
Here, as the gradation correction circuit 28, there are one that stores a gradation correction curve in a random access memory and one that is realized by polygonal line approximation. In the former case, information on the curve to be written in the memory, in the latter case The gradation characteristics can be changed by changing the value of the inclination of the broken line and the offset.
[0118]
As a result, the amplifier circuit 9 used in the third embodiment can be omitted.
As described above, according to the present embodiment, the gradation correction circuit 5 that performs gradation correction on the signal synthesized by the image synthesizing unit 6 and the gradation that sequentially changes the gradation characteristics of the gradation correction circuit 5. Tone characteristic changing means 29, and at least one of the plurality of flicker detecting means detects a flicker component from the signal synthesized by the image synthesizing means 6, and at least one of the plurality of flicker suppressing means is By obtaining the tone correction circuit 5 by adjusting the gradation characteristics, the circuit can be simplified.
[0119]
(Embodiment 8)
In the seventh embodiment, as the second flicker correction unit, flicker correction by gradation correction is performed only on the high luminance part, but flicker correction can be performed on the low luminance part with the same configuration. .
[0120]
An object of the present invention is to share the first flicker suppressing means and the second flicker suppressing means by giving different gains to the high luminance portion and the low luminance portion of the gradation correction circuit, respectively.
[0121]
FIG. 17 is a configuration diagram of the solid-state imaging device according to the eighth embodiment of the present invention. The configuration shown in FIG. 17 is obtained by removing the first flicker detection means 2 and the first flicker suppression means 3 from the configuration of FIG. In FIG. 17, the operations of the solid-state imaging device 1 and the image synthesizing means 6 are the same as those in the seventh embodiment, and will be omitted.
[0122]
The second flicker detection means 4 receives the output signal Smix of the image composition means 6, and a block integration value obtained by dividing the screen similar to the third embodiment shown in FIG. 4 into a plurality of areas is input to the microcomputer 8c. The
[0123]
In the microcomputer 8c, an integral value of a block exceeding a certain value is extracted from the block integral values of the input 48 blocks, and an integral value SH1 of the high luminance portion representing the field is obtained from the average value. Next, the microcomputer 8c detects flicker in the high luminance portion using the integrated values SH2, SH3, SH4, SH5, and SH6 of SH1 and the past five fields of Smix as in the seventh embodiment.
[0124]
Further, the microcomputer 8c extracts the integral value of a block equal to or smaller than a certain value from the block integral values of the input 48 blocks, and obtains the integral value SL1 of the low luminance part representing the field from the average value. Next, the microcomputer 8c detects the flicker in the low luminance part this time using SL1 and the representative integral values SL2, SL3, SL4, SL5, SL6 of Smix for the past five fields.
[0125]
The gradation characteristic changing unit 29 changes the gradation characteristics of the high luminance part and the low luminance part for each field in accordance with the flicker correction gain detected by the second flicker detection unit 4. The gradation correction circuit 28 performs gradation correction of the combined signal Smix according to the gradation characteristics given from the gradation characteristic changing means 29.
[0126]
FIG. 18 shows the gradation characteristics output from the gradation characteristic changing means 29 when flicker correction is performed. As shown in FIG. 18, the flicker correction gains AL0, AL1, AL2 and AH0, AH1, AH2, are independently applied to the low luminance portion and high luminance portion signals to be suppressed by the first and second flicker suppressing means. You can hang it.
[0127]
Thereby, the first flicker detection means 2 and the first flicker suppression means 3 used in the seventh embodiment can be omitted.
[0128]
According to the present embodiment, the gradation correction circuit 28 that performs gradation correction on the signal synthesized by the image synthesis means 6, and the gradation characteristic changing means that sequentially changes the gradation characteristics of the gradation correction circuit 28. 29, at least one of the plurality of flicker detecting means detects a flicker component from the signal synthesized by the image synthesizing means 6, and at least one of the plurality of flicker suppressing means is a gradation correction circuit 28. By adjusting the gradation characteristics, the circuit can be simplified.
[0129]
(Embodiment 9)
In the first to eighth embodiments, the second flicker suppressing unit corrects the average value of the signal levels of the three fields of the short-time exposure signal Sshort to be constant. In this case, since the long exposure signal Slong and the short exposure signal Sshort are independently corrected, the ratio of Slong to Sshort after flicker correction may vary. In such a case, particularly when the image composition processing is performed by adjusting the amplification factor of Sshort by the image composition means, the signal does not connect well and the gradation characteristics become discontinuous.
[0130]
FIG. 21 shows the relationship between Slong ′, Sshort ′, and Smix when the exposure ratio deviates from the assumed value. In FIG. 21, Slong 'and Sshort' are solid lines, Sshort 'multiplied by the assumed gain Ao is indicated by a broken line, and Smix is indicated by a thick line. In FIG. 21, the gradation characteristic of Smix is discontinuous near the light amount L1.
[0131]
An object of the present invention is to calculate a ratio of exposure amounts after flicker correction from a plurality of signal level detection circuits for detecting an average signal level of a plurality of output signals having different exposure amounts and output signals of the plurality of signal level detection circuits. The calculation means has a gain calculation means for calculating the gain for flicker correction, and the calculation means calculates a gain such that the ratio of the exposure amount after flicker correction becomes a predetermined value, thereby providing stable gradation characteristics. It is to get.
[0132]
FIG. 19 is a configuration diagram showing the configuration of the solid-state imaging device according to the ninth embodiment. In FIG. 19, 1 is a solid-state imaging device as imaging means, 2 is first flicker detection means, 3 is first flicker suppression means, 4 is second flicker detection means, 5 is second flicker suppression means, 6 is an image synthesis means, 7a and 7b are integration circuits, 8a and 8b are microcomputers, 9a and 9b are amplification circuits, 18d is a selector, 20 is a comparator, 30a and 30b are signal level detection circuits, and 31 is a calculation means. is there.
[0133]
The first flicker detection means 3 calculates the flicker correction gain of the low luminance part from the long-time exposure signal Slong, and the first flicker suppression means 3 outputs a signal Slong ′ in which the flicker component of Slong is suppressed by the amplifier 9a. .
[0134]
The second flicker detection means 4 calculates the flicker correction gain of the high luminance part from the short exposure signal Sshort, and the second flicker suppression means 5 outputs a signal Sshort ′ in which the flicker component of Sshort is suppressed by the amplifier 9b. .
[0135]
The signal level detection circuit 30a inputs the long exposure signal signal Slong ′ subjected to flicker correction, and outputs the average signal level Slm1 in one field period to the microcomputer as the calculation means 31. Further, the signal level detection circuit 30b receives the short-time exposure signal signal Sshort ′ subjected to flicker correction, and outputs the average signal level Ssm1 in one field period to the microcomputer as the calculation means 31.
[0136]
The computing means 31 obtains a correction gain Ac from the average values Slm3 and Ssm3 of three fields of the average values of the long exposure signal Slong ′ and the short exposure signal Sshort ′ obtained from the signal level detection circuits 30a and 30b. At this time, the correction gain is expressed as Ac = Ao · Ssm3 / Slm3, where Ao is the initially set exposure amount ratio.
[0137]
The microcomputer 8b in the second flicker detection means 4 transfers the flicker gain As for the short exposure signal Sshort multiplied by the correction gain Ac to the second flicker suppression means 5 as a new flicker gain As'. Apply flicker suppression.
[0138]
As a result, even if the flicker correction is performed on the long exposure signal Slong and the short exposure signal Sshort, the ratio of Slong ′ and Sshort ′ after the flicker correction becomes a predetermined value, and the continuous tone characteristics in the image synthesizing means 6 are obtained. Output signal can be obtained.
[0139]
FIG. 21 shows the Smix characteristic when the gain is corrected by a thin line. By the gain correction, the discontinuity of the gradation characteristic in the light amount L1 is improved.
[0140]
According to the present embodiment, a plurality of signal level detection circuits 30a and 30b for detecting an average signal level of a plurality of output signals having different exposure amounts, and an exposure amount after flicker correction from the output signals of the plurality of signal level detection circuits. And a gain calculation means for calculating the flicker correction gain. In the gain calculation means, the ratio of the exposure amount after the flicker correction is set to a predetermined value, so that the stable That is, gradation characteristics can be obtained.
[0141]
In this embodiment, the correction gain Ac calculated by the calculation means 31 is given by the amplifier 9b of the second flicker suppression means 5, but the correction gain Ac is amplified by the image synthesis means 6 as shown in FIG. The same effect can be obtained even if it is given by the circuit 9c.
[0142]
(Embodiment 10)
In the tenth embodiment, the white balance of the short-time exposure signal is different from that of the fifth embodiment.
[0143]
An object of the present invention is to combine a plurality of color temperature detection means for detecting color temperatures of a plurality of output signals having different exposure amounts, a gain for color temperature correction, a gain for flicker correction, and the two gains. A gain calculating means for calculating a gain; and adjusting the flicker correction gain and white balance in the flicker suppressing means using the gain calculated by the gain calculating means.
[0144]
FIG. 22 is a configuration diagram showing the configuration of the solid-state imaging device according to the tenth embodiment. In FIG. 22, 1 is a solid-state imaging device as an imaging unit, 2 is a first flicker detection unit, 3 is a first flicker suppression unit, 4 is a second flicker detection unit, 5 is a second flicker suppression unit, 6 is an image synthesis means, 7a and 7b are integration circuits, 8a and 8b are microcomputers, 9a, 9b and 9c are amplification circuits, 18c and 18d are selectors, 19a to 19d are registers, 20 is a comparator, and 31 is a calculation means. 32a and 32b are white balance detection means.
[0145]
In FIG. 22, the first flicker detection means 2 calculates the flicker correction gain of the luminance signal component of the low luminance part from the long exposure signal Slong, and the first flicker suppression means 3 suppresses the flicker component of Slong by the amplifier 9a. Signal Slong 'is output.
[0146]
The second flicker detection means 4 calculates the flicker correction gain of the luminance signal component of the high luminance part from the short exposure signal Sshort, and the second flicker suppression means 5 is a signal Sshort ′ in which the flicker component of Sshort is suppressed by the amplifier 9b. Is output.
[0147]
The long exposure signal Slong ′ subjected to the flicker correction is input to the white balance detection circuit 32a. The configuration of this white balance detection circuit can be realized by the same configuration as the second flicker detection means 4 in the fifth embodiment. Color temperature information (SCrl, SCbl) as shown in FIG. 11A is obtained from the white balance detection circuit 32a. Similarly, the short-time exposure signal Sshort ′ subjected to flicker correction is input to the white balance detection circuit 32b, and color temperature information (SCrs, SCbs) as shown in FIG. can get. The microcomputer as the calculation means 30 inputs the two color temperature information detected by the white balance detection circuits 32a and 32b, and the color temperature information (SCrs, SCbs) of the short-time exposure signal is the color temperature information of the long-time exposure signal. The gain for each color filter of the solid-state imaging device 1 is calculated so as to approach (SCrl, SCbl). Specifically, when it is desired to increase SCrs, AMY is increased and AGC is decreased. If you want to make it smaller, reverse the control. If it is desired to increase SCbs, AMC is increased and AGY is decreased.
[0148]
By such an operation, the color temperature information of the short-time exposure signal Sshort ′ output from the second flicker suppressing unit 5 can be matched with the color temperature information of the long-time exposure signal Slong ′.
[0149]
Thereafter, although not shown in the drawing, Swhite, which is an output signal of the image synthesizing means 6, is subjected to normal white balance processing in camera signal processing, so that optimum white balance adjustment from the high luminance portion to the low luminance portion can be performed. .
[0150]
According to the present embodiment, a plurality of color temperature detection means for detecting the color temperatures of a plurality of output signals having different exposure amounts, a gain for color temperature correction, a gain for flicker correction, and the two gains are obtained. Gain calculating means for calculating a combined gain is provided, and the gain and white balance of flicker correction in the flicker suppressing means can be adjusted using the gain calculated by the gain calculating means.
[0151]
(Embodiment 11)
In the tenth embodiment, the first flicker detection means 2 detects the luminance flicker of the low luminance part, the first flicker suppression means 3 suppresses the flicker of the low luminance part, and the second flicker detection means 4 increases the flicker. The luminance flicker component of the luminance portion is detected, and the second flicker suppression means 5 combines the flicker gain detected by the second flicker detection means 4 with the white balance detection means 32a and 32b and the calculation means 31. Thus, the white balance correction of the high brightness portion is realized simultaneously with the flicker correction. However, since the configuration of the tenth embodiment does not support color flicker in the high luminance part, a phenomenon occurs in which only color components cause flicker in a subject with flicker.
[0152]
An object of the present invention is to provide that at least one of the plurality of color temperature detection means detects a plurality of color temperature information corresponding to the flicker cycle, and at least one of the flicker suppression means is a color temperature corresponding to the flicker cycle. By suppressing the change in color, the color flicker component is suppressed.
[0153]
FIG. 23 is a block diagram showing the configuration of the solid-state imaging device according to Embodiment 11 of the present invention. In FIG. 23, 1 is a solid-state imaging device as an imaging unit, 2 is a first flicker detection unit, 3 is a first flicker suppression unit, 4 is a second flicker detection unit, 5 is a second flicker suppression unit, 6 is an image synthesis means, 7a and 7b are integration circuits, 8a and 8b are microcomputers, 9a to 9c are amplification circuits, 18c to 18d are selectors, 19a to 19d are registers, 20 is a comparator, 31 is a calculation means, 32a Reference numerals 32d denote white balance detection means.
[0154]
The configuration of the solid-state imaging device according to the eleventh embodiment is different from the configuration of the solid-state imaging device according to the tenth embodiment in the configuration of the white balance detection circuits 32b, 32c, and 32d for the short-time exposure signal Sshort.
[0155]
In FIG. 23, the first flicker detection means 2 calculates the flicker correction gain of the luminance signal component of the low luminance part from the long-time exposure signal Slong, and the first flicker suppression means 3 uses the amplifier 9a to obtain the flicker component of Slong. The suppressed signal Slong 'is output.
[0156]
The second flicker detection means 4 calculates the flicker correction gain of the luminance signal component of the high luminance part from the short exposure signal Sshort, and the second flicker suppression means 5 is the signal Sshort in which the flicker component of Sshort is suppressed by the amplifier 9b. 'Is output.
[0157]
The short exposure signal Sshort ′ is input to the selector 18e, and is input to the white balance detection means 32b, 32c, 32d for each field. That is, each of the white balance detection means 32b to 32d obtains color temperature information every three fields. From the relationship between the color temperature information for each three fields obtained in this way and the color temperature information obtained from the long-time exposure signal Slong ′, the white balance gain for each three fields is calculated by the microcomputer as the calculation means 31. .
[0158]
The second flicker detection means 4 combines the luminance flicker correction gain of the short-time exposure signal and the white balance correction gain for every three fields, and the gain adjustment is performed by the second flicker suppression means 5, and the color flicker is also detected together with the luminance flicker. A suppressed output signal can be obtained.
[0159]
According to the present embodiment, at least one of the plurality of color temperature detection means detects a plurality of color temperature information corresponding to the flicker cycle, and at least one of the flicker suppression means corresponds to the flicker cycle. By suppressing the change in color temperature, the color flicker component can be suppressed.
[0160]
In the first to eleventh embodiments, there are cases where a plurality of microcomputers are used, but it goes without saying that all can be realized by one microcomputer in practice.
[0161]
【The invention's effect】
As described above, according to the present invention, flicker can be suppressed in both the high luminance portion and the low luminance portion while expanding the dynamic range.
[0162]
Another effect of the present invention is that flicker correction processing is performed for each color signal, so that these variations are suppressed, and an output signal in which the flicker of the color signal is suppressed together with the luminance signal can be obtained. That's it.
[0163]
Another advantage of the present invention is that white balance correction of the high luminance part and the low luminance part can be obtained by performing white balance correction of the high luminance part using the amplifier circuit in the flicker suppression means. It can be done.
[0164]
Still another effect of the present invention is that the screen is divided into a plurality of blocks, and flicker correction is performed for each block, so that even if there are a plurality of light sources, a signal in which flicker is suppressed over the entire screen is obtained. It can be obtained.
[0165]
Still another advantage of the present invention is that at least one of the plurality of flicker detection means detects a flicker component from the signal synthesized by the image synthesis means, and at least one of the plurality of flicker suppression means The circuit can be simplified by obtaining it by adjusting the gradation characteristics of the tone correction circuit.
[0166]
Still another effect of the present invention is that a plurality of signal level detection circuits for detecting an average signal level of a plurality of output signals having different exposure amounts and a ratio of the exposure amount after flicker correction from the output signals of the plurality of signal level detection circuits. And a gain calculation means for calculating the gain for flicker correction. In the gain calculation means, the ratio of the exposure amount after flicker correction is set to a predetermined value, so that stable gradation characteristics can be obtained. Can be obtained.
[0167]
Still another effect of the present invention is that a plurality of color temperature detection means for detecting color temperatures of a plurality of output signals having different exposure amounts, a gain for color temperature correction, a gain for flicker correction, and the two gains are provided. Gain calculating means for calculating a gain obtained by combining the gains, and the gain and white balance for flicker correction in the flicker suppressing means can be adjusted using the gain calculated by the gain calculating means.
[0168]
Still another advantage of the present invention is that at least one of the plurality of color temperature detection means detects a plurality of color temperature information corresponding to the flicker cycle, and at least one of the flicker suppression means corresponds to the flicker cycle. By suppressing the change in color temperature, the color flicker component can be suppressed.
[Brief description of the drawings]
FIG. 1 is a configuration diagram showing a configuration of a solid-state imaging device according to a first embodiment of the present invention.
FIG. 2 is a configuration diagram of an all-pixel readout type solid-state imaging device of the solid-state imaging device.
FIG. 3 is a configuration diagram showing a configuration of a solid-state imaging device according to a second embodiment of the present invention.
4 is a configuration diagram showing a configuration of first flicker detection means of the solid-state imaging device according to Embodiment 3; FIG.
FIG. 5 is a schematic diagram showing a state of screen division in block integration means of the solid-state imaging device.
FIG. 6 is a configuration diagram showing the configuration of a solid-state imaging device according to a fourth embodiment of the present invention.
FIG. 7 is a configuration diagram showing a configuration of a solid-state imaging device as an imaging unit of the solid-state imaging device.
FIG. 8 is a waveform diagram showing the relationship between the incident light amount of a signal and the signal level in each part of the image composition means of the solid-state imaging device
FIG. 9A is a waveform chart showing the brightness waveform of each color of the solid-state imaging device;
(B) Waveform diagram showing an average output value of each pixel of MY, MC, GY, and GC when short-time exposure is performed at timings A, B, C, and D of the solid-state imaging device
FIG. 10 is a configuration diagram of a solid-state imaging device according to a fifth embodiment of the present invention.
11 is a color coordinate space diagram for white balance in the solid-state imaging device according to Embodiment 5. FIG.
FIG. 12 is a configuration diagram showing the configuration of the solid-state imaging device according to the sixth embodiment.
13 is a configuration diagram of first flicker detection means of the solid-state imaging device according to Embodiment 6; FIG.
14 is a configuration diagram of second flicker detection means of the solid-state imaging device according to Embodiment 6; FIG.
FIG. 15 is a configuration diagram showing the configuration of the solid-state imaging device according to the seventh embodiment.
FIG. 16 is a gradation characteristic diagram of the gradation correction circuit according to the seventh embodiment;
17 is a configuration diagram of a solid-state imaging device according to Embodiment 8; FIG.
FIG. 18 is a gradation characteristic diagram of the gradation correction circuit according to the eighth embodiment;
FIG. 19 is a configuration diagram of the solid-state imaging device according to the ninth embodiment.
FIG. 20 is a configuration diagram of the solid-state imaging device according to the ninth embodiment.
21 is a photoelectric conversion diagram showing the relationship between Slong, Sshort, and Smix in the solid-state imaging device according to Embodiment 9. FIG.
22 is a configuration diagram of the solid-state imaging device according to Embodiment 10; FIG.
FIG. 23 is a configuration diagram of the solid-state imaging device according to the eleventh embodiment.
FIG. 24 is a configuration diagram showing a configuration of a conventional solid-state imaging device.
FIG. 25 is a photoelectric conversion diagram showing the relationship between Slong, Sshort, and Smix in a conventional solid-state imaging device.
[Explanation of symbols]
1 Solid-state image sensor
2 First flicker detection means
3 First flicker suppression means
4 Second flicker detection means
5 Second flicker suppression means
6 Image composition means
7a, 7b integration circuit
8a, 8b Microcomputer
9 Amplification circuit
10 Adder circuit

Claims (6)

Imaging means for outputting a plurality of output signals having different exposure times;
Flicker detection means for detecting flicker of an output signal having a short exposure time among a plurality of output signals having different exposure times;
Flicker suppression means for suppressing flicker of an output signal having a short exposure time based on the flicker gain detected by the flicker detection means;
By inputting signals with different exposure times, the low luminance part is reproduced with a signal with a long exposure time, and the high luminance part is combined with a signal with a short exposure time so that an image with an expanded gradation reproduction range can be obtained. Obtaining image composition means;
Composite image flicker detection means for detecting flicker of the composite image synthesized by the image composition means;
Flicker suppression means for suppressing flicker of an output signal having a long exposure time so as to suppress flicker of the composite image based on flicker gain detected by the composite image flicker detection means,
The composite image flicker detection means includes integration means for obtaining an integral value of a low-luminance component for each screen out of continuously inputted composite image signals for a plurality of screens, and exposure time from the integral values for the plurality of screens. A solid-state imaging device having flicker determination means for calculating flicker gain of a long signal and determining flicker of whether or not flicker is present in a signal having a long exposure time. Imaging means for outputting a plurality of output signals having different exposure times;
Flicker detection means for detecting flicker of an output signal having a short exposure time among a plurality of output signals having different exposure times;
Flicker suppression means for suppressing flicker of an output signal having a short exposure time based on the flicker gain detected by the flicker detection means;
By inputting signals with different exposure times, the low luminance part is reproduced with a signal with a long exposure time, and the high luminance part is combined with a signal with a short exposure time so that an image with an expanded gradation reproduction range can be obtained. Obtaining image composition means;
Composite image flicker detection means for detecting flicker of the composite image synthesized by the image composition means;
Flicker suppression means for suppressing flicker of an output signal having a long exposure time so as to suppress flicker of the composite image based on flicker gain detected by the composite image flicker detection means,
The composite image flicker detection unit is a block integration unit that divides a screen into a plurality of blocks for each screen among composite image signals for a plurality of screens continuously input, and calculates an integral value for each divided block; ,
The flicker gain of the signal with a long exposure time is calculated from the integral value of the block whose integrated value level is equal to or lower than the saturation level of the signal with a long exposure time among the divided blocks for the plurality of screens, A solid-state imaging device having flicker determination means for determining whether or not flicker is present in a signal having a long exposure time. Imaging means for outputting a plurality of output signals having different exposure times;
Flicker detection means for detecting flicker of an output signal having a short exposure time among a plurality of output signals having different exposure times;
Flicker suppression means for suppressing flicker of an output signal having a short exposure time based on the flicker gain detected by the flicker detection means;
By inputting signals with different exposure times, the low luminance part is reproduced with a signal with a long exposure time, and the high luminance part is combined with a signal with a short exposure time so that an image with an expanded gradation reproduction range can be obtained. Obtaining image composition means;
Composite image flicker detection means for detecting flicker of the composite image synthesized by the image composition means;
Flicker suppression means for suppressing flicker of an output signal having a long exposure time so as to suppress flicker of the composite image based on flicker gain detected by the composite image flicker detection means,
The composite image flicker detection unit includes a level determination unit that determines whether or not the level is equal to or lower than a certain level , and the level determination unit for each screen among the composite image signals for a plurality of screens that are continuously input, Integrating means for integrating only signals determined to be below a certain level corresponding to the saturation level of a long signal, counting means for counting the number of pixels of the signal determined to be below the certain level, and Flicker determination for calculating flicker gain of a signal with a long exposure time from the integration value for a plurality of screens and the count value for the plurality of screens of the counting means, and determining whether the flicker is present in the signal with a long exposure time A solid-state imaging device.   The imaging means includes color separation means using color separation filters or color separation prisms having different spectral characteristics, and at least one of the plurality of flicker detection means includes color flicker detection means for detecting flicker for each different color. 4. The solid-state imaging device according to claim 1, wherein at least one of the suppression units includes a color gain correction unit that performs gain correction for each different color. 5. Imaging means for outputting a plurality of output signals having different exposure times;
Flicker detection means for detecting flicker of an output signal having a short exposure time among a plurality of output signals having different exposure times;
Flicker suppression means for suppressing flicker of an output signal having a short exposure time based on the flicker gain detected by the flicker detection means;
By inputting signals with different exposure times, the low luminance part is reproduced with a signal with a long exposure time, and the high luminance part is combined with a signal with a short exposure time so that an image with an expanded gradation reproduction range can be obtained. Obtaining image composition means;
Composite image flicker detection means for detecting flicker of the composite image synthesized by the image composition means;
Flicker suppression means for suppressing flicker of an output signal having a long exposure time so as to suppress flicker of the composite image based on flicker gain detected by the composite image flicker detection means,
The flicker detection means includes a screen dividing means for dividing the screen into a plurality of blocks for each screen,
Split screen flicker detection means for detecting flicker for each block and calculating flicker gain for each block ;
The solid-state imaging device, wherein the flicker suppression unit that suppresses flicker of a signal having a short exposure time includes a divided screen flicker suppression unit that performs flicker correction for each block based on the flicker gain for each block calculated by the flicker detection unit. Imaging means for outputting a plurality of output signals having different exposure times;
Flicker detection means for detecting flicker of an output signal having a short exposure time among a plurality of output signals having different exposure times;
Flicker suppression means for suppressing flicker of an output signal having a short exposure time based on the flicker gain detected by the flicker detection means;
By inputting signals with different exposure times, the low luminance part is reproduced with a signal with a long exposure time, and the high luminance part is combined with a signal with a short exposure time so that an image with an expanded gradation reproduction range can be obtained. Obtaining image composition means;
Composite image flicker detection means for detecting flicker of the composite image synthesized by the image composition means;
Flicker suppression means for suppressing flicker of an output signal having a long exposure time so as to suppress flicker of the composite image based on flicker gain detected by the composite image flicker detection means,
A gradation correction unit that performs gradation correction on the signal synthesized by the image synthesis unit; and a gradation characteristic changing unit that sequentially changes the gradation characteristic of the gradation correction circuit, and has a short exposure time. Flicker detection means for detecting flicker of the output signal detects flicker components from the signal synthesized by the image synthesis means, and flicker suppression means for suppressing flicker of the output signal having a short exposure time is detected by the flicker detection means. A solid-state image pickup device that suppresses flicker by adjusting the gradation characteristics of the gradation correction means based on the flicker gain.

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