JP3990183B2 - Power supply circuit and semiconductor integrated circuit - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a power supply circuit, and more particularly to a semiconductor integrated circuit used for in-vehicle use.
[0002]
[Prior art]
As shown in FIG. 3, the conventional power supply circuit includes a DC power supply 103 having a cathode connected to a lower power supply VSS, a pnp transistor having an emitter terminal connected to the anode of the DC power supply 103, and a collector terminal connected to an output terminal 105. Q101, a control circuit 102 connected to the output terminal 105, a drive circuit connected to the output side of the control circuit 102, connected to the base terminal of the pnp transistor Q101 and the anode of the DC power supply 103, and the input of the drive circuit And a phase compensation capacitor C101 connected between the output terminals 105.
[0003]
The control circuit 102 receives an output voltage Vout from an output voltage detection terminal (not shown in the drawing) and outputs a control signal when the output voltage exceeds a reference voltage. The drive circuit 101 inputs a signal obtained by further compensating the phase of the control signal by the phase compensation capacitor C101, and drives the pnp transistor Q102.
[0004]
[Problems to be solved by the invention]
However, since the drive circuit 101 of the power supply circuit shown in FIG. 3 uses the pnp type transistor Q102 at the input stage, at the time T1 shown in FIG. When a voltage is applied due to high frequency noise such as EMI noise as shown, the voltage waveform on the input side of the drive circuit 101 (base terminal of the pnp transistor Q102 used in the input stage) is as shown in FIG. As a result, there is a problem that the output voltage Vout rises as shown in FIG. 4A.
[0005]
An object of the present invention is to provide a power supply circuit and a semiconductor integrated circuit that suppresses fluctuations in output voltage due to the influence of high-frequency noise such as EMI noise and outputs a stable voltage.
[0006]
[Means for Solving the Problems]
In order to achieve the above object, the first feature of the present invention is that a DC power supply having a cathode connected to a lower power supply, a phase compensation capacitor having one end connected to an output terminal, and an emitter terminal connected to the anode of the DC power supply A pnp transistor having a collector terminal connected to the output terminal, an input side connected to the output terminal, a DC power supply, a drive power supply from the DC power supply, and output of an amplified signal corresponding to a predetermined reference voltage A control circuit having an amplifier, a pMOS transistor having a drain terminal connected to the cathode terminal side of the diode and a lower power supply, a gate terminal connected to the output side of the amplifier and the other end of the phase compensation capacitor, and an anode of the DC power supply A current limiting resistor having one end connected thereto, a diode having an anode terminal connected to the other end of the current limiting resistor, and a source of the pMOS transistor Is a power supply circuit having an emitter terminal connected to the child, and a drive circuit having a npn type transistor having the other end connected to the base terminal of the current limiting resistor, a collector connected terminal to the base terminal of the pnp transistor This is the gist.
[0007]
In order to achieve the above object, the second feature of the present invention is that it has a power supply terminal, a drive terminal, a phase compensation terminal, and an output voltage detection terminal, the input side is connected to the output voltage detection terminal, and the power supply terminal is connected. A control circuit having an amplifier which is supplied with driving power from a power supply terminal and outputs an amplified signal corresponding to a predetermined reference voltage; a current limiting resistor having one end connected to the power supply terminal; and an anode terminal at the other end of the current limiting resistor A pMOS transistor having a diode connected to each other, a drain terminal connected to a cathode terminal side of the diode and a lower power supply, a gate terminal connected to an output side of the amplifier and a phase compensation terminal, and a source terminal of the pMOS transistor the emitter terminal, and the npn type transistor having a base terminal connected to the other end of the current limiting resistor, a collector terminal connected to the driving terminal And summarized in that a semiconductor integrated circuit and a drive circuit having.
[0008]
According to the above invention, it is possible to obtain a power supply circuit and a semiconductor integrated circuit that output a stable voltage while suppressing fluctuations in the output voltage due to the influence of high-frequency noise such as EMI noise.
[0009]
DETAILED DESCRIPTION OF THE INVENTION
Next, embodiments of the present invention will be described with reference to the drawings. In the following description of the drawings, the same or similar parts are denoted by the same or similar reference numerals.
[0010]
As shown in FIG. 1, the power supply circuit according to the embodiment of the present invention includes a semiconductor integrated circuit 100 having a power supply terminal 11, a drive terminal 12, a phase compensation terminal 13, and an output voltage detection terminal 14. A DC power source 3 having a cathode connected to the lower power source VSS, a base terminal connected to the drive terminal 12, a collector terminal connected to the output terminal 5 and the output voltage detection terminal 14, a power source terminal 11 and a DC power source. A pnp transistor Q1 having an emitter terminal connected to the anode 3; a phase compensation capacitor C1 connected between the phase compensation terminal 13 and the output terminal 5; and a connection between the power supply terminal 11 and the lower power supply VSS. Input capacitor C2 and an output capacitor C3 connected between the output terminal 5 and the low power supply VSS.
[0011]
The semiconductor integrated circuit 100 includes a drive circuit 1 and a control circuit 2 connected to the input side of the drive circuit 1.
[0012]
Further, the driving circuit 1 includes a current limiting resistor R3 having one end connected to the power supply terminal 11, a first diode D1 having an anode terminal connected to the other end of the current limiting resistor R3, and a cathode terminal of the first diode D1. A second diode D2 connected to the anode terminal; a third diode D3 connected to the cathode terminal of the second diode D2; and an anode terminal connected to the cathode terminal of the third diode D3; Is connected to the lower power supply VSS, a base terminal connected to the other end of the current limiting resistor R3, a collector terminal connected to the drive terminal 12, an npn transistor Q2 having an emitter terminal, and an npn type Connected to the source terminal connected to the emitter terminal of the transistor Q2, the cathode terminal of the fourth diode D4, and the lower power supply VSS. A pMOS transistor P1 having a connected drain terminal and a gate terminal connected to the output side of the control circuit 2;
[0013]
The control circuit 2 includes a first dividing resistor R1 having one end connected to the output voltage detection terminal 14, a second dividing resistor R2 having one end connected to the low-level power supply VSS, the first dividing resistor R1, and the second dividing resistor. A positive input terminal is connected to the other end of the resistor R2, a negative input terminal is connected to the other end of the reference voltage source 4 having one end connected to the low-level power supply VSS, and the phase compensation terminal 13 and the input side of the drive circuit 1 (pMOS transistor) An amplifier 20 having an output side connected to the gate terminal of P1 is provided.
[0014]
The power supply circuit according to the embodiment of the present invention is configured as described above, and the control circuit 2 receives the output voltage Vout from the output voltage detection terminal 14 as input, and the first voltage dividing resistor R1 and the second voltage dividing resistor. The voltage divided by R2 is output to the positive input terminal of the amplifier 20. The amplifier 20 subtracts the reference voltage output from the reference voltage source 4 from the voltage divided by the first voltage dividing resistor R1 and the second voltage dividing resistor R2, and outputs an amplified signal corresponding to the calculated voltage. To do. The pMOS transistor P1 of the drive circuit 1 inputs the amplified signal output from the control circuit 2 to the gate terminal, and controls the amount of current flowing between the source and drain in accordance with the voltage applied to the gate terminal. The pnp type transistor Q1 controls the voltage output from the DC power supply 3 to the output terminal 5 by the current controlled by the pMOS transistor P1. The phase compensation capacitor C1 compensates the phase of the output voltage Vout and the voltage applied to the gate terminal of the pMOS transistor P1.
[0015]
Further, the input capacitor C2 reduces the input ripple voltage, and the output capacitor C3 reduces the output ripple voltage.
[0016]
In the power supply circuit operating as described above, if noise is superimposed from the phase compensation terminal 13 at time T1, as shown in FIG. 2B, the input side of the drive circuit 101 of the power supply circuit shown in FIG. The voltage waveform applied to (the base terminal of the pnp transistor Q102) was a voltage waveform obtained by half-wave rectifying the upper half as shown in FIG. 4C, whereas the pMOS transistor shown in FIG. A voltage waveform that is not half-wave rectified as shown in FIG. 2C is applied to the gate terminal of P1. That is, the voltage applied to the pMOS transistor P1 does not drop, and the output voltage of the power supply circuit shown in FIG. 3 rises due to noise as shown in FIG. 4A, whereas the power supply shown in FIG. According to the circuit, the output voltage Vout always outputs a constant voltage as shown in FIG.
[0017]
Therefore, according to the present invention, it is possible to obtain the power supply circuit and the semiconductor integrated circuit 100 that output the stable voltage while suppressing the fluctuation of the output voltage Vout due to the influence of high frequency noise such as EMI noise.
[0018]
【The invention's effect】
According to the present invention, it is possible to obtain a power supply circuit and a semiconductor integrated circuit that suppresses fluctuations in the output voltage due to the influence of high-frequency noise such as EMI noise and outputs a stable voltage.
[Brief description of the drawings]
FIG. 1 is a diagram illustrating a power supply circuit and a semiconductor integrated circuit according to an embodiment of the present invention.
FIG. 2 is a diagram illustrating an operation timing chart when noise is applied to the power supply circuit according to the embodiment of the present invention.
FIG. 3 is a diagram illustrating a conventional power supply circuit.
FIG. 4 is a diagram illustrating an operation timing chart when noise is applied in a conventional power supply circuit.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1,101 Drive circuit 2,102 Control circuit 3,103 DC power supply 4 Reference voltage source 5,105 Output terminal 11 Power supply terminal 12 Drive terminal 13 Phase compensation terminal 14 Output voltage detection terminal 20 Amplifier C1, C101 Phase compensation capacitor C2 Input capacitor C3 Output capacitors Q1, Q101, Q102 pnp type transistors D1-D4 1st to 4th diodes P1 pMOS transistor R1 1st voltage dividing resistor R2 2nd voltage dividing resistor R3 Current limiting resistor

Claims (3)

A DC power supply with the cathode connected to a lower power supply;
A phase compensation capacitor with one end connected to the output terminal;
A pnp-type transistor having an emitter terminal connected to the anode of the DC power supply, a collector terminal connected to the output terminal;
A control circuit having an amplifier connected to the output terminal, connected to the DC power supply, supplied with drive power from the DC power supply, and outputs an amplified signal corresponding to a predetermined reference voltage ;
A current limiting resistor having one end connected to the anode of the DC power source, a diode having an anode terminal connected to the other end of the current limiting resistor, a drain terminal connected to the cathode terminal side of the diode and the lower power source, A pMOS transistor having a gate terminal connected to the output side of the amplifier and the other end of the phase compensation capacitor; an emitter terminal connected to the source terminal of the pMOS transistor; a base terminal connected to the other end of the current limiting resistor; And a drive circuit having an npn-type transistor having a collector terminal connected to a base terminal of the pnp-type transistor . Has power supply terminal, drive terminal, phase compensation terminal, output voltage detection terminal,
A control circuit having an input connected to the output voltage detection terminal, connected to the power supply terminal, supplied with drive power from the power supply terminal, and having an amplifier that outputs an amplified signal corresponding to a predetermined reference voltage ;
A current limiting resistor having one end connected to the power supply terminal; a diode having an anode terminal connected to the other end of the current limiting resistor; a drain terminal connected to the cathode terminal side of the diode and the lower power supply ; A pMOS transistor having a gate terminal connected to the output side and the phase compensation terminal, an emitter terminal connected to the source terminal of the pMOS transistor, a base terminal connected to the other end of the current limiting resistor, and a connection to the drive terminal And a driving circuit having an npn transistor having a collector terminal . 3. The semiconductor integrated circuit according to claim 2, wherein a plurality of said diodes are connected in series .

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