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JP4022790B2 - Insulating film and method for forming the same - Google Patents
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JP4022790B2 - Insulating film and method for forming the same - Google Patents

Insulating film and method for forming the same Download PDF

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Publication number
JP4022790B2
JP4022790B2 JP17984898A JP17984898A JP4022790B2 JP 4022790 B2 JP4022790 B2 JP 4022790B2 JP 17984898 A JP17984898 A JP 17984898A JP 17984898 A JP17984898 A JP 17984898A JP 4022790 B2 JP4022790 B2 JP 4022790B2
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Prior art keywords
insulating film
film
layer
porous
dielectric constant
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JP2000012690A (en
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司 井谷
由紀子 小島
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Fujitsu Ltd
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Fujitsu Ltd
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Description

【0001】
【発明の属する技術分野】
本発明は絶縁膜及びその形成方法装置に関するものであり、特に、半導体集積回路装置における層間絶縁膜として用いる多孔質化絶縁膜、即ち、ポーラス層を利用した低誘電率の絶縁膜及びその形成方法に関するものである。
【0002】
【従来の技術】
近年の半導体集積回路装置の集積度の増加及び素子密度の向上に伴い、配線層の多層化への要求が一段と高まっている。
また、集積度の向上に伴って配線層間隔は狭くなり、隣接する配線層間の寄生容量の増大による配線遅延が問題となってきているが、この配線遅延Tは、配線層の抵抗Rと配線層間の容量Cの積に比例し、
T∝C・R
で表されるので、配線遅延Tを小さくするためには、配線層の低抵抗化と共に、配線層間の容量Cを小さくすることが必要となる。
【0003】
この隣接する配線層間の容量Cは、配線層の間に設けられる配線層間絶縁膜の比誘電率ε、配線層の間隔d、及び、配線層の側面積Sとの間に、
C=(ε・S)/d
の関係があり、配線層間の容量Cを低減するためには、配線層間絶縁膜の低誘電率化が必要となる。
【0004】
従来の半導体集積回路装置においては、配線層間絶縁膜、即ち、同一層準の配線層を分離する絶縁膜、或いは、層間絶縁膜、即ち、層準の異なる配線層を分離する絶縁膜として、SiO2 膜、Si3 4 膜、或いは、PSG膜(燐珪酸ガラス)等の無機絶縁膜や、ポリイミド等の有機系高分子絶縁膜が用いられてきた。
【0005】
この内、半導体集積回路装置における配線層間絶縁膜或いは層間絶縁膜として最も用いられているCVD−SiO2 膜の誘電率は約4程度であり、配線層幅のサブミクロン化に伴って配線層の間隔dも狭くなり、間隔dに反比例する配線遅延Tが問題となってきているので、この様なCVD−SiO2 膜に代わる低誘電率絶縁膜としてCVD−SiOF膜が検討されている。
しかし、このCVD−SiOF膜の誘電率は約3.3〜3.5とCVD−SiO2 膜に比べて低いものの、吸湿性が高く、大気中の水分を吸収することで誘電率が上昇するという問題がある。
【0006】
一方、絶縁膜を低誘電率化する他の方法としては、SOG(Spin on Glass)膜の多孔質化による低誘電率化も提案(必要ならば、第52回半導体・集積回路技術シンポジウム予稿集,p.62,1997参照)されており、この様な多孔質化絶縁膜においては、絶縁膜中に含まれる空隙を大きくすればするほど低誘電率化が可能になる。
【0007】
しかし、上記の様な多孔質化絶縁膜のベース材料としては無機SOGを用いており、この無機SOG膜はシロキサン結合を持ったモノマーを重合して形成するために、無機SOG膜中には末端の原子配列が−Si−OHとなっている部分が多数存在し、この末端の基に大気中の水分が吸着して吸湿性が高くなり、CVD−SiOF膜と同様に誘電率の上昇と経時変動が生ずるという問題がある。
【0008】
また、多孔質化のための空隙の増大は同時に絶縁膜の表面積を通常のSOG膜より増大させ、この表面積の増大によっても吸湿性を高める結果となり、誘電率の変化が通常のSOG膜より大きくなるという問題がある。
【0009】
この様な多孔質化絶縁膜を配線層間絶縁膜或いは層間絶縁膜として用いる場合に、多孔質化絶縁膜の表面にCVD−SiO2 膜やSi3 4 膜等のキャップ層を設けることも提案(必要ならば、特開平9−213797号公報、特開平8−64680号公報、或いは、特開平8−46047号公報参照)されており、この様なキャップ層を設けた場合には、キャップ層に耐水性があるので、大気中の水分の吸収による誘電率の上昇と変動の問題は解決される。
【0010】
【発明が解決しようとする課題】
しかし、上述の様に層間絶縁膜にキャップ層を設けた場合には、キャップ層の存在によるキャップ層自体の高比誘電率が層間絶縁膜全体の比誘電率の増加の原因となる。
【0011】
また、上記の公知文献においては認識されていないものの、キャップ層を設ける工程において、多孔質化絶縁膜中にキャップ層の構成物、例えば、SiO2 が浸透し、多孔質化絶縁膜中の空隙がキャップ層の構成物で埋め込まれてしまうため、多孔質化による低誘電率化の効果が低減するという問題があり、したがって、キャップ層を最低限の厚さに形成したとしても、空隙が埋め込まれた浸透層の存在により層間絶縁膜全体の比誘電率が増加するという問題がある。
【0012】
したがって、本発明は、多孔質化に伴う低誘電率化の効果を保ちつつ、絶縁膜の耐湿性を向上することを目的とする。
【0013】
【課題を解決するための手段】
図1は本発明の原理的構成の説明図であり、この図1を参照して本発明における課題を解決するための手段を説明する。
図1参照
(1)本発明は、絶縁膜において、絶縁膜中にSiO 2 粒子、SiN粒子、或いはAl 2 3 粒子のいずれかからなる無機物粒子を含有させ、前記無機物粒子間に生成される空隙5を利用した多孔質絶縁膜4からなる第1の絶縁膜と、前記第1の絶縁膜の表面に設けられるとともに前記多孔質絶縁膜4の空隙5をシリコン系酸化物、シリコン系窒化物、シリコーン樹脂、或いは、炭化フッ素系樹脂のいずれかで埋め込んだ第2の絶縁膜6とからなり、前記第2の絶縁膜上には前記シリコン系酸化膜、シリコン系窒化膜、或いは、炭化フッ素系樹脂膜のいずれも存在しないことを特徴とする
【0014】
この様に、多孔質化絶縁膜4の上に空隙5が埋め込まれた絶縁膜6を設けることによって、キャップ層を設けた場合と同様に空気を遮断することができ、それによって、空隙5に起因する吸湿性を低下させ、比誘電率に経時変化のない絶縁膜を形成することができると共に、高比誘電率のキャップ層が存在しないので、絶縁膜全体を低誘電率化することができ、下地絶縁層2を介して基板上に設けた隣接する配線層3同士の間の寄生容量Cによる信号遅延Tを低減することができる。
なお、本発明において電子装置とは、主として半導体集積回路装置を意味する。
【0015】
このように、絶縁膜中にSiO 2 粒子等の無機物粒子を混入することによって、無機物粒子の立体配置により無機物粒子間に空隙5が生成されるため、空隙5を含む多孔質化絶縁膜4を簡単に形成することができる。
【0016】
また、空隙5を埋め込む物質としては、耐水性に優れるSi 2 のシリコン系酸化物、シリコーン樹脂、より耐水性に優れるSi3 4 等のシリコン系窒化物、或いは、低比誘電率性に優れるアモルファスCF等の炭化フッ素系樹脂のいずれかが好適である。
【0017】
(2)また、本発明は、上記(1)において、多孔質化絶縁膜4が、シリコン系酸化物からなることを特徴とする。
【0018】
この様に、多孔質化絶縁膜4に用いる素材は、半導体集積回路装置における層間絶縁膜として用いられているSiO2 や、SOGに用いるシリコーン樹脂等のシリコン系酸化物が実用上好適である。
【0021】
)また、本発明は、絶縁膜の形成方法において、絶縁膜中にSiO 2 粒子、SiN粒子、或いはAl 2 3 粒子のいずれかからなる無機物粒子を含有させ、前記無機物粒子間に生成される空隙5を利用した多孔質絶縁膜4からなる第1の絶縁膜を形成する工程と、前記第1の絶縁膜上にシリコン系酸化膜、シリコン系窒化膜、シリコーン樹脂、或いは、炭化フッ素系樹脂膜のいずれかからなるキャップ層を成膜して、該成膜工程において前記キャップ層の構成物質で前記第1の絶縁膜の表面側の空隙の一部を埋め込んで第2の絶縁膜とする工程と、前記キャップ層を除去する工程とを有することを特徴とする。
【0022】
この様に、キャップ層を設けたのち、空隙5が埋め込まれた絶縁膜6の一部及びキャップ層を除去することにより、耐水性のために空隙5が埋め込まれた絶縁膜6を最小限残すことにより、耐水性を高め、それによって、空隙5に起因する低誘電率性の経時変動を低減することができる。
【0023】
【発明の実施の形態】
ここで、図2及び図3を参照して、本発明の第1の実施の形態の絶縁膜の形成方法を説明する。
なお、以下においては、説明を簡単にするために、シリコン基板上に直接絶縁膜を形成する場合を説明する。
図2(a)参照
まず、ボロン(B)をドープしたp型のシリコン基板11上に平均粒径が500ÅのSiO2 粒子を90重量%混合したシリコーン樹脂HPS(触媒化成工業株式会社製商品名)を用いて厚さが1μm(=10000Å)の多孔質化絶縁膜、即ち、ポーラス層12をスピンコート法により形成する。
このポーラス層12中には、SiO2 粒子の混合によりSiO2 粒子間に空隙13が形成され、その誘電率は約2.25程度となる。
【0024】
図2(b)参照
次いで、CVD法を用いて、シリコン基板を基板温度を350℃とし、SiH4 を60sccm及びNO2 を900sccm流して、成膜圧力を0.5Torrとした条件において、周波数が13.56MHzで250W/(185cm2 )のパワーの高周波電力を印加することによって、ポーラス層12上に厚さが2000ÅのSiO2 膜からなるキャップ層14を堆積させる。
この堆積工程において、ポーラス層12中にSiO2 が約2000Å程度浸透し、空隙13をSiO2 で埋め込むことによって浸透層15が形成される。
なお、図において符号16はSiO2 によって埋まった空隙を示している。
【0025】
図2(c)参照
次いで、CF4 とO2 を流量比で80:20の割合で混合したガスを用いたドライエッチングによって、表面から3500Åだけエッチングすることによって、キャップ層14全部と浸透層15の一部を除去し、約8000Åのポーラス層12と約500Åの空隙が埋め込まれた浸透層15の2層構造の絶縁膜を形成する。
【0026】
図3(a)及び(b)参照
図3(a)は、上記の方法によって形成した絶縁膜の比誘電率、及び、この絶縁膜の大気中放置後の比誘電率変化を測定した結果を示す図であり、一方、図3(b)は比較のためにポーラス層のみの場合の比誘電率、及び、ポーラス層の大気中放置後の比誘電率変化を測定した結果を示す図である。
図の比較から明らかなように、形成直後の比誘電率はポーラス層のみの方が若干低くなるものの、浸透層15を設けた本発明の第1の実施の形態の絶縁膜は経時変化がほとんどなく、48時間後に比誘電率の関係は逆転した。
【0027】
この結果から、形成直後においては、薄く残存する浸透膜15の誘電率によって比誘電率が若干高くなるものの、この浸透層15の存在により大気中の水分が効果的に遮断されるため吸湿に伴う経時変化はほとんど無いものと考えられる。
なお、上述の従来例との比較においては、従来においてもキャップ層を設けることによって浸透層が形成されているものと考えられるが、従来例においてはキャップ層が最終的に残存しているので、キャップ層の存在により絶縁膜全体の比誘電率はかなり高くなっているものと考えられる。
【0028】
次に、図4を参照して、この様な絶縁膜を層間絶縁膜として用いる場合の具体的応用例を説明する。
図4(a)参照
まず、ボロンをドープしたp型のシリコン基板11に所定の能動素子を形成し、その表面に設けたSiO2 膜等の下地絶縁層17を介して所定パターンの配線層18を形成したのち、平均粒径が500ÅのSiO2 粒子を70〜90重量%、例えば、90重量%混合したシリコーン樹脂HPS(触媒化成工業株式会社製商品名)をスピンコートすることによってポーラス層12を形成する。
なお、このポーラス層12の厚さは、キャップ層14を構成する物質の浸透深さを考慮して、最終的に必要とする厚さより厚くなるように、例えば、配線層18が存在しない領域における厚さが1μmになるように堆積させる。
【0029】
図4(b)参照
次いで、CVD法を用いて、シリコン基板を基板温度を350℃とし、SiH4 を60sccm及びNO2 を900sccm流して、成膜圧力を0.5Torrとした条件において、周波数が13.56MHzで250W/(185cm2 )のパワーの高周波電力を印加することによって、ポーラス層12上に厚さが2000ÅのSiO2 膜からなるキャップ層14を堆積させることによって、ポーラス層12中にSiO2 を約2000Å程度の深さに浸透させて空隙13をSiO2 で埋め込むことによって浸透層15を形成する。
【0030】
図4(c)参照
次いで、CF4 とO2 を流量比で80:20の割合で混合したガスを用いたドライエッチングによって、表面から3500Åだけエッチングすることによって、キャップ層14全部と浸透層15の一部を除去し、約8000Åのポーラス層12と約500Åの空隙が埋め込まれた浸透層15の2層構造の絶縁膜を形成して層間絶縁膜とする。
【0031】
この様な層間絶縁膜の比誘電率は、図3(a)から明らかなように約2.3程度となるので、比誘電率が約4のCVD−SiO2 膜を用いた場合より寄生容量Cが約0.6倍(≒0.575=2.3/4)となり、寄生容量Cに比例する配線遅延Tも約0.6倍となる。
【0032】
次に、図5(a)及び図2を参照して本発明の第2の実施の形態を説明する。
なお、この第2の実施の形態においてはキャップ層の成膜条件が異なるだけで他の構成は上記の第1の実施の形態とほとんど同様であるので、形成方法の説明に際しては第1の実施の形態と同様に図2を参照する。
図2(a)参照
まず、ボロンをドープしたp型のシリコン基板11上に平均粒径が500ÅのSiO2 粒子を90重量%混合したシリコーン樹脂HPS(触媒化成工業株式会社製商品名)を用いて厚さが8000Åの多孔質化絶縁膜、即ち、ポーラス層12をスピンコート法により形成する。
【0033】
図2(b)参照
次いで、シリコーン樹脂(HSQ:Hydrogen Silses Quioxane)をスピンコーターを用いて、回転数3000rpmで30秒間回転させながらスピンコートし、次いで、300℃でプリベークしたのち、400℃でキュアすることによって厚さ2000℃のキャップ層14を形成する。
この形成工程において、ポーラス層12中にHSQが約1000Å程度浸透し、空隙13をHSQで埋め込むことによって浸透層15が形成される。
【0034】
図2(c)参照
次いで、HFを用いたウェット・エッチングによって、表面から2500Åだけエッチングすることによって、キャップ層14全部と浸透層15の一部を除去し、約7000Åのポーラス層12と約500Åの空隙が埋め込まれた浸透層15の2層構造の絶縁膜を形成する。
【0035】
図5(a)参照
図5(a)は、上記の方法によって形成した絶縁膜の比誘電率、及び、この絶縁膜の大気中放置後の比誘電率変化を測定した結果を示す図であり、上述の図3(b)との比較から明らかなように、形成直後の比誘電率はポーラス層のみの方が若干低くなるものの、本発明の第2の実施の形態の絶縁膜は上記の第1の実施の形態の絶縁膜と同様に経時変化がほとんどなく、48時間後に比誘電率の関係は逆転した。
【0036】
この第2の実施の形態の結果と、上記の第1の実施の形態の結果との比較からは、第1の実施の形態の様にキャップ層を気相から形成した場合の方が、浸透深さが深くなることが分かる。
【0037】
次に、図5(b)及び図2を参照して本発明の第3の実施の形態を説明する。この第3の実施の形態の場合も、キャップ層の成膜条件が異なるだけで、他の構成は上記の第1の実施の形態とほとんど同様であるので、形成方法の説明に際しては第1の実施の形態と同様に図2を参照する。
図2(a)参照
まず、ボロンをドープしたp型のシリコン基板11上に平均粒径が500ÅのSiO2 粒子を90重量%混合したシリコーン樹脂HPS(触媒化成工業株式会社製商品名)を用いて厚さが10000Åの多孔質化絶縁膜、即ち、ポーラス層12をスピンコート法により形成する。
【0038】
図2(b)参照
次いで、CVD法を用いて、シリコン基板を基板温度を300℃とし、SiH4 を730sccm、NH3 を200sccm、及び、N2 を270sccm流して、成膜圧力を0.5Torrとした条件において、周波数が13.56MHzで250W/(185cm2 )のパワーの高周波電力を印加することによって、ポーラス層12上に厚さが2000ÅのSi3 4 膜からなるキャップ層14を堆積させる。
この堆積工程において、ポーラス層12中にSi3 4 が約1500Å程度浸透し、空隙13をSi3 4 で埋め込むことによって浸透層15が形成される。
【0039】
図2(c)参照
次いで、CF4 とO2 を流量比で80:20の割合で混合したガスを用いたドライエッチングによって、表面から3000Åだけエッチングすることによって、キャップ層14全部と浸透層15の一部を除去し、約9000Åのポーラス層12と約500Åの空隙が埋め込まれた浸透層15の2層構造の絶縁膜を形成する。
【0040】
図5(b)参照
図5(b)は、上記の方法によって形成した絶縁膜の比誘電率、及び、この絶縁膜の大気中放置後の比誘電率変化を測定した結果を示す図であり、上述の図3(b)との比較から明らかなように、形成直後の比誘電率はポーラス層のみの方が若干低くなるものの、本発明の第3の実施の形態の絶縁膜は上記の第1の実施の形態の絶縁膜と同様に経時変化がほとんどなく、48時間後に比誘電率の関係は逆転した。
【0041】
なお、キャップ層としてSi3 4 を用いた場合には、Si3 4 はSiO2 より比誘電率が高いので、空隙をSi3 4 で埋め込んだ浸透層15の比誘電率も上記の第1の実施の形態に比べて若干高くなるが、耐湿性が向上する。
【0042】
次に、図6及び図2を参照して本発明の第4の実施の形態を説明する。
この第4の実施の形態の場合も、キャップ層の成膜条件が異なるだけで、他の構成は上記の第1の実施の形態とほとんど同様であるので、形成方法の説明に際しては第1の実施の形態と同様に図2を参照する。
図2(a)参照
まず、ボロンをドープしたp型のシリコン基板11上に平均粒径が500ÅのSiO2 粒子を90重量%混合したシリコーン樹脂HPS(触媒化成工業株式会社製商品名)を用いて厚さが10000Åの多孔質化絶縁膜、即ち、ポーラス層12をスピンコート法により形成する。
【0043】
図2(b)参照
次いで、プラズマCVD法を用いて、シリコン基板を基板温度を350℃とし、CF4 を300sccm、C2 2 を20sccm、及び、O2 を50sccm流して、成膜圧力を1.0Torrとした条件において、周波数が13.56MHzで100W/(185cm2 )のパワーの高周波電力を印加することによって、ポーラス層12上に厚さが2000ÅのアモルファスCF膜からなるキャップ層14を堆積させる。
この堆積工程において、ポーラス層12中にアモルファスCFが約1500Å程度浸透し、空隙13をアモルファスCFで埋め込むことによって浸透層15が形成される。
【0044】
図2(c)参照
次いで、CF4 とO2 を流量比で80:20の割合で混合したガスを用いたドライエッチングによって、表面から3000Åだけエッチングすることによって、キャップ層14全部と浸透層15の一部を除去し、約9000Åのポーラス層12と約500Åの空隙が埋め込まれた浸透層15の2層構造の絶縁膜を形成する。
【0045】
図6参照
図6は、上記の方法によって形成した絶縁膜の比誘電率、及び、この絶縁膜の大気中放置後の比誘電率変化を測定した結果を示す図であり、上述の図3(b)との比較から明らかなように、形成直後の比誘電率はポーラス層のみの方が若干低くなるものの、本発明の第4の実施の形態の絶縁膜は上記の第1の実施の形態の絶縁膜と同様に経時変化がほとんどなく、48時間後に比誘電率の関係は逆転した。
【0046】
なお、キャップ層としてアモルファスCF膜を用いた場合には、アモルファスCFはSiO2 より比誘電率が低いので、空隙をアモルファスCFで埋め込んだ浸透層15の比誘電率も上記の第1の実施の形態に比べて若干低くなる。
【0047】
なお、上記の第2乃至第4の実施の形態の説明においては、説明を簡単にするために、シリコン基板上に直接ポーラス層、即ち、多孔質化絶縁膜を設けた場合を説明したが、一般的には、図4に示した具体的応用例の様に層間絶縁膜として用いるものである。
【0048】
以上、本発明の各実施の形態を説明してきたが、本発明は実施の形態に記載した構成に限られるものではなく、各種の変更が可能であり、ポーラス層、即ち、多孔質化絶縁膜としては多孔質化できるものであれば何でも良く、例えば、SiO2 、HSQ、或いは、有機樹脂等を用いても良いものである。
【0049】
また、多孔質化する手段もSiO2 粒子の混合に限られるものではなく、SiN粒子或いはAl2 3 粒子等の無機粒子を用いても良いものであり、用いる無機粒子の比誘電率によって多孔質化絶縁膜の比誘電率も変化する。
【0050】
さらに、多孔質化する手段も無機粒子の混合に限られるものではなく、上記の従来例に記載されている様に、湿潤ゲル膜の超臨界乾燥法、ガラス壁で被覆された発泡剤を含有するゾルを用いる方法等を用いて絶縁膜中に空隙を形成して多孔質化しても良いものである。
【0051】
また、キャップ層としては、上記の第1乃至第4の実施の形態において示した膜以外に、外部の水分を透過しない絶縁材料であれば何でも良く、例えば、SiON膜を用いても良いし、或いは、アモルファスCFの代わりに、他の炭化フッ素系樹脂を用いても良いものであり、比誘電率が低く、多孔質化絶縁膜とエッチレートが近い材料が望ましく、また、多孔質化絶縁膜を上述の他の材料で構成する場合には、キャップ層として多孔質化絶縁膜と同じ材料を用いても良いものである。
【0052】
また、キャップ層及び浸透層の一部の除去方法としては、ドライエッチング或いはウェット・エッチングを用いる以外に、CMP(Chemical Mechanical Polishing)法を用いても良いものであり、CMP法を用いた場合には、層間絶縁膜の平坦化が容易になる。
【0053】
また、残存させる浸透層の厚さも500Åに限られるものではなく、半導体集積回路装置の使用環境に応じて耐湿性が充分保てる程度の厚さにすれば良い。
【0054】
【発明の効果】
本発明によれば、比誘電率を低減するための多孔質化絶縁膜を必要とする厚さ以上に堆積させておき、その表面にキャップ層を設けて多孔質化絶縁膜の表面に空隙が埋め込まれた浸透層を形成し、この浸透層を耐水性が保てる最低限の膜厚だけ残すことによって低比誘電率の増大と経時変化を低減することができ、それによって、寄生容量に起因する配線遅延を低減することができるので、半導体集積回路装置の高速化、高集積度化に寄与するところが大きい。
【図面の簡単な説明】
【図1】本発明の原理的構成の説明図である。
【図2】本発明の第1の実施の形態の絶縁膜の形成方法の説明図である。
【図3】本発明の第1の実施の形態による絶縁膜の比誘電率変化の説明図である。
【図4】本発明の第1の実施の形態の具体的応用例の説明図である。
【図5】本発明の第2の実施の形態及び第3の実施の形態による絶縁膜の比誘電率変化の説明図である。
【図6】本発明の第4の実施の形態による絶縁膜の比誘電率変化の説明図である。
【符号の説明】
1 基板
2 下地絶縁層
3 配線層
4 多孔質化絶縁膜
5 空隙
6 空隙が埋め込まれた絶縁膜
11 シリコン基板
12 ポーラス層
13 空隙
14 キャップ層
15 浸透層
16 埋まった空隙
17 下地絶縁層
18 配線層
[0001]
BACKGROUND OF THE INVENTION
The present invention relates to an insulating film and an apparatus for forming the same, and more particularly to a porous insulating film used as an interlayer insulating film in a semiconductor integrated circuit device, that is, an insulating film having a low dielectric constant using a porous layer and a method for forming the same. It is about.
[0002]
[Prior art]
With the recent increase in the degree of integration of semiconductor integrated circuit devices and the improvement in element density, there has been an increasing demand for multilayer wiring layers.
Further, as the degree of integration increases, the spacing between the wiring layers becomes narrow, and wiring delay due to an increase in parasitic capacitance between adjacent wiring layers has become a problem. This wiring delay T is caused by the resistance R of the wiring layer and the wiring. Proportional to the product of the capacitance C between layers,
T∝C ・ R
Therefore, in order to reduce the wiring delay T, it is necessary to reduce the resistance of the wiring layer and reduce the capacitance C between the wiring layers.
[0003]
The capacitance C between the adjacent wiring layers is between the relative dielectric constant ε of the wiring interlayer insulating film provided between the wiring layers, the distance d between the wiring layers, and the side area S of the wiring layer.
C = (ε · S) / d
In order to reduce the capacitance C between the wiring layers, it is necessary to lower the dielectric constant of the wiring interlayer insulating film.
[0004]
In a conventional semiconductor integrated circuit device, as a wiring interlayer insulating film, that is, an insulating film that separates wiring layers of the same layer, or an interlayer insulating film, that is, an insulating film that separates wiring layers of different layers, SiO 2 Inorganic insulating films such as two films, Si 3 N 4 films, or PSG films (phosphosilicate glass), and organic polymer insulating films such as polyimide have been used.
[0005]
Among these, the dielectric constant of the CVD-SiO 2 film most used as the wiring interlayer insulating film or interlayer insulating film in the semiconductor integrated circuit device is about 4, and the wiring layer width becomes submicron and the wiring layer becomes Since the interval d is also narrowed and the wiring delay T inversely proportional to the interval d has become a problem, a CVD-SiOF film has been studied as a low dielectric constant insulating film replacing such a CVD-SiO 2 film.
However, although the dielectric constant of this CVD-SiOF film is about 3.3 to 3.5, which is lower than that of the CVD-SiO 2 film, it has high hygroscopicity and increases the dielectric constant by absorbing moisture in the atmosphere. There is a problem.
[0006]
On the other hand, as another method of reducing the dielectric constant of the insulating film, a proposal has been made to reduce the dielectric constant by making the SOG (Spin on Glass) film porous (if necessary, the 52nd Symposium on Semiconductor and Integrated Circuit Technology Symposium) In such a porous insulating film, the dielectric constant can be lowered as the voids contained in the insulating film are increased.
[0007]
However, inorganic SOG is used as the base material of the porous insulating film as described above, and this inorganic SOG film is formed by polymerizing a monomer having a siloxane bond. There are many portions in which the atomic arrangement of -Si-OH is present, and moisture in the atmosphere is adsorbed to the terminal group to increase the hygroscopicity. As in the case of the CVD-SiOF film, the increase in dielectric constant and time There is a problem that fluctuation occurs.
[0008]
In addition, the increase in voids for making the porous structure increases the surface area of the insulating film as compared with a normal SOG film, and the increase in the surface area also increases the hygroscopicity, and the change in dielectric constant is larger than that of a normal SOG film. There is a problem of becoming.
[0009]
When such a porous insulating film is used as a wiring interlayer insulating film or interlayer insulating film, it is also proposed to provide a cap layer such as a CVD-SiO 2 film or a Si 3 N 4 film on the surface of the porous insulating film. (If necessary, refer to JP-A-9-213797, JP-A-8-64680, or JP-A-8-46047). When such a cap layer is provided, the cap layer Because of its water resistance, the problem of increase and fluctuation of dielectric constant due to absorption of moisture in the atmosphere is solved.
[0010]
[Problems to be solved by the invention]
However, when the cap layer is provided on the interlayer insulating film as described above, the high relative dielectric constant of the cap layer itself due to the presence of the cap layer causes an increase in the relative dielectric constant of the entire interlayer insulating film.
[0011]
Further, although not recognized in the above-mentioned publicly known literature, in the step of providing the cap layer, the constituent of the cap layer, for example, SiO 2 penetrates into the porous insulating film, and the void in the porous insulating film Embedded in the cap layer structure, there is a problem that the effect of lowering the dielectric constant due to the porous structure is reduced. Therefore, even if the cap layer is formed to a minimum thickness, the gap is embedded. There is a problem that the relative dielectric constant of the entire interlayer insulating film increases due to the presence of the permeation layer.
[0012]
Accordingly, an object of the present invention is to improve the moisture resistance of an insulating film while maintaining the effect of lowering the dielectric constant accompanying the increase in porosity.
[0013]
[Means for Solving the Problems]
FIG. 1 is an explanatory diagram of the principle configuration of the present invention. Means for solving the problems in the present invention will be described with reference to FIG.
See FIG. 1. (1) In the present invention, the insulating film contains inorganic particles made of any of SiO 2 particles, SiN particles, or Al 2 O 3 particles in the insulating film, and is generated between the inorganic particles. A first insulating film composed of a porous insulating film 4 using voids 5, and provided on the surface of the first insulating film, and the voids 5 of the porous insulating film 4 are made of silicon-based oxide or silicon-based nitride. And a second insulating film 6 embedded with either a silicone resin or a fluorocarbon resin. On the second insulating film, the silicon oxide film, the silicon nitride film, or the fluorocarbon None of the resin film is present .
[0014]
Thus, by providing the insulating film 6 in which the gap 5 is embedded on the porous insulating film 4, air can be shut off as in the case where the cap layer is provided. The resulting hygroscopicity can be reduced, and an insulating film can be formed in which the relative dielectric constant does not change with time, and since there is no cap layer having a high relative dielectric constant, the entire insulating film can be reduced in dielectric constant. The signal delay T due to the parasitic capacitance C between the adjacent wiring layers 3 provided on the substrate via the base insulating layer 2 can be reduced.
In the present invention, the electronic device mainly means a semiconductor integrated circuit device.
[0015]
In this way, by mixing inorganic particles such as SiO 2 particles in the insulating film , voids 5 are generated between the inorganic particles due to the three-dimensional arrangement of the inorganic particles, and therefore the porous insulating film 4 including the voids 5 is formed. It can be easily formed.
[0016]
Further , as the material for filling the gap 5, silicon oxide such as Si 2 O 2 having excellent water resistance , silicone resin , silicon nitride such as Si 3 N 4 having excellent water resistance, or low relative dielectric constant Any of fluorocarbon resins such as amorphous CF, which is excellent in the resistance, is suitable.
[0017]
(2) Further, the present invention is characterized in that, in the above (1), the porous insulating film 4 is made of a silicon-based oxide.
[0018]
As described above, the material used for the porous insulating film 4 is practically suitable for SiO 2 used as an interlayer insulating film in a semiconductor integrated circuit device and silicon-based oxides such as silicone resin used for SOG.
[0021]
( 3 ) Further, according to the present invention, in the method for forming an insulating film , the insulating film contains inorganic particles made of any of SiO 2 particles, SiN particles, or Al 2 O 3 particles, and is generated between the inorganic particles. Forming a first insulating film composed of the porous insulating film 4 using the void 5 formed, and a silicon-based oxide film, a silicon-based nitride film, a silicone resin, or fluorine carbide on the first insulating film A cap layer made of any one of the resin films is formed, and a part of the gap 5 on the surface side of the first insulating film is filled with the constituent material of the cap layer in the film forming step to form the second insulation The method includes a step of forming a film and a step of removing the cap layer .
[0022]
In this way, after providing the cap layer, by removing a part of the insulating film 6 in which the gap 5 is embedded and the cap layer, the insulating film 6 in which the gap 5 is buried is left to the minimum for water resistance. As a result, the water resistance can be increased, thereby reducing the time-dependent fluctuation of the low dielectric constant due to the gap 5.
[0023]
DETAILED DESCRIPTION OF THE INVENTION
Here, with reference to FIG. 2 and FIG. 3, the formation method of the insulating film of the 1st Embodiment of this invention is demonstrated.
In the following, in order to simplify the description, a case where an insulating film is formed directly on a silicon substrate will be described.
See FIG. 2A. First, silicone resin HPS (trade name, manufactured by Catalyst Chemical Industry Co., Ltd.), in which 90% by weight of SiO 2 particles having an average particle diameter of 500 mm are mixed on p-type silicon substrate 11 doped with boron (B). ) Is used to form a porous insulating film having a thickness of 1 μm (= 10000 mm), that is, a porous layer 12 by spin coating.
During this porous layer 12, the gap 13 between the SiO 2 particles are formed by mixing SiO 2 particles, the dielectric constant becomes about 2.25.
[0024]
Next, referring to FIG. 2B, using the CVD method, the silicon substrate temperature is set to 350 ° C., SiH 4 is flowed at 60 sccm and NO 2 is flowed at 900 sccm, and the film forming pressure is set at 0.5 Torr. By applying a high frequency power of 13.56 MHz and a power of 250 W / (185 cm 2 ), a cap layer 14 made of a SiO 2 film having a thickness of 2000 mm is deposited on the porous layer 12.
In this deposition step, about 2000 kg of SiO 2 penetrates into the porous layer 12 and the gap 13 is filled with SiO 2 to form the permeation layer 15.
In the figure, reference numeral 16 indicates a void filled with SiO 2 .
[0025]
Next, referring to FIG. 2C, the entire cap layer 14 and the permeation layer 15 are etched by etching 3500 mm from the surface by dry etching using a gas in which CF 4 and O 2 are mixed at a flow ratio of 80:20. A two-layered insulating film of a porous layer 12 of about 8000 mm and a permeation layer 15 in which a gap of about 500 mm is buried is formed.
[0026]
3A and 3B, FIG. 3A shows the result of measuring the relative dielectric constant of the insulating film formed by the above method and the change in the relative dielectric constant of the insulating film after being left in the atmosphere. On the other hand, for comparison, FIG. 3B is a diagram showing the results of measuring the relative dielectric constant in the case of only the porous layer and the change in the relative dielectric constant after leaving the porous layer in the atmosphere. .
As is clear from the comparison of the figures, the dielectric constant immediately after formation is slightly lower only in the porous layer, but the insulating film of the first embodiment of the present invention provided with the permeation layer 15 hardly changes with time. After 48 hours, the relative permittivity relationship was reversed.
[0027]
From this result, immediately after the formation, although the relative permittivity is slightly increased due to the dielectric constant of the thin osmotic membrane 15, moisture in the atmosphere is effectively blocked due to the presence of the osmotic layer 15. It is considered that there is almost no change with time.
In addition, in comparison with the above-described conventional example, it is considered that the permeation layer is formed by providing a cap layer in the past, but since the cap layer finally remains in the conventional example, It is considered that the relative dielectric constant of the entire insulating film is considerably increased due to the presence of the cap layer.
[0028]
Next, a specific application example in the case where such an insulating film is used as an interlayer insulating film will be described with reference to FIG.
4A. First, a predetermined active element is formed on a p-type silicon substrate 11 doped with boron, and a wiring layer 18 having a predetermined pattern is formed through a base insulating layer 17 such as a SiO 2 film provided on the surface thereof. The porous layer 12 is formed by spin-coating a silicone resin HPS (trade name, manufactured by Catalyst Chemical Industry Co., Ltd.) in which 70 to 90% by weight, for example, 90% by weight, of SiO 2 particles having an average particle size of 500 mm are formed. Form.
For example, in the region where the wiring layer 18 does not exist, the thickness of the porous layer 12 is set to be thicker than the final required thickness in consideration of the penetration depth of the substance constituting the cap layer 14. Deposit to a thickness of 1 μm.
[0029]
Next, referring to FIG. 4B, using the CVD method, the silicon substrate temperature is set to 350 ° C., SiH 4 is supplied at 60 sccm and NO 2 is supplied at 900 sccm, and the film forming pressure is set at 0.5 Torr. By applying a high frequency power of 13.56 MHz and a power of 250 W / (185 cm 2 ), a cap layer 14 made of a SiO 2 film having a thickness of 2000 mm is deposited on the porous layer 12 to thereby form a porous layer 12 in the porous layer 12. The permeation layer 15 is formed by impregnating SiO 2 to a depth of about 2000 mm and filling the gaps 13 with SiO 2 .
[0030]
Next, referring to FIG. 4C, the entire cap layer 14 and the permeation layer 15 are etched by etching 3500 mm from the surface by dry etching using a gas in which CF 4 and O 2 are mixed at a flow ratio of 80:20. A part of the insulating layer is removed, and an insulating film having a two-layer structure of a porous layer 12 of about 8000 mm and a permeation layer 15 in which a gap of about 500 mm is buried is formed as an interlayer insulating film.
[0031]
Since the relative dielectric constant of such an interlayer insulating film is about 2.3 as apparent from FIG. 3A, the parasitic capacitance is higher than that when a CVD-SiO 2 film having a relative dielectric constant of about 4 is used. C is about 0.6 times (≈0.575 = 2.3 / 4), and the wiring delay T proportional to the parasitic capacitance C is also about 0.6 times.
[0032]
Next, a second embodiment of the present invention will be described with reference to FIGS.
In the second embodiment, only the cap layer deposition conditions are different, and other configurations are almost the same as those in the first embodiment. Therefore, the first embodiment will be described in describing the formation method. FIG. 2 is referred to in the same manner as in FIG.
See FIG. 2 (a). First, a silicone resin HPS (trade name, manufactured by Catalyst Kasei Kogyo Co., Ltd.) in which 90% by weight of SiO 2 particles having an average particle diameter of 500 mm is mixed on a p-type silicon substrate 11 doped with boron is used. A porous insulating film having a thickness of 8000 mm, that is, a porous layer 12 is formed by spin coating.
[0033]
Next, see FIG. 2B. Next, a silicone resin (HSQ: Hydrogen Siles Quioxane) was spin-coated using a spin coater while rotating at 3000 rpm for 30 seconds, then pre-baked at 300 ° C. and cured at 400 ° C. As a result, a cap layer 14 having a thickness of 2000 ° C. is formed.
In this forming step, HSQ penetrates into the porous layer 12 by about 1000 mm, and the void 13 is filled with HSQ to form the permeation layer 15.
[0034]
Next, referring to FIG. 2C, the entire cap layer 14 and a part of the permeation layer 15 are removed by etching from the surface by wet etching using HF by 2500 mm, and the porous layer 12 having about 7000 mm and about 500 mm are removed. An insulating film having a two-layer structure of the permeation layer 15 in which the voids are embedded is formed.
[0035]
Reference to FIG. 5A FIG. 5A is a diagram showing the measurement result of the relative dielectric constant of the insulating film formed by the above method and the change in the relative dielectric constant after the insulating film is left in the atmosphere. As is clear from the comparison with FIG. 3B described above, the dielectric constant immediately after formation is slightly lower only in the porous layer, but the insulating film of the second embodiment of the present invention is As with the insulating film of the first embodiment, there was almost no change with time, and the relationship of the relative dielectric constant was reversed after 48 hours.
[0036]
From the comparison between the result of the second embodiment and the result of the first embodiment, the case where the cap layer is formed from a gas phase as in the first embodiment is more effective. It can be seen that the depth increases.
[0037]
Next, a third embodiment of the present invention will be described with reference to FIGS. Also in the case of the third embodiment, the other conditions are almost the same as those of the first embodiment except that the film formation conditions of the cap layer are different. Reference is made to FIG. 2 as in the embodiment.
See FIG. 2 (a). First, a silicone resin HPS (trade name, manufactured by Catalyst Kasei Kogyo Co., Ltd.) in which 90% by weight of SiO 2 particles having an average particle diameter of 500 mm is mixed on a p-type silicon substrate 11 doped with boron is used. A porous insulating film having a thickness of 10,000 mm, that is, a porous layer 12 is formed by spin coating.
[0038]
Next, referring to FIG. 2B, the CVD method is used to set the silicon substrate at a substrate temperature of 300 ° C., SiH 4 is supplied at 730 sccm, NH 3 is supplied at 200 sccm, and N 2 is supplied at 270 sccm. The cap layer 14 made of a Si 3 N 4 film having a thickness of 2000 mm is deposited on the porous layer 12 by applying high-frequency power having a frequency of 13.56 MHz and a power of 250 W / (185 cm 2 ). Let
In this deposition step, about 1500 mm of Si 3 N 4 penetrates into the porous layer 12, and the permeation layer 15 is formed by embedding the gap 13 with Si 3 N 4 .
[0039]
Next, referring to FIG. 2C, the entire cap layer 14 and the permeation layer 15 are etched by etching from the surface by 3000 mm by dry etching using a gas in which CF 4 and O 2 are mixed at a flow ratio of 80:20. A two-layered insulating film of a porous layer 12 of about 9000 mm and a permeation layer 15 in which a gap of about 500 mm is embedded is formed.
[0040]
Reference to FIG. 5B FIG. 5B is a diagram showing the results of measuring the relative dielectric constant of the insulating film formed by the above-described method and the change in the relative dielectric constant of the insulating film after being left in the atmosphere. As is clear from the comparison with FIG. 3B described above, the dielectric constant immediately after the formation is slightly lower only in the porous layer, but the insulating film of the third embodiment of the present invention is the above-mentioned As with the insulating film of the first embodiment, there was almost no change with time, and the relationship of the relative dielectric constant was reversed after 48 hours.
[0041]
In the case of using the Si 3 N 4 as a cap layer, Si 3 N 4 Due to the high dielectric constant than SiO 2, the relative dielectric constant of the permeation layer 15 embedding the voids in Si 3 N 4 is also of the Although slightly higher than the first embodiment, the moisture resistance is improved.
[0042]
Next, a fourth embodiment of the present invention will be described with reference to FIGS.
In the case of the fourth embodiment, only the film formation conditions for the cap layer are different, and the other configuration is almost the same as that of the first embodiment. Reference is made to FIG. 2 as in the embodiment.
See FIG. 2 (a). First, a silicone resin HPS (trade name, manufactured by Catalyst Kasei Kogyo Co., Ltd.) in which 90% by weight of SiO 2 particles having an average particle diameter of 500 mm is mixed on a p-type silicon substrate 11 doped with boron is used. A porous insulating film having a thickness of 10,000 mm, that is, a porous layer 12 is formed by spin coating.
[0043]
Next, referring to FIG. 2B, using a plasma CVD method, the silicon substrate is set to a substrate temperature of 350 ° C., CF 4 is flowed at 300 sccm, C 2 H 2 is flowed at 20 sccm, and O 2 is flowed at 50 sccm. Under the condition of 1.0 Torr, a cap layer 14 made of an amorphous CF film having a thickness of 2000 mm is formed on the porous layer 12 by applying a high frequency power having a frequency of 13.56 MHz and a power of 100 W / (185 cm 2 ). Deposit.
In this deposition step, amorphous CF penetrates into the porous layer 12 by about 1500 mm, and the void 13 is filled with the amorphous CF to form the permeation layer 15.
[0044]
Next, referring to FIG. 2C, the entire cap layer 14 and the permeation layer 15 are etched by etching from the surface by 3000 mm by dry etching using a gas in which CF 4 and O 2 are mixed at a flow ratio of 80:20. A two-layered insulating film of a porous layer 12 of about 9000 mm and a permeation layer 15 in which a gap of about 500 mm is embedded is formed.
[0045]
FIG. 6 is a diagram showing the results of measuring the relative dielectric constant of the insulating film formed by the above method and the change in the relative dielectric constant of the insulating film after being left in the atmosphere. As is clear from the comparison with b), the dielectric constant immediately after formation is slightly lower only in the porous layer, but the insulating film of the fourth embodiment of the present invention is the above-described first embodiment. As with the insulating film, there was almost no change over time, and the relative permittivity relationship was reversed after 48 hours.
[0046]
When an amorphous CF film is used as the cap layer, amorphous CF has a lower relative dielectric constant than SiO 2 , so that the relative dielectric constant of the permeation layer 15 in which the gap is filled with amorphous CF is also the same as that in the first embodiment. It is slightly lower than the form.
[0047]
In the description of the second to fourth embodiments, the case where a porous layer, that is, a porous insulating film is provided directly on a silicon substrate has been described for the sake of simplicity. In general, it is used as an interlayer insulating film as in the specific application example shown in FIG.
[0048]
As mentioned above, although each embodiment of the present invention has been described, the present invention is not limited to the configuration described in the embodiment, and various modifications are possible, and a porous layer, that is, a porous insulating film As long as it can be made porous, for example, SiO 2 , HSQ, or an organic resin may be used.
[0049]
Also, the means for making the porous material is not limited to the mixing of SiO 2 particles, and inorganic particles such as SiN particles or Al 2 O 3 particles may be used. The relative dielectric constant of the quality insulating film also changes.
[0050]
Furthermore, the means for making the porous material is not limited to the mixing of inorganic particles, and as described in the above-mentioned conventional example, it contains a supercritical drying method of a wet gel film, and a foaming agent coated with a glass wall. For example, a void may be formed in the insulating film by using a method using a sol to be made porous.
[0051]
In addition to the films shown in the first to fourth embodiments, any cap material may be used as long as it is an insulating material that does not transmit external moisture. For example, a SiON film may be used. Alternatively, other fluorocarbon resin may be used in place of amorphous CF, and a material having a low relative dielectric constant and a similar etch rate to the porous insulating film is desirable. May be made of the same material as the porous insulating film as the cap layer.
[0052]
Further, as a method of removing a part of the cap layer and the permeation layer, a CMP (Chemical Mechanical Polishing) method may be used in addition to using dry etching or wet etching, and when the CMP method is used. This makes it easy to planarize the interlayer insulating film.
[0053]
Further, the thickness of the permeation layer to be left is not limited to 500 mm, and may be a thickness that can sufficiently maintain moisture resistance according to the use environment of the semiconductor integrated circuit device.
[0054]
【The invention's effect】
According to the present invention, a porous insulating film for reducing the relative dielectric constant is deposited to a thickness greater than that required, and a cap layer is provided on the surface so that voids are formed on the surface of the porous insulating film. By forming an embedded osmotic layer and leaving this osmotic layer to a minimum thickness that can maintain water resistance, the increase in low dielectric constant and aging can be reduced, thereby causing parasitic capacitance. Since the wiring delay can be reduced, it greatly contributes to higher speed and higher integration of the semiconductor integrated circuit device.
[Brief description of the drawings]
FIG. 1 is an explanatory diagram of a basic configuration of the present invention.
FIG. 2 is an explanatory diagram of a method for forming an insulating film according to the first embodiment of this invention.
FIG. 3 is an explanatory diagram of a change in relative dielectric constant of an insulating film according to the first embodiment of the present invention.
FIG. 4 is an explanatory diagram of a specific application example of the first embodiment of the present invention.
FIG. 5 is an explanatory diagram of a change in relative dielectric constant of an insulating film according to a second embodiment and a third embodiment of the present invention.
FIG. 6 is an explanatory diagram of a change in relative dielectric constant of an insulating film according to a fourth embodiment of the present invention.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 Substrate 2 Underlying insulating layer 3 Wiring layer 4 Porous insulating film 5 Void 6 Insulating film 11 with void embedded Silicon substrate 12 Porous layer 13 Void 14 Cap layer 15 Penetration layer 16 Filled void 17 Underlying insulating layer 18 Wiring layer

Claims (3)

絶縁膜中にSiOSiO in the insulating film 2 2 粒子、SiN粒子、或いはAlParticles, SiN particles, or Al 2 2 O 3 Three 粒子のいずれかからなる無機物粒子を含有させ、前記無機物粒子間に生成される空隙を利用した多孔質絶縁膜からなる第1の絶縁膜と、前記第1の絶縁膜の表面に設けられるとともに前記多孔質絶縁膜の空隙をシリコン系酸化物、シリコン系窒化物、シリコーン樹脂、或いは、炭化フッ素系樹脂のいずれかで埋め込んだ第2の絶縁膜とからなり、前記第2の絶縁膜上には前記シリコン系酸化膜、シリコン系窒化膜、或いは、炭化フッ素系樹脂膜のいずれも存在しないことを特徴とする絶縁膜。A first insulating film made of a porous insulating film containing inorganic particles made of any of the particles and utilizing voids generated between the inorganic particles, and provided on the surface of the first insulating film; The porous insulating film includes a second insulating film in which a void of the silicon-based oxide, silicon-based nitride, silicone resin, or fluorocarbon-based resin is embedded, and the second insulating film is formed on the second insulating film. An insulating film characterized in that none of the silicon oxide film, silicon nitride film, or fluorocarbon resin film exists. 上記多孔質絶縁膜が、シリコン系酸化物からなることを特徴とする請求項1記載の絶縁膜。  2. The insulating film according to claim 1, wherein the porous insulating film is made of a silicon-based oxide. 絶縁膜中にSiOSiO in the insulating film 2 2 粒子、SiN粒子、或いはAlParticles, SiN particles, or Al 2 2 O 3 Three 粒子のいずれかからなる無機物粒子を含有させ、前記無機物粒子間に生成される空隙を利用した多孔質絶縁膜からなる第1の絶縁膜を形成する工程と、前記第1の絶縁膜上にシリコン系酸化膜、シリコン系窒化膜、シリコーン樹脂、或いは、炭化フッ素系樹脂膜のいずれかからなるキャップ層を成膜して、該成膜工程において前記キャップ層の構成物質で前記第1の絶縁膜の表面側の空隙の一部を埋め込んで第2の絶縁膜とする工程と、前記キャップ層を除去する工程とを有することを特徴とする絶縁膜の形成方法。A step of forming a first insulating film comprising a porous insulating film using inorganic particles made of any of the particles and utilizing voids generated between the inorganic particles; and silicon on the first insulating film Forming a cap layer made of any one of a silicon oxide film, a silicon nitride film, a silicone resin, or a fluorocarbon resin film, and using the constituent material of the cap layer in the film forming step, the first insulating film A method for forming an insulating film, comprising: a step of filling a part of a gap on the surface side of the first insulating film to form a second insulating film; and a step of removing the cap layer.
JP17984898A 1998-06-26 1998-06-26 Insulating film and method for forming the same Expired - Fee Related JP4022790B2 (en)

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