JP4026367B2 - DC / DC converter - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a DC / DC converter that converts a DC voltage into a predetermined DC voltage, and more particularly, to a DC / DC converter using a charge pump system.
[0002]
[Prior art]
As a conventional DC / DC converter using a charge pump system, for example, a double booster as shown in FIG. 7 is known.
As shown in FIG. 7, the DC / DC converter includes a double boosting charge pump circuit 1, a driving circuit 2 for driving the charge pump circuit 1, and an oscillation circuit for oscillating a signal supplied to the driving circuit 2. 3 and an output capacitor CV1.
[0003]
The charge pump circuit 1 includes MOS transistors Q1 to Q4 and a capacitor C1. Each of the MOS transistors Q1 to Q4 is controlled to be turned on / off by the drive circuit 2.
Next, an example of the operation of the conventional DC / DC converter having such a configuration will be described with reference to FIGS.
Now, when the power is turned on, there are parasitic diodes in the MOS transistors Q1 and Q2, so that the input DC voltage Vin rapidly charges the output capacitor CV1 having no charge. For this reason, as shown in FIG. 8B, a large charging current flows through the output capacitor CV1. Due to this charging current (rush current), the output voltage Vout rises rapidly to about 2.4 [V] as shown in FIG. At this time, since only Q2 and Q4 are turned on, the input DC voltage Vin charges the capacitor C1 having almost no charge.
[0004]
Next, since the drive circuit 2 turns on only the MOS transistors Q1 and Q3, the input DC voltage Vin is applied to the charging voltage of the capacitor C1 and boosted. For this reason, a large charging current as shown in FIG. 8B flows through the capacitor CV1. With this charging current, the output voltage Vout rapidly rises to about 4.2 [V] as shown in FIG.
Furthermore, since the drive circuit 2 turns off the MOS transistors Q1 and Q3 and simultaneously turns on the MOS transistors Q2 and Q4, the input DC voltage Vin further charges the capacitor C1. For this reason, a relatively large charging current as shown in FIG. 8B flows through the capacitor C1. At this time, the output voltage Vout is maintained at about 4.2 [V] as shown in FIG.
[0005]
Next, since the driving circuit 2 turns off the MOS transistors Q2 and Q4 and simultaneously turns on the MOS transistors Q1 and Q3, the input DC voltage Vin is applied to the charging voltage of the capacitor C1 and boosted. For this reason, a charging current as shown in FIG. 8B flows through the capacitor CV1. With this charging current, the output voltage Vout rapidly rises to about 5 [V] as shown in FIG.
Thereafter, by repeating these operations, the charging current of the capacitor CV1 gradually decreases as shown in FIG. 8 (B), and the output voltage gradually decreases as shown in FIG. 8 (A). It increases and finally becomes about 6 [V].
[0006]
Thereafter, the charge pump circuit 1 turns on only the MOS transistors Q2 and Q4 to charge the capacitor C1 to the input DC voltage Vin, and further turns off the MOS transistors Q2 and Q4 and simultaneously turns on the MOS transistors Q1 and Q3. As a result, the operation of applying the input DC voltage Vin to the charging voltage of the capacitor C1 to boost the voltage is repeated.
[0007]
[Problems to be solved by the invention]
In the conventional DC / DC converter, as described above, a large charging current, that is, an inrush current flows through the capacitor C1 and the output capacitor CV1 at the start of the operation of the charge pump circuit, which adversely affects other devices, for example. There is an inconvenience.
In view of the above, an object of the present invention is to provide a DC / DC converter that reduces inrush current.
[0008]
[Means for Solving the Problems]
In order to solve the above-described problems and achieve the object of the present invention, the inventions described in claims 1 to 8 are configured as follows.
That is, the invention according to claim 1 has a charge pump circuit that charges a capacitor to an input voltage, applies the input voltage to the charge voltage of the capacitor, boosts the voltage, or inverts and outputs the charge voltage of the capacitor. A DC / DC converter comprising the charge pump circuit Before starting the operation, A precharging circuit for precharging the capacitor; The preliminary charging circuit includes a switching element that charges the capacitor by applying the input voltage to the capacitor, and the switching element is turned on during preliminary charging of the capacitor and is turned off after the charging is completed. Have It is characterized by this.
[0009]
According to a second aspect of the present invention, in the DC / DC converter according to the first aspect, the DC / DC converter includes an output capacitor, and the precharge circuit is configured by the charge pump circuit. Before starting the operation, The capacitor and the output capacitor are preliminarily charged. And the precharging circuit includes a first switch element that charges the input voltage by applying the input voltage to the capacitor, and a second switch element that charges the input voltage by applying the input voltage to the output capacitor. The first and second switch elements are turned on during preliminary charging of the capacitor and the output capacitor, respectively, and are turned off after the charging is completed. It is characterized by this.
Thus, in the first and second aspects of the invention, the precharge circuit can precharge the capacitor of the charge pump circuit when the charge pump circuit is not operating. For this reason, at the start of the operation of the charge pump circuit, the inrush current can be made smaller than before.
[0010]
According to a third aspect of the present invention, there is provided a DC / DC having a charge pump circuit that charges a capacitor to an input voltage, applies the input voltage to the charge voltage of the capacitor, boosts the voltage, or inverts and outputs the charge voltage of the capacitor. A DC converter, wherein the charge pump circuit is preliminarily charged when the charge pump circuit is not operating; and the boost operation or the inverted output operation of the charge pump circuit when the charge pump circuit starts operating Instead, a first inrush current reducing circuit that performs the boosting operation or the inverting output operation with a smaller capacity than the charge pump circuit is provided.
[0011]
According to a fourth aspect of the present invention, in the DC / DC converter according to the third aspect, the first inrush current reducing circuit is a MOS transistor used by the charge pump circuit for the boosting operation or the inverted output operation. An auxiliary MOS transistor having a transistor size smaller than that of the MOS transistor and switching means for selectively switching the operation of the MOS transistor and the auxiliary MOS transistor are provided in parallel.
[0012]
According to a fifth aspect of the present invention, in the DC / DC converter according to the third or fourth aspect of the present invention, the DC / DC converter includes an output capacitor, and the precharge circuit is inactive with the charge pump circuit. In some cases, the capacitor and the output capacitor are preliminarily charged.
Thus, in each invention of Claims 3-5, in addition to the preliminary charging circuit, the first inrush current reducing circuit is provided. Then, the first inrush current reducing circuit replaces the boost operation or the inverted output operation of the charge pump circuit at the start of the operation of the charge pump circuit, and the boost operation or the inverted output operation thereof with a smaller capacity than the charge pump circuit. I do.
[0013]
Therefore, in each of the inventions according to claims 3 to 5, the inrush current can be further reduced at the start of the operation of the charge pump circuit as compared with the inventions of claims 1 and 2. .
According to a sixth aspect of the present invention, a DC / DC having a charge pump circuit that charges a capacitor to an input voltage, applies the input voltage to the charge voltage of the capacitor, boosts the voltage, or inverts and outputs the charge voltage of the capacitor. A DC converter, wherein the charge pump circuit is preliminarily charged when the charge pump circuit is not operating; and the boost operation or the inverted output operation of the charge pump circuit when the charge pump circuit starts operating Instead of the first inrush current reducing circuit that performs the boosting operation or the inverting output operation with a smaller capacity than the charge pump circuit, and charging the capacitor of the charge pump circuit at the start of the operation of the charge pump circuit. Instead of the second inrush electric power that charges the battery with a smaller capacity than the charge pump circuit. And reduce the circuit, it is characterized in that it has to include a.
[0014]
According to a seventh aspect of the present invention, in the DC / DC converter according to the sixth aspect, the first inrush current reducing circuit is a first circuit used by the charge pump circuit for the step-up operation or the inverted output operation. A first auxiliary MOS transistor that is provided in parallel with the MOS transistor and has a smaller transistor size than the first MOS transistor, and a first switch for selectively switching the operation of the first MOS transistor and the first auxiliary MOS transistor. The second inrush current reducing circuit is provided in parallel with the second MOS transistor used for the charging operation of the charge pump circuit, and the transistor size is smaller than that of the second MOS transistor. A second auxiliary MOS transistor; the second MOS transistor; and the second auxiliary MO transistor. And it is characterized in that it comprises a second switching means for switching the operation of the transistor selectively, the.
[0015]
According to an eighth aspect of the present invention, in the DC / DC converter according to the sixth or seventh aspect, the DC / DC converter includes an output capacitor, and the precharge circuit is inactive with the charge pump circuit. In some cases, the capacitor and the output capacitor are preliminarily charged.
As described above, in each of the sixth to eighth aspects of the present invention, the second inrush current reducing circuit is provided in addition to the preliminary charging circuit and the first inrush current reducing circuit. Then, the second inrush current reducing circuit, at the start of the operation of the charge pump circuit, instead of charging the capacitor of the charge pump circuit, performs charging with a smaller capacity than the charge pump circuit.
Therefore, in each of the inventions according to claims 6 to 8, the inrush current can be further reduced at the start of the operation of the charge pump circuit as compared with the inventions of claims 3 to 5. .
[0016]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, embodiments of the DC / DC converter of the present invention will be described with reference to the drawings.
The configuration of the first embodiment of the DC / DC converter of the present invention will be described with reference to FIG.
In the first embodiment, as shown in FIG. 1, a charge pump circuit 1 of double boosting, a drive circuit 2 for driving the charge pump circuit 1, and an oscillation circuit for oscillating a signal supplied to the drive circuit 2 3, an output capacitor CV1, an input terminal 4, and an output terminal 5, which constitute a DC / DC converter that generates and outputs a positive voltage.
[0017]
Further, in the first embodiment, when the DC / DC converter is not operating, the capacitor C1 and the output capacitor CV1 constituting the charge pump circuit 1 are charged in advance, respectively, and the DC / DC converter is started at the start of operation. A precharge circuit 6 is provided for reducing current.
The charge pump circuit 1 boosts the DC input voltage Vin by a factor of two, and comprises a P-type MOS transistor Q1 to Q3, an N-type MOS transistor Q4, a capacitor C1, and the like as shown in FIG. Has been.
[0018]
Specifically, the MOS transistors Q1 to Q4 are connected in series between the output line 7 and the ground. The MOS transistors Q1 to Q4 are configured so that predetermined drive signals (on / off control signals) are applied from the drive circuit 2 to the gates of the MOS transistors Q1 to Q4. Both ends of the capacitor C1 are connected to a common connection portion between the MOS transistors Q1 and Q2 and a common connection portion between the MOS transistors Q3 and Q4. A common connection between the MOS transistor Q2 and the MOS transistor Q3 is connected to the input line 8.
[0019]
The drive circuit 2 outputs a drive signal for driving the charge pump circuit 1 based on an oscillation signal having a predetermined frequency oscillated by the oscillation circuit 3. Therefore, predetermined drive signals from the drive circuit 2 are applied to the gates of the MOS transistors Q1 to Q4, and the MOS transistors Q1 to Q4 are driven and controlled (on / off control).
The precharge circuit 6 is for charging the capacitor C1 with the input DC voltage Vin and for charging the output capacitor CV1 with the input DC voltage Vin based on the power-off signal when the DC / DC converter is not operating. It consists of.
[0020]
As shown in FIG. 1, the one for charging the capacitor C1 includes MOS transistors Q5 and Q6 and an inverter 9. That is, when the DC / DC converter is not operating, the MOS transistors Q5 and Q6 are turned on based on the power-off signal, thereby charging the capacitor C1 with the input DC voltage Vin.
Specifically, the drain of the MOS transistor Q5 is connected to the input line 8, and the source is connected to one end of the capacitor C1. The drain of the MOS transistor Q6 is connected to the other end of the capacitor C1, and the source thereof is grounded. Further, the MOS transistor Q5 is controlled to be turned on / off by applying a power-off signal to the gate, and the MOS transistor Q6 is controlled to be turned on / off by applying a power-off signal to the gate via an inverter 9. .
[0021]
In order to charge the output capacitor CV1, as shown in FIG. 1, when the DC / DC converter is not operating, the MOS transistor Q7 is turned on based on the power-off signal, so that the capacitor CV1 is turned on by the input DC voltage Vin. It comes to charge.
Specifically, the drain of the MOS transistor Q7 is connected to the input line 8, and the source is connected to one end of the capacitor CV1 through the output line 7. Further, the MOS transistor Q7 is controlled to be turned on / off by applying a power-off signal to its gate.
[0022]
Next, an operation example of the first embodiment having such a configuration will be described with reference to FIG. 1 and FIG.
In the first embodiment, as shown in FIG. 2, when the power is turned on, the precharge circuit 6 is operated with a power-off signal until 5 [mS] has elapsed since the power is turned on. A case where the charge pump circuit 1 is operated by the drive circuit 2 will be described.
[0023]
Here, the power-off signal is at the “L” level when the drive circuit 2 does not drive the charge pump circuit 1 in a state where the power is turned on, and at the “H” level when the charge pump circuit 1 is driven. It is what.
In this case, when the power is turned on, the power-off signal is at the “L” level for a period from when the power is turned on until 5 [mS] elapses, and during this period, the MOS transistors Q5 to Q7 are turned on. For this reason, when the power is turned on, as shown in FIG. 2B, a charging current suddenly flows through the capacitor C1 and the output capacitor CV1 due to the input DC voltage Vin. Along with this, as shown in FIG. 2A, the output voltage Vout of the output terminal 5 increases rapidly and then gradually increases to about 3 [V].
[0024]
When 5 [mS] has elapsed since the power was turned on, the power-off signal changes from the “L” level to the “H” level to drive the charge pump circuit 1, so that the MOS transistors Q5 to Q7 are turned off. become.
Thereafter, since the drive circuit 2 turns on only the MOS transistors Q1 and Q3, the input DC voltage Vin is applied to the charging voltage of the capacitor C1 to boost the voltage. For this reason, a charging current as shown in FIG. 2B flows through the capacitor CV1. With this charging current, the output voltage Vout rapidly rises from about 3 [V] to about 4.6 [V] as shown in FIG.
[0025]
Next, since the drive circuit 2 turns off the MOS transistors Q1 and Q3 and simultaneously turns on the MOS transistors Q2 and Q4, the input DC voltage Vin further charges the capacitor C1. For this reason, a charging current as shown in FIG. 2B flows through the capacitor C1. At this time, the output voltage Vout is maintained at about 4.6 [V] as shown in FIG.
Next, since the drive circuit 2 turns off the MOS transistors Q2 and Q4 and simultaneously turns on the MOS transistors Q1 and Q3, the drive circuit 2 applies the input DC voltage Vin to the charging voltage of the capacitor C1 and boosts it. For this reason, a charging current as shown in FIG. 2B flows through the capacitor CV1. With this charging current, the output voltage Vout rapidly rises to about 5.2 [V] as shown in FIG.
[0026]
Thereafter, by repeating these operations, the charging current of the capacitor CV1 gradually decreases as shown in FIG. 2B, and the output voltage Vout gradually increases as shown in FIG. 2A. And finally increases to about 6 [V].
Thereafter, the charge pump circuit 1 turns on only the MOS transistors Q2 and Q4 to charge the capacitor C1 to the input DC voltage Vin, and further turns off the MOS transistors Q2 and Q4 and simultaneously turns on the MOS transistors Q1 and Q3. As a result, the operation of applying the input DC voltage Vin to the charging voltage of the capacitor C1 to boost the voltage is repeated.
[0027]
As described above, according to the first embodiment, since the preliminary charging circuit 6 is provided, the capacitor C1 is precharged by the preliminary charging circuit 6, and the operation of the charge pump circuit 1 is completed after the charging is completed. Can be started. For this reason, at the start of the operation of the charge pump circuit 1, the inrush current can be reduced as compared with the prior art, and adverse effects on other devices due to the inrush current can be prevented.
In the above description, the case where the capacitors C1 and CV1 are charged in advance by the preliminary charging circuit 6 when the power is turned on and the charge pump circuit 1 is driven by the drive circuit 2 after the charging is completed has been described.
[0028]
However, the power-off signal is at the “L” level when the charge pump circuit 1 is not driven and is at the “H” level when the charge pump circuit 1 is driven when the power is turned on. .
Therefore, during the period when the charge pump circuit 1 is not operated, the capacitors C1 and CV1 are charged in advance by the precharge circuit 6, and when the charge pump circuit 1 is operated, the operation can be started with the capacitors C1 and CV1 being charged. .
[0029]
Next, the configuration of the second embodiment of the DC / DC converter of the present invention will be described with reference to FIG.
As shown in FIG. 3, the second embodiment is based on the configuration of the first embodiment, and a first inrush current reduction circuit 11 is added to further reduce the inrush current.
The first inrush current reducing circuit 11 temporarily performs the boosting operation with a smaller capacity than the charge pump circuit 1 instead of the boosting operation of the charge pump circuit 1 at the start of the operation of the charge pump circuit 1. is there.
[0030]
That is, as shown in FIG. 3, the first inrush current reduction circuit 11 includes a MOS transistor Q3 A, a MOS transistor Q3, and a MOS transistor connected in parallel to the MOS transistor Q3 that performs the original boosting operation in the charge pump circuit 1. It comprises a change-over switch SW1 that selectively switches the operation of Q3A.
Further, as will be described later, the MOS transistor Q3A uses a transistor whose size is smaller than that of the MOS transistor Q3 in order to reduce the inrush current by making it smaller than the current flowing through the MOS transistor Q3. .
[0031]
More specifically, the drain and source of the MOS transistor Q3 are connected to the drain and source of the MOS transistor Q3, respectively. The drive signal from the drive circuit 2 is selectively supplied to the gate of the MOS transistor Q3 or the gate of the MOS transistor Q3A by the changeover switch SW1. The contact point of the changeover switch SW1 is changed over by a switch changeover signal.
[0032]
In addition, since the structure of the other part of this 2nd Embodiment is the same as that of the structure of 1st Embodiment shown in FIG. 1, the same code | symbol is attached | subjected to the same component and description of the structure is abbreviate | omitted.
Next, an operation example of the second embodiment having such a configuration will be described with reference to FIGS.
In the second embodiment, as shown in FIG. 4, when the power is turned on, the precharge circuit 6 is operated by the power-off signal during the period from when the power is turned on until 5 [mS] elapses. When the charge pump circuit 1 and the first inrush current reduction circuit 11 are operated during the period from 5 [mS] to 8 [mS] after the completion, and only the charge pump circuit 1 is operated after 8 [mS] has elapsed. Will be described.
[0033]
In this case, the precharge circuit 6 operates in the same manner as in the first embodiment until 5 [mS] has elapsed since the power is turned on, and the charging current of the capacitor C1 is as shown in FIG. The output voltage Vout is as shown in FIG.
When 5 [mS] has elapsed since the power was turned on, the contact of the changeover switch SW1 is switched to the side opposite to the position in FIG. 3, and the first inrush current reduction circuit 11 temporarily performs the boosting operation of the charge pump circuit 1. It will be.
[0034]
That is, the drive circuit 2 turns on only the MOS transistors Q1 and Q3A, applies the input DC voltage Vin to the charging voltage of the capacitor C1, boosts it, and a charging current as shown in FIG. 4B flows through the capacitor CV1. . However, since the transistor size of the MOS transistor Q3A is smaller than that of the MOS transistor Q3, as shown in FIG. 4B, the charging current can be greatly reduced as compared with the case of the first embodiment. That is, the charging current can be reduced from 845 [mA] to 180 [mA] (see FIGS. 4B and 2B).
[0035]
With this charging current, the output voltage Vout suddenly rises from about 3 [V] to about 4.6 [V] as shown in FIG.
Furthermore, since the drive circuit 2 turns off the MOS transistors Q1 and Q3A and simultaneously turns on the MOS transistors Q2 and Q4, the input DC voltage Vin further charges the capacitor C1. For this reason, a charging current as shown in FIG. 4B flows through the capacitor C1, and the magnitude of this charging current is the same as in the first embodiment. At this time, the output voltage Vout is maintained at about 4.6 [V] as shown in FIG.
[0036]
Next, since the drive circuit 2 turns off the MOS transistors Q2 and Q4 and simultaneously turns on the MOS transistors Q1 and Q3A, the input DC voltage Vin is applied to the charging voltage of the capacitor C1 to boost the voltage. For this reason, a charging current as shown in FIG. 4B flows through the capacitor CV1, and this charging current is significantly reduced compared to the case of the first embodiment. That is, the charging current decreases from 500 [mA] to 150 [mA]. With this charging current, the output voltage Vout rapidly rises to about 5.2 [V] as shown in FIG.
[0037]
Thereafter, by repeating these operations, the charging current of the capacitor C1 gradually decreases as shown in FIG. 4B, and the output voltage gradually decreases as shown in FIG. 4A. It increases and becomes about 6 [V] after 8 [mS] since the power is turned on.
Thereafter, the charge pump circuit 1 turns on the MOS transistors Q2 and Q4 to charge the capacitor C1 to the input DC voltage Vin, and further turns off the MOS transistors Q2 and Q4 and simultaneously turns on the MOS transistors Q1 and Q3. Thus, the operation of applying and boosting the input DC voltage Vin to the charging voltage of the capacitor C1 is repeated.
[0038]
As described above, in the second embodiment, since the first inrush current reduction circuit 11 is provided in addition to the preliminary charging circuit 6, the operation of the charge pump circuit 1 is started at the start of the operation of the charge pump circuit 1. Instead of the step-up operation, the first inrush current reduction circuit 11 can perform the step-up operation temporarily with a small current.
For this reason, according to the second embodiment, at the start of the operation of the charge pump circuit 1, the inrush current can be further reduced as compared with the first embodiment, and adverse effects on other devices due to the inrush current can be prevented. .
[0039]
Next, the structure of 3rd Embodiment of the DC / DC converter of this invention is demonstrated with reference to FIG.
As shown in FIG. 5, the third embodiment is based on the configuration of the second embodiment shown in FIG. 3, and a second inrush current reduction circuit 12 is added to further reduce the inrush current. Is.
The second inrush current reduction circuit 12 temporarily charges the capacitor C1 with a smaller capacity than the charge pump circuit 1 instead of the charging operation of the capacitor C1 of the charge pump circuit 1 at the start of the operation of the charge pump circuit 1. is there.
[0040]
That is, as shown in FIG. 5, the second inrush current reduction circuit 12 includes a MOS transistor Q2A, a MOS transistor Q2 and a MOS transistor Q2A connected in parallel to the MOS transistor Q2 that performs the original charging operation in the charge pump circuit 1. And a change-over switch SW2 for selectively switching the operation.
Further, as will be described later, the MOS transistor Q2A uses a transistor whose transistor size is smaller than that of the MOS transistor Q2 in order to reduce the inrush current by making it smaller than the current flowing through the MOS transistor Q2. .
[0041]
More specifically, the drain and the source of the MOS transistor Q2A are connected to the drain and the source of the MOS transistor Q2, respectively. The drive signal from the drive circuit 2 is selectively supplied to the gate of the MOS transistor Q2 or the gate of the MOS transistor Q2A by the changeover switch SW2. The contact of the changeover switch SW2 is changed over by a switch changeover signal.
[0042]
In addition, since the structure of the other part of this 3rd Embodiment is the same as that of 2nd Embodiment shown in FIG. 3, the same code | symbol is attached | subjected to the same component and description of the structure is abbreviate | omitted.
Next, an operation example of the third embodiment having such a configuration will be described below.
In the third embodiment, a second inrush current reduction circuit 12 is added to the configuration of the second embodiment.
[0043]
Therefore, in the third embodiment, as shown in FIG. 4, during the period in which the charge pump circuit 11 operates with the first inrush current reducing circuit 11, the contacts of the switches SW1 and SW2 are opposite to the positions in FIG. Thus, the second inrush current reducing circuit 12 operates alternately with the first inrush current reducing circuit 11. Hereinafter, the operation in this case will be described in detail.
At this time, first, the drive circuit 2 turns on only the MOS transistors Q1 and Q3A and applies the input DC voltage Vin to the charging voltage of the capacitor C1 to boost the voltage, so that the capacitor CV1 has a voltage as shown in FIG. A charging current of 180 [mA] flows.
[0044]
Next, since the drive circuit 2 turns off the MOS transistors Q1 and Q3A and simultaneously turns on the MOS transistors Q2A and Q4, the input DC voltage Vin further charges the capacitor C1.
However, since the transistor size of the MOS transistor Q2A is smaller than that of the MOS transistor Q2, the charging current can be greatly reduced compared to the case of the second embodiment. That is, the charging current of 470 [mA] shown in FIG.
[0045]
In this way, in the third embodiment, by operating the second inrush current reduction circuit 12, each of the currents 270 [mA] and 145 [mA] shown in FIG. 4B can be greatly reduced.
As described above, in the third embodiment, since the second inrush current reducing circuit 12 is provided in addition to the preliminary charging circuit 6 and the first inrush current reducing circuit 11, the operation of the charge pump circuit 1 is improved. At the start, instead of the charging operation of the charge pump circuit 1, the second inrush current reduction circuit 12 can temporarily perform the charging operation with a small current.
[0046]
For this reason, according to the third embodiment, at the start of the operation of the charge pump circuit 1, the inrush current can be further reduced as compared with the second embodiment, and the inrush current can be prevented from adversely affecting other devices. it can.
Next, the structure of 4th Embodiment of the DC / DC converter of this invention is demonstrated with reference to FIG.
In the first to third embodiments, the case where the present invention is applied to a DC / DC converter that obtains a positive voltage has been described. However, the present invention can also be applied to a DC / DC converter that obtains a negative voltage. .
[0047]
The fourth embodiment is applied to a DC / DC converter that obtains a negative voltage, and its configuration is basically the same as that of the third embodiment. Therefore, referring to the third embodiment, FIG. The outline will be described.
That is, in the fourth embodiment, as shown in FIG. 6, a charge pump circuit 21, a drive circuit 2 that drives the charge pump circuit 21, and an oscillation circuit 3 that oscillates a signal supplied to the drive circuit 2, The output capacitor CV1, the input terminal 4, and the output terminal 5 are provided to constitute a DC / DC converter that generates and outputs a negative voltage.
[0048]
Furthermore, this 4th Embodiment is provided with the preliminary charging circuit 22, the 1st inrush current reduction circuit 23, and the 2nd inrush current reduction circuit 24 similarly to 3rd Embodiment.
The charge pump circuit 21 includes MOS transistors Q11 to Q14 and a capacitor C1. That is, the charge pump circuit 21 turns on only the MOS transistors Q11 and Q13 by the driving circuit 2 to charge the capacitor C1 to the DC input voltage Vin, and then turns on only the MOS transistors Q12 and Q14, The charging voltage of C1 is inverted and output as a negative voltage.
[0049]
The preliminary charging circuit 22 corresponds to the preliminary charging circuit 6 of FIG. 5 and includes MOS transistors Q15 to Q17 and inverters 25 and 26. That is, the precharge circuit 22 turns on the MOS transistors Q15 to Q17 when the charge pump circuit 21 is not operating, thereby charging the capacitor C and the output capacitor CV1 to the input DC voltage Vin.
The first inrush current reduction circuit 23 corresponds to the first inrush current reduction circuit 11 of FIG. 5, and includes a MOS transistor Q12A and a changeover switch SW12.
[0050]
That is, the first inrush current reduction circuit 23 performs the inverted output operation with a smaller capacity than the charge pump circuit 21 instead of the inverted output operation of the charge voltage of the charge pump circuit 21 at the start of the operation of the charge pump circuit 21. Temporarily. At this time, the contact of the changeover switch SW12 shown in FIG. 6 is in a position opposite to the position shown in the figure, and a MOS transistor 12A having a smaller transistor size is used instead of the MOS transistor Q12.
[0051]
The second inrush current reduction circuit 24 corresponds to the second inrush current reduction circuit 12 of FIG. 6, and includes a MOS transistor Q13A and a changeover switch SW11.
That is, the second inrush current reduction circuit 24 temporarily performs the charging operation with a smaller capacity than the charge pump circuit 21 instead of the charging operation of the charge pump circuit 21 when the operation of the charge pump circuit 21 is started. It is. At this time, the contact of the changeover switch SW11 shown in FIG. 6 is in a position opposite to the position shown in the figure, and a MOS transistor 13A having a smaller transistor size is used instead of the MOS transistor Q13.
[0052]
【The invention's effect】
As described above, according to the present invention, the inrush current at the start of the operation of the charge pump circuit can be reduced, and adverse effects on other devices due to the inrush current can be prevented.
[Brief description of the drawings]
FIG. 1 is a circuit diagram showing a configuration of a first embodiment of the present invention.
FIG. 2 is a waveform diagram showing an example of an inrush current and an output voltage according to the first embodiment.
FIG. 3 is a circuit diagram showing a configuration of a second embodiment of the present invention.
FIG. 4 is a waveform diagram showing an example of an inrush current and an output voltage according to the second embodiment.
FIG. 5 is a circuit diagram showing a configuration of a third embodiment of the present invention.
FIG. 6 is a circuit diagram showing a configuration of a fourth embodiment of the present invention.
FIG. 7 is a circuit diagram showing a configuration of a conventional DC / DC converter.
FIG. 8 is a waveform diagram of inrush current and output voltage of the DC / DC converter.
[Explanation of symbols]
1,21 Charge pump circuit
2 Drive circuit
3 Oscillator circuit
6,22 Pre-charging circuit
11, 23 First inrush current reduction circuit
12, 24 Second inrush current reduction circuit

Claims (8)

A DC / DC converter having a charge pump circuit that charges a capacitor to an input voltage, applies the input voltage to the charge voltage of the capacitor, boosts the voltage, or inverts and outputs the charge voltage of the capacitor;
A pre-charging circuit for pre-charging the capacitor before the start of the operation of the charge pump circuit;
The preliminary charging circuit has a switching element that charges by applying the input voltage to the capacitor, and the switching element is turned on when the capacitor is preliminarily charged and is turned off after the charging is completed. DC / DC converter, characterized in that there. The DC / DC converter includes an output capacitor, and the preliminary charging circuit preliminarily charges the capacitor and the output capacitor before the operation of the charge pump circuit is started .
The preliminary charging circuit includes a first switch element that charges the input voltage by applying the input voltage to the capacitor, and a second switch element that charges the input voltage by applying the input voltage to the capacitor. 2. The DC according to claim 1, wherein the first switch element and the second switch element are turned on during preliminary charging of the capacitor and the output capacitor, respectively, and turned off after completion of the charging. / DC converter. A DC / DC converter having a charge pump circuit that charges a capacitor to an input voltage, applies the input voltage to the charge voltage of the capacitor, boosts the voltage, or inverts and outputs the charge voltage of the capacitor;
A pre-charging circuit that pre-charges the capacitor during non-operation of the charge pump circuit;
At the start of the operation of the charge pump circuit, instead of the boost operation or the inverted output operation of the charge pump circuit, a first inrush current that performs the boost operation or the inverted output operation with a smaller capacity than the charge pump circuit A mitigation circuit;
A DC / DC converter characterized by comprising: The first inrush current reduction circuit includes:
The charge pump circuit is provided in parallel with the MOS transistor used for the boosting operation or the inverted output operation, and an auxiliary MOS transistor having a smaller transistor size than the MOS transistor,
Switching means for selectively switching the operation of the MOS transistor and the auxiliary MOS transistor;
The DC / DC converter according to claim 3, further comprising:   The DC / DC converter includes an output capacitor, and the precharge circuit preliminarily charges the capacitor and the output capacitor when the charge pump circuit is not operating. The DC / DC converter according to claim 3 or 4. A DC / DC converter having a charge pump circuit that charges a capacitor to an input voltage, applies the input voltage to the charge voltage of the capacitor, boosts the voltage, or inverts and outputs the charge voltage of the capacitor;
A pre-charging circuit that pre-charges the capacitor during non-operation of the charge pump circuit;
At the start of the operation of the charge pump circuit, instead of the boost operation or the inverted output operation of the charge pump circuit, a first inrush current that performs the boost operation or the inverted output operation with a smaller capacity than the charge pump circuit A mitigation circuit;
Instead of charging the capacitor of the charge pump circuit at the start of operation of the charge pump circuit, a second inrush current reducing circuit that charges the capacitor with a smaller capacity than the charge pump circuit;
A DC / DC converter characterized by comprising: The first inrush current reduction circuit includes:
A first auxiliary MOS transistor provided in parallel with a first MOS transistor used by the charge pump circuit for the boosting operation or the inverting output operation and having a smaller transistor size than the first MOS transistor;
First switching means for selectively switching the operation of the first MOS transistor and the first auxiliary MOS transistor;
The second inrush current reduction circuit includes:
A second auxiliary MOS transistor provided in parallel with the second MOS transistor used for the charging operation of the charge pump circuit, the transistor size being smaller than the second MOS transistor;
Second switching means for selectively switching the operation of the second MOS transistor and the second auxiliary MOS transistor;
The DC / DC converter according to claim 6, further comprising:   The DC / DC converter includes an output capacitor, and the precharge circuit preliminarily charges the capacitor and the output capacitor when the charge pump circuit is not operating. The DC / DC converter according to claim 6 or 7.

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