JP4050822B2 - Image scaling processing apparatus and image scaling processing method - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
  The present invention relates to an image processing apparatus for digital data such as a facsimile, a scanner, and a digital copy. In particular, an image including characters and line drawings is enlarged at an arbitrary magnification.LargeThe present invention relates to an image scaling processing apparatus and an image scaling processing method.
[0002]
[Prior art]
In a conventional image scaling processing apparatus having a binarized image enlargement and reduction function, for example, as disclosed in JP-A-6-164896 or JP-A-6-253140, the reduction rate is reduced. While the thinning process is performed at an appropriate interval, the enlargement is performed by integer multiple enlargement, and then the thinning process according to the enlargement ratio is performed by the same process as the reduction. Thereby, an enlargement / reduction process at an arbitrary magnification is performed. In addition, when performing 4 times enlargement in the main scanning direction and the sub-scanning direction, the image data that has been once outputted twice is input again, and image data that is 4 times enlarged is obtained through the same circuit.
[0003]
[Problems to be solved by the invention]
However, in the above-described configuration of the related art, when the enlargement ratio is smaller than 2 times at the time of enlargement, a double enlargement image in which unevenness is reduced by smoothing processing (smoothing) is periodically thinned regardless of the image data. As a result, the final output image returns to irregularities.
[0006]
  The present invention has been made in view of such a point. First, a high speed is required for enlarging image data at an arbitrary magnification.InSecondly, it is possible to obtain a smooth image with less unevenness when enlarging the image data at an arbitrary magnification.wearAn object of the present invention is to provide an image scaling processing apparatus and an image scaling processing method.
[0007]
[Means for Solving the Problems]
The present invention has the following configuration in order to solve the above-described problems.
[0008]
  The invention related to the image scaling processing device according to claim 1, a pattern matching unit that compares a reference area including a target pixel in image data with a plurality of pixel arrangement patterns and determines a pixel arrangement pattern that matches the reference area; A storage unit configured to store in advance a plurality of pixel blocks configured by a plurality of pixels and having different pixel arrangements, and selecting a pixel block corresponding to a pixel arrangement pattern matching the reference area from the plurality of pixel blocks After the line density conversion corresponding to the pixel output unit, the position of the pixel after the line density conversion corresponding to the target pixel before the line density conversion according to the magnification ratio of the image, and the adjacent pixel adjacent to the target pixel before the line density conversion Depending on the difference between the pixel position ofNumber of pixelsIs selected from the pixel block selected by the pixel output unit and is output.
[0009]
  With this configuration, the pixel output unit selects a pixel block corresponding to the pixel arrangement pattern determined by the pattern matching unit from the plurality of pixel blocks stored in the storage unit, and the output pixel selection unit responds to the enlargement ratio. TheNumber of pixelsIs selected from the pixel block and output, the processing speed is increased and the circuit is simplified when the image data is enlarged at an arbitrary magnification.
[0012]
  Claim2The described invention is claimed.1In the invention of the image scaling processing apparatus described inThe output pixel selectorPixel output sectionChoiceIf the pixel block has an inverted pixel of the target pixel at the corner,Before line density conversionLocated on the opposite diagonal to the corner in the imageadjacentSee pixelIf all the referenced pixels are pixel data different from the pixel of interest, the pixel including the corner is selected and output from the pixel block, and if the referenced pixel includes the same pixel data as the pixel of interest, the pixel excluding the corner Select from the pixel block and outputThe structure characterized by this is taken.
[0013]
  With this configuration, the output pixel selection unit selects a smaller pixel from the enlarged and smoothed pixel block.Select and outputOn the occasionBefore line density conversionImageadjacentSince the pixels are referred to, the unevenness in the output image, particularly in the character portion, is reduced rather than simply performing periodic thinning.
[0014]
  The invention relating to the image scaling processing method according to claim 3 compares a reference area including the target pixel in the image data with a plurality of pixel arrangement patterns, determines a pixel arrangement pattern that matches the reference area, and includes a plurality of pixels. A pixel block corresponding to the pixel arrangement pattern that matches the reference area is selected from a plurality of pre-stored pixel blocks that are configured and have different pixel arrangements, and before the line density conversion according to the enlargement ratio of the image. According to the difference between the position of the pixel after linear density conversion corresponding to the target pixel and the position of the pixel after linear density conversion corresponding to the adjacent pixel adjacent to the target pixel before linear density conversionNumber of pixelsIs selected from the selected pixel block and output.
[0015]
  By this method, a plurality of pixel blocks are prepared in advance, a pixel block corresponding to a pixel arrangement pattern that matches the reference area is selected from the plurality of pixel blocks, and the image is enlarged according to the enlargement ratio of the image.Number of pixelsIs selected from the selected pixel block, the processing can be quickly performed when the image data is enlarged at an arbitrary magnification.
[0018]
  Claim4The described invention is claimed.3In the image scaling processing method described above, when the selected pixel block has an inverted pixel of the pixel of interest at the corner,Before line density conversionLocated on the opposite diagonal to the corner in the imageadjacentSee pixelIf all the referenced pixels are pixel data different from the pixel of interest, the pixel including the corner is selected and output from the pixel block, and if the referenced pixel includes the same pixel data as the pixel of interest, the pixel excluding the corner To select and output from a pixel blockTake.
[0019]
  thisMethodAllows small pixels from the pixel blockSelect to outputHowever,Before line density conversionImageadjacentSince the pixels are referred to, the unevenness in the output image, particularly in the character portion, is reduced rather than simply performing periodic thinning.
[0030]
DETAILED DESCRIPTION OF THE INVENTION
Embodiments 1 and 2 of the present invention will be described below with reference to the drawings.
[0031]
(Embodiment 1)
FIG. 1 is a block diagram showing an outline of an image scaling processing apparatus according to Embodiment 1 of the present invention.
[0032]
The image input circuit 1 stores binary image data input from a terminal a for a plurality of lines, and provides necessary image data to each circuit.
[0033]
The pattern match circuit 2 obtains 5 × 5 pixel image data (hereinafter referred to as a reference area) centered on the pixel of interest from the image input circuit 1, and this reference area is a pixel of 5 × 5 pixels defined in advance. Compare with the arrangement pattern and output data corresponding to the comparison result. More specifically, the pattern matching circuit 2 stores a plurality of pixel arrangement patterns and 2 × 2 pixels to be output from the 2 × 2 pixel output circuit 5 when the pixel of interest is doubled in each pixel arrangement pattern. Are stored in association with each other.
[0034]
The magnification calculation circuit 3 obtains the main scanning direction magnification inputted from the terminal b and the sub-scanning direction magnification inputted from the terminal c, calculates the address position of the output pixel, and whether or not the 4 × enlargement processing is necessary. Judgment is also made. Here, 4 times enlargement means enlarging at least one of the main scanning direction and the sub-scanning direction 4 times.
[0035]
The constituent pixel selection circuit 4 includes a 2 × 2 pixel output circuit 5, a 2 × 2 pixel storage unit 6, a quadruple pixel selection circuit 7 and a conversion table 8.
[0036]
The 2 × 2 pixel output circuit 5 selectively outputs 2 × 2 pixels stored in the 2 × 2 pixel storage unit 6 in accordance with the data output from the pattern matching circuit 2 or the data output from the quadruple pixel selection circuit 7. . As shown in FIG. 2, the 2 × 2 pixel storage unit 6 stores 14 2 × 2 pixel block (a) to (n) composed of the target pixel and its inverted pixel. In FIG. 2, white pixels indicate the same image data as the target pixel, and hatched pixels indicate pixel data different from the target pixel.
[0037]
The 4 × pixel selection circuit 7 receives 2 × 4 pixels, 4 × 2 pixels, or 4 × corresponding to the pixel block output by the 2 × 2 pixel output circuit 5 when the magnification calculation circuit 3 requests 4 × enlargement processing. Four pixels (hereinafter referred to as “four times pixels”) are selected according to the conversion table 8 with reference to the original image obtained from the image input circuit 1. Here, the quadruple pixel selection circuit 7 obtains pixel block type data, not pixel block pixel data itself. The 4 × pixel selection circuit 7 transmits a plurality of 2 × 2 pixel type data constituting the 4 × pixel to the 2 × 2 pixel output circuit 5.
[0038]
The conversion table 8 associates the type data of the pixel blocks constituting the quadruple pixel when the pixel blocks (a) to (n) are converted into the quadruple pixel.
[0039]
The output pixel selection circuit 9 outputs necessary pixels according to the result of the address calculation in the magnification calculation circuit 3 and the result of the necessity determination of the 4 × enlargement process. Specifically, when 1 × 1 pixel is required, the image data of the target pixel is received from the image input circuit 1 and output as it is. When 2 × 1 pixels or 1 × 2 pixels are required, 2 × 1 pixels or 1 × 2 pixels are cut out from the pixel block and output. When 2 × 2 pixels are required, the output from the 2 × 2 pixel output circuit 5 is output as it is. Further, when a 4 × pixel is required, a plurality of pixel blocks output from the 2 × 2 pixel output circuit 5 are output according to the 4 × pixel selection circuit 7.
Hereinafter, the operation of the image scaling processing apparatus having the above-described configuration will be described with reference to FIG. FIG. 3 is an operation flowchart of the image scaling processing apparatus according to the first embodiment.
[0040]
In step (hereinafter referred to as ST) 301, the magnification calculation circuit 3 determines an address position based on the main scanning direction magnification and the sub scanning direction magnification. In determining the address position, first, the address (hereinafter referred to as a core address) of a pixel where the center point of the target pixel of the original image is placed on the coordinates of the output image after the line density conversion is calculated. Data of 2 × 2 pixels obtained by enlarging and smoothing the pixel of interest is written at an address of 2 × 2 pixels including the core address.
[0041]
However, depending on the magnification, there may be a case where there is no empty address for 2 × 2 pixels. In this case, it is necessary to assign addresses for 1 × 1 pixel, 2 × 1 pixel, or 1 × 2 pixel. The allocation is determined by determining the difference α between the core address of the pixel on one line of the target pixel and the core address of the target pixel in the original image, and the difference β between the core address of the previous pixel and the core address of the target pixel. Are respectively assigned, and an address corresponding to α × β pixels is assigned to the target pixel.
[0042]
FIG. 4 is a schematic diagram showing the coordinates of the output image when the original pixels A to D are enlarged 1.5 times. In FIG. 4, the thick line indicates the matrix of the original image, and the thin line indicates the matrix of the output image after the line density conversion. In FIG. 4, when one side l of one pixel of the output image is 100H (hexa), one side L of one pixel of the original pixel is 180H. On the coordinates of the output image, the center point OA of the pixel A of the original image is placed at the address (x, y) of the output image. Therefore, the core address of the pixel A is (x, y). The core address of the pixel on one line of the pixel A is (x, y−2), and the difference α is 2. On the other hand, the core address of the pixel one pixel before the pixel A is (x−2, y), and the difference β is 2. Accordingly, an address for 2 × 2 pixels is assigned to the pixel A.
[0043]
Further, regarding the pixel B, the core address of the pixel B is (x + 1, y). The core address of the pixel on one line of the pixel B is (x + 1, y−2), and the difference α is 2. On the other hand, the core address of the pixel A one pixel before the pixel B is (x, y), and the difference β is 1. Therefore, an address for 2 × 1 pixels is assigned to the pixel A. Similarly, an address for 1 × 2 pixels is assigned to the pixel C, and an address for 1 × 1 pixel is assigned to the pixel D.
[0044]
FIG. 5 is a schematic diagram conceptually showing the process of the address calculation process. The original pixels A to D are converted into 2 × 2 pixel blocks by enlargement and smoothing. The converted 2 × 2 pixels are written at addresses determined by address calculation and assignment.
[0045]
In ST <b> 302, a reference area of 5 × 5 pixels centered on the target pixel is input to the pattern matching circuit 2 from the image input unit 1.
[0046]
In ST303, the reference area is compared with a predefined pixel arrangement pattern of 5 × 5 pixels, and pattern matching processing is performed (ST302). That is, the pattern matching circuit 2 determines a pixel arrangement pattern that matches the reference area, and outputs pixel block type data associated with the pixel arrangement pattern.
[0047]
In ST304, the 2 × 2 pixel output circuit 5 selects the corresponding one of the 14 types of pixel blocks (a) to (n) shown in FIG. 2 according to the pixel block type data output from the pattern match circuit 2. And output.
[0048]
In ST305, the output pixel selection circuit 9 determines whether the required output pixel is a quadruple pixel as a result of the address position determination. If the output pixel is a 4 × pixel (Yes), it is necessary for the 4 × image selection circuit 7 to obtain a 4 × pixel based on the pixel block output from the 2 × 2 pixel output circuit 5 in ST306. A correct pixel block is selected. For example, when the output of the 2 × 2 pixel output circuit 5 is 2 × 2 pixels (a) at a magnification of 2.0 × in the main scanning direction and 4.0 × in the sub scanning direction, the original image data is referred to. Above, the 2 × 2 pixels (h) and (n) or the combination of (a) and (n) shown in FIG. 2 are selected. When the output of the 2 × 2 pixel output circuit 5 is 2 × 2 pixels (g), a combination of 2 × 2 pixels (c) and (k) or (b) and (j) is selected.
[0049]
In ST307, a combination of pixel blocks corresponding to the pixel block type data output by the quadruple pixel selection circuit 7 is output.
[0050]
On the other hand, if it is determined in ST305 that the required output pixel is not a quadruple pixel (No) as a result of address position determination, it is determined in ST308 whether the required output pixel is a 1 × 2 pixel or a 2 × 1 pixel. To do. When the output pixel is 1 × 2 pixel or 2 × 1 pixel (Yes), in ST309, the output pixel selection circuit 9 outputs 1 × 2 pixel or 2 × from the pixel block output by the 2 × 2 pixel output circuit 5 One pixel is selected. When the 2 × 1 pixel or 2 × 1 pixel is cut out, if one place in the pixel block has image data different from the target pixel, the peripheral pixels are referred to.
[0051]
FIG. 6 is a schematic diagram illustrating a 1 × 2 pixel or 2 × 1 pixel cutout procedure by the output pixel selection circuit 9 in the image scaling processing device according to the first embodiment. As shown in FIG. 6, the output pixel selection circuit 9 obtains a reference area 603 of 3 × 3 pixels from the image input unit 1 around the target pixel 602 that is the basis of the pixel block 601. When the pixel block 601 has pixel data different from the pixel of interest (hereinafter referred to as inverted pixel data) in the upper right corner or lower left corner, in other words, pixel data whose image data has been changed (601a, 601b), the inverted pixel data in the reference area 603 The 1 × 2 pixel 608 or 2 × 1 pixel 609 cut out from the pixel blocks 601a and 601b is determined with reference to the reference pixels 604 and 607 on the opposite diagonal line and adjacent to the target pixel 602.
[0052]
Similarly, when the pixel block 601 has inverted pixel data at the upper left corner or the lower right corner (601c, 601d), reference pixels 605, 606 adjacent to the target pixel 602 on the opposite diagonal line to the inverted pixel data in the reference area 603 are displayed. With reference to this, the 1 × 2 pixel 608 or the 2 × 1 pixel 609 cut out from the pixel blocks 601c and 601d is determined.
[0053]
For example, as shown in FIG. 7, when the target pixel 701 is a black pixel (B) and the enlarged and smoothed pixel block 702 has a white pixel (W) 703 in the upper left corner, 2 × 1 pixels are cut out Will be described as an example. When the two reference pixels 704 and 705 that are on the opposite diagonal line to the white pixel 703 and are adjacent to the target pixel 701 are both white pixels, the 2 × 1 pixel 706 on the left side is cut out from the pixel block 702.
[0054]
On the other hand, when one of the two reference pixels 704 and 705 that are on the opposite diagonal line to the white pixel 703 and adjacent to the target pixel 701 is a black pixel, the left 2 × 1 pixel 707 is cut out from the pixel block 702. .
[0055]
If it is determined in ST308 that the required output pixel is not 1 × 2 pixel or 2 × 1 pixel (No) as a result of address position determination, it is determined in ST310 whether the output image is 1 × 1 pixel. When the output image is 1 × 1 pixel (Yes), in ST311, the output pixel selection circuit 9 obtains the same pixel data as the target pixel from the image input unit 1 and outputs it.
[0056]
If it is determined in ST310 that the required output pixel is not 1 × 1 pixel (No) as a result of the address position determination, in ST312, the output pixel selection circuit 9 uses the pixel block from the 2 × 2 pixel output circuit 5 as it is. Output.
[0057]
As described above, according to the image scaling processing device according to the first embodiment, in ST303 and ST304, the 2 × 2 pixel output circuit 5 includes a plurality of pixels stored in the 2 × 2 pixel storage unit 6. Since the pixel block corresponding to the pixel arrangement pattern determined by the pattern matching circuit 2 is selected and output from the pixel blocks, compared with the case of smoothing 2 × 2 pixels obtained by doubling the target pixel The processing can be speeded up and the circuit can be simplified.
[0058]
In the above ST306 and ST307, when the pixel block after smoothing output from the 2 × 2 pixel output circuit 5 is converted to 4 × pixels, it is not necessary to re-input the 4 × enlarged image data as in the prior art. A page memory for one page for intermediate processing is not required. In addition, since a 4 × pixel is assembled using a pixel block prepared in advance, the processing speed is increased and the circuit configuration is increased as compared with the conventional case where a 2 × pixel is further doubled to generate a 4 × pixel. It can be simplified.
[0059]
In ST309, when cutting out 1 × 2 pixels and 2 × 1 pixels from the enlarged and smoothed 2 × 2 pixels, the peripheral pixels of the original image are referred to. Therefore, rather than simply performing periodic thinning out, Unevenness in the output image, particularly the character portion can be reduced.
[0060]
(Embodiment 2)
Hereinafter, an image scaling processing device according to Embodiment 2 of the present invention will be described with reference to the drawings.
[0061]
FIG. 8 is an overall block diagram of the image scaling processing device according to the second embodiment.
[0062]
The image input unit 81 stores binary image data input from the terminal a for a plurality of lines and provides necessary image data to each circuit.
[0063]
The address calculation circuit 82 obtains the main scanning direction magnification input from the terminal b and the sub-scanning direction magnification input from the terminal c, and calculates the address position of the output pixel.
[0064]
  The pixel position determination circuit 83 obtains the result of the address calculation circuit 82 and reduces the pixel group to be reduced in the pixel block that becomes one pixel after reduction.(Multiple pixels that become one pixel when the original image is reduced)The position of the target pixel in is determined. The pixel position determination circuit 83 sends the determined position information of the target pixel to the thin line determination circuit 84 and the thinning processing circuit 85.
[0065]
The thin line determination circuit 84 is a circuit that determines whether or not the target pixel is included in the pixels forming the thin line. A thin line refers to a line having a width of 1 to 4 pixels, for example. Specifically, the thin line determination circuit 84 obtains an 8 × 8 pixel reference area including the target pixel from the image input unit 81, compares the reference area with a previously prepared 8 × 8 pixel pixel arrangement pattern, When the reference area matches the pixel arrangement pattern, it is determined that the target pixel forms a thin line. The thin line determination circuit 84 changes the pixel arrangement pattern according to the position information of the target pixel obtained by the pixel position determination circuit 83. Therefore, the pixel position is taken into consideration in the fine line determination. In other words, the fine line determination circuit 84 performs fine line determination according to the image position. The fine line determination circuit 84 performs fine line determination for each pixel of interest, and sends the result to the thinning processing circuit 85 and the storage unit 86.
[0066]
The thinning processing circuit 85 is a circuit that determines whether or not the target pixel should be thinned out. In the determination, the thinning processing circuit 85 refers to the pixel position of the target pixel obtained by the pixel position determination circuit 83 and the thin line information of the target pixel obtained by the thin line determination circuit 84. Further, the thinning processing circuit 85 receives, from the storage unit 86, pixel data and thin line information of a pixel determined one line before in the output image (hereinafter referred to as a previous line determined pixel), and an output pixel at the time of the target pixel processing. The pixel data and thin line information of the pixel one pixel before (hereinafter referred to as one pixel previous candidate pixel) are referred to. The thinning processing circuit 85 also refers to pixel data and thin line information of pixels of the reduction target pixel group being processed (hereinafter referred to as reduction target pixel group candidate pixels). The thinning-out processing circuit 85 can also refer to the pattern matching result obtained by comparing the 8 × 8 pixel reference area including the target pixel obtained from the image input unit 81 and the pixel arrangement pattern.
[0067]
The storage unit 86 is a memory that stores image data and thin line information of the previous line determination pixel, the previous pixel candidate pixel, and the reduction target pixel group candidate pixel, respectively.
[0068]
Hereinafter, the operation of the image scaling processing apparatus having the above configuration will be described with reference to an operation flowchart. FIG. 9 is an operation flowchart of the image scaling processing device according to the second embodiment.
[0069]
In ST901, the address calculation circuit 82 calculates the address position of the target pixel based on the magnification in the main scanning direction and the sub-scanning direction.
[0070]
In ST902, the pixel position determination circuit 83 determines which position in the reduction target pixel group the target pixel corresponds to based on the calculated address position.
[0071]
In ST903, the fine line determination circuit 84 determines whether or not it is included in the pixels constituting the fine line. Hereinafter, the procedure for determining the thin line will be described in detail. The thin line determination circuit 84 obtains an 8 × 8 pixel reference area including the target pixel from the image input unit 81. This reference area is compared with a pixel arrangement pattern prepared in advance, and when the reference area matches the pixel arrangement pattern, it is determined that the pixel of interest is included in the pixels constituting the thin line. In this determination, the thin line determination circuit 84 obtains information on the position in the reduction target pixel group determined by the pixel position determination circuit 83 (hereinafter referred to as a pixel position) and information on the previous line determined pixel or one previous pixel candidate pixel. Take into consideration.
[0072]
10A and 10B are explanatory diagrams showing pixel arrangement patterns used for fine line determination by the fine line determination circuit 84. FIG.
[0073]
First, reference is made to FIG. The thin line determination circuit 84 performs pattern matching using the pixel arrangement patterns 103 and 112. In the pixel arrangement pattern 103, 105 indicates a target pixel, 106 indicates a black pixel, 107 indicates a white pixel, and 108 indicates that any one is a white pixel. As a result, if the reference area including the target pixel matches either one of the pixel arrangement patterns 103 or 112 as a result of pattern matching, the thin line determination circuit 84 determines the target pixel as a white thin line.
[0074]
In addition, referring to FIG. 10B, a case of referring to the previous pixel candidate pixel will be described. In the figure, reference numeral 101 denotes a determination condition. In this case, the pixel position of the target pixel is one of coordinates (0, 1), (0, 2), (0, 3) in the 4 × 4 pixel reduction target pixel group 102, and 1 When the pre-pixel candidate pixel is a white pixel (W) and the thin line information is a white thin line, the thin line determination circuit 84 performs pattern matching using the pixel arrangement pattern 104. As a result of pattern matching, when the reference area including the target pixel matches the pixel arrangement pattern 104, the thin line determination circuit 84 determines the target pixel as a white thin line candidate.
[0075]
Next, with reference to FIG. 10C, a case where the previous line determined pixel is referred to will be described. In the figure, 109 indicates a determination condition. In this case, the pixel position of the target pixel is one of the coordinates (1, 0), (2, 0), (3, 0) in the 4 × 4 pixel reduction target pixel group 110, and the previous When the line determination pixel is a white pixel (W), the thin line determination circuit 84 performs pattern matching using the pixel arrangement pattern 113. As a result of pattern matching, when the reference area including the target pixel matches the pixel arrangement pattern 113, the thin line determination circuit 84 determines the target pixel as a white thin line candidate.
[0076]
Further, in the case of FIGS. 10B and 10C, the thin line determination circuit 84 sets the thin line information of the target pixel as a white thin line candidate. This is to prevent irregularities and discontinuities at the joints of the thin lines when priority is given to black pixels as the reduction pixels in the thinning process described later when there are a plurality of reduction target pixel groups on the thin line width.
[0077]
In the second embodiment, the black thin line is represented by 1, the white thin line is represented by 4, the white thin line candidate is represented by 5, and no thin line is represented by 0. The thin line determination circuit 84 transmits these determination results to the thinning processing circuit 85.
[0078]
In the above thin line determination, 8 × 8 pixels are used as the reference area, and the coordinates of the pixel of interest are (4, 4). Therefore, when determining a thin line with a width of 4 pixels, it must be determined at the lower end or the right end of the thin line. Absent. However, it is possible to make a fine line determination with all the pixels constituting the thin line. However, in this case, more pixel arrangement patterns are required.
[0079]
In ST904, the thinning processing circuit 85 performs thinning processing on the target pixel. In this thinning-out process, based on at least two of the following information, whether or not the pixel of interest is thinned out, in other words, the data of the candidate pixel of the same reduction target pixel group up to that point is overwritten with the data of the pixel of interest. Whether or not is comprehensively determined.
(i) Pixel data of the pixel of interest being processed (hereinafter referred to as the pixel being processed): d [3] [3]
(ii) Thin line information of pixel being processed: wtpt
(iii) Pixel data of candidate pixels of the same reduction target pixel group (hereinafter referred to as pixel group candidate pixels): xpt [0]
(iv) Pixel group candidate pixel fine line information: xpt [3]
(v) Pixel data of the previous line determined pixel: adkp
(vi) Pixel data of the previous pixel candidate: adxt
(vii) Output address in the x direction and y direction of the pixel being processed: xt0 [0], yt0 [0]
(viii) x-direction output address of the pixel right next to the pixel being processed: nextx
(ix) Y-direction output address of the pixel below the pixel being processed: nexty
(x) Processing result up to previous line in processing of reduced pixel group: ad [yt0 [0]] [xt0 [0]]
Further, in a specific case, the thinning determination is performed by pattern matching with pixel arrangement data prepared in advance.
[0080]
Hereinafter, the thinning process will be described in more detail.
[0081]
First, the thinning-out process is roughly divided according to the direction of overwriting.
[0082]
(I) Processing related to overwriting in the x direction
Overwriting in the x direction refers to processing in the reduction in the X direction.
[0083]
When the pixel data of the pixel group candidate pixel matches the pixel data of the pixel being processed, the pixel data is not changed. The fine line information is overwritten in the priority order of black fine line (1), white fine line (4), white fine line candidate (5), and no fine line (0).
[0084]
If the pixel data of the pixel group candidate pixel and the pixel data of the pixel being processed do not match, a determination is made according to the tables shown in FIGS. 11 (A) and 11 (B). That is, the table shown in FIG. 11A shows a criterion for determination when the pixel data of the pixel being processed is a white pixel (W) and the pixel data of the pixel group candidate pixel is a black pixel (B). Here, the column indicates the type (0, 4 or 5) of the thin line information (wtpt) of the pixel being processed, and the row indicates the type (0, 1, 4, or 4) of the thin line information (xpt [3]) of the pixel group candidate pixel. 5). In the table of FIG. 11A, B indicates that black pixels are utilized, that is, overwriting is not performed. W indicates a white pixel, that is, overwriting is performed. Also,*¹Indicates that overwriting is not performed when the pixel data (adxt) of the previous pixel candidate pixel is a white pixel, and overwriting is performed when the pixel data (adxt) of the previous pixel candidate pixel is a black pixel. Also,*²When the x-direction output address (xt0 [0]) of the pixel being processed does not match the x-direction output address (nextx) of the next pixel being processed, that is, the pixel position in the reduction target group is at the right end. In some cases, this indicates overwriting. Further,-indicates that the data does not exist.
[0085]
On the other hand, the table shown in FIG. 11B shows criteria for determination when the pixel data of the pixel being processed is a black pixel (B) and the pixel data of the pixel group candidate pixel is a white pixel (W). In the table of FIG. 11B, B indicates black pixels, that is, overwriting is performed. W indicates that white pixels are utilized, that is, overwriting is not performed. Also,*¹Indicates that overwriting is performed when the pixel data (adxt) of the previous pixel candidate pixel is a white pixel, and overwriting is not performed when the pixel data (adxt) of the previous line determined pixel is a black pixel. Further,-indicates that the data does not exist.
[0086]
In addition, the following special processing is performed in order to reduce white pixels that are continuous for 5 pixels or more so that they are not crushed with black.
[0087]
The special processing is performed when the following conditions are met, as shown in FIG.
(1) The x-direction address (xcnt) of the pixel position in the reduction target pixel group of the pixel being processed is 2 or 3.
(2) The x-direction output address (xt0 [0]) of the pixel being processed does not match the x-direction output address (nextx) of the next pixel after the pixel being processed.
(3) The pixel data (adxt) of the previous candidate pixel is a black pixel,
(4) The pixel data (xpt [0]) of the pixel group candidate pixel is a white pixel,
(5) The fine line information (xpt [3]) of the pixel group candidate pixel is no fine line (0), and
(6) The reference pixel matches the pixel arrangement pattern shown in FIG.
[0088]
In this case, the determination is made according to the table shown in FIG. That is, this table shows the criteria for determination when the pixel data of the pixel being processed is a black pixel (B) and the pixel data of the pixel group candidate pixel is a white pixel (W). Here, B indicates a black pixel, that is, overwriting is performed. W indicates that white pixels are utilized, that is, overwriting is not performed. Also,*¹Indicates that overwriting is performed when the pixel data (adxt) of the previous line determined pixel is a white pixel, and overwriting is not performed when the pixel data (adxt) of the previous pixel candidate pixel is a black pixel. Further,-indicates that the data does not exist.
[0089]
The thin line information is also overwritten when overwriting is performed in accordance with the determination described above.
[0090]
(II) Processing related to overwriting in the y direction
Overwriting in the y direction refers to processing in the reduction in the y direction.
[0091]
When the pixel data of the pixel group candidate pixel matches the pixel data of the pixel being processed, the pixel data is not changed as in (I). The fine line information is overwritten in the priority order of black fine line (1), white fine line (4), white fine line candidate (5), and no fine line (0).
[0092]
When the pixel data of the pixel group candidate pixel and the pixel data of the pixel being processed do not match, determination is performed according to the tables shown in FIGS. 13 (A) and 13 (B). That is, the table shown in FIG. 13A shows the determination criteria when the pixel data of the pixel being processed is a white pixel (W) and the pixel data of the pixel group candidate pixel is a black pixel (B). Here, the column indicates the type (0, 4 or 5) of the thin line information (wtpt) of the pixel being processed, and the row indicates the type (0, 1, 4, or 4) of the thin line information (xpt [3]) of the pixel group candidate pixel. 5). In the table of FIG. 13A, B indicates that black pixels are utilized, that is, overwriting is not performed. W indicates a white pixel, that is, overwriting is performed. Also,*^ThreeIndicates that overwriting is not performed when the pixel data (adkp) of the previous line determined pixel is a white pixel, and overwriting is performed when the pixel data (adkp) of the previous line determined pixel is a black pixel. Also,*^FourWhen the y-direction output address (yt0 [0]) of the pixel being processed does not match the y-direction output address (nexty) of the pixel below the pixel being processed, that is, the pixel position in the reduction target group is at the lower end. In some cases, this indicates overwriting. Further,-indicates that the data does not exist.
[0093]
On the other hand, the table shown in FIG. 13B shows criteria for determination when the pixel data of the pixel being processed is a black pixel (B) and the pixel data of the pixel group candidate pixel is a white pixel (W). In the table of FIG. 13B, B indicates black pixels, that is, overwriting is performed. W indicates that white pixels are utilized, that is, overwriting is not performed. Also,*^ThreeIndicates that overwriting is performed when the pixel data (adkp) of the previous line determined pixel is a white pixel, and overwriting is not performed when the pixel data (adkp) of the previous line determined pixel is a black pixel. Further,-indicates that the data does not exist.
[0094]
In addition, the following special processing is performed in order to reduce white pixels that are continuous for 5 pixels or more so that they are not crushed with black.
[0095]
The special processing is performed when the following conditions are satisfied, as shown in FIG.
(1) The y-direction address (ycnt) of the pixel position in the reduction target pixel group of the pixel being processed is 2 or 3.
(2) The y-direction output address (yt0 [0]) of the pixel being processed does not match the y-direction output address (nexty) of the pixel below the pixel being processed
(3) The pixel data (adkp) of the determined pixel one line before is a black pixel,
(4) The processing result (ad [yt0 [0]] [xt0 [0]]) up to the previous line in the processing of the reduced pixel group is a white pixel (W),
(5) The pixel data (xpt [0]) of the pixel group candidate pixel is a white pixel,
(6) The thin line information (xpt [3]) of the pixel group candidate pixel is no thin line (0), and
(7) The reference pixel matches the pixel arrangement pattern shown in FIG.
[0096]
In this case, the determination is made according to the table shown in FIG. That is, this table shows the criteria for determination when the pixel data of the pixel being processed is a black pixel (B) and the pixel data of the pixel group candidate pixel is a white pixel (W). Here, B indicates a black pixel, that is, overwriting is performed. W indicates that white pixels are utilized, that is, overwriting is not performed. Also,*^FiveIndicates that overwriting is performed when the pixel data (adkp) of the previous line determined pixel is a white pixel, and overwriting is not performed when the pixel data (adkp) of the previous line determined pixel is a black pixel. Further,-indicates that the data does not exist.
[0097]
The thin line information is also overwritten when overwriting is performed in accordance with the determination described above.
[0098]
(III) Processing related to overwriting in the x and y directions
Overwriting in the x and y directions refers to processing in the reduction in the x and y directions.
[0099]
When the pixel data of the pixel group candidate pixel matches the pixel data of the pixel being processed, the pixel data is not changed, as in (I) and (II). The fine line information is overwritten in the priority order of black fine line (1), white fine line (4), white fine line candidate (5), and no fine line (0).
[0100]
If the pixel data of the pixel group candidate pixel and the pixel data of the pixel being processed do not match, determination is performed according to the tables shown in FIGS. 15 (A) and 15 (B). That is, the table shown in FIG. 15A shows the determination criteria when the pixel data of the pixel being processed is a white pixel (W) and the pixel data of the pixel group candidate pixel is a black pixel (B). Here, the column indicates the type (0, 4 or 5) of the thin line information (wtpt) of the pixel being processed, and the row indicates the type (0, 1, 4, or 4) of the thin line information (xpt [3]) of the pixel group candidate pixel. 5). In the table of FIG. 15A, B indicates that black pixels are utilized, that is, overwriting is not performed. W indicates a white pixel, that is, overwriting is performed. Also,*^FiveIndicates that overwriting is performed when the pixel data (adxt) of the previous pixel candidate pixel is a white pixel, and overwriting is not performed when the pixel data (adxt) of the previous pixel candidate pixel is a black pixel. Also,*⁶Indicates that the y-direction output address (yt0 [0]) of the pixel being processed does not match the y-direction output address (nexty) of the pixel below the pixel being processed, or the x-direction output address (xt0 [ 0]) indicates that overwriting is performed when the x-direction output address (nextx) of the rightmost pixel of the pixel being processed does not match, that is, when the pixel position in the reduction target group is the lower end or the right end. ing. Further,-indicates that the data does not exist.
[0101]
On the other hand, the table shown in FIG. 15B shows criteria for determination when the pixel data of the pixel being processed is a black pixel (B) and the pixel data of the pixel group candidate pixel is a white pixel (W). In the table of FIG. 15B, B indicates black pixels, that is, overwriting is performed. W indicates that white pixels are utilized, that is, overwriting is not performed. Also,*^FiveIndicates that overwriting is performed when the pixel data (adxt) of the previous pixel candidate pixel is a white pixel, and overwriting is not performed when the pixel data (adxt) of the previous pixel candidate pixel is a black pixel. Further,-indicates that the data does not exist.
[0102]
In addition, the following special processing is performed in order to reduce white pixels that are continuous for five or more pixels so that they are not crushed with black.
[0103]
The special processing is performed when the following conditions are satisfied as shown in FIG.
・ First condition
(1) The y-direction address (ycnt) of the pixel position in the reduction target pixel group of the pixel being processed is 2 or 3.
(2) The y-direction output address (yt0 [0]) of the pixel being processed does not match the y-direction output address (nexty) of the pixel below the pixel being processed
(3) The pixel data (adkp) of the determined pixel one line before is a black pixel,
(4) The processing result (ad [yt0 [0]] [xt0 [0]]) up to the previous line in the processing of the reduced pixel group is a white pixel (W),
(5) The pixel data (xpt [0]) of the pixel group candidate pixel is a white pixel,
(6) The thin line information (xpt [3]) of the pixel group candidate pixel is no thin line (0), and
(7) The reference pixel matches the pixel arrangement pattern 1601 shown in FIG. 16 by pattern matching.
[0104]
・ Second condition
(1) The x-direction address (xcnt) of the pixel position in the reduction target pixel group of the pixel being processed is 2 or 3.
(2) The x-direction output address (xt0 [0]) of the pixel being processed does not match the x-direction output address (nextx) of the pixel below the pixel being processed
(3) The pixel information (adxt) of the previous pixel candidate pixel is a black pixel (B),
(4) The pixel data (xpt [0]) of the pixel group candidate pixel is a white pixel,
(5) The fine line information (xpt [3]) of the pixel group candidate pixel is no fine line (0), and
(6) The reference pixel matches the pixel arrangement pattern 1602 shown in FIG. 16 by pattern matching.
[0105]
When the first condition or the second condition is satisfied, the determination is made according to the table shown in FIG. That is, this table shows the criteria for determination when the pixel data of the pixel being processed is a black pixel (B) and the pixel data of the pixel group candidate pixel is a white pixel (W). Here, B represents a black pixel, that is, overwriting is performed. W indicates that white pixels are utilized, that is, overwriting is not performed. Also,*⁷Indicates that overwriting is performed when the pixel data (adxt) of the previous pixel candidate pixel is a white pixel, and overwriting is not performed when the pixel data (adxt) of the previous pixel candidate pixel is a black pixel. Further,-indicates that the data does not exist.
[0106]
The thin line information is also overwritten when overwriting is performed in accordance with the determination described above.
[0107]
The thinning-out process is performed according to the results of the determinations (I) to (III) described above. The above thinning process is performed for each line along the main scanning direction, and a reduced image is output from the thinning processing circuit 85 shown in FIG.
[0108]
As described above, according to the image scaling processing device according to the second embodiment, the thin line determination circuit 84 obtains the thin line information of the pixel of interest, and the thinning processing circuit 85 refers to the thin line information for attention. It is determined whether or not to thin out pixels. This can prevent the thin line from disappearing in the reduced image.
[0109]
Further, the thinning-out processing circuit 85 at least pixel data or thin line information of the one-line-before determined pixel, pixel data or thin-line information of the one-pixel-before candidate pixel, or pixel data or thin-line of the candidate pixel up to one line before the reduction target pixel group Since it is determined whether or not the target pixel is thinned out by referring to the information, it is possible to more reliably prevent the thin line from disappearing in the reduced image in consideration of the peripheral pixels of the reduced pixel.
[0110]
In addition, the pixel position in the reduction target pixel group of the pixel being processed, the pixel data or thin line information of the candidate pixel of the reduction target pixel group that becomes one pixel after reduction, or the result of pattern matching is added as a condition, and attention is paid. By determining whether or not to thin out pixels, it is possible to prevent white pixels that are continuous for five or more pixels from being reduced and crushed with black, and more reliably to prevent the thin line from disappearing in the reduced image.
[0111]
Further, since the fine line having a width of 1 to 4 pixels is recognized in the fine line determination, the reduction process of 0.25 to 1.0 can be handled.
The pixel arrangement pattern for pattern matching used in the first and second embodiments is only part of what is actually used, and is merely an example, and various pixel arrangement patterns are used according to the purpose. can do.
[0112]
【The invention's effect】
  As described above, according to the present invention, first, a high speed is required for enlarging image data at an arbitrary magnification.InIt can be carried out. Secondly, a smooth image with little unevenness can be obtained when the image data is enlarged at an arbitrary magnification..
[Brief description of the drawings]
FIG. 1 is a block diagram showing an outline of an image scaling processing apparatus according to Embodiment 1 of the present invention.
FIG. 2 is a diagram showing a plurality of 2 × 2 pixels included in the image scaling processing device according to the first embodiment.
FIG. 3 is an operation flowchart of the image scaling processing device according to the first embodiment;
FIG. 4 is a schematic diagram showing coordinates of an output image when the original pixels A to D are enlarged 1.5 times in the first embodiment.
FIG. 5 is a schematic diagram conceptually showing a process of address calculation processing in the first embodiment.
FIG. 6 is a schematic diagram showing a selection procedure of 1 × 2 pixels or 2 × 1 pixels by an output pixel selection circuit in the image scaling processing device according to the first embodiment.
7 is a schematic diagram exemplifying a case where 2 × 1 pixels are selectively output from 2 × 2 pixels enlarged and smoothed in the first embodiment. FIG.
FIG. 8 is an overall block diagram of an image scaling processing apparatus according to Embodiment 2 of the present invention.
FIG. 9 is an operation flowchart of the image scaling processing device according to the second embodiment.
FIGS. 10A to 10C are explanatory diagrams showing pixel arrangement patterns used for fine line determination by the fine line determination circuit of the image scaling processing device according to the second embodiment.
FIGS. 11A and 11B are explanatory diagrams showing a table of determination conditions of a thinning-out processing circuit of the image scaling processing device according to the second embodiment; FIGS.
FIGS. 12A to 12C are explanatory diagrams illustrating determination conditions of a thinning processing circuit of the image scaling processing device according to the second embodiment.
FIGS. 13A and 13B are explanatory diagrams showing a table of determination conditions of the thinning-out processing circuit of the image scaling processing device according to the second embodiment. FIGS.
FIGS. 14A to 14C are explanatory diagrams illustrating determination conditions of a thinning processing circuit of the image scaling processing device according to the second embodiment.
FIGS. 15A and 15B are explanatory diagrams showing a table of determination conditions of the thinning processing circuit of the image scaling processing device according to the second embodiment; FIGS.
FIG. 16 is an explanatory diagram showing determination conditions of the thinning processing circuit of the image scaling processing device according to the second embodiment;
FIG. 17 is an explanatory diagram illustrating a determination condition table of a thinning-out processing circuit according to the second embodiment.
[Explanation of symbols]
1 Image input circuit
2 Pattern match circuit
3 Magnification calculation circuit
4. Component pixel selection circuit
5 2 × 2 pixel output circuit
6 2 × 2 pixel storage
7 4x pixel selection arithmetic circuit
8 Conversion table
9 Output pixel selection circuit
81 Image input circuit
82 Address calculation circuit
83 Pixel position determination circuit
84 Fine line determination circuit
85 Thinning processing circuit

Claims (4)

A pattern matching unit that compares a reference area including a target pixel in image data with a plurality of pixel arrangement patterns and determines a pixel arrangement pattern that matches the reference area, and a plurality of pixels that are different in arrangement of the pixels from each other. A pixel unit that stores in advance a pixel block, a pixel output unit that selects a pixel block corresponding to a pixel arrangement pattern that matches the reference area from the plurality of pixel blocks, and a line density that corresponds to an image enlargement ratio The number of pixels corresponding to the difference between the position of the pixel after linear density conversion corresponding to the target pixel before conversion and the position of the pixel after linear density conversion corresponding to the adjacent pixel adjacent to the target pixel before linear density conversion An image scaling processing apparatus comprising: an output pixel selection unit that selects and outputs a pixel block selected by the pixel output unit.   When the pixel block selected by the pixel output unit has an inverted pixel of the target pixel at a corner, the output pixel selection unit refers to an adjacent pixel located on a diagonal opposite to the corner in the image before the line density conversion If all the referenced pixels are pixel data different from the target pixel, the pixel including the corner is selected from the pixel block and output, and if the referenced pixel includes the same pixel data as the target pixel, the corner is 2. The image scaling processing apparatus according to claim 1, wherein a pixel other than the pixel block is selected and output. A reference area including the target pixel in the image data is compared with a plurality of pixel arrangement patterns, a pixel arrangement pattern matching the reference area is determined, and a plurality of pre-stored plural pixels configured by a plurality of pixels and having different pixel arrangements from each other The pixel block corresponding to the pixel arrangement pattern that matches the reference area is selected from among the pixel blocks, and the position of the pixel after the line density conversion corresponding to the target pixel before the line density conversion according to the magnification ratio of the image, and An image characterized by selecting and outputting a number of pixels from a selected pixel block according to a difference from a position of a pixel after linear density conversion corresponding to an adjacent pixel adjacent to a target pixel before linear density conversion. Scaling method.   If the selected pixel block has an inverted pixel of the target pixel at the corner, all the referenced pixels are different from the target pixel with reference to the adjacent pixel located on the opposite diagonal line to the corner in the image before the line density conversion When pixel data is selected, the pixel including the corner is selected from the pixel block and output. When the referenced pixel includes the same pixel data as the pixel of interest, the pixel other than the corner is selected and output from the pixel block. The image scaling processing method according to claim 1.

Images