JP4055752B2 - Arbiter, arbitration method thereof, and switch device - Google Patents

Description

  The present invention relates to an arbiter, an arbitration method thereof, and a switch device, and more particularly to an arbiter, an arbitration method thereof, and a switch device capable of mixing unicast packets and multicast packets.

  An example of a conventional multicast packet control method is described in the following patent document.

  In Patent Document 1, a multicast buffer capable of newly storing a maximum length packet is prepared in the exchange switch. By using this multicast buffer, when performing multicasting in a multistage network using Wormhole routing, if a packet cannot be output to one or more ports in a certain switch, the packet is transmitted to the port that can output it. At the same time, packet data is stored in the multicast buffer. Thereafter, when a port that could not be output becomes ready for output, data is extracted from this multicast buffer and transmitted.

  In Patent Document 2, if the address filter is a unicast packet, only the packet addressed to the output port corresponding to itself is taken in, and the multicast address filter takes in only the multicast packet. When receiving an output permission from the output arbitration unit, the unicast output buffer sends packets to the corresponding OR circuit in the accumulated order and outputs them to the output port. The multicast output buffer outputs the multicast output information from the bitmap table to the output port based on the output permission from the output arbitration unit corresponding to the output port to which the multicast output information is to be output.

JP-A-8-305649 JP 2002-111716 A

  However, the background art described above has the following problems.

  That is, a dedicated buffer is required to control multicast packets, and two series of buffers for unicast packets and multicast packets must be provided.

  An object of the present invention is to provide an arbiter, an arbitration method thereof, and a switch device that solve the above-described problems and enable output arbitration even when unicast packets and multicast packets are mixed without providing a buffer dedicated to multicast packets. There is to do.

  Another object of the present invention is to provide an arbiter, an arbitration method therefor, and a switch device that enable overtaking control even when unicast packets and multicast packets are mixed.

An arbiter according to a first aspect of the present invention is an arbiter that is provided in a switch device that outputs a packet input to an input port from an output port, and arbitrates which packet is output, and the transmission destination from the output port there corresponding to the next buffer to be, and the queue to register the header information of the packets input from the input port in accordance with the priority, the next stage which is the destination from the output port And a reservation register for holding whether or not output to the next-stage buffer is reserved, and corresponding to the next-stage buffer serving as a transmission destination from the output port and a buffer status register that holds whether the output to the next stage of the buffer is in ready acceptance, the queue with the reserved registers and the buffer status register Based on bets, example Bei a, an arbitration unit for arbitrating whether output either of the packet corresponding to the header portion information registered in the queue, the arbitration unit analyzes the routing information of the packet, When the packet is a multicast packet, register the header information of the multicast packet in the queue corresponding to the next-stage buffer that is the transmission destination of the multicast packet, and when the packet is a single cast packet, Means for registering header information of the single cast packet in the queue corresponding to the next-stage buffer serving as a destination of the single cast packet; and when the packet is a multicast packet, the destination of the multicast packet The buffer corresponding to the next-stage buffer. Means for deciding not to output the multicast packet if any of the status registers is not in an acceptable state, and reserving all of the reservation registers corresponding to the next-stage buffer serving as a transmission destination of the multicast packet When the packet is the multicast packet, the multicast packet is output when all of the buffer status registers corresponding to the next-stage buffer serving as the transmission destination of the multicast packet are in an acceptable state. And when the packet is a single cast packet, the reserved register corresponding to the next-stage buffer to which the single cast packet is transmitted indicates unreserved and the buffer status register is acceptable When indicating the status, A means for determining to output a single-cast packet; and when the single-cast packet is destined for the next-stage buffer in which the reservation register is reserved, the single-cast packet is not output. Means for determining, and means for determining to output the single cast packet when the single cast packet does not use the next-stage buffer reserved in the reservation register as a transmission destination .

An arbitration method according to a second aspect of the present invention is an arbitration method for an arbiter that is provided in a switch device that outputs a packet input to an input port from an output port, and arbitrates which packet is output . When routing information is analyzed and the packet is a multicast packet, the header information of the multicast packet is registered in a queue corresponding to the next-stage buffer that is the transmission destination of the multicast packet, and the packet is a single cast packet In this case, the header part information of the single cast packet is registered in the queue corresponding to the buffer of the next stage that is the transmission destination of the single cast packet, and the reservation register and the next stage for reserving the output to the next stage Ready to accept packets Based on the buffer status register for holding whether, if the priority arbitrating whether to output either of the packet corresponding to the header portion information registered in the queue in accordance with, the packet is a multicast packet, the multicast If any of the buffer status registers corresponding to the next-stage buffer serving as a packet transmission destination is not in an acceptable state, it determines not to output the multicast packet, and the next packet serving as the multicast packet transmission destination All of the reservation registers corresponding to the buffer of the stage are reserved, and when the packet is the multicast packet, all of the buffer status registers corresponding to the buffer of the next stage that is the transmission destination of the multicast packet are acceptable When the state is reached, When the cast packet is determined to be output, and the packet is a single cast packet, the reservation register corresponding to the next-stage buffer serving as a transmission destination of the single cast packet indicates unreserved and the buffer status register Indicates that the single cast packet is to be output when it indicates an acceptable state, and when the single cast packet is the destination buffer of the next stage where the reservation register is reserved, It is determined not to output a single cast packet, and when the single cast packet does not use the next-stage buffer reserved in the reservation register as a transmission destination, it is determined to output the single cast packet. .

A switch device according to a third aspect of the present invention is a switch device for outputting a packet input to an input port from an output port, the buffer storing the packet input from the input port, and the packet stored in the buffer An arbiter that performs output arbitration of the arbiter, and a unit that outputs a packet to be output based on the arbitration result of the arbiter from the output port, wherein the arbiter is a next-stage transmission destination from the output port. It exists corresponding to the buffer, and queues to register the header information of the packets input from the input port in accordance with the priorities, corresponding to the next stage of the buffer to which to send from said output port there Te, a reservation register that holds whether the output to the next stage of the buffer is reserved, and the destination from the output port I Exist corresponding to the next stage of the buffer, the buffer status register output to the next stage of the buffer holds whether the state receiving, on said said reservation register and the buffer status register queue based, have a, and arbitration means for arbitrating whether output either of the packet corresponding to the header portion information registered in the queue, the arbitration unit analyzes the routing information of the packet, the packet When the packet is a multicast packet, the header information of the multicast packet is registered in the queue corresponding to the next-stage buffer that is the transmission destination of the multicast packet. When the packet is a single cast packet, the single cast packet is registered. Previous to the queue corresponding to the next-stage buffer that is the packet destination Means for registering header information of a single cast packet, and when the packet is a multicast packet, any one of the buffer status registers corresponding to the next-stage buffer serving as a transmission destination of the multicast packet is in an acceptable state. Otherwise, it is determined not to output the multicast packet, and means for reserving all of the reservation registers corresponding to the next-stage buffer that is the transmission destination of the multicast packet, and when the packet is the multicast packet Means for determining to output the multicast packet when all of the buffer status registers corresponding to the next-stage buffer serving as a transmission destination of the multicast packet are in an acceptable state; and Cast pake When the reservation register corresponding to the next-stage buffer that is the transmission destination of the single cast packet indicates unreserved and the buffer status register indicates an acceptable state, the single cast packet is Means for determining to output, and means for determining not to output the singlecast packet when the singlecast packet is destined for the next-stage buffer in which the reservation register is reserved. Means for deciding to output the singlecast packet when the singlecast packet is not destined for the next-stage buffer in which the reservation register is reserved .

  The effect of the present invention is that unicast packets and multicast packets can be mixed without providing a dedicated buffer for multicast packets.

  The reason is that a reservation register is provided in the arbiter to perform packet output arbitration.

  In the present invention, in a network in which a single cast packet and a multicast packet are mixed, the buffer empty state is monitored and the packet is overtaken. It is characterized by performing control so that it can be mixed.

  More specifically, a reservation control circuit is provided in the arbiter of the switching device, and a reservation register for each buffer is provided in the reservation control circuit. By using the reservation register, multicast packets are reserved as singular packets and set to the highest priority, while overtaking control itself is performed as it is.

Next, the best mode for carrying out the present invention will be described in detail with reference to the drawings.
FIG. 1 is a diagram illustrating a configuration of a switch device and a configuration of an arbiter included in the switch device.

  Referring to FIG. 1, a switch apparatus 101 according to an embodiment of the present invention includes a buffer (buffer 102, buffer 103, buffer 104, and buffer 105) for storing packets, and an arbiter (arbiter) that performs packet output arbitration. 106 and arbiter 108), data line selector switch (data line selector switch 107 and data line selector switch 109), input port (input port a131 and input port b132), and output port (output port a133 and output port b134). And. The switch device 101 is, for example, a router device.

  In the present embodiment, a two-port (two-buffer) switch device will be described for ease of explanation. It is assumed that the packet includes a header part and a data part, the header part includes routing information (destination information and the like), and the original user data is stored in the data part.

  The input port a131, the buffer 102, and the buffer 104 are connected by a data line 110 (110a). The distribution circuit a (not shown) distributes the packet input from the input port a131 according to the routing information included in the header portion of the packet, and stores it in the buffer 102 or the buffer 104. Further, when the input packet is a multicast packet, the distribution circuit a (not shown) copies the required number according to the routing information in the header part and stores it in the corresponding buffer. The packet distribution method (switching method) of the distribution circuit a (not shown) is a known method.

  Similarly, the input port b132, the buffer 103, and the buffer 105 are connected by a data line 110 (110b). The distribution circuit b (not shown) distributes the packet input from the input port b132 according to the routing information included in the header portion of the packet, and stores it in the buffer 103 or the buffer 105. The distribution circuit b is equivalent to the distribution circuit a.

  Buffer control lines 112 (112 a and 112 b) that transmit packet routing information to the arbiter 106 are connected to the buffers 102 and 103.

  Similarly, a buffer control line 112 (112c and 112d) for transmitting packet routing information to the arbiter 108 is connected to the buffer 104 and the buffer 105.

  In addition, buffer status transmission lines 111 (111a to 111d) are connected to the respective buffers to transmit to the preceding arbiter whether or not the free space of the buffers is sufficient.

  The arbiter 106 is connected to the buffer status transmission line 111 (111an and 111cn) from the next stage, and the free capacity of the buffer in the next stage is transmitted.

  Similarly, a buffer status transmission line 111 (111bn and 111dn) from the next stage is connected to the arbiter 108, and the free capacity of the buffer of the next stage is transmitted.

  The arbiter 106 is connected to the data line changeover switch 107 that changes the data line via the switch control line 113 (113a), and appropriately switches the data line changeover switch 107 based on the arbitration result. Packets stored in the buffer 102 or the buffer 103 are transmitted from the output port a133.

  Similarly, the arbiter 108 is connected to the data line changeover switch 109 that changes the data line via the switch control line 113 (113b), and appropriately switches the data line changeover switch 109 based on the arbitration result. The packet stored in the buffer 104 or the buffer 105 is transmitted from the output port b134.

  Arbiter 106 also includes reservation control circuit 114 and queue 116 and queue 117 corresponding to each buffer, and buffer status register 118 and buffer status register 119.

  In the queues 116 to 117, information on the header part regarding the queued packets, storage position information in the buffer, and the like are registered according to priority. The priority order is, for example, arrival order.

  The buffer status registers 118 to 119 hold the status of the next-stage buffer via the buffer status transmission lines 111an to 111dn. “1” indicates “OK”, that is, indicates that the packet can be sent to the next-stage buffer (the next-stage buffer is in a state of accepting the packet). “0” indicates “NG”, that is, the packet cannot be sent to the next buffer.

  The reservation control circuit 114 includes a reservation register 120 and a reservation register 121, and performs reservation control in the case of a multicast packet.

  The reservation registers 120 to 121 indicate whether or not it is reserved to send a packet to the next stage buffer. The reservation registers 120 to 121 are negative logic, and “1” is stored when “unreserved” and “0” is stored when “reserved”.

  The arbiter 108 includes a reservation control circuit 115 and has the same configuration as the arbiter 106.

Next, the operation of the best mode for carrying out the present invention will be described in detail with reference to the drawings.
FIG. 2 is a diagram illustrating a connection example in which switches are connected in two stages.
FIG. 3 is a schematic diagram of reservation control in the case of a multicast packet.

  The operation of FIG. 1 will be described with reference to a connection example of the switch of FIG. 1 shown in FIG. 2 and a schematic diagram of reservation control in the case of a multicast packet shown in FIG.

  Referring to FIG. 2, the switch device 101 and the switch device 221 are connected by a data line 241 and a buffer status transmission line 242. Note that the switch device 101 and the switch device 221 have the same configuration. FIG. 3 schematically shows the operations of the arbiter 106 and the reservation control circuit 114 that perform the control in the connection example of FIG.

  Details of the operation will be described with reference to FIGS.

  The description will be made based on the following assumptions.

  The arbiter 106 of the switch device 101 has a queue 116 corresponding to the buffer 222 of the switch device 221 connected to the next stage and a queue 117 corresponding to the buffer 224. The arbiter 106 analyzes the routing information of the packets arriving at the buffer 102 or the buffer 103, and sends the packet to the queue (queue 116 or queue 117) corresponding to the buffer (the buffer 222 or the buffer 224 of the switch device 221) to be sent in order. The header part information etc. is registered.

  In addition, the buffer status register 118 of the arbiter 106 holds the status of the buffer 222 of the switch device 221 via the buffer status transmission line 242. The buffer status register 119 holds the status of the buffer 224 of the switch device 221 via the buffer status transmission line 242.

  Further, the arbiter 106 includes a reservation control circuit 114, and the reservation control circuit 114 includes a reservation register 120 and a reservation register 121. The reservation register 120 indicates whether or not transmission to the buffer 222 of the switch device 221 is reserved. The reservation register 121 indicates whether or not transmission to the buffer 224 of the switch device 221 is reserved.

  First, FIG. 3A will be described.

  Both the reservation register 120 and the reservation register 121 are in an “unreserved” state (“1”).

  The buffer status register 118 is in the “NG” state (“0”), and the buffer status register 119 is in the “OK” state (“1”).

  Assume that the multicast packet M308 arrives at the buffer 102 in this state. The header part information of the multicast packet M308 is queued in the queue 116 and the queue 117 based on the priority order. In this case, since there is no first-arrival packet, the header information of the multicast packet M308 is registered with the priority “1”.

  However, since the buffer status register 118 is in the “NG” state (“0”), the multicast packet M308 cannot be output to the next stage.

  Next, FIG. 3B will be described.

  Therefore, the arbiter 106 registers a reservation in the reservation register 120 and the reservation register 121. All of the reservation registers 120 to 121 are in a “reserved” state (“0”).

  In this state, it is assumed that the single cast packet X309 arrives and the header information of the single cast packet X309 is queued as the priority “2” in the queue 117.

  Since the reserved register is reserved by the multicast packet M308, the single cast packet X309 appears to be NG even though the buffer status register 119 is in the “OK” state (“1”).

  Therefore, the single cast packet X309 does not overtake the multicast packet M308.

  Next, FIG. 3C will be described.

  Here, it is assumed that the buffer status register 118 is finally in the “OK” state (“1”). In this case, the OK signal is directly transmitted only to the multicast packet M308. Therefore, the multicast packet M308 starts to be transmitted (output from the output port a to the switch device 221 via the data line 241).

  However, the NG signal remains for the single cast packet X309.

  After the multicast packet M308 is transmitted, the reservation register 120 and the reservation register 121 are returned to the “unreserved” state (“1”). Then, the single cast packet X309 can see the value of the buffer status register itself, which is a normal control. The single cast packet X309 is output from the output port a to the switch device 221 via the data line 241.

  The above embodiment has been described with a 2-port (2-buffer) switch for ease of explanation. In the case of a 2-port switch, all the ports are blocked because the multicast packet reserves all the ports. Therefore, the advantages of the present invention are a little difficult to understand.

Next, in order to make the advantages of the present invention easier to understand, an example of a 4-port switch will be described with reference to FIG. The present invention is not limited to a 2-port or 4-port switch, but can be applied to an N-port switch.
FIG. 4 is a diagram schematically showing the operation of the 4-port switch.

  Details of the operation will be described with reference to FIG. The description of the function is the same as that of the 2-port switch, and will be omitted. It has only increased to 4 ports.

  It is assumed that no packet is registered in the queue 401, the queue 402, the queue 403, and the queue 404. Further, it is assumed that the buffer status register 405 is “NG”, and the buffer status register 406, the buffer status register 407, and the buffer status register 408 are “OK”. The reservation control circuit 409 includes a reservation register 410, a reservation register 411, a reservation register 412, and a reservation register 413, and the reservation registers 410 to 413 are “unreserved”.

  In this state, it is assumed that the multicast packet M414 is registered in the queue 401 of the buffer A and the queue 404 of the buffer D. At this time, since the buffer status register 405 is “NG”, it is assumed that “reserved” is registered in the reserved register 410 and the reserved register 413.

  Next, it is assumed that the single cast packet X415 is registered in the queue 404 of the buffer D. In this case, the single cast packet X415 is not overtaken because the buffer status register 408 appears to be NG.

  Thereafter, it is assumed that the single cast packet Y416 is registered in the queue 402 of the buffer B. Since the reservation register 411 corresponding to this queue 402 is “not reserved”, if the buffer status register 406 is “OK”, the multicast packet M414 and the singlecast packet X415 can be overtaken and transmitted.

  In other words, by preparing a reservation register for each buffer, overtaking is prohibited for transmission to a buffer related to multicast packets, while overtaking is permitted for transmission to a buffer not related to multicast packets. This makes it possible to control the use efficiency.

  As described above, the present invention has the following effects.

  The first effect is that unicast packets and multicast packets can be mixed without providing a dedicated buffer for multicast packets.

  The second effect is that by preparing a reservation register for each buffer, efficient overtaking control can be performed for buffers not related to multicast packets.

  The third effect is that the control of the present invention is simple. The problem can be solved by inserting a reservation control circuit without greatly changing the arbiter of the conventional control.

Next, another embodiment of the present invention will be described.
FIG. 5 is a diagram illustrating an example of the input buffer switch.
FIG. 6 is a diagram illustrating an example of an output buffer switch.

  Since the present invention is an arbitration method for overtaking a plurality of packets, this control is not limited to the cross-point buffer type switch described in the embodiment, but also an input buffer switch (FIG. 5) and an output buffer switch (FIG. 6). The same application is possible in. However, if the buffer is a FIFO (First In First Out) type, there is no possibility of overtaking, so the buffer needs to be a memory type.

  If it is a memory type, it is the same as having a plurality of buffers (FIFO), and each packet itself in the memory can be considered as one buffer. In other words, if packets A and B are stored in the memory, a switch of a cross-point buffer type, packet A is stored in one buffer and packet B is stored in another buffer. Equivalent to performing arbitration processing.

  The switch device described above may be configured to operate with wired logic or may be configured to operate with program control.

  Networks and switches with a mix of multicast and single cast packets. A high-end switch especially aimed at higher performance control.

The figure which shows the structure of a switch apparatus, and the structure of the arbiter contained in a switch apparatus Diagram showing a connection example with two switches connected Schematic diagram of reservation control for multicast packets Diagram showing the operation of a 4-port switch Diagram showing examples of input buffer switches Diagram showing examples of output buffer switches

Explanation of symbols

DESCRIPTION OF SYMBOLS 101 Switch apparatus 102 Buffer 103 Buffer 104 Buffer 105 Buffer 106 Arbiter 107 Data line changeover switch 108 Arbiter 109 Data line changeover switch 110 Data line 111 Buffer state transmission line 112 Buffer control line 113 Switch control line 114 Reservation control circuit 115 Reservation control circuit 116 Queue 117 Queue 118 Buffer status register 119 Buffer status register 120 Reserved register 121 Reserved register 131 Input port a
132 Input port b
133 Output port a
134 Output port b
221 Switch device 222 Buffer 224 Buffer 241 Data line 242 Buffer status transmission line 308 Multicast packet M
309 Singlecast packet X
401 queue 402 queue 403 queue 404 queue 405 buffer status register 406 buffer status register 407 buffer status register 408 buffer status register 409 reservation control circuit 410 reservation register 411 reservation register 412 reservation register 413 reservation register 414 multicast packet M
415 Singlecast packet X
416 Singlecast packet Y

Claims (3)

An arbiter that is provided in a switch device that outputs a packet input to an input port from an output port and arbitrates which packet is output;
And queue to register exists in response to the next buffer to which to send from the output port, the header portion information of the packets input from the input port in accordance with the priority,
A reservation register that exists corresponding to the next-stage buffer serving as a transmission destination from the output port and holds whether or not an output to the next-stage buffer is reserved ;
A buffer status register that exists corresponding to the next-stage buffer serving as a transmission destination from the output port and holds whether the output to the next-stage buffer is in an acceptable state;
Based on said a reservation register and the buffer status register and the queue, e Bei a, an arbitration unit for arbitrating whether output either of the packet corresponding to the header portion information registered in the queue,
The mediation means is
Analyzing the routing information of the packet, and registering header information of the multicast packet in the queue corresponding to the next-stage buffer that is the transmission destination of the multicast packet when the packet is a multicast packet, Means for registering the header part information of the single cast packet in the queue corresponding to the buffer of the next stage that is the transmission destination of the single cast packet in the case of a single cast packet;
When the packet is a multicast packet, it is determined not to output the multicast packet unless any of the buffer status registers corresponding to the next-stage buffer that is the transmission destination of the multicast packet is in an acceptable state. Means for reserving all of the reservation registers corresponding to the next-stage buffer that is the transmission destination of the multicast packet;
When the packet is the multicast packet, the multicast packet is output when all of the buffer status registers corresponding to the next-stage buffer serving as the transmission destination of the multicast packet are in an acceptable state. Means to determine,
When the packet is a single cast packet, when the reservation register corresponding to the next-stage buffer that is the transmission destination of the single cast packet indicates unreserved and the buffer status register indicates an acceptable state, Means for deciding to output a singlecast packet;
In the case where the single cast packet is a destination of the next-stage buffer in which the reservation register is reserved, a means for determining not to output the single cast packet;
Means for determining to output the single cast packet when the single cast packet does not use the next-stage buffer in which the reservation register is reserved as a transmission destination;
Arbiter characterized by that. An arbitration method of an arbiter that is provided in a switch device that outputs a packet input to an input port from an output port and arbitrates which packet is output,
Analyzing the routing information of the packet, if the packet is a multicast packet, register the header information of the multicast packet in a queue corresponding to the next-stage buffer that is the transmission destination of the multicast packet; In the case of a single cast packet, register the header part information of the single cast packet in the queue corresponding to the next-stage buffer that is the transmission destination of the single cast packet,
Based on a reservation register that reserves output to the next stage and a buffer status register that holds whether or not the next stage is in a state of accepting a packet, the header section information corresponding to the header information registered in the queue according to the priority order arbitrates whether to output any packet,
When the packet is a multicast packet, it is determined not to output the multicast packet unless any of the buffer status registers corresponding to the next-stage buffer that is the transmission destination of the multicast packet is in an acceptable state. , Reserve all of the reservation registers corresponding to the next-stage buffer to be the destination of the multicast packet,
When the packet is the multicast packet, the multicast packet is output when all of the buffer status registers corresponding to the next-stage buffer serving as the transmission destination of the multicast packet are in an acceptable state. Decide
When the packet is a single cast packet, when the reservation register corresponding to the next-stage buffer that is the transmission destination of the single cast packet indicates unreserved and the buffer status register indicates an acceptable state, Decide to output a singlecast packet,
When the single-cast packet is a destination of the next-stage buffer in which the reservation register is reserved, it is determined not to output the single-cast packet,
When the single cast packet does not use the next-stage buffer reserved in the reservation register as a transmission destination, the single cast packet is determined to be output.
Arbitration method characterized by that. A switch device that outputs a packet input to an input port from an output port,
A buffer for storing a packet input from the input port;
An arbiter that performs output arbitration of the packet stored in the buffer;
Means for outputting from the output port a packet to be output based on the arbitration result of the arbiter,
The arbiter is
And queue to register exists in response to the next buffer to which to send from the output port, the header portion information of the packets input from the input port in accordance with the priority,
A reservation register that exists corresponding to the next-stage buffer serving as a transmission destination from the output port and holds whether or not an output to the next-stage buffer is reserved ;
A buffer status register that exists corresponding to the next-stage buffer serving as a transmission destination from the output port and holds whether the output to the next-stage buffer is in an acceptable state;
Based on said a reservation register and the buffer status register and the queue, have a, and arbitration means for arbitrating whether output either of the packet corresponding to the header portion information registered in the queue,
The mediation means is
Analyzing the routing information of the packet, and registering header information of the multicast packet in the queue corresponding to the next-stage buffer that is the transmission destination of the multicast packet when the packet is a multicast packet, Means for registering the header part information of the single cast packet in the queue corresponding to the buffer of the next stage that is the transmission destination of the single cast packet in the case of a single cast packet;
When the packet is a multicast packet, it is determined not to output the multicast packet unless any of the buffer status registers corresponding to the next-stage buffer that is the transmission destination of the multicast packet is in an acceptable state. Means for reserving all of the reservation registers corresponding to the next-stage buffer that is the transmission destination of the multicast packet;
When the packet is the multicast packet, the multicast packet is output when all of the buffer status registers corresponding to the next-stage buffer serving as the transmission destination of the multicast packet are in an acceptable state. Means to determine,
When the packet is a single cast packet, when the reservation register corresponding to the next-stage buffer that is the transmission destination of the single cast packet indicates unreserved and the buffer status register indicates an acceptable state, Means for deciding to output a singlecast packet;
In the case where the single cast packet is a destination of the next-stage buffer in which the reservation register is reserved, a means for determining not to output the single cast packet;
Means for determining to output the single cast packet when the single cast packet does not use the next-stage buffer in which the reservation register is reserved as a transmission destination;
A switch device characterized by that.

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