JP4057883B2

JP4057883B2 - Semiconductor element storage package and semiconductor device

Info

Publication number: JP4057883B2
Application number: JP2002307859A
Authority: JP
Inventors: 康平福田
Original assignee: Kyocera Corp
Current assignee: Kyocera Corp
Priority date: 2002-10-23
Filing date: 2002-10-23
Publication date: 2008-03-05
Anticipated expiration: 2022-10-23
Also published as: JP2004146482A

Description

【０００１】
【発明の属する技術分野】
本発明は、半導体素子を収納するための半導体素子収納用パッケージおよび半導体装置に関する。
【０００２】
【従来の技術】
従来の半導体素子を収納するための半導体素子収納用パッケージ（以下、パッケージともいう）を図５、図６に示す。図５はパッケージの平面図、図６は図５のパッケージの断面図である。これらの図において、21は略四角形の基体、23は枠体、24は入出力端子を示し、これら基体21、枠体23、入出力端子24とで、内部空間に半導体素子25を収容する容器が基本的に構成される。
【０００３】
基体21は、鉄（Ｆｅ）−ニッケル（Ｎｉ）−コバルト（Ｃｏ）合金，銅（Ｃｕ）−タングステン（Ｗ）等の金属から成り、基体21の上側主面の中央部には、半導体レーザ（ＬＤ），フォトダイオード（ＰＤ）等の半導体素子25を載置するための載置部21ｂが設けられる。次に、基体21の四隅部に外側に延出して設けられた張出部にネジ止め部21ａが設けられている。この基体21は、ネジ止め部21ａにネジを挿入することによって、外部電気回路基板にネジ止め固定される。
【０００４】
基体21の上側主面の外周部には、載置部21ｂを囲繞するようにして接合された枠体23が立設されている。この枠体23は、Ｆｅ−Ｎｉ−Ｃｏ合金等の金属から成り、基体21に銀（Ａｇ）ロウ等のロウ材を介してロウ付けされる。
【０００５】
入出力端子24は、アルミナ（Ａｌ₂Ｏ₃）質焼結体等のセラミックスから成り、枠体23に銀（Ａｇ）ロウ等のロウ材を介してロウ付けされる。入出力端子24には、内外を導通する線路導体が設けられており、入出力端子24外面側の線路導体にはＦｅ−Ｎｉ−Ｃｏ合金等の金属から成るリード端子26がＡｇロウ等のロウ材を介して電気的に接続されることによってパッケージが製作される（例えば、下記の特許文献１参照）。
【０００６】
このような構成のパッケージの載置部21ｂに半導体素子25を載置固定した後、半導体素子25の電極と枠体23内面側の線路導体とをボンディングワイヤで電気的に接続し、蓋体27により半導体素子25を気密に封止する。また、枠体23の上面にＦｅ−Ｎｉ−Ｃｏ合金等から成る蓋体27をシーム溶接法等の溶接法により接合することによって、製品としての半導体装置と成る。そして、ネジ止め部21ａにネジを挿入し、基体21を外部電気回路基板にネジ止め固定する。この半導体装置は、リード端子26が外部電気回路に接続され、半導体素子25が外部電気回路に電気的に接続されることによって、半導体素子25が高周波信号で作動することとなる。
【０００７】
【特許文献１】
特開平11−54657号公報
【０００８】
【発明が解決しようとする課題】
しかしながら、基体21と枠体23と入出力端子24とをロウ付けする際に、入出力端子24に基体21，枠体23との熱膨張差による応力が加わりやすく、入出力端子24にクラック等の破損が生じ易いという問題点があった。特に、基体21の材質と枠体23の材質とが異なる場合、入出力端子24にクラック等の破損が生じ易く、主に基体21と枠体22と入出力端子24とから構成されるパッケージ内部を気密に保持できなくなるという問題点があった。
【０００９】
また、上記従来の構成においては、基体21をネジ止めして外部電気回路基板に固定した際、ネジ止めにより歪みが発生し、入出力端子24にクラック等の破損が生じ、パッケージ内部を気密に保持できなくなるという問題点があった。
【００１０】
従って、本発明は上記従来の問題点に鑑み完成されたものであり、その目的は、パッケージ内部を気密に保持するとともに半導体素子の熱を効率良く外部に放散し得るものとすることにある。
【００１１】
【課題を解決するための手段】
本発明の半導体素子収納用パッケージは、上側主面に半導体素子が載置される載置部を有する金属製の第１の基体と、該第１の基体の上側主面の外周部に前記載置部を囲繞するように取着され、側部に貫通孔または切欠きから成る入出力端子の取付部が形成されている金属製の枠体と、前記取付部に嵌着された、前記枠体の内外を電気的に導通するメタライズ配線層を有するセラミック製の入出力端子と、前記第１の基体の下側主面に上側主面が接合され、隅部にネジ止め部がそれぞれ形成された金属製の第２の基体と、を具備しており、該第２の基体の上側主面の外周縁の前記入出力端子の直下の部位に、前記入出力端子の前記枠体外面から内側に入り込んで設けられた段差が形成され、該段差の幅Ｄと、前記入出力端子の前記枠体外面よりも内側の幅Ｗとが、以下の条件式３Ｗ／２≦Ｄ≦３Ｗを満足することを特徴とする。
【００１２】
本発明の半導体素子収納用パッケージは、第１の基体の下側主面に、第１の基体と略同じ形状で四隅部にネジ止め部がそれぞれ形成された、上側主面の外周縁の入出力端子の直下の部位に入出力端子の枠体外面から内側に入り込んだ部位よりも大きい幅の段差が形成されている金属製の第２の基体が接合されていることにより、第１の基体と第２の基体とをロウ材等で接合した際にそれらの熱膨張差により発生する応力が入出力端子へそのまま加わるのを防止することができ、入出力端子にクラック等の破損が発生するのを防ぐことができる。また、第２の基体を外部電気回路基板にネジ止め固定することにより発生した歪みを、第２の基体の段差で吸収できる。
【００１３】
また、ネジ止め部が取付部の下方に位置する側面の両端部およびその側面に対向する側面の両端部にそれぞれ外側に張り出すとともに第１の基体の上側主面より下面が上方に位置するように基部が屈曲して形成されていることにより、ネジ止め固定時の歪みが第１の基体に伝わるのを抑えることができ、その結果、入出力端子にクラック等の破損が生じるのをより有効に防止できる。
【００１４】
本発明の半導体素子収納用パッケージは、上側主面に半導体素子が載置される載置部を有する金属製の第１の基体と、該第１の基体の上側主面の外周部に前記載置部を囲繞するように取着され、側部に貫通孔または切欠きから成る入出力端子の取付部が形成されている金属製の枠体と、前記取付部に嵌着された、前記枠体の内外を電気的に導通するメタライズ配線層を有するセラミック製の入出力端子と、前記第１の基体の下側主面に上側主面が接合され、隅部にネジ止め部がそれぞれ形成された金属製の第２の基体と、を具備しており、該第１の基体の下側主面の外周縁の前記入出力端子の直下の部位に、前記入出力端子の前記枠体外面から内側に入り込んで設けられた段差が形成され、該段差の幅Ｄと、前記入出力端子の前記枠体外面よりも内側の幅Ｗとが、以下の条件式３Ｗ／２≦Ｄ≦３Ｗを満足することを特徴とする。
【００１５】
本発明の半導体素子収納用パッケージは、第１の基体は、下側主面の外周縁の入出力端子の直下の部位に入出力端子の枠体外面から内側に入り込んだ部位よりも大きい幅の段差が形成されていることから、第１の基体と第２の基体とをロウ材等で接合した際にそれらの熱膨張差により発生する応力が入出力端子へそのまま加わるのを防止することができ、入出力端子にクラック等の破損が発生するのを防ぐことができる。また、第２の基体を外部電気回路基板にネジ止め固定することにより発生した歪みを、第１の基体の段差で吸収できる。
【００１６】
また、本発明の半導体素子収納用パッケージは、請求項１又は請求項２に記載の半導体素子収納用パッケージであって、前記第２の基体は、前記入出力端子の外側に張り出すネジ止め部を備え、該ネジ止め部の下面は、前記第１の基体の上側主面よりも上方に位置してなることが好ましい。
本発明の半導体装置は、上記本発明の半導体素子収納用パッケージと、前記載置部に載置固定されるとともに前記入出力端子に電気的に接続された半導体素子と、前記枠体の上面に接合された蓋体と、を具備したことを特徴とする。
【００１７】
本発明の半導体装置は、上記の構成により、上記本発明の半導体素子収納用パッケージを用いた信頼性の高いものとなる。
【００１８】
【発明の実施の形態】
本発明の半導体素子収納用パッケージについて以下に詳細に説明する。図１は本発明のパッケージについて実施の形態の一例を示す平面図、図２は図１のパッケージの断面図である。また、図３は本発明のパッケージについて実施の形態の他の例を示す平面図、図４は図３のパッケージの断面図である。これらの図において、１は第１の基体、２は第２の基体、３は枠体、４は入出力端子、６はリード端子を示し、第１の基体１と第２の基体２と枠体３とで半導体素子５を内部に収納する容器が基本的に構成される。
【００１９】
本発明のパッケージは、図１、図２に示すように、上側主面に半導体素子５が載置される載置部１ｂを有する略四角形の金属製の第１の基体１と、第１の基体１の上側主面の外周部に載置部１ｂを囲繞するように取着され、側部に貫通孔または切欠きから成る入出力端子４の取付部３ａが形成されている金属製の枠体３と、取付部３ａに嵌着された、枠体３の内外を電気的に導通するメタライズ配線層（線路導体）を有するセラミック製の入出力端子４と、第１の基体１の下側主面に上側主面が接合された、第１の基体１と略同じ形状で四隅部にネジ止め部２ｂがそれぞれ形成された金属製の第２の基体２とを具備し、第２の基体２は、上側主面の外周縁の入出力端子４の直下の部位に入出力端子４の枠体３外面から内側に入り込んだ部位よりも大きい幅の段差２ａが形成されており、かつネジ止め部２ｂが取付部３ａの下方に位置する側面の両端部およびその側面に対向する側面の両端部にそれぞれ外側に張り出すとともに第１の基体１の上側主面より下面が上方に位置するように基部が屈曲して形成されている。
【００２０】
または、本発明のパッケージは、図３、図４に示すように、第１の基体１は、下側主面の外周縁の入出力端子４の直下の部位に入出力端子４の枠体３外面から内側に入り込んだ部位よりも大きい幅の段差１ａが形成されている構成である。
【００２１】
本発明の第１の基体１、第２の基体２、枠体３は、Ｆｅ−Ｎｉ−Ｃｏ合金やＣｕ−Ｗ等の金属から成り、そのインゴットに圧延加工や打ち抜き加工等の従来周知の金属加工法を施したり、射出成形と切削加工等を施すことによって、所定形状に製作される。第１の基体１の上側主面には、半導体素子５を載置する載置部１ｂが設けられる。第１の基体１の下側主面には、外部電気回路基板に固定するためのネジ止め部２ｂを四隅部に有した第２の基体２がＡｇロウ等のロウ材を介して接合されている。ネジ止め部２ｂは、第２の基体２の取付部３ａの下方に位置する側面の両端部およびその側面に対向する側面の両端部にそれぞれ外側に張り出すとともに第１の基体１の上側主面より下面が上方に位置するように基部が屈曲して形成されている。
【００２２】
第１および第２の基体１，２は、半導体素子５が作動時に発する熱を外部に放熱させる放熱板の役割をも果たす。第１の基体１、第２の基体２および枠体３の表面には、酸化腐食の防止や半導体素子５のロウ付け等による載置固定を良好にするために、厚さ0.5〜９μｍのＮｉ層や厚さ0.5〜５μｍの金（Ａｕ）層から成る金属層をメッキ法により被着させておくとよい。また、半導体素子５の熱を効率よく外部へ放熱させるために、半導体素子５がペルチェ素子等の熱電冷却素子（図示せず）に搭載された状態で載置部１ｂに載置固定されていてもよい。
【００２３】
第１の基体１の上側主面の外周部には、載置部１ｄを囲繞するようにしてＡｇロウ等のロウ材を介して接合された枠体３が立設されており、枠体３は第１の基体１とともにその内側に半導体素子５を収容する空所を形成する。入出力端子４は、酸化アルミニウム（Ａｌ₂Ｏ₃）質焼結体、窒化アルミニウム（ＡｌＮ）質焼結体等の焼結体（セラミックス）から成る断面形状が逆Ｔ字形の柱状体であり、セラミックグリーンシートを打ち抜き加工し、セラミックグリーンシートを多層積層し焼成することによって形成され、枠体３の側部に設けられた切欠きまたは貫通孔からなる取付部３ａにＡｇロウ等のロウ材を介してロウ付けされる。
【００２４】
入出力端子４には、枠体３内外を導通する、Ｗ，Ｍｏ，Ｍｎ等の導体ペーストを焼成等して形成されたメタライズ配線層としての線路導体４ａが設けられており、線路導体４ａの枠体３外側の部位にはＦｅ−Ｎｉ−Ｃｏ合金等の金属から成るリード端子６がＡｇロウ等のロウ材を介して電気的に接続される。
【００２５】
本発明のパッケージは、図１、図２に示すように、第１の基体１と第２の基体２とがロウ付け等で接合されて成り、第２の基体２の上側主面の入出力端子４の下方の部位に段差２ａが形成されていることにより、第１の基体１と第２の基体２と枠体３とをロウ付けする際にそれらの熱膨張差により応力が発生しても、段差２ａで入出力端子４に加わる歪みを軽減することができるとともに、ネジ止め部２ｂにネジを挿入し外部電気回路基板にネジ止め固定した際に第２の基体２に歪みが加わっても、段差２ａで入出力端子４に加わる歪みを軽減することができる。その結果、入出力端子４にクラック等の破損が生ずるのを有効に防止し、内部を気密に保持するパッケージを形成することができる。
【００２６】
また、図３、図４に示すように、第１の基体１の下側主面の入出力端子４の下方の部位に段差１ａが形成されていることによっても上記と同様の作用効果が得られる。
【００２７】
本発明において、ネジ止め部２ｂは、取付部３ａの下方に位置する第２の基体２の側面の両端部およびその側面に対向する側面の両端部にそれぞれ外側に張り出すとともに、第１の基体１の上側主面より下面が上方に位置するように基部が屈曲して形成されていることによって、ネジ止め部２ｂをネジ止め固定し第２の基体２に歪みが加わった場合においても、屈曲部２ｃで歪みをより有効に吸収し、入出力端子４に加わる歪みを大幅に軽減することが可能となる。第１の基体１の上側主面よりネジ止め部２ｂの下面が下方に位置していると、ネジ止め部２ｂから取付部３ａに嵌着された入出力端子４までの第１および第２の基体１，２を介しての距離が近くなり、ネジ止め時の歪みが入出力端子４に加わりやすくなる。
【００２８】
また、ネジ止め部２ｂは、第２の基体２の隣接する側面の延長面に挟まれる領域の外側に位置していることがよく、ネジ止め部２ｂでネジ止めした際の歪みが取付部３ａに嵌着された入出力端子４に直接的に加わるのを効果的に抑えることができる。即ち、上記歪みは第２の基体２の取付部３ａのない側の側面付近に主に加わり易くなるからである。
【００２９】
また、図２、図４に示すように、段差２ａ，１ａは、入出力端子４の取付部３ａの直下からネジ止め部２ｂの部位まで延長されていてもよい。この場合、ネジ止め部２ｂによる歪みの吸収緩和の効果がより大きいものとなる。
【００３０】
さらに、図２、図４に示すように、段差２ａ，１ａの幅Ｄは、入出力端子４の枠体３外面よりも内側の幅Ｗに対して、３Ｗ／２≦Ｄ≦３Ｗであるのがよい。Ｄ＜３Ｗ／２の場合、段差２ａ，１ａの幅が小さくなりすぎて、第１の基体１と枠体３に加わる歪を段差２ａ，１ａで十分に吸収できなくなり、熱膨張差によって第１の基体１から枠体３に加わる歪みを軽減できなくなる。Ｄ＞３Ｗの場合、段差２ａ，１ａの幅が大きくなりすぎて、第１および第２の基体１，２と枠体３の表面に、Ｎｉ層やＡｕ層から成る金属層をメッキ法により被着させる際のメッキ液が段差２ａ，１ａに溜まり、メッキ後にも段差２ａ，１ａにメッキ液が残留し、第１の基体１および第２の基体２が残留したメッキ液によって腐食され易くなる。
【００３１】
上記構成のパッケージの載置部１ｂに半導体素子５を載置固定した後、半導体素子５の電極と入出力端子４の線路導体４ａの枠体３内側の部位とをボンディングワイヤで電気的に接続し、枠体３の上面にＦｅ−Ｎｉ−Ｃｏ合金等から成る蓋体７をシーム溶接法等の溶接法により接合し、半導体素子５を気密に封止することにより、製品としての半導体装置となる。そして、ネジ止め部２ｂにネジを挿入し第２の基体２を外部電気回路基板にネジ止め固定し、リード端子６を外部電気回路に接続することにより、半導体装置内部に収納した半導体素子５が外部電気回路に電気的に接続され、半導体素子５が高周波信号で作動することとなる。
【００３２】
なお、本発明は上記実施の形態に限定されるものではなく、本発明の要旨を逸脱しない範囲内で種々の変更を施すことは可能である。
【００３３】
【発明の効果】
本発明の半導体素子収納用パッケージは、該第２の基体の上側主面の外周縁の前記入出力端子の直下の部位に、前記入出力端子の前記枠体外面から内側に入り込んで設けられた段差が形成され、該段差の幅Ｄと、前記入出力端子の前記枠体外面よりも内側の幅Ｗが、以下の条件式３Ｗ／２≦Ｄ≦３Ｗを満足することにより、第１の基体と第２の基体とをロウ材等で接合した際にそれらの熱膨張差により発生する応力が入出力端子へそのまま加わるのを防止することができ、入出力端子にクラック等の破損が発生するのを防ぐことができる。また、第２の基体を外部電気回路基板にネジ止め固定することにより発生した歪みを、第２の基体の段差で吸収できる。
【００３４】
また、ネジ止め部が取付部の下方に位置する第２の基体の側面の両端部およびその側面に対向する側面の両端部にそれぞれ外側に張り出すとともに第１の基体の上側主面より下面が上方に位置するように基部が屈曲して形成されていることにより、ネジ止め固定時の歪みが第１の基体に伝わるのを抑えることができ、その結果、入出力端子にクラック等の破損が生じるのをより有効に防止できる。
【００３５】
また、本発明の半導体素子収納用パッケージは、第１の基体は、下側主面の外周縁の入出力端子の直下の部位に入出力端子の枠体外面から内側に入り込んだ部位よりも大きい幅の段差が形成されていることから、第１の基体と第２の基体とをロウ材等で接合した際にそれらの熱膨張差により発生する応力が入出力端子へそのまま加わるのを防止することができ、入出力端子にクラック等の破損が発生するのを防ぐことができる。また、第２の基体を外部電気回路基板にネジ止め固定することにより発生した歪みを、第１の基体の段差で吸収できる。
【００３６】
本発明の半導体装置は、上記本発明の半導体素子収納用パッケージと、載置部に載置固定されるとともに入出力端子に電気的に接続された半導体素子と、枠体の上面に接合された蓋体とを具備したことにより、上記本発明の半導体素子収納用パッケージを用いた信頼性の高いものとなる。
【図面の簡単な説明】
【図１】本発明の半導体素子収納用パッケージについて実施の形態の例を示す平面図である。
【図２】図１の半導体素子収納用パッケージの断面図である。
【図３】本発明の半導体素子収納用パッケージについて実施の形態の他の例を示す平面図である。
【図４】図３の半導体素子収納用パッケージの断面図である。
【図５】従来の半導体素子収納用パッケージの平面図である。
【図６】図５の半導体素子収納用パッケージの断面図である。
【符号の説明】
１：第１の基体
１ａ：段差
１ｂ：載置部
２：第２の基体
２ａ：段差
２ｂ：ネジ止め部
３：枠体
４：入出力端子
５：半導体素子[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor element housing package and a semiconductor device for housing semiconductor elements.
[0002]
[Prior art]
A conventional semiconductor element storage package (hereinafter also referred to as a package) for storing a conventional semiconductor element is shown in FIGS. 5 is a plan view of the package, and FIG. 6 is a cross-sectional view of the package of FIG. In these drawings, 21 is a substantially rectangular base, 23 is a frame, and 24 is an input / output terminal. The base 21, the frame 23, and the input / output terminal 24 are used to store a semiconductor element 25 in the internal space. Is basically constructed.
[0003]
The base 21 is made of a metal such as iron (Fe) -nickel (Ni) -cobalt (Co) alloy, copper (Cu) -tungsten (W), etc., and a semiconductor laser ( A mounting portion 21b for mounting a semiconductor element 25 such as an LD) or a photodiode (PD) is provided. Next, screwing portions 21 a are provided at the overhang portions provided to extend outward at the four corners of the base 21. The base 21 is fixed to the external electric circuit board with screws by inserting screws into the screw fixing portions 21a.
[0004]
On the outer peripheral portion of the upper main surface of the base body 21, a frame body 23 joined so as to surround the mounting portion 21b is erected. The frame body 23 is made of a metal such as an Fe—Ni—Co alloy, and is brazed to the base 21 via a brazing material such as silver (Ag) brazing.
[0005]
The input / output terminal 24 is made of a ceramic such as an alumina (Al ₂ O ₃ ) sintered body, and is brazed to the frame 23 via a brazing material such as silver (Ag) brazing. The input / output terminal 24 is provided with a line conductor that conducts inside and outside. The line conductor on the outer surface side of the input / output terminal 24 is provided with a lead terminal 26 made of a metal such as Fe-Ni-Co alloy or the like. A package is manufactured by being electrically connected via a material (see, for example, Patent Document 1 below).
[0006]
After the semiconductor element 25 is placed and fixed on the placement portion 21b of the package having such a configuration, the electrode of the semiconductor element 25 and the line conductor on the inner surface side of the frame body 23 are electrically connected by a bonding wire, and the lid body 27 Thus, the semiconductor element 25 is hermetically sealed. Further, a lid 27 made of an Fe-Ni-Co alloy or the like is joined to the upper surface of the frame 23 by a welding method such as a seam welding method, whereby a semiconductor device as a product is obtained. Then, a screw is inserted into the screwing portion 21a, and the base 21 is fixed to the external electric circuit board with screws. In this semiconductor device, the lead terminal 26 is connected to an external electric circuit, and the semiconductor element 25 is electrically connected to the external electric circuit, whereby the semiconductor element 25 operates with a high-frequency signal.
[0007]
[Patent Document 1]
Japanese Patent Laid-Open No. 11-54657
[Problems to be solved by the invention]
However, when the base 21, the frame 23, and the input / output terminal 24 are brazed, stress due to a difference in thermal expansion between the base 21 and the frame 23 is easily applied to the input / output terminal 24, and the input / output terminal 24 is cracked. There has been a problem that the damage is likely to occur. In particular, if the material of the base 21 and the material of the frame 23 are different, the input / output terminals 24 are likely to be damaged, such as cracks, and the inside of the package mainly composed of the base 21, the frame 22 and the input / output terminals 24 There is a problem that it becomes impossible to keep airtight.
[0009]
Further, in the above conventional configuration, when the base 21 is screwed and fixed to the external electric circuit board, distortion occurs due to the screwing, the input / output terminals 24 are damaged such as cracks, and the inside of the package is hermetically sealed. There was a problem that it could not be held.
[0010]
Accordingly, the present invention has been completed in view of the above-described conventional problems, and an object of the present invention is to hold the inside of the package airtight and to efficiently dissipate the heat of the semiconductor element to the outside.
[0011]
[Means for Solving the Problems]
The semiconductor element storage package according to the present invention is described above on the first base made of metal having a mounting portion on which the semiconductor element is mounted on the upper main surface, and on the outer peripheral portion of the upper main surface of the first base. A metal frame that is attached so as to surround the mounting portion and that has a side hole formed with a mounting portion for an input / output terminal comprising a through hole or a notch, and the frame that is fitted to the mounting portion A ceramic input / output terminal having a metallized wiring layer electrically conducting inside and outside of the body, an upper main surface joined to the lower main surface of the first base, and screwing portions formed at corners, respectively. A second base body made of metal, and on the outer peripheral edge of the upper main surface of the second base body, directly below the input / output terminal, from the outer surface of the frame body to the inner side enters step provided in is formed, and the width D of the stepped, the frame outer surface of said input and output terminals Also the inner width W, and satisfies the following condition 3W / 2 ≦ D ≦ 3W.
[0012]
The package for housing a semiconductor element of the present invention has an outer peripheral edge of the upper main surface in which the lower main surface of the first base body has substantially the same shape as that of the first base body and the screwing portions are formed at the four corners. By joining a second base made of metal, in which a step having a width larger than that of a portion entering the inner side from the outer surface of the frame of the input / output terminal, is joined to a portion immediately below the output terminal, the first base When the solder and the second substrate are joined with a brazing material or the like, it is possible to prevent the stress generated by the difference in thermal expansion from being applied to the input / output terminal as it is, and the input / output terminal is damaged such as a crack. Can be prevented. Further, the distortion generated by screwing and fixing the second base to the external electric circuit board can be absorbed by the step of the second base.
[0013]
In addition, the screwing portion projects outwardly at both end portions of the side surface located below the mounting portion and both end portions of the side surface facing the side surface, and the lower surface is positioned above the upper main surface of the first base. Since the base is bent, the distortion at the time of fixing with screws can be prevented from being transmitted to the first base, and as a result, it is more effective that the input / output terminals are damaged such as cracks. Can be prevented.
[0014]
The semiconductor element storage package according to the present invention is described above on the first base made of metal having a mounting portion on which the semiconductor element is mounted on the upper main surface, and on the outer peripheral portion of the upper main surface of the first base. A metal frame that is attached so as to surround the mounting portion and that has a side hole formed with a mounting portion for an input / output terminal comprising a through hole or a notch, and the frame that is fitted to the mounting portion A ceramic input / output terminal having a metallized wiring layer electrically conducting inside and outside of the body, an upper main surface joined to the lower main surface of the first base, and screwing portions formed at corners, respectively. A second base made of metal, and a portion of the outer peripheral edge of the lower main surface of the first base that is directly below the input / output terminal from the outer surface of the frame body of the input / output terminal. a step provided penetrate inside formed, the width D of the stepped, the frame outer surface of said input and output terminals Also the inner width W, and satisfies the following condition 3W / 2 ≦ D ≦ 3W.
[0015]
In the package for housing a semiconductor element according to the present invention, the first base has a width larger than a portion of the first main body directly below the input / output terminal at the outer peripheral edge of the lower main surface and entering from the outer surface of the frame of the input / output terminal. Since the step is formed, it is possible to prevent the stress generated due to the difference in thermal expansion between the first base and the second base with the brazing material or the like from being directly applied to the input / output terminal. It is possible to prevent the input / output terminals from being damaged such as cracks. Further, the distortion generated by screwing and fixing the second base to the external electric circuit board can be absorbed by the step of the first base.
[0016]
Further, a semiconductor element storage package according to the present invention is the semiconductor element storage package according to claim 1 or 2, wherein the second base is a screw-fastening portion projecting outside the input / output terminal. It is preferable that the lower surface of the screwing portion is located above the upper main surface of the first base .
A semiconductor device according to the present invention includes a package for housing a semiconductor element according to the present invention, a semiconductor element mounted and fixed on the mounting portion and electrically connected to the input / output terminal, and an upper surface of the frame body. And a joined lid.
[0017]
The semiconductor device of the present invention has high reliability using the semiconductor element storage package of the present invention due to the above-described configuration.
[0018]
DETAILED DESCRIPTION OF THE INVENTION
The semiconductor element storage package of the present invention will be described in detail below. FIG. 1 is a plan view showing an embodiment of the package of the present invention, and FIG. 2 is a cross-sectional view of the package of FIG. FIG. 3 is a plan view showing another example of the embodiment of the package of the present invention, and FIG. 4 is a sectional view of the package of FIG. In these drawings, 1 is a first base body, 2 is a second base body, 3 is a frame body, 4 is an input / output terminal, 6 is a lead terminal, and the first base body 1, the second base body 2, and the frame A container for housing the semiconductor element 5 is basically constituted by the body 3.
[0019]
As shown in FIGS. 1 and 2, the package of the present invention includes a first base 1 made of a substantially rectangular metal having a mounting portion 1b on which the semiconductor element 5 is mounted on the upper main surface, A metal frame which is attached to the outer peripheral portion of the upper main surface of the base 1 so as to surround the mounting portion 1b, and has a mounting portion 3a for the input / output terminal 4 formed of a through hole or a notch on the side portion. The body 3, the ceramic input / output terminal 4 having a metallized wiring layer (line conductor) that is electrically connected to the inside and outside of the frame 3, and the lower side of the first base 1. A second base body comprising a second base body 2 made of metal and having an upper main surface bonded to the main surface and having substantially the same shape as the first base body 1 and screwed portions 2b formed at the four corners, respectively. Reference numeral 2 denotes a part that enters the inside of the input / output terminal 4 from the outer surface of the frame 3 to the part directly below the input / output terminal 4 on the outer peripheral edge of the upper main surface A step 2a having a larger width and a screwing portion 2b projecting outward from both end portions of the side surface located below the attachment portion 3a and both end portions of the side surface opposite to the side surface, respectively. The base is bent so that the lower surface is located above the upper main surface of the substrate 1.
[0020]
Alternatively, in the package of the present invention, as shown in FIGS. 3 and 4, the first base 1 has a frame 3 of the input / output terminals 4 in a portion immediately below the input / output terminals 4 on the outer peripheral edge of the lower main surface. This is a configuration in which a step 1a having a width larger than that of the portion entering the inside from the outer surface is formed.
[0021]
The first substrate 1, the second substrate 2, and the frame 3 of the present invention are made of a metal such as Fe—Ni—Co alloy or Cu—W, and conventionally known metals such as rolling and punching are used for the ingot. It is manufactured in a predetermined shape by applying a processing method or performing injection molding and cutting. On the upper main surface of the first base 1, a mounting portion 1b for mounting the semiconductor element 5 is provided. On the lower main surface of the first base 1, a second base 2 having screwing portions 2b for fixing to the external electric circuit board at the four corners is joined via a brazing material such as Ag brazing. Yes. The screwing portion 2b protrudes outward from both end portions of the side surface located below the attachment portion 3a of the second base 2 and both end portions of the side surface facing the side surface, and the upper main surface of the first base body 1 The base is bent so that the lower surface is positioned upward.
[0022]
The first and second bases 1 and 2 also serve as a heat radiating plate that radiates heat generated when the semiconductor element 5 is activated to the outside. The surface of the first substrate 1, the second substrate 2 and the frame 3 has a thickness of 0.5 to 9 μm in order to prevent oxidative corrosion and to make the mounting and fixing by brazing the semiconductor element 5 good. A metal layer composed of a layer or a gold (Au) layer having a thickness of 0.5 to 5 μm may be deposited by a plating method. Further, in order to efficiently dissipate the heat of the semiconductor element 5 to the outside, the semiconductor element 5 is mounted and fixed on the mounting portion 1b in a state of being mounted on a thermoelectric cooling element (not shown) such as a Peltier element. Also good.
[0023]
On the outer peripheral portion of the upper main surface of the first base body 1, a frame body 3 joined through a brazing material such as Ag brazing so as to surround the mounting portion 1 d is erected. Forms a space for accommodating the semiconductor element 5 inside the first substrate 1. The input / output terminal 4 is a columnar body having a reverse T-shaped cross section made of a sintered body (ceramics) such as an aluminum oxide (Al ₂ O ₃ ) sintered body and an aluminum nitride (AlN) sintered body, A brazing material such as Ag brazing is formed on a mounting portion 3a formed by punching a ceramic green sheet, laminating and firing the ceramic green sheets, and forming a cutout or a through hole provided on the side of the frame 3. It is brazed through.
[0024]
The input / output terminal 4 is provided with a line conductor 4a as a metallized wiring layer formed by firing a conductor paste such as W, Mo, Mn, etc., which conducts the inside and outside of the frame 3, and the line conductor 4a A lead terminal 6 made of a metal such as an Fe—Ni—Co alloy is electrically connected to a portion outside the frame 3 via a brazing material such as Ag brazing.
[0025]
As shown in FIGS. 1 and 2, the package of the present invention is formed by joining a first base 1 and a second base 2 by brazing or the like, and inputting / outputting the upper main surface of the second base 2. Since the step 2a is formed in the lower part of the terminal 4, when the first base 1, the second base 2 and the frame 3 are brazed, stress is generated due to the difference in thermal expansion between them. However, the distortion applied to the input / output terminal 4 by the step 2a can be reduced, and when the screw is inserted into the screwing portion 2b and fixed to the external electric circuit board, the second base 2 is distorted. However, distortion applied to the input / output terminal 4 at the step 2a can be reduced. As a result, it is possible to effectively prevent breakage such as cracks in the input / output terminals 4 and form a package that keeps the inside airtight.
[0026]
Also, as shown in FIGS. 3 and 4, the same effect as described above can be obtained by forming a step 1a in a portion below the input / output terminal 4 on the lower main surface of the first base 1. It is done.
[0027]
In the present invention, the screwing portion 2b projects outward from both end portions of the side surface of the second base 2 located below the mounting portion 3a and both end portions of the side surface facing the side surface, and the first base body. Since the base portion is bent so that the lower surface is located above the upper main surface of 1, even when the screw base 2 b is fixed by screwing and the second base 2 is distorted, the base portion 2 is bent. It is possible to absorb the distortion more effectively by the portion 2c and to greatly reduce the distortion applied to the input / output terminal 4. When the lower surface of the screwing portion 2b is positioned below the upper main surface of the first base 1, the first and second terminals from the screwing portion 2b to the input / output terminal 4 fitted to the mounting portion 3a are provided. The distance through the bases 1 and 2 is reduced, and distortion at the time of screwing is easily applied to the input / output terminal 4.
[0028]
Further, the screwing portion 2b is preferably located outside the region sandwiched between the extension surfaces of the adjacent side surfaces of the second base 2, and the distortion when screwed with the screwing portion 2b is caused by the attachment portion 3a. It is possible to effectively suppress the direct addition to the input / output terminal 4 fitted to the. That is, the strain is likely to be applied mainly near the side surface of the second base 2 on the side where the mounting portion 3a is not present.
[0029]
Further, as shown in FIGS. 2 and 4, the steps 2 a and 1 a may be extended from directly below the mounting portion 3 a of the input / output terminal 4 to a site of the screwing portion 2 b. In this case, the effect of relaxation of strain absorption by the screwing portion 2b is greater.
[0030]
Further, as shown in FIGS. 2 and 4, the width D of the steps 2a and 1a is 3W / 2 ≦ D ≦ 3W with respect to the width W inside the outer surface of the frame 3 of the input / output terminal 4. Is good. In the case of D <3W / 2, the width of the steps 2a and 1a becomes too small, and the strain applied to the first base 1 and the frame 3 cannot be sufficiently absorbed by the steps 2a and 1a. The distortion applied to the frame 3 from the base 1 cannot be reduced. When D> 3W, the widths of the steps 2a and 1a are too large, and a metal layer made of Ni or Au is applied to the surfaces of the first and second substrates 1 and 2 and the frame 3 by plating. The plating solution for deposition is accumulated in the steps 2a and 1a, and the plating solution remains on the steps 2a and 1a even after plating, and the first substrate 1 and the second substrate 2 are easily corroded by the remaining plating solution.
[0031]
After the semiconductor element 5 is mounted and fixed on the mounting portion 1b of the package having the above configuration, the electrodes of the semiconductor element 5 and the portion inside the frame body 3 of the line conductor 4a of the input / output terminal 4 are electrically connected by a bonding wire. Then, a lid 7 made of Fe-Ni-Co alloy or the like is joined to the upper surface of the frame 3 by a welding method such as a seam welding method, and the semiconductor element 5 is hermetically sealed, thereby obtaining a semiconductor device as a product. Become. Then, by inserting a screw into the screwing portion 2b, fixing the second base 2 to the external electric circuit board by screwing, and connecting the lead terminal 6 to the external electric circuit, the semiconductor element 5 housed inside the semiconductor device is obtained. The semiconductor element 5 is electrically connected to an external electric circuit and operates with a high-frequency signal.
[0032]
The present invention is not limited to the above-described embodiment, and various modifications can be made without departing from the scope of the present invention.
[0033]
【The invention's effect】
The package for housing a semiconductor element according to the present invention is provided in the portion directly below the input / output terminal on the outer peripheral edge of the upper main surface of the second base so as to enter inside from the outer surface of the frame body of the input / output terminal. A step is formed, and the width D of the step and the width W inside the outer surface of the input / output terminal satisfy the following conditional expression 3W / 2 ≦ D ≦ 3W, whereby the first base body When the solder and the second substrate are joined with a brazing material or the like, it is possible to prevent the stress generated by the difference in thermal expansion from being applied to the input / output terminal as it is, and the input / output terminal is damaged such as a crack. Can be prevented. Further, the distortion generated by screwing and fixing the second base to the external electric circuit board can be absorbed by the step of the second base.
[0034]
Further, the screwing portion projects outward from both end portions of the side surface of the second base body, which are located below the attachment portion, and both end portions of the side surface facing the side surface, and the lower surface is lower than the upper main surface of the first base body. Since the base is bent so as to be positioned above, it is possible to prevent the distortion at the time of fixing with screws from being transmitted to the first base, and as a result, the input / output terminals are not damaged such as cracks. It can prevent more effectively.
[0035]
In the package for housing a semiconductor element according to the present invention, the first base is larger than the portion of the input / output terminal that enters the inside from the outer surface of the input / output terminal frame at the portion directly below the input / output terminal on the outer peripheral edge of the lower main surface. Since the step of the width is formed, when the first base and the second base are joined with a brazing material or the like, it is possible to prevent the stress generated by the difference in thermal expansion from being applied to the input / output terminal as it is. It is possible to prevent the input / output terminals from being damaged such as cracks. Further, the distortion generated by screwing and fixing the second base to the external electric circuit board can be absorbed by the step of the first base.
[0036]
The semiconductor device of the present invention is bonded to the upper surface of the frame body, the semiconductor element housing package of the present invention, the semiconductor element mounted and fixed on the mounting portion and electrically connected to the input / output terminals. By providing the lid, the semiconductor element storage package of the present invention is highly reliable.
[Brief description of the drawings]
FIG. 1 is a plan view showing an example of an embodiment of a package for housing a semiconductor element of the present invention.
2 is a cross-sectional view of the semiconductor element storage package of FIG. 1;
FIG. 3 is a plan view showing another example of the embodiment of the package for housing a semiconductor element of the present invention.
4 is a cross-sectional view of the semiconductor element storage package of FIG. 3;
FIG. 5 is a plan view of a conventional package for housing semiconductor elements.
6 is a cross-sectional view of the semiconductor element storage package of FIG. 5;
[Explanation of symbols]
1: first base 1a: step 1b: placement part 2: second base 2a: step 2b: screwing part 3: frame body 4: input / output terminal 5: semiconductor element

Claims

A first base made of metal having a mounting portion on which the semiconductor element is mounted on the upper main surface;
The first base is mounted on the outer peripheral portion of the upper main surface of the first base so as to surround the mounting portion, and the side portion is provided with a mounting portion for an input / output terminal including a through hole or a notch. A frame,
An input / output terminal made of ceramic having a metallized wiring layer that is electrically connected to the inside and outside of the frame body, which is fitted to the mounting portion;
A second base made of metal having an upper main surface bonded to the lower main surface of the first base and screwed portions formed at corners;
It has
A step is provided on the outer peripheral edge of the upper main surface of the second base body directly below the input / output terminal so as to enter from the outer surface of the frame body of the input / output terminal .
The width D of the step and the width W inside the outer surface of the input / output terminal are expressed by the following conditional expression 3W / 2 ≦ D ≦ 3W
A package for housing a semiconductor element characterized by satisfying

A first base made of metal having a mounting portion on which the semiconductor element is mounted on the upper main surface;
The first base is mounted on the outer peripheral portion of the upper main surface of the first base so as to surround the mounting portion, and the side portion is provided with a mounting portion for an input / output terminal including a through hole or a notch. A frame,
An input / output terminal made of ceramic having a metallized wiring layer that is electrically connected to the inside and outside of the frame body, which is fitted to the mounting portion;
A second base made of metal having an upper main surface bonded to the lower main surface of the first base and screwed portions formed at corners;
It has
A step is provided on the outer peripheral edge of the lower main surface of the first base body directly below the input / output terminal so as to enter from the outer surface of the frame body of the input / output terminal .
The width D of the step and the width W inside the outer surface of the input / output terminal are expressed by the following conditional expression 3W / 2 ≦ D ≦ 3W
A package for housing a semiconductor element characterized by satisfying

The second base includes a screwing portion projecting outside the input / output terminal,
The package for semiconductor storage according to claim 1 or 2, wherein a lower surface of the screwing portion is located above an upper main surface of the first base.

A package for housing a semiconductor element according to any one of claims 1 to 3 ,
A semiconductor element mounted on and fixed to the mounting portion and electrically connected to the input / output terminal;
A lid joined to the upper surface of the frame;
A semiconductor device comprising: