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JP4069097B2 - Electronic component for embedded board, electronic component-embedded substrate, and method of manufacturing electronic component-embedded substrate - Google Patents
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JP4069097B2 - Electronic component for embedded board, electronic component-embedded substrate, and method of manufacturing electronic component-embedded substrate - Google Patents

Electronic component for embedded board, electronic component-embedded substrate, and method of manufacturing electronic component-embedded substrate Download PDF

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JP4069097B2
JP4069097B2 JP2004170947A JP2004170947A JP4069097B2 JP 4069097 B2 JP4069097 B2 JP 4069097B2 JP 2004170947 A JP2004170947 A JP 2004170947A JP 2004170947 A JP2004170947 A JP 2004170947A JP 4069097 B2 JP4069097 B2 JP 4069097B2
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JP2005353727A (en
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加奈子 中島
義春 宇波
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Fujikura Ltd
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Description

この発明は、基板内蔵用電子部品、電子部品内蔵基板、および電子部品内蔵基板の製造方法に関し、特に、両面プリント配線板や多層プリント配線板の絶縁層内に内蔵実装される基板内蔵用電子部品、この基板内蔵用電子部品を内蔵した電子部品内蔵基板、およびこの電子部品内蔵基板の製造方法に関するものである。 The present invention relates to an electronic component with a built-in board, an electronic component-embedded substrate, and a method of manufacturing an electronic component-embedded substrate, and more particularly, an electronic component with a built-in substrate mounted in an insulating layer of a double-sided printed wiring board or a multilayer printed wiring board. is an electronic component-embedded board with a built-in substrate internal electronic components of this, and a method of manufacturing the electronic component-embedded substrate things.

電子部品内蔵基板には、抵抗やコンデンサのような受動電子部品をプリント技術により内層用の基板に形成して受動電子部品を内蔵したものや(例えば、非特許文献1)、受動電子部品以外に、ICチップ等の能動電子部品を基板に埋め込み接続したものがある(例えば、特許文献1)。     In the electronic component built-in substrate, a passive electronic component such as a resistor or a capacitor is formed on an inner layer substrate by a printing technique and the passive electronic component is embedded (for example, Non-Patent Document 1), other than the passive electronic component In some cases, an active electronic component such as an IC chip is embedded and connected to a substrate (for example, Patent Document 1).

従来の電子部品内蔵基板では、電子部品が多層プリント配線板の絶縁層を貫通して3次元的に実装されるものを含めて、基板内蔵用電子部品は電子部品自体の電極を基板の導体に導通接続されるだけである。     In conventional electronic component built-in substrates, including those in which electronic components are three-dimensionally mounted through an insulating layer of a multilayer printed wiring board, electronic components for built-in substrates use the electrodes of the electronic components themselves as conductors of the substrate. It is just a conductive connection.

このため、両面プリント配線板や多層プリント配線板において、両面の導体同士の導通や各層の導体相互の導通のために、絶縁層にバイアホールをあけ、めっきや導電ペースト等によって層間導通部を形成する必要がある。     For this reason, in double-sided printed wiring boards and multilayer printed wiring boards, via holes are made in the insulating layer for conduction between conductors on both sides and between conductors in each layer, and interlayer conduction parts are formed by plating, conductive paste, etc. There is a need to.

このことは、製造工数の増加にとどまらず、層間導通部の設置により電子部品の高密度実装を阻害する。また、フィルドホール構造の以外のものでは、層間導通部上に電子部品を実装することができない。
特開2000−306072号公報 プリント回路技術用語辞典編集委員会著 「プリント回路技術用語辞典第2版」日刊工業新聞社出版、2002年11月15日、2版2刷、288頁
This not only increases the number of manufacturing steps, but also hinders high-density mounting of electronic components by installing interlayer conductive portions. In addition to the filled hole structure, it is impossible to mount an electronic component on the interlayer conductive portion.
JP 2000-306072 A Printed Circuit Technical Terminology Editorial Board "Printed Circuit Technical Terminology Second Edition" published by Nikkan Kogyo Shimbun, November 15, 2002, 2nd edition, 2nd edition, 288 pages

この発明が解決しようとする課題は、層間導通のためだけのバイアホールの個数の削減、或いは電子部品内蔵基板の製造工数の削減、併せて電子部品の高密度実装化を図ることである。     The problem to be solved by the present invention is to reduce the number of via holes only for interlayer conduction or to reduce the number of manufacturing steps of a substrate with built-in electronic components, and to achieve high-density mounting of electronic components.

この発明による基板内蔵用電子部品は、絶縁性樹脂によるパッケージ体により被覆されて両端に各々端面部を有する円柱状のパッケージ形状をなす基板内蔵用電子部品であって、前記パッケージ体の前記端面部の表面に露出した電極表面を含む回路接続用の電極導体部と、前記パッケージ体の外周面を軸線方向全体に延在する周面部、この周面部の一端に連続し前記パッケージ体の一方の端面部の外周側に位置する円弧帯形状の第1端面部、前記周面部の他端に連続し前記パッケージ体の他方の端面部の外周側に位置する円弧帯形状の第2端面部を有する層間導通用導体部とを備える。 An electronic component with a built-in board according to the present invention is an electronic component with a built-in substrate that is covered with a package body made of an insulating resin and has a cylindrical package shape having end face portions at both ends, and the end face portion of the package body. An electrode conductor portion for circuit connection including the electrode surface exposed on the surface of the package, a peripheral surface portion extending the entire outer peripheral surface of the package body in the axial direction, and one end surface of the package body continuous with one end of the peripheral surface portion An arc-shaped first end surface portion located on the outer peripheral side of the portion, and an arc-shaped second end surface portion located on the outer peripheral side of the other end surface portion of the package body, which is continuous with the other end of the peripheral surface portion And a conductive portion for conduction.

この発明による基板内蔵用電子部品は、好ましくは、前記層間導通用導体部が、前記パッケージ体の外表面に形成された導体層により構成されている。     In the electronic component with a built-in board according to the present invention, preferably, the interlayer conductive portion is constituted by a conductor layer formed on the outer surface of the package body.

また、この発明による基板内蔵用電子部品は、好ましくは、前記層間導通用導体部が、前記電極導体部と非導通で、前記電極導体部より電気的に独立している。     In the board built-in electronic component according to the present invention, it is preferable that the interlayer conductive portion is non-conductive with the electrode conductor portion and is electrically independent from the electrode conductor portion.

また、この発明による基板内蔵用電子部品は、前記電極導体部を少なくとも2個有し、これらの電極導体部のうちの少なくとも一つの電極導体部の電極表面は前記パッケージ体の両端のうちの一方の端面部の表面に露出し、残りの電極導体部の電極表面が前記パッケージ体の両端のうちの他方の端面部の表面に露出しているか、あるいは、これらの電極導体部のすべての電極表面が前記パッケージ体の両端のうちの一方の端面部の表面に露出している。     Further, the electronic component with a built-in board according to the present invention has at least two of the electrode conductor portions, and the electrode surface of at least one of the electrode conductor portions is one of both ends of the package body. The electrode surfaces of the remaining electrode conductor portions are exposed on the surface of the other end surface portion of the package body, or all electrode surfaces of these electrode conductor portions are exposed. Is exposed on the surface of one end face of both ends of the package body.

この発明による電子部品内蔵基板は、絶縁層に、上述の発明による基板内蔵用電子部品を内蔵し、当該基板内蔵用電子部品の層間導通用導体部により前記絶縁層の両面に存在する導体が相互に導通接続されている。     In the electronic component built-in substrate according to the present invention, the substrate-embedded electronic component according to the above-described invention is built in the insulating layer, and the conductors existing on both surfaces of the insulating layer are mutually connected by the inter-layer conduction conductor portion of the substrate built-in electronic component. Conductive connection is established.

この発明による電子部品内蔵基板の製造方法は、絶縁層に、上述の発明による基板内蔵用電子部品を内蔵し、当該基板内蔵用電子部品の層間導通用導体部により前記絶縁層の両面に存在する導体が相互に導通接続されている電子部品内蔵基板の製造方法であって、前記基板内蔵用電子部品の軸長と略等しい層厚の前記絶縁層の一方面に第1の導体層を有する積層板の前記絶縁層に、前記基板内蔵用電子部品の外径より大きい内径を有し、底面を前記第1の導体層により与えられる有底孔を形成する工程と、前記有底孔に前記基板内蔵用電子部品を挿入し、前記基板内蔵用電子部品の一方の端面部を前記第1の導体層に対向接触させる工程と、前記絶縁層の他方面の全体に第2の導体層を形成し、前記基板内蔵用電子部品の他方の端面部を前記第2の導体層に接合させる工程と、前記第1の導体層および前記第2の導体層にエッチングにより所定の導体パターンを形成する工程とを含む。In the method of manufacturing an electronic component built-in substrate according to the present invention, the substrate built-in electronic component according to the above-described invention is built in the insulating layer, and the insulating layer is present on both surfaces of the insulating layer by the interlayer conductive conductors. A method of manufacturing a substrate with built-in electronic components in which conductors are conductively connected to each other, wherein the first conductor layer is provided on one surface of the insulating layer having a layer thickness substantially equal to the axial length of the electronic component with a built-in substrate. Forming a bottomed hole in the insulating layer of the plate having an inner diameter larger than the outer diameter of the electronic component for incorporating a substrate and having a bottom surface provided by the first conductor layer; and the substrate in the bottomed hole Inserting a built-in electronic component and bringing one end face of the substrate built-in electronic component into contact with the first conductor layer; and forming a second conductor layer on the entire other surface of the insulating layer. , The other end surface portion of the electronic component for built-in board is A step of bonding the second conductor layer, by etching the first conductive layer and the second conductive layer and forming a predetermined conductor pattern.

また、この発明による電子部品内蔵基板の製造方法は、絶縁層に、上述の発明による基板内蔵用電子部品を内蔵し、当該基板内蔵用電子部品の層間導通用導体部により前記絶縁層の両面に存在する導体が相互に導通接続されている電子部品内蔵基板の製造方法であって、前記基板内蔵用電子部品の軸長と略等しい層厚の前記絶縁層の一方面に第1の導体層を有する積層板の前記絶縁層に、前記基板内蔵用電子部品の外径より大きい内径を有し、底面を前記第1の導体層により与えられる有底孔を形成する工程と、前記有底孔の前記底面に異方性導電フィルムを載置し、前記有底孔に前記基板内蔵用電子部品を挿入し、前記基板内蔵用電子部品の一方の端面部を、前記異方性導電フィルムを介して前記第1の導体層に対向させる工程と、前記絶縁層の他方面の全体に第2の導体層を形成し、前記基板内蔵用電子部品の他方の端面部を前記第2の導体層に接合させる工程と、前記第1の導体層および前記第2の導体層にエッチングにより所定の導体パターンを形成する工程とを含む。Also, in the method of manufacturing an electronic component built-in substrate according to the present invention, the substrate built-in electronic component according to the above-described invention is built in the insulating layer, and the interlayer conductive conductor portion of the substrate built-in electronic component is provided on both surfaces of the insulating layer. A method of manufacturing an electronic component built-in substrate in which existing conductors are conductively connected to each other, wherein the first conductor layer is formed on one surface of the insulating layer having a layer thickness substantially equal to the axial length of the electronic component for board built-in. Forming a bottomed hole in the insulating layer of the laminate having an inner diameter larger than the outer diameter of the board built-in electronic component and having a bottom surface provided by the first conductor layer; and An anisotropic conductive film is placed on the bottom surface, the board built-in electronic component is inserted into the bottomed hole, and one end surface portion of the board built-in electronic component is inserted through the anisotropic conductive film. A step of facing the first conductor layer; Forming a second conductor layer on the entire other surface of the layer, and joining the other end surface portion of the electronic component for substrate incorporation to the second conductor layer; the first conductor layer and the second conductor layer; Forming a predetermined conductor pattern on the conductor layer by etching.

また、この発明による電子部品内蔵基板の製造方法は、絶縁層に、上述の発明による基板内蔵用電子部品を内蔵し、当該基板内蔵用電子部品の層間導通用導体部により前記絶縁層の両面に存在する導体が相互に導通接続されている電子部品内蔵基板の製造方法であって、前記基板内蔵用電子部品の軸長と略等しい層厚の前記絶縁層の一方面に第1の導体層を有する積層板の前記絶縁層に、前記基板内蔵用電子部品の外径より大きい内径を有し、底面を前記第1の導体層により与えられる有底孔を形成する工程と、前記有底孔の前記底面に異方性導電ペーストを塗布し、前記有底孔に前記基板内蔵用電子部品を挿入し、前記基板内蔵用電子部品の一方の端面部を、前記異方性導電ペーストを介して前記第1の導体層に対向させる工程と、前記絶縁層の他方面の全体に第2の導体層を形成し、前記基板内蔵用電子部品の他方の端面部を前記第2の導体層に接合させる工程と、前記第1の導体層および前記第2の導体層にエッチングにより所定の導体パターンを形成する工程とを含む。Also, in the method of manufacturing an electronic component built-in substrate according to the present invention, the substrate built-in electronic component according to the above-described invention is built in the insulating layer, and the interlayer conductive conductor portion of the substrate built-in electronic component is provided on both surfaces of the insulating layer. A method of manufacturing an electronic component built-in substrate in which existing conductors are conductively connected to each other, wherein the first conductor layer is formed on one surface of the insulating layer having a layer thickness substantially equal to the axial length of the electronic component for board built-in. Forming a bottomed hole in the insulating layer of the laminate having an inner diameter larger than the outer diameter of the board built-in electronic component and having a bottom surface provided by the first conductor layer; and Applying an anisotropic conductive paste on the bottom surface, inserting the board built-in electronic component into the bottomed hole, and connecting one end surface portion of the board built-in electronic component to the bottom via the anisotropic conductive paste A step of facing the first conductor layer; Forming a second conductor layer on the entire other surface of the layer, and joining the other end surface portion of the electronic component for substrate incorporation to the second conductor layer; the first conductor layer and the second conductor layer; Forming a predetermined conductor pattern on the conductor layer by etching.

この発明によれば、両面プリント配線板や多層プリント配線板において、基板内蔵用電子部品に形成された層間導通用導体部によって両面の導体同士の導通や各層の導体相互の導通をとることができ、このことにより、層間導通のためだけのバイアホールの個数の削減、或いは電子部品内蔵基板の製造工数を削減でき、更なる電子部品の高密度実装化が可能になる。   According to the present invention, in a double-sided printed wiring board or a multilayer printed wiring board, conduction between conductors on both sides and conduction between conductors on each layer can be achieved by an interlayer conduction conductor formed in the electronic component for built-in board. As a result, the number of via holes only for inter-layer conduction can be reduced, or the number of manufacturing steps of the electronic component built-in substrate can be reduced, and further electronic components can be mounted at higher density.

この発明による基板内蔵用電子部品の一つの実施形態を、図1を参照して説明する。   One embodiment of an electronic component with a built-in board according to the present invention will be described with reference to FIG.

この実施形態の基板内蔵用電子部品10は基板内蔵型コンデンサである。基板内蔵用電子部品10は、コンデンサ構造部21(図2参照省略)の外側を絶縁性樹脂によるパッケージ体11により被覆されて両端に各々端面部12、13を有する円柱状のパッケージ形状をなしている。   The board built-in electronic component 10 of this embodiment is a board built-in type capacitor. The electronic component 10 with a built-in board has a cylindrical package shape in which the outside of the capacitor structure portion 21 (not shown in FIG. 2) is covered with a package body 11 made of an insulating resin and has end surface portions 12 and 13 at both ends. Yes.

パッケージ体11の端面部12、13の各々に回路接続用の電極導体部14、15が形成されている。一方の電極導体部14の電極表面14Aは、パッケージ体11の一方の端面部12の表面12Aに露呈し、他方の電極導体部15の電極表面15Aは、パッケージ体11の他方の端面部13の表面13Aに露呈している。   The electrode conductor portions 14 and 15 for circuit connection are formed on the end surface portions 12 and 13 of the package body 11, respectively. The electrode surface 14A of one electrode conductor portion 14 is exposed to the surface 12A of one end surface portion 12 of the package body 11, and the electrode surface 15A of the other electrode conductor portion 15 is exposed to the other end surface portion 13 of the package body 11. It is exposed on the surface 13A.

パッケージ体11には端面部12と13との間に延在する層間導通用導体部16、17が形成されている。層間導通用導体部16、17は、パッケージ体11の周方向の2箇所に個別にあり、各々、パッケージ体11の外周面を軸線方向(母線方向)全体に延在する周面部16A、17Aと、周面部16A、17Aの一端に連続し端面部12の外周側に位置する円弧帯形状の端面部16B、17Bと、周面部16A、17Aの他端に連続し端面部13の外周側に位置する円弧帯形状の端面部16C、17Cとを有し、全体をスパッタリング、めっき、あるいは導体材料の塗布等によって形成されて所要厚みの導体層をなしている。     Interlayer conduction conductor portions 16 and 17 extending between the end surface portions 12 and 13 are formed in the package body 11. Interlayer conduction conductors 16 and 17 are individually provided at two locations in the circumferential direction of the package body 11, and each of the circumferential surface portions 16 </ b> A and 17 </ b> A extends the entire outer circumferential surface of the package body 11 in the axial direction (bus line direction). The arc-shaped end surface portions 16B and 17B, which are continuous to one end of the peripheral surface portions 16A, 17A and located on the outer peripheral side of the end surface portion 12, and the other end of the peripheral surface portions 16A, 17A are positioned on the outer peripheral side of the end surface portion 13. The end faces 16C and 17C have a circular arc shape, and are formed by sputtering, plating, application of a conductor material, or the like to form a conductor layer having a required thickness.

基板内蔵用電子部品10の内部構造例およびその製造方法に一例を、図2(a)〜(d)を参照して説明する。     An example of an internal structure example of the electronic component 10 with a built-in substrate and a manufacturing method thereof will be described with reference to FIGS.

図2(a)に示されているように、誘電体22と、複数枚の対向内部電極板23と、2個の共通端面部電極24、25とにより構成された円柱形状のコンデンサ構造部21を準備し、図2(b)に示されているように、これの外表面全体を絶縁性樹脂により一様に被覆し、パッケージ体11を設ける。パッケージ体11は、両端に端面部12、13を有する円柱状をなす。     As shown in FIG. 2 (a), a cylindrical capacitor structure 21 composed of a dielectric 22, a plurality of counter internal electrode plates 23, and two common end face electrodes 24 and 25. 2 is prepared, and as shown in FIG. 2B, the entire outer surface thereof is uniformly covered with an insulating resin, and a package body 11 is provided. The package body 11 has a cylindrical shape having end faces 12 and 13 at both ends.

つぎに、図2(c)に示されているように、パッケージ体11の端面部12、13の各々に中心部にレーザ加工等によって電極用開口26、27をあけ、めっき等によって電極用開口26、27を回路接続用の電極導体部14、15によって埋める。電極導体部14、15は、各々、共通端面部電極24、25に導通接続され、電極導体部14、15の各々の電極表面14A、15Aがパッケージ体11の端面部12、13の各々の表面12A、13Aに略面一で露呈する。     Next, as shown in FIG. 2C, electrode openings 26 and 27 are formed in the center of each of the end surface portions 12 and 13 of the package body 11 by laser processing or the like, and electrode openings are formed by plating or the like. 26 and 27 are filled with electrode conductor portions 14 and 15 for circuit connection. The electrode conductor portions 14 and 15 are electrically connected to the common end surface electrodes 24 and 25, respectively. The electrode surfaces 14 A and 15 A of the electrode conductor portions 14 and 15 are the surfaces of the end surface portions 12 and 13 of the package body 11. Exposed to 12A and 13A substantially flush.

つぎに、図2(d)に示されているように、パッケージ体11の外表面に、スパッタリング、めっき、あるいは導体材料の塗布によって、層間導通用導体部16、17を形成する。     Next, as shown in FIG. 2D, interlayer conductive portions 16 and 17 are formed on the outer surface of the package body 11 by sputtering, plating, or applying a conductive material.

層間導通用導体部16、17は、パッケージ体11の周方向の2箇所に個別に設けられ、各々、パッケージ体11の外周面を軸線方向(母線方向)全体に延在する周面部16A、17Aと、周面部16A、17Aの一端に連続し端面部12の外周側に位置する円弧帯形状の端面部16B、17Bと、周面部16A、17Aの他端に連続し端面部13の外周側に位置する円弧帯形状の端面部16C、17Cとを有し、所要厚みの導体層をなしている。     Interlayer conduction conductor portions 16 and 17 are individually provided at two locations in the circumferential direction of the package body 11, and each of the circumferential surface portions 16 </ b> A and 17 </ b> A extends the entire outer circumferential surface of the package body 11 in the axial direction (bus line direction). And arc-shaped end surface portions 16B and 17B located on the outer peripheral side of the end surface portion 12 and continuing to one end of the peripheral surface portions 16A and 17A, and on the outer peripheral side of the end surface portion 13 continuing to the other end of the peripheral surface portions 16A and 17A. It has end faces 16C and 17C in the shape of arcuate strips, and forms a conductor layer with a required thickness.

層間導通用導体部16、17は、各々、電極導体部14、15の何れとも非導通で、電極導体部14、15より電気的に独立している。     Interlayer conduction conductors 16 and 17 are non-conducting with electrode conductors 14 and 15, respectively, and are electrically independent of electrode conductors 14 and 15.

つぎに、この発明による電子部品内蔵基板の一つの実施形態およびその製造方法の一例を、図3(a)〜(d)を参照して説明する。     Next, an embodiment of an electronic component built-in substrate according to the present invention and an example of a manufacturing method thereof will be described with reference to FIGS.

まず、図3(a)に示されているように、樹脂製の絶縁層31の片面に銅箔(導体層)32を有する片面銅張り積層板(CCL)30の絶縁層31にレーザ加工やエッチング等によって丸孔33をあける。この丸孔33は、基板内蔵用電子部品10の外径に概ね等しい内径を有し、底面を銅箔32により与えられる有底孔をなす。     First, as shown in FIG. 3A, the insulating layer 31 of a single-sided copper-clad laminate (CCL) 30 having a copper foil (conductor layer) 32 on one side of a resin-made insulating layer 31 is subjected to laser processing or A round hole 33 is formed by etching or the like. The round hole 33 has an inner diameter substantially equal to the outer diameter of the electronic component 10 with a built-in board, and forms a bottomed hole provided with a copper foil 32 on the bottom surface.

丸孔33に基板内蔵用電子部品10を挿入する。基板内蔵用電子部品10は、絶縁層31の層厚に概ね等しい軸長を有する円柱形状をなしているから、図3(b)に示されているように、丸孔33に対する挿入によって基板内蔵用電子部品10の下側の端面部13は丸孔33の底面部の銅箔32に対向接触し、上側の端面部12は絶縁層31の上面31Aとほぼ面一になる。     The board built-in electronic component 10 is inserted into the round hole 33. Since the electronic component 10 with a built-in board has a cylindrical shape having an axial length substantially equal to the layer thickness of the insulating layer 31, as shown in FIG. The lower end surface portion 13 of the electronic component 10 is in contact with the copper foil 32 on the bottom surface of the round hole 33, and the upper end surface portion 12 is substantially flush with the upper surface 31 A of the insulating layer 31.

つぎに、図3(c)に示されているように、絶縁層31の上面31Aの全体に、めっき等によって銅箔(導体層)34を形成する。これにより基板内蔵用電子部品10の上側の端面部12は丸孔33の天井部をなす銅箔34に接合する。     Next, as shown in FIG. 3C, a copper foil (conductor layer) 34 is formed on the entire upper surface 31A of the insulating layer 31 by plating or the like. Thereby, the upper end surface portion 12 of the electronic component 10 with a built-in board is bonded to the copper foil 34 that forms the ceiling portion of the round hole 33.

つぎに、図3(d)に示されているように、銅箔32、34をエッチングし、導体パターン35、36を形成する。     Next, as shown in FIG. 3D, the copper foils 32 and 34 are etched to form conductor patterns 35 and 36.

この実施形態では、基板内蔵用電子部品10の電極導体部15と層間導通用導体部16の端面部16Cと層間導通用導体部17の端面部17Cとが導体35aに導通接続され、基板内蔵用電子部品10の電極導体部14が導体36aに、層間導通用導体部16の端面部16Bが導体36bに、層間導通用導体部17の端面部17Bが導体36cに各々導通接続される(図1、図2(d)参照)。この接続部を上方より見ると、図4に示されているようになる。     In this embodiment, the electrode conductor portion 15 of the electronic component 10 for incorporating a substrate, the end surface portion 16C of the conductor portion 16 for interlayer conduction, and the end surface portion 17C of the conductor portion 17 for interlayer conduction are electrically connected to the conductor 35a. The electrode conductor portion 14 of the electronic component 10 is conductively connected to the conductor 36a, the end surface portion 16B of the interlayer conductive portion 16 is connected to the conductor 36b, and the end surface portion 17B of the interlayer conductive portion 17 is connected to the conductor 36c (FIG. 1). FIG. 2 (d)). When this connection portion is viewed from above, it is as shown in FIG.

これにより、層間導通用導体部16は導体35aと36bとを導通接続する層間導通部をなし、層間導通用導体部17は導体35aと36cとを導通接続する層間導通部をなす。     As a result, the interlayer conductive portion 16 forms an interlayer conductive portion for conductively connecting the conductors 35a and 36b, and the interlayer conductive conductor portion 17 forms an interlayer conductive portion for conductively connecting the conductors 35a and 36c.

このことにより、電子部品内蔵型の両面プリント配線板や多層プリント配線板における層間導通のためだけのバイアホールの個数の削減でき、基板の製造工数を削減でき、併せて電子部品の高密度実装化が可能になる。     This reduces the number of via holes just for interlayer conduction in double-sided printed wiring boards with built-in electronic components and multilayer printed wiring boards, reduces the number of board manufacturing steps, and also achieves high-density mounting of electronic components. Is possible.

また、層間導通用導体部16、17が、各々、電極導体部14、15の何れとも非導通で、電極導体部14、15より電気的に独立していることにより、両面プリント配線板や多層プリント配線板における層間導通部の配置と回路設計の自由度が増し、更なる電子部品の高密度実装化が可能になる。     Further, since the inter-layer conducting conductors 16 and 17 are non-conducting with the electrode conductors 14 and 15, respectively, and are electrically independent from the electrode conductors 14 and 15, double-sided printed wiring boards and multilayers are provided. Arrangement of interlayer conductive portions in the printed wiring board and the degree of freedom in circuit design are increased, and further electronic components can be mounted at higher density.

電子部品内蔵基板において、基板内蔵用電子部品10の電極導体部14、層間導通用導体部16、17と導体36a、36b、36cとの導通は、絶縁層31上にめっきされた導体層34により与えられるので、接続抵抗が小さく、良好に安定したものになる。     In the electronic component built-in substrate, the conduction between the electrode conductor portion 14 and the inter-layer conduction conductor portions 16 and 17 and the conductors 36a, 36b, and 36c of the electronic component 10 for incorporating the substrate is performed by the conductor layer 34 plated on the insulating layer 31. As a result, the connection resistance is small, and it is stable.

これに対し、基板内蔵用電子部品10の電極導体部15、層間導通用導体部16、17と導体35aとの導通は、単なる対向接触だけであるので、接続抵抗が大きく、不安定になる可能性がある。     On the other hand, the conduction between the electrode conductor portion 15 and the inter-layer conduction conductor portions 16 and 17 of the electronic component 10 with a built-in board and the conductor 35a is merely a facing contact, so that the connection resistance is large and may become unstable. There is sex.

このような場合には、図5に示されているように、異方性導電フィルム(ACF)41を基板内蔵用電子部品10の端面部13と丸孔33の底部をなす銅箔32との間に挟み込んで異方性導電フィルム41を介して導通をとるようにするか、図6に示されているように丸孔33の底部をなす銅箔32上に、異方性導電ペースト(ACP)42を塗布し、異方性導電ペースト42を介して導通をとるようにすればよい。     In such a case, as shown in FIG. 5, the anisotropic conductive film (ACF) 41 is made up of the end face portion 13 of the electronic component 10 with a built-in board and the copper foil 32 forming the bottom of the round hole 33. An anisotropic conductive paste (ACP) is formed on the copper foil 32 forming the bottom of the round hole 33 as shown in FIG. ) 42 may be applied so as to conduct through the anisotropic conductive paste 42.

なお、基板内蔵用電子部品10に設けられる層間導通用導体部の個数は、2個に限られることはなく、必要な層間導通部の個数に応じて1個でもよく、また、2個以上の複数個であってもよい。     Note that the number of inter-layer conduction conductors provided in the board-embedded electronic component 10 is not limited to two, and may be one or two or more according to the number of necessary interlayer conduction parts. There may be a plurality.

つぎに、この発明による基板内蔵用電子部品の他の実施形態を、図7を参照して説明する。なお、図7において、図1に対応する部分は、図1に付した符号と同一の符号を付けて、その説明を省略する。     Next, another embodiment of the electronic component with a built-in board according to the present invention will be described with reference to FIG. 7, parts corresponding to those in FIG. 1 are denoted by the same reference numerals as those in FIG. 1, and description thereof is omitted.

この実施形態の基板内蔵用電子部品100は、パッケージ体11の一方の端面部12に、すべての電極導体部14、15が設けられている。電極導体部14、15の電極表面14A、15Aは、パッケージ体11の一方の端面部12の表面12Aに露出している。     In the substrate built-in electronic component 100 of this embodiment, all the electrode conductor portions 14 and 15 are provided on one end surface portion 12 of the package body 11. The electrode surfaces 14 </ b> A and 15 </ b> A of the electrode conductor portions 14 and 15 are exposed on the surface 12 </ b> A of one end surface portion 12 of the package body 11.

基板内蔵用電子部品100の他方の端面部13にはその全面に導体層18が形成され、層間導通用導体部16と17とが端面部13の側で導体層18によって導通接続されている。     A conductor layer 18 is formed on the other end surface portion 13 of the electronic component 100 with a built-in substrate, and the interlayer conduction conductor portions 16 and 17 are conductively connected by the conductor layer 18 on the end surface portion 13 side.

この基板内蔵用電子部品100を図3(d)に示されている電子部品内蔵基板と同等の基板に実装した場合、基板内蔵用電子部品100の実装部を上方より見ると、図8に示されているようになる。この場合、電極導体部14、15は、各々、めっきによる導体層34より与えられる導体36d、36eと導通接続される。     When the board built-in electronic component 100 is mounted on a board equivalent to the board with built-in electronic component shown in FIG. 3D, the mounting portion of the board built-in electronic component 100 is shown in FIG. Be like that. In this case, the electrode conductor portions 14 and 15 are electrically connected to conductors 36d and 36e provided from the conductor layer 34 formed by plating, respectively.

この発明による基板内蔵用電子部品は、コンデンサに限られることはなく、抵抗等のその他の受動電子部品でもよく、また、ダイオード、トランジスタ、ICチップ等の能動電子部品でもよく、電極導体部の個数も、2個のものに限られることはなく、2個以上のものでもよい。     The board built-in electronic component according to the present invention is not limited to a capacitor, and may be another passive electronic component such as a resistor, or may be an active electronic component such as a diode, a transistor, or an IC chip, and the number of electrode conductor portions. However, the number is not limited to two, and may be two or more.

この発明による基板内蔵用電子部品の一つの実施形態を示す斜視図である。BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a perspective view showing one embodiment of an electronic component with a built-in board according to the present invention. (a)〜(d)はこの発明による基板内蔵用電子部品の内部構造例およびその製造方法に一例を示す拡大断面図である。(A)-(d) is an expanded sectional view which shows an example in the example of an internal structure of the electronic component for board | substrate incorporation by this invention, and its manufacturing method. (a)〜(d)はこの発明による電子部品内蔵基板の一つの実施形態およびその製造方法の一例を示す拡大断面図である。(A)-(d) is an expanded sectional view which shows one example of one Embodiment of the electronic component built-in board by this invention, and its manufacturing method. 一つの実施形態の電子部品内蔵基板の基板内蔵用電子部品実装部の平面図である。It is a top view of the electronic component mounting part for board | substrate incorporation of the electronic component built-in board | substrate of one Embodiment. この発明による電子部品内蔵基板の他の実施形態を示す拡大断面図である。It is an expanded sectional view which shows other embodiment of the electronic component built-in substrate by this invention. この発明による電子部品内蔵基板の他の実施形態を示す拡大断面図である。It is an expanded sectional view which shows other embodiment of the electronic component built-in substrate by this invention. この発明による基板内蔵用電子部品の他の実施形態を示す斜視図である。It is a perspective view which shows other embodiment of the electronic component for board | substrates by this invention. 他の実施形態の電子部品内蔵基板の基板内蔵用電子部品実装部の平面図である。It is a top view of the electronic component mounting part for board | substrate incorporation of the electronic component built-in board | substrate of other embodiment.

符号の説明Explanation of symbols

10、100 基板内蔵用電子部品
11 パッケージ体
12、13 端面部
14、15 電極導体部
16、17 層間導通用導体部
18 導体層
21 コンデンサ構造部
22 誘電体
23 対向内部電極板
24、25 共通端面部電極
26、27 電極用開口
30 片面銅張り積層板
31 絶縁層
32 銅箔
33 丸孔
34 銅箔
35、36 導体パターン
41 異方性導電フィルム
42 異方性導電ペースト
DESCRIPTION OF SYMBOLS 10,100 Board built-in electronic component 11 Package body 12, 13 End surface part 14, 15 Electrode conductor part 16, 17 Interlayer conduction conductor part 18 Conductor layer 21 Capacitor structure part 22 Dielectric 23 Opposite internal electrode plate 24, 25 Common end face Partial electrode 26, 27 Electrode opening 30 Single-sided copper-clad laminate 31 Insulating layer 32 Copper foil 33 Round hole 34 Copper foil 35, 36 Conductor pattern 41 Anisotropic conductive film 42 Anisotropic conductive paste

Claims (9)

絶縁性樹脂によるパッケージ体により被覆されて両端に各々端面部を有する円柱状のパッケージ形状をなす基板内蔵用電子部品であって、
前記パッケージ体の前記端面部の表面に露出した電極表面を含む回路接続用の電極導体部と、
前記パッケージ体の外周面を軸線方向全体に延在する周面部、この周面部の一端に連続し前記パッケージ体の一方の端面部の外周側に位置する円弧帯形状の第1端面部、前記周面部の他端に連続し前記パッケージ体の他方の端面部の外周側に位置する円弧帯形状の第2端面部を有する層間導通用導体部と
を備える基板内蔵用電子部品。
A board-embedded electronic component having a cylindrical package shape that is covered with a package body made of an insulating resin and has end face portions at both ends,
An electrode conductor portion for circuit connection including an electrode surface exposed on the surface of the end face portion of the package body;
A peripheral surface portion extending the entire outer peripheral surface of the package body in the axial direction, a first end surface portion in the shape of an arc belt continuous with one end of the peripheral surface portion and positioned on the outer peripheral side of one end surface portion of the package body, An inter-layer conduction conductor portion having a second end surface portion in the shape of a circular arc band that is continuous with the other end of the surface portion and is located on the outer peripheral side of the other end surface portion of the package body;
An electronic component with a built-in board.
前記層間導通用導体部は前記パッケージ体の外表面に形成された導体層により構成されている請求項1記載の基板内蔵用電子部品。   The board built-in electronic component according to claim 1, wherein the interlayer conductive part is formed of a conductor layer formed on an outer surface of the package body. 前記層間導通用導体部は、前記電極導体部と非導通で、前記電極導体部より電気的に独立している請求項1または2記載の基板内蔵用電子部品。   The board built-in electronic component according to claim 1, wherein the inter-layer conduction conductor is non-conducting with the electrode conductor and is electrically independent of the electrode conductor. 前記電極導体部を少なくとも2個有し、これらの電極導体部のうちの少なくとも一つの電極導体部の電極表面は前記パッケージ体の両端のうちの一方の端面部の表面に露出し、残りの電極導体部の電極表面が前記パッケージ体の両端のうちの他方の端面部の表面に露出している請求項1〜3の何れか1項記載の基板内蔵用電子部品。     There are at least two electrode conductor portions, and the electrode surface of at least one of the electrode conductor portions is exposed on the surface of one end surface portion of the both ends of the package body, and the remaining electrodes The electronic part for board | substrate incorporation in any one of Claims 1-3 which the electrode surface of the conductor part is exposed to the surface of the other end surface part among the both ends of the said package body. 前記電極導体部を少なくとも2個有し、これらの電極導体部のすべての電極表面が前記パッケージ体の両端のうちの一方の端面部の表面に露出している請求項1〜3の何れか1項記載の基板内蔵用電子部品。   4. The device according to claim 1, wherein at least two electrode conductor portions are provided, and all electrode surfaces of these electrode conductor portions are exposed on the surface of one end surface portion of both ends of the package body. An electronic component for mounting on a board as described in the item. 絶縁層に、請求項1〜5の何れか1項記載の基板内蔵用電子部品を内蔵し、当該基板内蔵用電子部品の層間導通用導体部により前記絶縁層の両面に存在する導体が相互に導通接続されている電子部品内蔵基板。   The board-embedded electronic component according to any one of claims 1 to 5 is built in the insulating layer, and conductors existing on both surfaces of the insulating layer are mutually connected by the inter-layer conduction conductor portion of the board-embedded electronic component. A board with built-in electronic components that is connected in a conductive manner. 絶縁層に、請求項1〜5の何れか1項記載の基板内蔵用電子部品を内蔵し、当該基板内蔵用電子部品の層間導通用導体部により前記絶縁層の両面に存在する導体が相互に導通接続されている電子部品内蔵基板の製造方法であって、The board-embedded electronic component according to any one of claims 1 to 5 is built in the insulating layer, and conductors existing on both surfaces of the insulating layer are mutually connected by the inter-layer conduction conductor portion of the board-embedded electronic component. A method of manufacturing an electronic component built-in substrate that is conductively connected,
前記基板内蔵用電子部品の軸長と略等しい層厚の前記絶縁層の一方面に第1の導体層を有する積層板の前記絶縁層に、前記基板内蔵用電子部品の外径より大きい内径を有し、底面を前記第1の導体層により与えられる有底孔を形成する工程と、The insulating layer of the laminate having a first conductor layer on one surface of the insulating layer having a layer thickness substantially equal to the axial length of the electronic component for built-in substrate has an inner diameter larger than the outer diameter of the electronic component for embedded substrate. Forming a bottomed hole provided with a bottom surface provided by the first conductor layer;
前記有底孔に前記基板内蔵用電子部品を挿入し、前記基板内蔵用電子部品の一方の端面部を前記第1の導体層に対向接触させる工程と、Inserting the substrate built-in electronic component into the bottomed hole, and bringing one end face of the substrate built-in electronic component into contact with the first conductor layer; and
前記絶縁層の他方面の全体に第2の導体層を形成し、前記基板内蔵用電子部品の他方の端面部を前記第2の導体層に接合させる工程と、Forming a second conductor layer on the entire other surface of the insulating layer, and bonding the other end surface portion of the electronic component for built-in board to the second conductor layer;
前記第1の導体層および前記第2の導体層にエッチングにより所定の導体パターンを形成する工程と  Forming a predetermined conductor pattern by etching on the first conductor layer and the second conductor layer;
を含む電子部品内蔵基板の製造方法。  A method for manufacturing a substrate with built-in electronic components including:
絶縁層に、請求項1〜5の何れか1項記載の基板内蔵用電子部品を内蔵し、当該基板内蔵用電子部品の層間導通用導体部により前記絶縁層の両面に存在する導体が相互に導通接続されている電子部品内蔵基板の製造方法であって、The board-embedded electronic component according to any one of claims 1 to 5 is built in the insulating layer, and conductors existing on both surfaces of the insulating layer are mutually connected by the inter-layer conduction conductor portion of the board-embedded electronic component. A method of manufacturing an electronic component built-in substrate that is conductively connected,
前記基板内蔵用電子部品の軸長と略等しい層厚の前記絶縁層の一方面に第1の導体層を有する積層板の前記絶縁層に、前記基板内蔵用電子部品の外径より大きい内径を有し、底面を前記第1の導体層により与えられる有底孔を形成する工程と、The insulating layer of the laminate having a first conductor layer on one surface of the insulating layer having a layer thickness substantially equal to the axial length of the electronic component for built-in substrate has an inner diameter larger than the outer diameter of the electronic component for embedded substrate. Forming a bottomed hole provided with a bottom surface provided by the first conductor layer;
前記有底孔の前記底面に異方性導電フィルムを載置し、前記有底孔に前記基板内蔵用電子部品を挿入し、前記基板内蔵用電子部品の一方の端面部を、前記異方性導電フィルムを介して前記第1の導体層に対向させる工程と、An anisotropic conductive film is placed on the bottom surface of the bottomed hole, the board built-in electronic component is inserted into the bottomed hole, and one end surface portion of the board built-in electronic component is placed on the anisotropic surface. Facing the first conductor layer through a conductive film;
前記絶縁層の他方面の全体に第2の導体層を形成し、前記基板内蔵用電子部品の他方の端面部を前記第2の導体層に接合させる工程と、Forming a second conductor layer on the entire other surface of the insulating layer, and bonding the other end surface portion of the electronic component for built-in board to the second conductor layer;
前記第1の導体層および前記第2の導体層にエッチングにより所定の導体パターンを形成する工程と  Forming a predetermined conductor pattern by etching on the first conductor layer and the second conductor layer;
を含む電子部品内蔵基板の製造方法。  A method for manufacturing a substrate with built-in electronic components including:
絶縁層に、請求項1〜5の何れか1項記載の基板内蔵用電子部品を内蔵し、当該基板内蔵用電子部品の層間導通用導体部により前記絶縁層の両面に存在する導体が相互に導通接続されている電子部品内蔵基板の製造方法であって、The board-embedded electronic component according to any one of claims 1 to 5 is built in the insulating layer, and conductors existing on both surfaces of the insulating layer are mutually connected by the inter-layer conduction conductor portion of the board-embedded electronic component. A method of manufacturing an electronic component built-in substrate that is conductively connected,
前記基板内蔵用電子部品の軸長と略等しい層厚の前記絶縁層の一方面に第1の導体層を有する積層板の前記絶縁層に、前記基板内蔵用電子部品の外径より大きい内径を有し、底面を前記第1の導体層により与えられる有底孔を形成する工程と、The insulating layer of the laminate having a first conductor layer on one surface of the insulating layer having a layer thickness substantially equal to the axial length of the electronic component for built-in substrate has an inner diameter larger than the outer diameter of the electronic component for embedded substrate. Forming a bottomed hole provided with a bottom surface provided by the first conductor layer;
前記有底孔の前記底面に異方性導電ペーストを塗布し、前記有底孔に前記基板内蔵用電子部品を挿入し、前記基板内蔵用電子部品の一方の端面部を、前記異方性導電ペーストを介して前記第1の導体層に対向させる工程と、An anisotropic conductive paste is applied to the bottom surface of the bottomed hole, the board built-in electronic component is inserted into the bottomed hole, and one end surface portion of the board built-in electronic component is connected to the anisotropic conductive material. Facing the first conductor layer via a paste;
前記絶縁層の他方面の全体に第2の導体層を形成し、前記基板内蔵用電子部品の他方の端面部を前記第2の導体層に接合させる工程と、Forming a second conductor layer on the entire other surface of the insulating layer, and bonding the other end surface portion of the electronic component for built-in board to the second conductor layer;
前記第1の導体層および前記第2の導体層にエッチングにより所定の導体パターンを形成する工程と  Forming a predetermined conductor pattern by etching on the first conductor layer and the second conductor layer;
を含む電子部品内蔵基板の製造方法。  A method for manufacturing a substrate with built-in electronic components including:
JP2004170947A 2004-06-09 2004-06-09 Electronic component for embedded board, electronic component-embedded substrate, and method of manufacturing electronic component-embedded substrate Expired - Fee Related JP4069097B2 (en)

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