JP4075457B2 - Edge correction circuit and edge correction method - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to an edge correction circuit for emphasizing edges of image information, and more particularly to an edge correction circuit and an edge correction method that suppress noise amplification during edge correction processing.
[0002]
[Prior art]
In an image processing apparatus, when an image is displayed using an input video signal from a camera, an edge correction circuit is provided for the purpose of making the displayed screen easier to see and emphasizing the image expression, and based on the characteristics of the photographing lens. Shading processing for electrically correcting the decrease in brightness around the screen and edge correction processing for emphasizing and expressing the edges of the image are performed. Conventionally, such shading processing and After the edge correction processing is performed independently, the processing results are added together to obtain an output video signal.
[0003]
FIG. 8 shows a configuration example of a conventional edge correction circuit.
As shown in FIG. 8, the conventional edge correction circuit includes a shading correction coefficient generation circuit 1, a multiplier 2, an edge extraction bandpass filter (BPF) 3, a coring circuit 4, and a multiplier 5. And an adder 6.
[0004]
The shading correction coefficient generation circuit 1 generates a shading correction coefficient signal for determining a shading correction characteristic for a video signal input. The multiplier 2 multiplies the input video signal by a shading correction coefficient, and outputs a video signal after shading correction. The edge extracting BPF 3 extracts an edge component from the video signal subjected to the shading correction from the multiplier 2 and outputs it as an edge signal.
[0005]
The coring circuit 4 outputs an edge signal in which the noise component is attenuated by performing a coring process for cutting off a signal equal to or lower than a threshold value determined by the coring level signal from the edge signal from the edge extraction BPF 3. The multiplier 5 multiplies the edge signal from the coring circuit 4 by the edge enhancement signal and outputs the enhanced edge signal. The adder 6 adds the shading-corrected video signal from the multiplier 2 and the enhanced edge signal from the multiplier 5 to generate an output video signal.
[0006]
FIG. 9 shows a logic circuit configuration example of a conventional coring circuit. As shown in FIG. 9, the coring circuit 4 shown in FIG. 8 constitutes a threshold processing circuit including a comparator 41 and an AND circuit 42.
The comparator 41 outputs 0 when the input signal (n bits) from the edge extraction BPF 3 exceeds a threshold determined by the coring level signal (n bits), and outputs 1 otherwise. The AND circuit 42 outputs 0 when the output of the comparator 41 is 0, and outputs the input signal as it is when the output of the comparator 41 is 1.
Therefore, according to the circuit of FIG. 9, an output signal in which a portion below the threshold in the input signal is cut off can be obtained.
[0007]
FIG. 10 is a timing chart for explaining the operation of the edge correction circuit of this conventional example, showing respective signals in one scanning period in each part of the edge correction circuit shown in FIG. Signals S11 and (b) are shading correction coefficient signals S12, (c) is a shading corrected video signal S13, (d) is an edge signal S14 and coring level signal S15, and (e) is an output signal of the coring circuit 3. S16 and (f) respectively show the output video signal S18. In these figures, the horizontal axis represents the temporal position of each signal corresponding to an image in one scanning period, where c is the center of the screen. The axis represents the level of each signal.
[0008]
The operation of the conventional edge correction circuit will be described below with reference to FIGS.
The input video signal S11 shows the outline of the rectangular object, but the left and right signal levels are lowered around the screen center position c as shown in FIG. 10A based on the characteristics of the photographing lens. It has become. Furthermore, noise is superimposed on the upper and lower sides of the input video signal S11 as shown by a sand dust pattern in the figure.
[0009]
The input video signal S11 is generated in the shading correction coefficient generation circuit 1 in the multiplier 2 and is small at the center of the screen as shown in FIG. 10B, but gradually increases in the left and right sides of the screen. By multiplying by the shading correction coefficient S12, the decrease in the left and right signal levels is corrected and output as a shading-corrected video signal S13 as shown in FIG.
The amplitude of the video signal S13 is increased by being amplified at the time of shading correction, and noise is also amplified and increased at that time.
[0010]
The shading-corrected video signal S13 is input to the edge extraction BPF 3. In the edge extraction BPF 3, a difference is obtained again from the signal obtained by taking the difference between two adjacent pixels in the video signal S 13 (double difference), and the like, thereby performing a process corresponding to the left and right contours of the subject. As shown in FIG. 10D, an edge signal S14 is extracted. Noise is also superimposed on the edge signal S14 as shown by the sand pattern.
[0011]
The extracted edge signal S14 is applied to the coring circuit 4 together with the coring level signal S15. As shown in FIG. 10D, the coring level signal S15 is composed of threshold values that are equal in magnitude in each part of the screen. The coring circuit 4 attenuates a noise component as shown in FIG. 10E by blocking a portion within the positive and negative threshold range determined by the coring level signal S15 from the input edge signal S14. An output signal S16 comprising the edge signal thus obtained is obtained.
[0012]
The output signal S16 of the coring circuit 4 is multiplied by an edge enhancement signal that determines the degree of enhancement with respect to the edge in the multiplier 5, and is output as an enhanced edge signal S17. The emphasized edge signal S17 and the video signal S13 subjected to the shading correction from the multiplier 2 are added in the adder 6, thereby performing shading correction and edge enhancement as shown in FIG. An output video signal S18 is obtained.
In the output video signal S18, noise (schematically shown by a dark sand pattern) based on shading processing and noise (schematically shown by a thin sand pattern) remaining by coring processing and amplified by edge enhancement processing are included. Are superimposed.
[0013]
[Problems to be solved by the invention]
In the conventional edge correction circuit shown in FIG. 8, a coring level signal composed of a threshold value having a constant value regardless of the screen position with respect to the edge signal S14 extracted from the video signal S13 subjected to shading correction. The coring process is performed in S15.
However, since the shading-corrected video signal S13 has a noise level difference between a large shading correction coefficient and a small shading correction coefficient, the coring level signal S15 is a threshold having a certain magnitude. When the coring process is performed, the noise of the portion with a large level remains without being attenuated.
[0014]
The residual noise is further enhanced by the edge enhancement signal and added to the shading-corrected video signal S13 by the adder 6. Therefore, the noise is enhanced in the output video signal S18. There was a problem of becoming.
On the other hand, when the threshold level of the coring level signal S15 is increased in order to attenuate the noise increased by the shading process, the edge signal component is also attenuated, so that the edge enhancement effect is reduced. Will occur.
[0015]
The present invention has been made in view of the above-described circumstances, and an edge correction circuit and an edge correction method capable of preventing noise in an output video signal from being emphasized by edge correction processing in an edge correction circuit. The purpose is to provide.
[0016]
[Means for Solving the Problems]
In order to solve the above-described problem, the invention according to claim 1 relates to an edge correction circuit, wherein the input video signal is multiplied by a predetermined shading correction coefficient to output a shading-corrected video signal; Edge extraction means for extracting an edge signal from a shading-corrected video signal, second multiplication means for outputting a coring level signal corrected by multiplying the coring level signal by the shading correction coefficient, and the extracted signal Coring means for coring the edge signal according to the corrected coring level signal and outputting the cored edge signal, and multiplying the cored edge signal by a predetermined enhancement degree. A third multiplication means for outputting the emphasized edge signal and the shading correction from the first multiplication means. Is characterized in that an adding means for obtaining an enhanced edge signal addition to the output video signal from said third multiplication means to the video signal.
[0017]
The invention according to claim 2 relates to the edge correction circuit according to claim 1, wherein the coring means removes a signal below a threshold determined by the corrected coring level signal from the input edge signal. And a threshold processing means for generating an output signal.
[0018]
The invention according to claim 3 relates to the edge correction circuit according to claim 1, wherein the coring means outputs a signal in a range corresponding to a negative value input in the input edge signal as a positive value having an equal absolute value. First signal converting means, and subtracting means for generating an output by shifting the output signal of the first signal converting means in a negative direction by a threshold value determined by the corrected coring level signal, The absolute value of the limit means for removing the negative value range in the output signal of the subtracting means and the signal in the range corresponding to the negative value input in the output signal of the limit means are equal. As a negative value It is characterized by comprising second signal converting means for outputting.
[0019]
According to a fourth aspect of the invention, there is provided the edge correction circuit according to the first aspect, wherein the coring means converts an input edge signal composed of a binary signal including two's complement into an absolute value. A subtracting means for subtracting the corrected coring level signal from the edge signal composed of the absolute value, a limit means for removing a negative value range in the edge signal as a result of the subtraction, and an output of the limit means It is characterized by comprising an absolute value -2's complement conversion means for converting an edge signal from an absolute value into a binary signal including 2's complement.
[0020]
The invention according to claim 5 relates to an edge correction method, wherein an input video signal is multiplied by a predetermined shading correction coefficient to generate a shading corrected video signal, and the edge signal is generated from the shading corrected video signal. And a coring level signal multiplied by the shading correction coefficient to generate a corrected coring level signal, and a core corresponding to the extracted coring level signal is generated with respect to the extracted edge signal. Ring to generate a coring edge signal, and then multiply the cored edge signal by a predetermined emphasis degree to generate an emphasized edge signal, and the shading-corrected video signal is subjected to the emphasis. An output video signal is obtained by adding the edge signals thus obtained.
[0021]
According to a sixth aspect of the invention, there is provided the edge correction method according to the fifth aspect, wherein the coring is a signal having a threshold value or less determined by the corrected coring level signal from the extracted edge signal. It is characterized by being performed by removing.
[0022]
The invention according to claim 7 relates to the edge correction method according to claim 5, wherein the coring converts a range of negative values in the input edge signal into positive values having the same absolute value, and the corrected core. The absolute value of the signal in the range corresponding to the negative value input of the signal obtained by shifting in the negative direction by the threshold value determined by the ring level signal and removing the negative value range in the shifted signal is equal. Negative value It is characterized by being performed by conversion.
[0023]
The invention according to claim 8 relates to the edge correction method according to claim 5, wherein the coring converts an input edge signal composed of a binary signal including two's complement into an absolute value, and from the absolute value, The corrected coring level signal is subtracted from the edge signal, and a negative value range is removed from the edge signal as a result of the subtraction, and converted to a binary signal including two's complement. It is said.
[0024]
DETAILED DESCRIPTION OF THE INVENTION
Embodiments of the present invention will be described below with reference to the drawings. The description will be made specifically using examples.
◇ First example
FIG. 1 is a block diagram showing the configuration of an edge correction circuit according to a first embodiment of the present invention, and FIG. 2 is a timing chart for explaining the operation of the edge correction circuit according to this embodiment.
[0025]
As shown in FIG. 1, the edge correction circuit of this example includes a shading correction coefficient generation circuit 1, a multiplier 2, an edge extraction band pass filter (BPF) 3, a coring circuit 4A, a multiplier 5, and the like. , An adder 6 and a multiplier 7. Among these, the shading correction coefficient generation circuit 1, the multiplier 2, the edge extraction BPF 3, the multiplier 5, and the adder 6 are the same as those in the conventional example shown in FIG. Detailed description is omitted.
[0026]
The configuration of the coring circuit 4A is the same as that of the conventional coring circuit shown in FIG. 9, but the edge signal from the edge extraction BPF 3 is corrected by the shading correction coefficient from the multiplier 7. By performing a coring process according to the coring level signal, an edge signal in which the noise component is attenuated is output. The multiplier 7 multiplies the coring level signal by the shading correction coefficient from the shading correction coefficient generation circuit 4 to generate a coring level signal corrected according to the shading correction coefficient.
[0027]
FIG. 2 explains the operation of the edge correction circuit of this example using a timing chart, and shows each signal of one scanning period in each part of the edge correction circuit shown in FIG. Is the input video signal S1, (b) is the shading correction coefficient signal S2, (c) is the shading corrected video signal S3, (d) is the coring level signal S5 corrected according to the edge signal S4 and the shading correction coefficient. (E) shows the output signal S6 of the coring circuit 4A, and (f) shows the output video signal S8. In these figures, the horizontal axis represents an image of one scanning period when the center of the screen is c. The time position of each corresponding signal is represented, and the vertical axis represents the level of each signal.
[0028]
The operation of the edge correction circuit of this example will be described below with reference to FIGS.
The input video signal S1 represents the outline of a subject formed of a rectangle and should have a rectangular wave shape. However, based on the characteristics of the photographing lens of the camera, as shown in FIG. The left and right signal levels are lowered with the center position c as the center. In the input video signal S1, noise is superimposed on the top and bottom of the input video signal S1, as shown by the sand pattern in the figure.
[0029]
The input video signal S1 is generated in the multiplier 2 in the shading correction coefficient generation circuit 1 and is small at the center c of the screen as shown in FIG. 2B, but gradually increases at the left and right sides of the screen. The reduction in the left and right signal levels is corrected by multiplying by the shading correction coefficient S2 that is included, and the result is output as a shading-corrected video signal S3 as shown in FIG.
The amplitude of the video signal S3 is increased by being amplified at the time of shading correction, and noise is also amplified and increased at that time.
[0030]
The shading-corrected video signal S3 is input to the edge extraction BPF 3. In the edge extraction BPF 3, as in the case of the conventional example, by performing processing such as double difference, the amplitude increases at a position corresponding to the left and right contours of the subject, as shown in FIG. An edge signal S4 is extracted. Noise is also superimposed on the edge signal S4 as shown by the sand pattern.
On the other hand, the multiplier 7 multiplies the coring level signal by the shading correction coefficient S2 from the shading correction coefficient generation circuit 1 so as to be small at the center c of the screen and on the left and right sides of the screen according to the shading correction coefficient. A corrected coring level signal S5 is generated consisting of a gradually increasing threshold.
[0031]
The edge signal S4 extracted in the edge extracting BPF 3 is added to the coring circuit 4A together with the corrected coring level signal S5 from the multiplier 5. In the coring circuit 4A, the noise component as shown in FIG. 2 (e) is removed from the edge signal S4 by blocking the portion within the positive / negative threshold range determined by the corrected coring level signal S5. An output signal S6 comprising the removed edge signal is obtained.
[0032]
The multiplier 5 multiplies the output signal S6 of the coring circuit 4A by an edge enhancement signal that determines the degree of enhancement with respect to the edge, whereby a signal S7 composed of the enhanced edge signal is output. The output signal 7 and the shading-corrected video signal S3 from the multiplier 2 are added by the adder 6 so that the output video after shading correction and edge enhancement as shown in FIG. A signal S8 is obtained.
In the output video signal S8, noise based on the shading process (schematically shown by a sand pattern) is superimposed, but the noise superimposed on the edge signal of the portion where the shading correction coefficient is large is removed by the coring process. Therefore, it is prevented from being amplified by the edge enhancement process and superposed on the output video signal S8.
[0033]
Thus, in the edge correction circuit of this example, when coring the edge signal extracted from the video signal after shading correction in the coring circuit 4A, the coring level signal corrected according to the shading correction coefficient is used. Since the coring process is performed according to the fixed threshold value, it is possible to prevent the noise component increased by the edge correction process from being superimposed on the noise increased by the shading correction.
Therefore, according to the edge correction circuit of this example, the problem that the noise of the video signal after the shading correction is increased by the edge correction processing as in the conventional edge correction circuit is solved.
[0034]
◇ Second embodiment
3 is a block diagram showing a configuration of an edge correction circuit according to a second embodiment of the present invention, FIG. 4 is a diagram showing input / output characteristics of each part in this embodiment, and FIG. 5 is a coring according to this embodiment. It is a figure explaining prevention of the sudden change of the edge component in a circuit output.
As shown in FIG. 3, the edge correction circuit of this example includes a shading correction coefficient generation circuit 1, a multiplier 2, an edge extraction band pass filter (BPF) 3, a coring circuit 4B, a multiplier 5, and the like. , An adder 6 and a multiplier 7. Among these, the shading correction coefficient generating circuit 1, the multiplier 2, the edge extracting BPF 3, the multiplier 5, the adder 6, and the multiplier 7 are the same as those in the first embodiment shown in FIG. In this case, detailed description of these will be omitted.
[0035]
The coring circuit 4 </ b> B includes a first signal conversion circuit 11, a subtracter 12, a limit circuit 13, and a second signal conversion circuit 14.
The signal conversion circuit 11 performs processing for converting a portion having a negative value in the input signal from the edge extraction BPF 3 into a positive value having the same absolute value and outputting the same. The subtracter 12 subtracts the output of the multiplier 7 from the output of the signal conversion circuit 11. The limit circuit 13 blocks a portion having a negative value in the output of the subtractor 12. The signal conversion circuit 14 performs processing for converting a portion having a negative value in the input signal from the limit circuit 13 into a positive value having the same absolute value and outputting the same.
[0036]
The operation of the edge correction circuit of this example will be described below with reference to FIGS.
The first signal conversion circuit 11 converts the range corresponding to the negative side input to the positive value having the same absolute value with respect to the input from the edge extraction BPF 3 as shown in FIG. In addition, an output signal having only a positive value is generated.
[0037]
As shown in FIG. 4B, the subtractor 12 is a core that is corrected from the input signal by the shading correction coefficient from the multiplier 7 indicated by t in the figure, with respect to the input signal from the signal conversion circuit 11. The output signal is generated by shifting the level in the negative direction by a threshold value determined by the ring level signal.
The limit circuit 13 cuts off the signal in the range having a negative value with respect to the input signal from the subtractor 12, and generates an output signal having only a positive value as shown in FIG. .
[0038]
The second signal conversion circuit 14 converts the signal in the range corresponding to the negative input to the signal having only a positive value from the limit circuit 13 into a signal having a negative value having the same absolute value. As shown in FIG. 4D, the signal is output as a signal having a positive value when the input is in the positive range and having a negative value when the input is in the negative range.
[0039]
Next, the action of preventing an edge component sudden change in the coring circuit output in the case of the edge correction circuit of this example will be described with reference to FIG.
[0040]
FIG. 5A illustrates the coring circuit output in the case of the conventional example shown in FIG. 8 or the first embodiment shown in FIG.
If the input is positive, the coring circuit output is reduced by decreasing the input and the coring circuit output is at point A where the input is equal to the threshold determined by the coring factor or the corrected coring factor. Although the value is equal to the threshold value, when the input becomes lower than that, the output is cut off and the coring circuit output suddenly becomes zero.
When the input is negative, the coring circuit output increases as the input increases, and the input becomes equal to the threshold value determined by (coring coefficient or corrected coring coefficient) × (−1). At the point B, the coring circuit output becomes a value equal to the threshold value, but when the input exceeds it, the output is cut off and the coring circuit output suddenly becomes zero.
In the case of such characteristics, in the range where the input is below the threshold value, the edge component, which is the output of the coring circuit, suddenly changes to 0, and the image becomes unnatural.
[0041]
FIG. 5B illustrates the coring circuit output in the case of the edge correction circuit of the second embodiment shown in FIG.
If the input is positive, the coring circuit output will decrease due to the decrease in input, and the coring circuit output will be at point A ′ where the input is equal to the threshold determined by the coring factor or the corrected coring factor. Even if the input becomes less than 0, it does not change.
When the input is negative, the coring circuit output increases as the input increases, and the input becomes equal to the threshold value determined by (coring coefficient or corrected coring coefficient) × (−1). At the point B ′, the coring circuit output becomes 0, and it does not change even if the input becomes more than that.
Therefore, in the case of the coring circuit 4B of the second embodiment, the edge component that is the output of the coring circuit does not change suddenly to 0 at the boundary where the input falls below the threshold value. A more natural image can be obtained.
[0042]
Thus, in the edge correction circuit of this example, when coring the edge signal extracted from the video signal after shading correction in the coring circuit 4B, the coring level signal corrected according to the shading correction coefficient is used. Since the coring process is performed with a fixed threshold, it is possible to prevent the noise component increased by the edge correction process from being superimposed on the noise increased by the shading correction, and the input of the coring circuit is the threshold. Even in the range below the value, the edge component, which is the output of the coring circuit, does not change abruptly and becomes 0, so that a more natural image can be obtained.
[0043]
◇ Third example
FIG. 6 is a block diagram showing a configuration of an edge correction circuit according to a third embodiment of the present invention, and FIG. 7 is a diagram showing a logic circuit configuration of each part of the coring circuit in this embodiment.
As shown in FIG. 6, the edge correction circuit of this example includes a shading correction coefficient generation circuit 1, a multiplier 2, an edge extraction bandpass filter (BPF) 3A, a coring circuit 4C, a multiplier 5, and the like. , An adder 6 and a multiplier 7. Among these, the shading correction coefficient generation circuit 1, the multiplier 2, the multiplier 5, the adder 6, and the multiplier 7 are the same as those in the first embodiment shown in FIG. The detailed description of is omitted. The coring circuit 4C further includes an absolute value conversion circuit 21, a subtracter 22, a limit circuit 23, and an absolute value-2 complement conversion circuit 24.
[0044]
The edge extraction BPF 3A extracts an edge component from the shading-corrected video signal from the multiplier 2 and outputs it as an edge signal composed of n-bit data having a negative value of 2's complement and a sign bit.
In the coring circuit 4C, the absolute value conversion circuit 21 includes an exclusive OR (EX-OR) circuit 211 and a half adder 212 as shown in FIG.
In the absolute value conversion circuit 21, in the EX-OR circuit 211, an exclusive OR operation between the n-bit input representing the negative value represented by 2's complement from the edge extraction BPF 3A and the sign bit (1 bit) is performed. In the half adder 212, the sign bit is added to the calculation result from the EX-OR circuit 211. Thus, when the sign bit is 0 (indicating a positive value), the n-bit signal from the edge extraction BPF 3A is output as it is, and when the sign bit is 1 (indicating a negative value), EX-OR An output obtained by inverting the n-bit signal from the edge extracting BPF 3A is generated from the circuit 211, and 1 is added to the output from the EX-OR circuit 211 in the half adder 212, whereby the input from the edge extracting BPF 3A is input. Is converted into a signal composed of n-bit data representing an absolute value and a sign and output.
[0045]
The subtractor 22 subtracts the coring level signal corrected by the shading correction coefficient from the multiplier 7 from the n-bit signal representing the absolute value from the absolute value circuit 21, thereby obtaining the absolute value circuit 21. To generate an n-bit output obtained by subtracting a threshold value corresponding to the corrected coring level signal from the n-bit signal representing the absolute value.
[0046]
The limit circuit 23 includes an AND circuit 231 as shown in FIG.
In the AND circuit 231, when the sign bit in the n-bit input signal from the subtracter 22 is 1, all the output bits are set to 0, and when the sign bit is 0, the n-bit signal is output as it is. Produces an n-bit output that blocks the negative range at the input from the subtractor 22.
[0047]
As shown in FIG. 7C, the absolute value −2 complement conversion circuit 24 includes an exclusive OR (EX-OR) circuit 241 and a half adder 242.
In the absolute value-2 complement conversion circuit 24, the EX-OR circuit 241 performs an exclusive OR operation of the n-bit input from the limit circuit 23 and the sign bit from the edge extraction BPF 3A, and half addition In the unit 242, the sign bit is added to the operation result from the EX-OR circuit 241. Thus, when the sign bit is 0, the n-bit signal from the limit circuit 23 is output as it is, and when the sign bit is 1, the EX-OR circuit 241 outputs an output obtained by inverting the signal from the limit circuit 23. The half adder 242 adds 1 to the output from the EX-OR circuit 241 to convert the input from the limit circuit 23 into an n-bit signal having a negative value of 2's complement. appear.
[0048]
Thus, in the edge correction circuit of this example, the same processing as in the coring circuit 4B in the second embodiment is performed by the logic circuit, and the edge signal extracted from the video signal after shading correction is cored. At this time, since the coring process is performed with the threshold value determined by the coring level signal corrected according to the shading correction coefficient, the noise component increased by the edge correction process is superimposed on the noise increased by the shading correction. Since the edge component, which is the output of the coring circuit, does not change abruptly even in the range where the input of the coring circuit falls below the threshold value, the image becomes more natural. Can be obtained.
[0049]
The embodiment of the present invention has been described in detail with reference to the drawings. However, the specific configuration is not limited to this embodiment, and even if there is a design change or the like without departing from the gist of the present invention. Included in the invention. For example, in the case of the third embodiment, the bit number n of input / output signals in each part forming the coring circuit can be arbitrarily determined according to the circuit design.
[0050]
【The invention's effect】
As described above, according to the edge correction circuit of the present invention, when coring the edge signal extracted from the video signal after shading correction, it is determined by the coring level signal corrected according to the shading correction coefficient. Since the coring process is performed using the threshold value, it is possible to prevent the noise component increased by the edge correction process from being superimposed on the noise increased by the shading correction.
Further, according to the edge correction circuit of the present invention, the edge component that is the output of the coring circuit does not change suddenly to 0 even in the range where the input of the coring circuit is below the threshold value. A more natural image can be obtained.
[Brief description of the drawings]
FIG. 1 is a block diagram showing a configuration of an edge correction circuit according to a first embodiment of the present invention.
FIG. 2 is a timing chart for explaining the operation of the edge correction circuit according to the embodiment;
FIG. 3 is a block diagram showing a configuration of an edge correction circuit according to a second embodiment of the present invention.
FIG. 4 is a diagram showing input / output characteristics of each part in the same example.
FIG. 5 is a diagram for explaining prevention of sudden change of an edge component in a coring circuit output according to the same embodiment;
FIG. 6 is a block diagram showing a configuration of an edge correction circuit according to a third embodiment of the present invention.
FIG. 7 is a diagram showing a logic circuit configuration of each part of the coring circuit in the same embodiment;
FIG. 8 is a diagram illustrating a configuration example of a conventional edge correction circuit.
FIG. 9 is a diagram showing a logic circuit configuration example of a conventional coring circuit.
FIG. 10 is a timing chart for explaining the operation of a conventional edge correction circuit.
[Explanation of symbols]
1 Shading correction coefficient generator
2 multiplier (first multiplication means)
3 Bandpass filter for edge detection (BPF) (edge extraction means)
4A, 4B, 4C coring circuit (coring means)
5 Multiplier (third multiplication means)
6 Adder (addition means)
7 Multiplier (second multiplication means)
11 Signal conversion circuit (first signal conversion means)
12 Subtractor (subtraction means)
13 Limit circuit (limit means)
14 Signal conversion circuit (second signal conversion means)
21 Absolute value circuit (absolute value means)
22 Subtractor (subtraction means)
23 Limit circuit (limit means)
24 Complement conversion circuit of absolute value-2 (complement conversion means of absolute value-2)

Claims (8)

  A first multiplying unit for multiplying an input video signal by a predetermined shading correction coefficient and outputting a shading-corrected video signal; an edge extracting unit for extracting an edge signal from the shading-corrected video signal; and a coring level Second multiplying means for outputting a corrected coring level signal by multiplying the signal by the shading correction coefficient, and coring the extracted edge signal in accordance with the corrected coring level signal. And coring means for outputting a cored edge signal, a third multiplying means for outputting the emphasized edge signal by multiplying the cored edge signal by a predetermined emphasis degree, and the first The emphasized edge signal from the third multiplication means is added to the shading corrected video signal from the multiplication means. Edge correction circuit, characterized in that an adding means for obtaining power video signal.   The coring means comprises threshold processing means for generating an output signal by removing a signal below a threshold determined by the corrected coring level signal from an input edge signal. The edge correction circuit according to 1. The coring means outputs a signal in a range corresponding to a negative value input in the input edge signal as a positive value having an equal absolute value, and an output signal of the first signal conversion means, Subtracting means for generating an output by shifting in a negative direction by a threshold value determined by the corrected coring level signal, limit means for removing a negative value range in the output signal of the subtracting means, and 2. The edge correction circuit according to claim 1, further comprising second signal conversion means for outputting a signal in a range corresponding to a negative value input in the output signal as a negative value having an equal absolute value.   The coring means converts an input edge signal composed of a binary signal including two's complement into an absolute value, and subtracts the corrected coring level signal from the edge signal composed of the absolute value. A subtracting means; a limit means for removing a negative value range in the edge signal of the subtraction result; and an absolute value-2's complement for converting the output edge signal of the limit means from an absolute value to a binary signal including 2's complement 2. The edge correction circuit according to claim 1, further comprising conversion means.   An input video signal is multiplied by a predetermined shading correction coefficient to generate a shading-corrected video signal, an edge signal is extracted from the shading-corrected video signal, and a coring level signal is multiplied by the shading correction coefficient To generate a corrected coring level signal, coring the extracted edge signal according to the corrected coring level signal to generate a coring edge signal, An emphasized edge signal is generated by multiplying the cored edge signal by a predetermined emphasis degree, and an output video signal is obtained by adding the emphasized edge signal to the shading-corrected video signal. Edge correction method.   6. The edge correction method according to claim 5, wherein the coring is performed by removing a signal below a threshold determined by the corrected coring level signal from the extracted edge signal. The coring converts a negative value range in the input edge signal to a positive value having an equal absolute value, and shifts in a negative direction by a threshold value determined by the corrected coring level signal in the shifted signal. edge correction method according to claim 5, wherein the performed by converting the range signal to remove negative values, a negative value is equal to the absolute value of the range of the signal corresponding to the input of a negative value.   The coring converts an input edge signal composed of a binary signal including two's complement to an absolute value, subtracts the corrected coring level signal from the edge signal composed of the absolute value, and an edge of the subtraction result 6. The edge correction method according to claim 5, wherein the edge correction method is performed by removing a negative value range from the signal and converting the signal to a binary signal including a two's complement.

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